From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id F40A8A00C3; Mon, 15 Aug 2022 01:06:08 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id F3CCD41181; Mon, 15 Aug 2022 01:03:57 +0200 (CEST) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by mails.dpdk.org (Postfix) with ESMTP id 06E6E42C08 for ; Mon, 15 Aug 2022 01:03:54 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660518235; x=1692054235; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=kbSVhzGkATdbHWP375kfWEdJGKRjOZL2hKrnZ95xxxk=; b=KwVKIe0izJK8cnv181M8fER1AhPqTNAj9EWkE/YzstDvitfJM13RhGey iZwRYz0EWhUE4pmqcBwK+XJcXutEK22uF3XRsaVsUwQUf05pujG9BYTsD /pURPDDM1mJawsXy7TwPS6K62g4j+BfjnhkLVwlfkMhIJUek6jxNM8O8+ I+meBxGORZEbBP7mI+vhedIQhngzctbIvTzRme2Nf3VF6mgZh5Ayqf4E2 lEHoYzq3mq2/G2E+qsRduKCmDcM245yRwISnlv+Gr97s0L+Sj+7C/oE4X Zt5PcU8hEG31rbOdlin5bqWDdV30XSiP4hvjRVqODcIFag2lVkRYX4BMU A==; X-IronPort-AV: E=McAfee;i="6400,9594,10439"; a="289427595" X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="289427595" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2022 16:03:54 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="934296688" Received: from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.4]) by fmsmga005.fm.intel.com with ESMTP; 14 Aug 2022 16:03:53 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, Qi Zhang , Jacob Keller Subject: [PATCH 27/70] net/ice/base: convert IO expander handle to u16 Date: Mon, 15 Aug 2022 03:12:23 -0400 Message-Id: <20220815071306.2910599-28-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220815071306.2910599-1-qi.z.zhang@intel.com> References: <20220815071306.2910599-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The io_expander_handle cached value is marked as an __le16, but several places track the node handle with u16 values. Unify all the interfaces so that it is stored and reported as a u16, and keep the low level conversion to LE16 only at the direct firmware interface. This fixes warnings from sparse about mixing __le16 and u16, and will fix related issues on platforms which use Big Endian format. Signed-off-by: Jacob Keller Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_ptp_hw.c | 10 +++++++--- drivers/net/ice/base/ice_type.h | 2 +- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c index 1fb0c57a8c..3df0915cd3 100644 --- a/drivers/net/ice/base/ice_ptp_hw.c +++ b/drivers/net/ice/base/ice_ptp_hw.c @@ -4483,7 +4483,7 @@ ice_ptp_port_cmd_e810(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd, * will return cached value */ static enum ice_status -ice_get_pca9575_handle(struct ice_hw *hw, __le16 *pca9575_handle) +ice_get_pca9575_handle(struct ice_hw *hw, u16 *pca9575_handle) { struct ice_aqc_get_link_topo cmd; u8 node_part_number, idx; @@ -4564,13 +4564,15 @@ ice_read_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 *data) struct ice_aqc_link_topo_addr link_topo; enum ice_status status; __le16 addr; + u16 handle; memset(&link_topo, 0, sizeof(link_topo)); - status = ice_get_pca9575_handle(hw, &link_topo.handle); + status = ice_get_pca9575_handle(hw, &handle); if (status) return status; + link_topo.handle = CPU_TO_LE16(handle); link_topo.topo_params.node_type_ctx = (ICE_AQC_LINK_TOPO_NODE_CTX_PROVIDED << ICE_AQC_LINK_TOPO_NODE_CTX_S); @@ -4594,13 +4596,15 @@ ice_write_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 data) struct ice_aqc_link_topo_addr link_topo; enum ice_status status; __le16 addr; + u16 handle; memset(&link_topo, 0, sizeof(link_topo)); - status = ice_get_pca9575_handle(hw, &link_topo.handle); + status = ice_get_pca9575_handle(hw, &handle); if (status) return status; + link_topo.handle = CPU_TO_LE16(handle); link_topo.topo_params.node_type_ctx = (ICE_AQC_LINK_TOPO_NODE_CTX_PROVIDED << ICE_AQC_LINK_TOPO_NODE_CTX_S); diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index d94fdcda67..b8be0d948a 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -1259,7 +1259,7 @@ struct ice_hw { struct LIST_HEAD_TYPE rss_list_head; ice_declare_bitmap(hw_ptype, ICE_FLOW_PTYPE_MAX); u8 dvm_ena; - __le16 io_expander_handle; + u16 io_expander_handle; }; /* Statistics collected by each port, VSI, VEB, and S-channel */ -- 2.31.1