From: Qi Zhang <qi.z.zhang@intel.com>
To: qiming.yang@intel.com
Cc: dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,
Jie Wang <jie1x.wang@intel.com>
Subject: [PATCH 56/70] net/ice/base: enable FDIR support for L2TPv2
Date: Mon, 15 Aug 2022 03:12:52 -0400 [thread overview]
Message-ID: <20220815071306.2910599-57-qi.z.zhang@intel.com> (raw)
In-Reply-To: <20220815071306.2910599-1-qi.z.zhang@intel.com>
Add L2TPv2(include PPP over L2TPv2) support for FDIR.
And add support PPPoL2TPv2oUDP with inner IPV4/IPV6/UDP/TCP for
FDIR.
The supported L2TPv2 packets are defined as below:
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_CONTROL
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV4
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV4_UDP
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV4_TCP
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV6
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV6_UDP
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV6_TCP
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_CONTROL
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV4
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV4_UDP
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV4_TCP
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV6
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV6_UDP
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV6_TCP
Signed-off-by: Jie Wang <jie1x.wang@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_fdir.c | 711 +++++++++++++++++++++++++++++++-
drivers/net/ice/base/ice_fdir.h | 19 +
drivers/net/ice/base/ice_type.h | 27 ++
3 files changed, 755 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
index 6bbab0c843..a554379075 100644
--- a/drivers/net/ice/base/ice_fdir.c
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -1827,6 +1827,289 @@ static const u8 ice_fdir_tcp6_gtpu4_eh_up_gre6_pkt[] = {
0x00, 0x00, 0x00, 0x00,
};
+/* IPV4 L2TPV2 control */
+static const u8 ice_fdir_ipv4_l2tpv2_ctrl_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x28, 0x00, 0x01, 0x00, 0x00, 0x40, 0x11,
+ 0x7c, 0xc2, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x06, 0xa5, 0x06, 0xa5, 0x00, 0x14,
+ 0x2c, 0x6b, 0xc8, 0x02, 0x00, 0x0c, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+/* IPV4 L2TPV2 */
+static const u8 ice_fdir_ipv4_l2tpv2_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x28, 0x00, 0x01, 0x00, 0x00, 0x40, 0x11,
+ 0x7c, 0xc2, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x06, 0xa5, 0x06, 0xa5, 0x00, 0x14,
+ 0x2c, 0x6b, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00,
+};
+
+/* IPV4 PPPOL2TPV2 */
+static const u8 ice_fdir_ipv4_l2tpv2_ppp_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x26, 0x00, 0x01, 0x00, 0x00, 0x40, 0x11,
+ 0x7c, 0xc4, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x06, 0xa5, 0x06, 0xa5, 0x00, 0x12,
+ 0xf5, 0x77, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00,
+ 0xff, 0x03, 0x00, 0x00, 0x00, 0x00,
+};
+
+/* IPV4 PPPOL2TPV2 IPV4 */
+static const u8 ice_fdir_ipv4_l2tpv2_ppp4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x3a, 0x00, 0x01, 0x00, 0x00, 0x40, 0x11,
+ 0x7c, 0xb0, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x06, 0xa5, 0x06, 0xa5, 0x00, 0x26,
+ 0xf5, 0x2e, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00,
+ 0xff, 0x03, 0x00, 0x21, 0x45, 0x00, 0x00, 0x14,
+ 0x00, 0x01, 0x00, 0x00, 0x40, 0x00, 0x7c, 0xe7,
+ 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00, 0x00, 0x01,
+ 0x00, 0x00,
+};
+
+/* IPV4 PPPOL2TPV2 IPV4 UDP */
+static const u8 ice_fdir_udp4_l2tpv2_ppp4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x42, 0x00, 0x01, 0x00, 0x00, 0x40, 0x11,
+ 0x7c, 0xa8, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x06, 0xa5, 0x06, 0xa5, 0x00, 0x2e,
+ 0xf3, 0x3a, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00,
+ 0xff, 0x03, 0x00, 0x21, 0x45, 0x00, 0x00, 0x1c,
+ 0x00, 0x01, 0x00, 0x00, 0x40, 0x11, 0x7c, 0xce,
+ 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00, 0x00, 0x01,
+ 0x00, 0x35, 0x00, 0x35, 0x00, 0x08, 0x01, 0x72,
+ 0x00, 0x00,
+};
+
+/* IPV4 PPPOL2TPV2 IPV4 TCP */
+static const u8 ice_fdir_tcp4_l2tpv2_ppp4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x4e, 0x00, 0x01, 0x00, 0x00, 0x40, 0x11,
+ 0x7c, 0x9c, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x06, 0xa5, 0x06, 0xa5, 0x00, 0x3a,
+ 0xf3, 0x23, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00,
+ 0xff, 0x03, 0x00, 0x21, 0x45, 0x00, 0x00, 0x28,
+ 0x00, 0x01, 0x00, 0x00, 0x40, 0x06, 0x7c, 0xcd,
+ 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00, 0x00, 0x01,
+ 0x00, 0x14, 0x00, 0x50, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x50, 0x02, 0x20, 0x00,
+ 0x91, 0x7c, 0x00, 0x00, 0x00, 0x00,
+};
+
+/* IPV4 PPPOL2TPV2 IPV6 */
+static const u8 ice_fdir_ipv6_l2tpv2_ppp4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x4e, 0x00, 0x01, 0x00, 0x00, 0x40, 0x11,
+ 0x7c, 0x9c, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x06, 0xa5, 0x06, 0xa5, 0x00, 0x3a,
+ 0x59, 0x8e, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00,
+ 0xff, 0x03, 0x00, 0x57, 0x60, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x3b, 0x40, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+};
+
+/* IPV4 PPPOL2TPV2 IPV6 UDP */
+static const u8 ice_fdir_udp6_l2tpv2_ppp4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x56, 0x00, 0x01, 0x00, 0x00, 0x40, 0x11,
+ 0x7c, 0x94, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x06, 0xa5, 0x06, 0xa5, 0x00, 0x42,
+ 0x83, 0x91, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00,
+ 0xff, 0x03, 0x00, 0x57, 0x60, 0x00, 0x00, 0x00,
+ 0x00, 0x08, 0x11, 0x40, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x01, 0x00, 0x35, 0x00, 0x35,
+ 0x00, 0x08, 0xff, 0x72, 0x00, 0x00,
+};
+
+/* IPV4 PPPOL2TPV2 IPV6 TCP */
+static const u8 ice_fdir_tcp6_l2tpv2_ppp4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x62, 0x00, 0x01, 0x00, 0x00, 0x40, 0x11,
+ 0x7c, 0x88, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x06, 0xa5, 0x06, 0xa5, 0x00, 0x4e,
+ 0x8e, 0x6e, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00,
+ 0xff, 0x03, 0x00, 0x57, 0x60, 0x00, 0x00, 0x00,
+ 0x00, 0x14, 0x06, 0x40, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x01, 0x00, 0x14, 0x00, 0x50,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x50, 0x02, 0x20, 0x00, 0x8f, 0x7d, 0x00, 0x00,
+ 0x00, 0x00,
+};
+
+/* IPV6 L2TPV2 control */
+static const u8 ice_fdir_ipv6_l2tpv2_ctrl_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x14, 0x11, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x06, 0xa5,
+ 0x06, 0xa5, 0x00, 0x14, 0x2a, 0x6c, 0xc8, 0x02,
+ 0x00, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00,
+};
+
+/* IPV6 L2TPV2 */
+static const u8 ice_fdir_ipv6_l2tpv2_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x14, 0x11, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x06, 0xa5,
+ 0x06, 0xa5, 0x00, 0x14, 0x2a, 0x6c, 0x00, 0x02,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+/* IPV6 PPPOL2TPV2 */
+static const u8 ice_fdir_ipv6_l2tpv2_ppp_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x12, 0x11, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x06, 0xa5,
+ 0x06, 0xa5, 0x00, 0x12, 0xf3, 0x78, 0x00, 0x02,
+ 0x00, 0x00, 0x00, 0x00, 0xff, 0x03, 0x00, 0x00,
+ 0x00, 0x00,
+};
+
+/* IPV6 PPPOL2TPV2 IPV4 */
+static const u8 ice_fdir_ipv4_l2tpv2_ppp6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x26, 0x11, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x06, 0xa5,
+ 0x06, 0xa5, 0x00, 0x26, 0xf3, 0x2f, 0x00, 0x02,
+ 0x00, 0x00, 0x00, 0x00, 0xff, 0x03, 0x00, 0x21,
+ 0x45, 0x00, 0x00, 0x14, 0x00, 0x01, 0x00, 0x00,
+ 0x40, 0x00, 0x7c, 0xe7, 0x7f, 0x00, 0x00, 0x01,
+ 0x7f, 0x00, 0x00, 0x01, 0x00, 0x00,
+};
+
+/* IPV6 PPPOL2TPV2 IPV4 UDP */
+static const u8 ice_fdir_udp4_l2tpv2_ppp6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x2e, 0x11, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x06, 0xa5,
+ 0x06, 0xa5, 0x00, 0x2e, 0xf1, 0x3b, 0x00, 0x02,
+ 0x00, 0x00, 0x00, 0x00, 0xff, 0x03, 0x00, 0x21,
+ 0x45, 0x00, 0x00, 0x1c, 0x00, 0x01, 0x00, 0x00,
+ 0x40, 0x11, 0x7c, 0xce, 0x7f, 0x00, 0x00, 0x01,
+ 0x7f, 0x00, 0x00, 0x01, 0x00, 0x35, 0x00, 0x35,
+ 0x00, 0x08, 0x01, 0x72, 0x00, 0x00,
+};
+
+/* IPV6 PPPOL2TPV2 IPV4 TCP */
+static const u8 ice_fdir_tcp4_l2tpv2_ppp6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x3a, 0x11, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x06, 0xa5,
+ 0x06, 0xa5, 0x00, 0x3a, 0xf1, 0x24, 0x00, 0x02,
+ 0x00, 0x00, 0x00, 0x00, 0xff, 0x03, 0x00, 0x21,
+ 0x45, 0x00, 0x00, 0x28, 0x00, 0x01, 0x00, 0x00,
+ 0x40, 0x06, 0x7c, 0xcd, 0x7f, 0x00, 0x00, 0x01,
+ 0x7f, 0x00, 0x00, 0x01, 0x00, 0x14, 0x00, 0x50,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x50, 0x02, 0x20, 0x00, 0x91, 0x7c, 0x00, 0x00,
+ 0x00, 0x00,
+};
+
+/* IPV6 PPPOL2TPV2 IPV6 */
+static const u8 ice_fdir_ipv6_l2tpv2_ppp6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x3a, 0x11, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x06, 0xa5,
+ 0x06, 0xa5, 0x00, 0x3a, 0x57, 0x8f, 0x00, 0x02,
+ 0x00, 0x00, 0x00, 0x00, 0xff, 0x03, 0x00, 0x57,
+ 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3b, 0x40,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
+ 0x00, 0x00,
+};
+
+/* IPV6 PPPOL2TPV2 IPV6 UDP */
+static const u8 ice_fdir_udp6_l2tpv2_ppp6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x42, 0x11, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x06, 0xa5,
+ 0x06, 0xa5, 0x00, 0x42, 0x81, 0x92, 0x00, 0x02,
+ 0x00, 0x00, 0x00, 0x00, 0xff, 0x03, 0x00, 0x57,
+ 0x60, 0x00, 0x00, 0x00, 0x00, 0x08, 0x11, 0x40,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
+ 0x00, 0x35, 0x00, 0x35, 0x00, 0x08, 0xff, 0x72,
+ 0x00, 0x00,
+};
+
+/* IPV6 PPPOL2TPV2 IPV6 TCP */
+static const u8 ice_fdir_tcp6_l2tpv2_ppp6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x4e, 0x11, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x06, 0xa5,
+ 0x06, 0xa5, 0x00, 0x4e, 0x8c, 0x6f, 0x00, 0x02,
+ 0x00, 0x00, 0x00, 0x00, 0xff, 0x03, 0x00, 0x57,
+ 0x60, 0x00, 0x00, 0x00, 0x00, 0x14, 0x06, 0x40,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
+ 0x00, 0x14, 0x00, 0x50, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x50, 0x02, 0x20, 0x00,
+ 0x8f, 0x7d, 0x00, 0x00, 0x00, 0x00,
+};
+
static const u8 ice_fdir_tcpv6_pkt[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
@@ -2912,6 +3195,142 @@ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = {
sizeof(ice_fdir_tcp6_gtpu4_eh_up_gre6_pkt),
ice_fdir_tcp6_gtpu4_eh_up_gre6_pkt,
},
+ /* IPV4 L2TPV2 CONTROL */
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_CONTROL,
+ sizeof(ice_fdir_ipv4_l2tpv2_ctrl_pkt),
+ ice_fdir_ipv4_l2tpv2_ctrl_pkt,
+ sizeof(ice_fdir_ipv4_l2tpv2_ctrl_pkt),
+ ice_fdir_ipv4_l2tpv2_ctrl_pkt,
+ },
+ /* IPV4 L2TPV2 */
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2,
+ sizeof(ice_fdir_ipv4_l2tpv2_pkt),
+ ice_fdir_ipv4_l2tpv2_pkt,
+ sizeof(ice_fdir_ipv4_l2tpv2_pkt),
+ ice_fdir_ipv4_l2tpv2_pkt,
+ },
+ /* IPV4 L2TPV2 PPP */
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP,
+ sizeof(ice_fdir_ipv4_l2tpv2_ppp_pkt),
+ ice_fdir_ipv4_l2tpv2_ppp_pkt,
+ sizeof(ice_fdir_ipv4_l2tpv2_ppp_pkt),
+ ice_fdir_ipv4_l2tpv2_ppp_pkt,
+ },
+ /* IPV4 L2TPV2 PPP IPV4 */
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV4,
+ sizeof(ice_fdir_ipv4_l2tpv2_ppp4_pkt),
+ ice_fdir_ipv4_l2tpv2_ppp4_pkt,
+ sizeof(ice_fdir_ipv4_l2tpv2_ppp4_pkt),
+ ice_fdir_ipv4_l2tpv2_ppp4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV4_UDP,
+ sizeof(ice_fdir_udp4_l2tpv2_ppp4_pkt),
+ ice_fdir_udp4_l2tpv2_ppp4_pkt,
+ sizeof(ice_fdir_udp4_l2tpv2_ppp4_pkt),
+ ice_fdir_udp4_l2tpv2_ppp4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV4_TCP,
+ sizeof(ice_fdir_tcp4_l2tpv2_ppp4_pkt),
+ ice_fdir_tcp4_l2tpv2_ppp4_pkt,
+ sizeof(ice_fdir_tcp4_l2tpv2_ppp4_pkt),
+ ice_fdir_tcp4_l2tpv2_ppp4_pkt,
+ },
+ /* IPV4 L2TPV2 PPP IPV6 */
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV6,
+ sizeof(ice_fdir_ipv6_l2tpv2_ppp4_pkt),
+ ice_fdir_ipv6_l2tpv2_ppp4_pkt,
+ sizeof(ice_fdir_ipv6_l2tpv2_ppp4_pkt),
+ ice_fdir_ipv6_l2tpv2_ppp4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV6_UDP,
+ sizeof(ice_fdir_udp6_l2tpv2_ppp4_pkt),
+ ice_fdir_udp6_l2tpv2_ppp4_pkt,
+ sizeof(ice_fdir_udp6_l2tpv2_ppp4_pkt),
+ ice_fdir_udp6_l2tpv2_ppp4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV6_TCP,
+ sizeof(ice_fdir_tcp6_l2tpv2_ppp4_pkt),
+ ice_fdir_tcp6_l2tpv2_ppp4_pkt,
+ sizeof(ice_fdir_tcp6_l2tpv2_ppp4_pkt),
+ ice_fdir_tcp6_l2tpv2_ppp4_pkt,
+ },
+ /* IPV6 L2TPV2 CONTROL */
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_CONTROL,
+ sizeof(ice_fdir_ipv6_l2tpv2_ctrl_pkt),
+ ice_fdir_ipv6_l2tpv2_ctrl_pkt,
+ sizeof(ice_fdir_ipv6_l2tpv2_ctrl_pkt),
+ ice_fdir_ipv6_l2tpv2_ctrl_pkt,
+ },
+ /* IPV6 L2TPV2 */
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2,
+ sizeof(ice_fdir_ipv6_l2tpv2_pkt),
+ ice_fdir_ipv6_l2tpv2_pkt,
+ sizeof(ice_fdir_ipv6_l2tpv2_pkt),
+ ice_fdir_ipv6_l2tpv2_pkt,
+ },
+ /* IPV6 L2TPV2 PPP */
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP,
+ sizeof(ice_fdir_ipv6_l2tpv2_ppp_pkt),
+ ice_fdir_ipv6_l2tpv2_ppp_pkt,
+ sizeof(ice_fdir_ipv6_l2tpv2_ppp_pkt),
+ ice_fdir_ipv6_l2tpv2_ppp_pkt,
+ },
+ /* IPV6 L2TPV2 PPP IPV4 */
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV4,
+ sizeof(ice_fdir_ipv4_l2tpv2_ppp6_pkt),
+ ice_fdir_ipv4_l2tpv2_ppp6_pkt,
+ sizeof(ice_fdir_ipv4_l2tpv2_ppp6_pkt),
+ ice_fdir_ipv4_l2tpv2_ppp6_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV4_UDP,
+ sizeof(ice_fdir_udp4_l2tpv2_ppp6_pkt),
+ ice_fdir_udp4_l2tpv2_ppp6_pkt,
+ sizeof(ice_fdir_udp4_l2tpv2_ppp6_pkt),
+ ice_fdir_udp4_l2tpv2_ppp6_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV4_TCP,
+ sizeof(ice_fdir_tcp4_l2tpv2_ppp6_pkt),
+ ice_fdir_tcp4_l2tpv2_ppp6_pkt,
+ sizeof(ice_fdir_tcp4_l2tpv2_ppp6_pkt),
+ ice_fdir_tcp4_l2tpv2_ppp6_pkt,
+ },
+ /* IPV6 L2TPV2 PPP IPV6 */
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV6,
+ sizeof(ice_fdir_ipv6_l2tpv2_ppp6_pkt),
+ ice_fdir_ipv6_l2tpv2_ppp6_pkt,
+ sizeof(ice_fdir_ipv6_l2tpv2_ppp6_pkt),
+ ice_fdir_ipv6_l2tpv2_ppp6_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV6_UDP,
+ sizeof(ice_fdir_udp6_l2tpv2_ppp6_pkt),
+ ice_fdir_udp6_l2tpv2_ppp6_pkt,
+ sizeof(ice_fdir_udp6_l2tpv2_ppp6_pkt),
+ ice_fdir_udp6_l2tpv2_ppp6_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV6_TCP,
+ sizeof(ice_fdir_tcp6_l2tpv2_ppp6_pkt),
+ ice_fdir_tcp6_l2tpv2_ppp6_pkt,
+ sizeof(ice_fdir_tcp6_l2tpv2_ppp6_pkt),
+ ice_fdir_tcp6_l2tpv2_ppp6_pkt,
+ },
{
ICE_FLTR_PTYPE_NONF_IPV6_TCP,
sizeof(ice_fdir_tcpv6_pkt), ice_fdir_tcpv6_pkt,
@@ -3290,6 +3709,111 @@ ice_fdir_get_open_tunnel_port(struct ice_hw *hw, enum ice_fltr_ptype flow,
return ICE_SUCCESS;
}
+/**
+ * ice_fdir_gen_l2tpv2_pkt - generate L2TPv2 training packet
+ * @pkt: pointer to return filter packet
+ * @l2tpv2_data: pointer to ice_fdir_l2tpv2 data structure
+ * @idx: the matched packet index of FDIR training packet table
+ * @offset: position of end byte for PPPoL2TPv2 packet
+ * @tun: true implies generate a tunnel packet
+ */
+static u16
+ice_fdir_gen_l2tpv2_pkt(u8 *pkt, struct ice_fdir_l2tpv2 *l2tpv2_data,
+ u16 idx, u16 offset, bool tun)
+{
+ u16 flags_version;
+ u16 offset_size;
+ u16 pos;
+
+ /* get outer packet end pos, 10 = l2tpv2 default len 6 + ppp len 4 */
+ pos = offset - ICE_L2TPV2_PKT_LENGTH - ICE_PPP_PKT_LENGTH;
+
+ /* copy outer packet */
+ ice_memcpy(pkt, ice_fdir_pkt[idx].tun_pkt, pos, ICE_NONDMA_TO_NONDMA);
+
+ /* copy l2tpv2 packet common header */
+ ice_memcpy(pkt + pos, &l2tpv2_data->flags_version,
+ sizeof(l2tpv2_data->flags_version),
+ ICE_NONDMA_TO_NONDMA);
+ pos += sizeof(l2tpv2_data->flags_version);
+
+ flags_version = BE16_TO_CPU(l2tpv2_data->flags_version);
+ if (flags_version == 0) {
+ l2tpv2_data->flags_version = CPU_TO_BE16(ICE_L2TPV2_FLAGS_VER);
+ flags_version = ICE_L2TPV2_FLAGS_VER;
+ }
+
+ /* copy l2tpv2 length */
+ if (flags_version & ICE_L2TPV2_FLAGS_LEN) {
+ ice_memcpy(pkt + pos, &l2tpv2_data->length,
+ sizeof(l2tpv2_data->length),
+ ICE_NONDMA_TO_NONDMA);
+ pos += sizeof(l2tpv2_data->length);
+ }
+
+ /* copy l2tpv2 tunnel id */
+ ice_memcpy(pkt + pos, &l2tpv2_data->tunnel_id,
+ sizeof(l2tpv2_data->tunnel_id),
+ ICE_NONDMA_TO_NONDMA);
+ pos += sizeof(l2tpv2_data->tunnel_id);
+
+ /* copy l2tpv2 session id */
+ ice_memcpy(pkt + pos, &l2tpv2_data->session_id,
+ sizeof(l2tpv2_data->session_id),
+ ICE_NONDMA_TO_NONDMA);
+ pos += sizeof(l2tpv2_data->session_id);
+
+ /* copy l2tpv2 ns + nr */
+ if (flags_version & ICE_L2TPV2_FLAGS_SEQ) {
+ ice_memcpy(pkt + pos, &l2tpv2_data->ns,
+ sizeof(l2tpv2_data->ns),
+ ICE_NONDMA_TO_NONDMA);
+ pos += sizeof(l2tpv2_data->ns);
+
+ ice_memcpy(pkt + pos, &l2tpv2_data->nr,
+ sizeof(l2tpv2_data->nr),
+ ICE_NONDMA_TO_NONDMA);
+ pos += sizeof(l2tpv2_data->nr);
+ }
+
+ /* copy l2tpv2 offset size + offset padding */
+ if (flags_version & ICE_L2TPV2_FLAGS_OFF) {
+ ice_memcpy(pkt + pos, &l2tpv2_data->offset_size,
+ sizeof(l2tpv2_data->offset_size),
+ ICE_NONDMA_TO_NONDMA);
+ pos += sizeof(l2tpv2_data->offset_size);
+ /* insert 0 into offset padding */
+ offset_size = BE16_TO_CPU(l2tpv2_data->offset_size);
+ if (offset_size > ICE_FDIR_MAX_RAW_PKT_SIZE -
+ ice_fdir_pkt[idx].tun_pkt_len) {
+ offset_size = ICE_FDIR_MAX_RAW_PKT_SIZE -
+ ice_fdir_pkt[idx].tun_pkt_len;
+ }
+ ice_memset(pkt + pos, 0, offset_size, ICE_NONDMA_MEM);
+ pos += offset_size;
+ }
+
+ if (ice_fdir_pkt[idx].tun_pkt_len > offset) {
+ /* copy ppp packet */
+ ice_memcpy(pkt + pos,
+ ice_fdir_pkt[idx].tun_pkt + offset -
+ ICE_PPP_PKT_LENGTH,
+ ICE_PPP_PKT_LENGTH,
+ ICE_NONDMA_TO_NONDMA);
+ pos += ICE_PPP_PKT_LENGTH;
+
+ /* copy inner packets */
+ if (tun) {
+ ice_memcpy(pkt + pos,
+ ice_fdir_pkt[idx].tun_pkt + offset,
+ ice_fdir_pkt[idx].tun_pkt_len - offset,
+ ICE_NONDMA_TO_NONDMA);
+ }
+ }
+
+ return pos;
+}
+
/**
* ice_fdir_get_gen_prgm_pkt - generate a training packet
* @hw: pointer to the hardware structure
@@ -3306,6 +3830,9 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
u16 tnl_port;
u8 *loc;
u16 idx;
+ u16 flags_version;
+ u16 pos;
+ u16 offset;
if (input->flow_type == ICE_FLTR_PTYPE_NONF_IPV4_OTHER) {
switch (input->ip.v4.proto) {
@@ -3346,9 +3873,29 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
break;
if (idx == ICE_FDIR_NUM_PKT)
return ICE_ERR_PARAM;
+
if (!tun) {
- ice_memcpy(pkt, ice_fdir_pkt[idx].pkt,
- ice_fdir_pkt[idx].pkt_len, ICE_NONDMA_TO_NONDMA);
+ switch (flow) {
+ case ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_CONTROL:
+ case ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2:
+ case ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP:
+ offset = ICE_FDIR_IPV4_L2TPV2_PPP_PKT_OFF;
+ ice_fdir_gen_l2tpv2_pkt(pkt, &input->l2tpv2_data,
+ idx, offset, tun);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_CONTROL:
+ case ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2:
+ case ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP:
+ offset = ICE_FDIR_IPV6_L2TPV2_PPP_PKT_OFF;
+ ice_fdir_gen_l2tpv2_pkt(pkt, &input->l2tpv2_data,
+ idx, offset, tun);
+ break;
+ default:
+ ice_memcpy(pkt, ice_fdir_pkt[idx].pkt,
+ ice_fdir_pkt[idx].pkt_len,
+ ICE_NONDMA_TO_NONDMA);
+ break;
+ }
loc = pkt;
} else {
if (!ice_fdir_pkt[idx].tun_pkt)
@@ -3479,6 +4026,28 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
ICE_NONDMA_TO_NONDMA);
loc = &pkt[ICE_FDIR_V6_V4_GTPOGRE_EH_PKT_OFF];
break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV4:
+ case ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV4_UDP:
+ case ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV4_TCP:
+ case ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV6:
+ case ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV6_UDP:
+ case ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV6_TCP:
+ offset = ICE_FDIR_IPV4_L2TPV2_PPP_PKT_OFF;
+ pos = ice_fdir_gen_l2tpv2_pkt(pkt, &input->l2tpv2_data,
+ idx, offset, tun);
+ loc = &pkt[pos];
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV4:
+ case ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV4_UDP:
+ case ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV4_TCP:
+ case ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV6:
+ case ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV6_UDP:
+ case ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV6_TCP:
+ offset = ICE_FDIR_IPV6_L2TPV2_PPP_PKT_OFF;
+ pos = ice_fdir_gen_l2tpv2_pkt(pkt, &input->l2tpv2_data,
+ idx, offset, tun);
+ loc = &pkt[pos];
+ break;
default:
if (ice_fdir_get_open_tunnel_port(hw, flow, &tnl_port))
return ICE_ERR_DOES_NOT_EXIST;
@@ -4021,6 +4590,138 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
ice_pkt_insert_u8_tc(loc, ICE_IPV6_NO_MAC_TC_OFFSET,
input->ip.v6.tc);
break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_CONTROL:
+ ice_pkt_insert_mac_addr(loc, input->ext_data_outer.dst_mac);
+ ice_pkt_insert_mac_addr(loc + ETH_ALEN,
+ input->ext_data_outer.src_mac);
+ ice_pkt_insert_u16(loc, ICE_IPV4_L2TPV2_LEN_SESS_ID_OFFSET,
+ input->l2tpv2_data.session_id);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2:
+ case ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP:
+ ice_pkt_insert_mac_addr(loc, input->ext_data_outer.dst_mac);
+ ice_pkt_insert_mac_addr(loc + ETH_ALEN,
+ input->ext_data_outer.src_mac);
+ flags_version = BE16_TO_CPU(input->l2tpv2_data.flags_version);
+ if (flags_version & ICE_L2TPV2_FLAGS_LEN) {
+ ice_pkt_insert_u16(loc,
+ ICE_IPV4_L2TPV2_LEN_SESS_ID_OFFSET,
+ input->l2tpv2_data.session_id);
+ } else {
+ ice_pkt_insert_u16(loc,
+ ICE_IPV4_L2TPV2_SESS_ID_OFFSET,
+ input->l2tpv2_data.session_id);
+ }
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_CONTROL:
+ ice_pkt_insert_mac_addr(loc, input->ext_data_outer.dst_mac);
+ ice_pkt_insert_mac_addr(loc + ETH_ALEN,
+ input->ext_data_outer.src_mac);
+ ice_pkt_insert_u16(loc, ICE_IPV6_L2TPV2_LEN_SESS_ID_OFFSET,
+ input->l2tpv2_data.session_id);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2:
+ case ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP:
+ ice_pkt_insert_mac_addr(loc, input->ext_data_outer.dst_mac);
+ ice_pkt_insert_mac_addr(loc + ETH_ALEN,
+ input->ext_data_outer.src_mac);
+ flags_version = BE16_TO_CPU(input->l2tpv2_data.flags_version);
+ if (flags_version & ICE_L2TPV2_FLAGS_LEN) {
+ ice_pkt_insert_u16(loc,
+ ICE_IPV6_L2TPV2_LEN_SESS_ID_OFFSET,
+ input->l2tpv2_data.session_id);
+ } else {
+ ice_pkt_insert_u16(loc,
+ ICE_IPV6_L2TPV2_SESS_ID_OFFSET,
+ input->l2tpv2_data.session_id);
+ }
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV4:
+ case ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV4:
+ ice_pkt_insert_u32(loc, ICE_IPV4_NO_MAC_DST_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u32(loc, ICE_IPV4_NO_MAC_SRC_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u8(loc, ICE_IPV4_NO_MAC_TOS_OFFSET,
+ input->ip.v4.tos);
+ ice_pkt_insert_u8(loc, ICE_IPV4_NO_MAC_TTL_OFFSET,
+ input->ip.v4.ttl);
+ ice_pkt_insert_u8(loc, ICE_IPV4_NO_MAC_PROTO_OFFSET,
+ input->ip.v4.proto);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV4_UDP:
+ case ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV4_UDP:
+ ice_pkt_insert_u32(loc, ICE_IPV4_NO_MAC_DST_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u16(loc, ICE_UDP4_NO_MAC_DST_PORT_OFFSET,
+ input->ip.v4.src_port);
+ ice_pkt_insert_u32(loc, ICE_IPV4_NO_MAC_SRC_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u16(loc, ICE_UDP4_NO_MAC_SRC_PORT_OFFSET,
+ input->ip.v4.dst_port);
+ ice_pkt_insert_u8(loc, ICE_IPV4_NO_MAC_TOS_OFFSET,
+ input->ip.v4.tos);
+ ice_pkt_insert_u8(loc, ICE_IPV4_NO_MAC_TTL_OFFSET,
+ input->ip.v4.ttl);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV4_TCP:
+ case ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV4_TCP:
+ ice_pkt_insert_u32(loc, ICE_IPV4_NO_MAC_DST_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u16(loc, ICE_TCP4_NO_MAC_DST_PORT_OFFSET,
+ input->ip.v4.src_port);
+ ice_pkt_insert_u32(loc, ICE_IPV4_NO_MAC_SRC_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u16(loc, ICE_TCP4_NO_MAC_SRC_PORT_OFFSET,
+ input->ip.v4.dst_port);
+ ice_pkt_insert_u8(loc, ICE_IPV4_NO_MAC_TOS_OFFSET,
+ input->ip.v4.tos);
+ ice_pkt_insert_u8(loc, ICE_IPV4_NO_MAC_TTL_OFFSET,
+ input->ip.v4.ttl);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV6:
+ case ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV6:
+ ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_NO_MAC_DST_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_NO_MAC_SRC_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_u8_tc(loc, ICE_IPV6_NO_MAC_TC_OFFSET,
+ input->ip.v6.tc);
+ ice_pkt_insert_u8(loc, ICE_IPV6_NO_MAC_HLIM_OFFSET,
+ input->ip.v6.hlim);
+ ice_pkt_insert_u8(loc, ICE_IPV6_NO_MAC_PROTO_OFFSET,
+ input->ip.v6.proto);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV6_UDP:
+ case ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV6_UDP:
+ ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_NO_MAC_DST_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_NO_MAC_SRC_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_u16(loc, ICE_UDP6_NO_MAC_DST_PORT_OFFSET,
+ input->ip.v6.src_port);
+ ice_pkt_insert_u16(loc, ICE_UDP6_NO_MAC_SRC_PORT_OFFSET,
+ input->ip.v6.dst_port);
+ ice_pkt_insert_u8_tc(loc, ICE_IPV6_NO_MAC_TC_OFFSET,
+ input->ip.v6.tc);
+ ice_pkt_insert_u8(loc, ICE_IPV6_NO_MAC_HLIM_OFFSET,
+ input->ip.v6.hlim);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV6_TCP:
+ case ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV6_TCP:
+ ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_NO_MAC_DST_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_NO_MAC_SRC_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_u16(loc, ICE_TCP6_NO_MAC_DST_PORT_OFFSET,
+ input->ip.v6.src_port);
+ ice_pkt_insert_u16(loc, ICE_TCP6_NO_MAC_SRC_PORT_OFFSET,
+ input->ip.v6.dst_port);
+ ice_pkt_insert_u8_tc(loc, ICE_IPV6_NO_MAC_TC_OFFSET,
+ input->ip.v6.tc);
+ ice_pkt_insert_u8(loc, ICE_IPV6_NO_MAC_HLIM_OFFSET,
+ input->ip.v6.hlim);
+ break;
case ICE_FLTR_PTYPE_NONF_IPV6_TCP:
ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET,
input->ip.v6.src_ip);
@@ -4252,6 +4953,12 @@ ice_fdir_comp_rules_extended(struct ice_fdir_fltr *a, struct ice_fdir_fltr *b)
return false;
if (memcmp(&a->ecpri_mask, &b->ecpri_mask, sizeof(a->ecpri_mask)))
return false;
+ if (memcmp(&a->l2tpv2_data.session_id, &b->l2tpv2_data.session_id,
+ sizeof(a->l2tpv2_data.session_id)))
+ return false;
+ if (memcmp(&a->l2tpv2_mask.session_id, &b->l2tpv2_mask.session_id,
+ sizeof(a->l2tpv2_mask.session_id)))
+ return false;
return true;
}
diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h
index d57b1daecd..ced880fff1 100644
--- a/drivers/net/ice/base/ice_fdir.h
+++ b/drivers/net/ice/base/ice_fdir.h
@@ -26,6 +26,8 @@
#define ICE_FDIR_V4_V6_GTPOGRE_EH_PKT_OFF 102
#define ICE_FDIR_V6_V4_GTPOGRE_EH_PKT_OFF 102
#define ICE_FDIR_V6_V6_GTPOGRE_EH_PKT_OFF 122
+#define ICE_FDIR_IPV4_L2TPV2_PPP_PKT_OFF 52
+#define ICE_FDIR_IPV6_L2TPV2_PPP_PKT_OFF 72
#define ICE_FDIR_TUN_PKT_OFF 50
#define ICE_FDIR_MAX_RAW_PKT_SIZE (512 + ICE_FDIR_TUN_PKT_OFF)
@@ -96,6 +98,10 @@
#define ICE_IPV4_VXLAN_VNI_OFFSET 46
#define ICE_ECPRI_TP0_PC_ID_OFFSET 18
#define ICE_IPV4_UDP_ECPRI_TP0_PC_ID_OFFSET 46
+#define ICE_IPV4_L2TPV2_SESS_ID_OFFSET 46
+#define ICE_IPV6_L2TPV2_SESS_ID_OFFSET 66
+#define ICE_IPV4_L2TPV2_LEN_SESS_ID_OFFSET 48
+#define ICE_IPV6_L2TPV2_LEN_SESS_ID_OFFSET 68
#define ICE_FDIR_MAX_FLTRS 16384
@@ -222,6 +228,16 @@ struct ice_fdir_ecpri {
__be16 pc_id;
};
+struct ice_fdir_l2tpv2 {
+ __be16 flags_version;
+ __be16 length;
+ __be16 tunnel_id;
+ __be16 session_id;
+ __be16 ns;
+ __be16 nr;
+ __be16 offset_size;
+};
+
struct ice_fdir_extra {
u8 dst_mac[ETH_ALEN]; /* dest MAC address */
u8 src_mac[ETH_ALEN]; /* src MAC address */
@@ -261,6 +277,9 @@ struct ice_fdir_fltr {
struct ice_fdir_ecpri ecpri_data;
struct ice_fdir_ecpri ecpri_mask;
+ struct ice_fdir_l2tpv2 l2tpv2_data;
+ struct ice_fdir_l2tpv2 l2tpv2_mask;
+
struct ice_fdir_extra ext_data;
struct ice_fdir_extra ext_mask;
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index af56849482..6d0adf0dd1 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -282,6 +282,15 @@ struct ice_phy_info {
#define ICE_MAX_NUM_MIRROR_RULES 64
+#define ICE_L2TPV2_FLAGS_CTRL 0x8000
+#define ICE_L2TPV2_FLAGS_LEN 0x4000
+#define ICE_L2TPV2_FLAGS_SEQ 0x0800
+#define ICE_L2TPV2_FLAGS_OFF 0x0200
+#define ICE_L2TPV2_FLAGS_VER 0x0002
+
+#define ICE_L2TPV2_PKT_LENGTH 6
+#define ICE_PPP_PKT_LENGTH 4
+
/* protocol enumeration for filters */
enum ice_fltr_ptype {
/* NONE - used for undef/error */
@@ -479,6 +488,24 @@ enum ice_fltr_ptype {
ICE_FLTR_PTYPE_NONF_IPV4_UDP_VXLAN_IPV4_TCP,
ICE_FLTR_PTYPE_NONF_IPV4_UDP_VXLAN_IPV4_SCTP,
ICE_FLTR_PTYPE_NONF_IPV4_UDP_VXLAN_IPV4_OTHER,
+ ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_CONTROL,
+ ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2,
+ ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP,
+ ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV4,
+ ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV4_UDP,
+ ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV4_TCP,
+ ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV6,
+ ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV6_UDP,
+ ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV6_TCP,
+ ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_CONTROL,
+ ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2,
+ ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP,
+ ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV4,
+ ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV4_UDP,
+ ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV4_TCP,
+ ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV6,
+ ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV6_UDP,
+ ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV6_TCP,
ICE_FLTR_PTYPE_MAX,
};
--
2.31.1
next prev parent reply other threads:[~2022-08-14 23:08 UTC|newest]
Thread overview: 149+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-15 7:11 [PATCH 00/70] ice base code update Qi Zhang
2022-08-15 7:11 ` [PATCH 01/70] net/ice/base: add netlist helper functions Qi Zhang
2022-08-15 7:11 ` [PATCH 02/70] net/ice/base: get NVM CSS Header length from the CSS Header Qi Zhang
2022-08-15 7:11 ` [PATCH 03/70] net/ice/base: combine functions for VSI promisc Qi Zhang
2022-08-15 7:12 ` [PATCH 04/70] net/ice/base: make function names more generic Qi Zhang
2022-08-15 7:12 ` [PATCH 05/70] net/ice/base: fix incorrect division during E822 PTP init Qi Zhang
2022-08-15 7:12 ` [PATCH 06/70] net/ice/base: added auto drop blocking packets functionality Qi Zhang
2022-08-15 7:12 ` [PATCH 07/70] net/ice/base: fix 100M speed Qi Zhang
2022-08-15 7:12 ` [PATCH 08/70] net/ice/base: support VXLAN and GRE for RSS Qi Zhang
2022-08-15 7:12 ` [PATCH 09/70] net/ice/base: fix DSCP PFC TLV creation Qi Zhang
2022-08-15 7:12 ` [PATCH 10/70] net/ice/base: complete the health status codes Qi Zhang
2022-08-15 7:12 ` [PATCH 11/70] net/ice/base: explicitly name E822 HW-dependent functions Qi Zhang
2022-08-15 7:12 ` [PATCH 12/70] net/ice/base: move code block Qi Zhang
2022-08-15 7:12 ` [PATCH 13/70] net/ice/base: add PHY 56G destination address Qi Zhang
2022-08-15 7:12 ` [PATCH 14/70] net/ice/base: add 56G PHY register definitions Qi Zhang
2022-08-15 7:12 ` [PATCH 15/70] net/ice/base: implement 56G PHY access functions Qi Zhang
2022-08-15 7:12 ` [PATCH 16/70] net/ice/base: implement 56G PHY setup functions Qi Zhang
2022-08-15 7:12 ` [PATCH 17/70] net/ice/base: work around missing PTP caps Qi Zhang
2022-08-15 7:12 ` [PATCH 18/70] net/ice/base: enable calling of ETH56G functions Qi Zhang
2022-08-15 7:12 ` [PATCH 19/70] net/ice/base: fix PHY type 10G SFI C2C to media type mapping Qi Zhang
2022-08-15 7:12 ` [PATCH 20/70] net/ice/base: refactor DDP code Qi Zhang
2022-08-15 7:12 ` [PATCH 21/70] net/ice/base: add E822 generic PCI device ID Qi Zhang
2022-08-15 7:12 ` [PATCH 22/70] net/ice/base: support double VLAN rules Qi Zhang
2022-08-15 7:12 ` [PATCH 23/70] net/ice/base: report NVM version numbers on mismatch Qi Zhang
2022-08-15 7:12 ` [PATCH 24/70] net/ice/base: create duplicate detection for ACL rules Qi Zhang
2022-08-15 7:12 ` [PATCH 25/70] net/ice/base: fix incorrect function descriptions for parser Qi Zhang
2022-08-15 7:12 ` [PATCH 26/70] net/ice/base: fix endian format Qi Zhang
2022-08-15 7:12 ` [PATCH 27/70] net/ice/base: convert IO expander handle to u16 Qi Zhang
2022-08-15 7:12 ` [PATCH 28/70] net/ice/base: convert array of u8 to bitmap Qi Zhang
2022-08-15 7:12 ` [PATCH 29/70] net/ice/base: fix array overflow in add switch recipe code Qi Zhang
2022-08-15 7:12 ` [PATCH 30/70] net/ice/base: fix bit finding range over ptype bitmap Qi Zhang
2022-08-15 7:12 ` [PATCH 31/70] net/ice/base: move function to internal Qi Zhang
2022-08-15 7:12 ` [PATCH 32/70] net/ice/base: change PHY/QUAD/ports definitions Qi Zhang
2022-08-15 7:12 ` [PATCH 33/70] net/ice/base: add AQ command to config node attribute Qi Zhang
2022-08-15 7:12 ` [PATCH 34/70] net/ice/base: fix null pointer dereference during Qi Zhang
2022-08-15 7:12 ` [PATCH 35/70] net/ice/base: refine default VSI config Qi Zhang
2022-08-15 7:12 ` [PATCH 36/70] net/ice/base: ice-shared: fix add mac rule Qi Zhang
2022-08-15 7:12 ` [PATCH 37/70] net/ice/base: support Tx topo config Qi Zhang
2022-08-15 7:12 ` [PATCH 38/70] net/ice/base: adjust the VSI/Aggregator layers Qi Zhang
2022-08-15 7:12 ` [PATCH 39/70] net/ice/base: add data typecasting to match sizes Qi Zhang
2022-08-15 7:12 ` [PATCH 40/70] net/ice/base: add helper function to check if device is E823 Qi Zhang
2022-08-15 7:12 ` [PATCH 41/70] net/ice/base: add low latency Tx timestamp read Qi Zhang
2022-08-15 7:12 ` [PATCH 42/70] net/ice/base: fix double VLAN error in promisc mode Qi Zhang
2022-08-15 7:12 ` [PATCH 43/70] net/ice/base: move functions Qi Zhang
2022-08-15 7:12 ` [PATCH 44/70] net/ice/base: complete support for Tx balancing Qi Zhang
2022-08-15 7:12 ` [PATCH 45/70] net/ice/base: update definitions for AQ internal debug dump Qi Zhang
2022-08-15 7:12 ` [PATCH 46/70] net/ice/base: update macros of L2TPv2 ptype value Qi Zhang
2022-08-15 7:12 ` [PATCH 47/70] net/ice/base: refine header file include Qi Zhang
2022-08-15 7:12 ` [PATCH 48/70] net/ice/base: ignore already exist error Qi Zhang
2022-08-15 7:12 ` [PATCH 49/70] net/ice/base: clean up with no lookups Qi Zhang
2022-08-15 7:12 ` [PATCH 50/70] net/ice/base: add support for Auto FEC with FEC disabled Qi Zhang
2022-08-15 7:12 ` [PATCH 51/70] net/ice/base: update PHY type high max index Qi Zhang
2022-08-15 7:12 ` [PATCH 52/70] net/ice/base: clean the main timer command register Qi Zhang
2022-08-15 7:12 ` [PATCH 53/70] net/ice/base: add support for custom WPC and LGB NICs Qi Zhang
2022-08-15 7:12 ` [PATCH 54/70] net/ice/base: add generic MAC with 3K signature segment Qi Zhang
2022-08-15 7:12 ` [PATCH 55/70] net/ice/base: enable RSS support for L2TPv2 session ID Qi Zhang
2022-08-15 7:12 ` Qi Zhang [this message]
2022-08-15 7:12 ` [PATCH 57/70] net/ice/base: add GRE Tap tunnel type Qi Zhang
2022-08-15 7:12 ` [PATCH 58/70] net/ice/base: fix wrong inputset of GTPoGRE packet Qi Zhang
2022-08-15 7:12 ` [PATCH 59/70] net/ice/base: add unload flag for control queue shutdown Qi Zhang
2022-08-15 7:12 ` [PATCH 60/70] net/ice/base: update comment for overloaded GCO bit Qi Zhang
2022-08-15 7:12 ` [PATCH 61/70] net/ice/base: complete pending LLDP MIB Qi Zhang
2022-08-15 7:12 ` [PATCH 62/70] net/ice/base: add function to parse DCBX config Qi Zhang
2022-08-15 7:12 ` [PATCH 63/70] net/ice/base: handle default VSI lookup type Qi Zhang
2022-08-15 7:13 ` [PATCH 64/70] net/ice/base: convert 1588 structs to use bitfields Qi Zhang
2022-08-15 7:13 ` [PATCH 65/70] net/ice/base: remove unnecessary fields Qi Zhang
2022-08-15 7:13 ` [PATCH 66/70] net/ice/base: add GTP tunnel Qi Zhang
2022-08-15 7:13 ` [PATCH 67/70] net/ice/base: check for PTP HW lock more frequently Qi Zhang
2022-08-15 7:13 ` [PATCH 68/70] net/ice/base: expose API for move sched element Qi Zhang
2022-08-15 7:13 ` [PATCH 69/70] net/ice/base: couple code clean Qi Zhang
2022-08-15 7:13 ` [PATCH 70/70] net/ice/base: update copyright Qi Zhang
2022-08-15 7:30 ` [PATCH v2 00/70] ice base code update Qi Zhang
2022-08-15 7:30 ` [PATCH v2 01/70] net/ice/base: add netlist helper functions Qi Zhang
2022-08-15 6:28 ` Yang, Qiming
2022-08-15 7:30 ` [PATCH v2 02/70] net/ice/base: get NVM CSS Header length from the CSS Header Qi Zhang
2022-08-15 7:30 ` [PATCH v2 03/70] net/ice/base: combine functions for VSI promisc Qi Zhang
2022-08-15 7:31 ` [PATCH v2 04/70] net/ice/base: make function names more generic Qi Zhang
2022-08-15 7:31 ` [PATCH v2 05/70] net/ice/base: fix incorrect division during E822 PTP init Qi Zhang
2022-08-15 7:31 ` [PATCH v2 06/70] net/ice/base: added auto drop blocking packets functionality Qi Zhang
2022-08-15 7:31 ` [PATCH v2 07/70] net/ice/base: fix 100M speed Qi Zhang
2022-08-15 7:31 ` [PATCH v2 08/70] net/ice/base: support VXLAN and GRE for RSS Qi Zhang
2022-08-15 7:31 ` [PATCH v2 09/70] net/ice/base: fix DSCP PFC TLV creation Qi Zhang
2022-08-15 7:31 ` [PATCH v2 10/70] net/ice/base: complete the health status codes Qi Zhang
2022-08-15 7:31 ` [PATCH v2 11/70] net/ice/base: explicitly name E822 HW-dependent functions Qi Zhang
2022-08-15 7:31 ` [PATCH v2 12/70] net/ice/base: move code block Qi Zhang
2022-08-15 6:30 ` Yang, Qiming
2022-08-15 7:31 ` [PATCH v2 13/70] net/ice/base: add PHY 56G destination address Qi Zhang
2022-08-15 7:31 ` [PATCH v2 14/70] net/ice/base: add 56G PHY register definitions Qi Zhang
2022-08-15 7:31 ` [PATCH v2 15/70] net/ice/base: implement 56G PHY access functions Qi Zhang
2022-08-15 7:31 ` [PATCH v2 16/70] net/ice/base: implement 56G PHY setup functions Qi Zhang
2022-08-15 7:31 ` [PATCH v2 17/70] net/ice/base: work around missing PTP caps Qi Zhang
2022-08-15 7:31 ` [PATCH v2 18/70] net/ice/base: enable calling of ETH56G functions Qi Zhang
2022-08-15 7:31 ` [PATCH v2 19/70] net/ice/base: fix PHY type 10G SFI C2C to media type mapping Qi Zhang
2022-08-15 7:31 ` [PATCH v2 20/70] net/ice/base: refactor DDP code Qi Zhang
2022-08-15 6:44 ` Yang, Qiming
2022-08-15 7:31 ` [PATCH v2 21/70] net/ice/base: add E822 generic PCI device ID Qi Zhang
2022-08-15 6:45 ` Yang, Qiming
2022-08-15 7:31 ` [PATCH v2 22/70] net/ice/base: support double VLAN rules Qi Zhang
2022-08-15 7:31 ` [PATCH v2 23/70] net/ice/base: report NVM version numbers on mismatch Qi Zhang
2022-08-15 7:31 ` [PATCH v2 24/70] net/ice/base: create duplicate detection for ACL rules Qi Zhang
2022-08-15 7:31 ` [PATCH v2 25/70] net/ice/base: fix incorrect function descriptions for parser Qi Zhang
2022-08-15 7:31 ` [PATCH v2 26/70] net/ice/base: fix endian format Qi Zhang
2022-08-15 7:31 ` [PATCH v2 27/70] net/ice/base: convert IO expander handle to u16 Qi Zhang
2022-08-15 7:31 ` [PATCH v2 28/70] net/ice/base: convert array of u8 to bitmap Qi Zhang
2022-08-15 7:31 ` [PATCH v2 29/70] net/ice/base: fix array overflow in add switch recipe code Qi Zhang
2022-08-15 7:31 ` [PATCH v2 30/70] net/ice/base: fix bit finding range over ptype bitmap Qi Zhang
2022-08-15 7:31 ` [PATCH v2 31/70] net/ice/base: move function to internal Qi Zhang
2022-08-22 5:34 ` Yang, Qiming
2022-08-15 7:31 ` [PATCH v2 32/70] net/ice/base: change PHY/QUAD/ports definitions Qi Zhang
2022-08-15 7:31 ` [PATCH v2 33/70] net/ice/base: add AQ command to config node attribute Qi Zhang
2022-08-15 7:31 ` [PATCH v2 34/70] net/ice/base: fix null pointer dereference during Qi Zhang
2022-08-15 7:31 ` [PATCH v2 35/70] net/ice/base: refine default VSI config Qi Zhang
2022-08-15 7:31 ` [PATCH v2 36/70] net/ice/base: fix add mac rule Qi Zhang
2022-08-15 7:31 ` [PATCH v2 37/70] net/ice/base: support Tx topo config Qi Zhang
2022-08-15 7:31 ` [PATCH v2 38/70] net/ice/base: adjust the VSI/Aggregator layers Qi Zhang
2022-08-15 7:31 ` [PATCH v2 39/70] net/ice/base: add data typecasting to match sizes Qi Zhang
2022-08-15 7:31 ` [PATCH v2 40/70] net/ice/base: add helper function to check if device is E823 Qi Zhang
2022-08-15 7:31 ` [PATCH v2 41/70] net/ice/base: add low latency Tx timestamp read Qi Zhang
2022-08-15 7:31 ` [PATCH v2 42/70] net/ice/base: fix double VLAN error in promisc mode Qi Zhang
2022-08-15 7:31 ` [PATCH v2 43/70] net/ice/base: move functions Qi Zhang
2022-08-15 7:31 ` [PATCH v2 44/70] net/ice/base: complete support for Tx balancing Qi Zhang
2022-08-15 7:31 ` [PATCH v2 45/70] net/ice/base: update definitions for AQ internal debug dump Qi Zhang
2022-08-15 7:31 ` [PATCH v2 46/70] net/ice/base: update macros of L2TPv2 ptype value Qi Zhang
2022-08-15 7:31 ` [PATCH v2 47/70] net/ice/base: refine header file include Qi Zhang
2022-08-15 7:31 ` [PATCH v2 48/70] net/ice/base: ignore already exist error Qi Zhang
2022-08-15 7:31 ` [PATCH v2 49/70] net/ice/base: clean up with no lookups Qi Zhang
2022-08-15 7:31 ` [PATCH v2 50/70] net/ice/base: add support for Auto FEC with FEC disabled Qi Zhang
2022-08-15 7:31 ` [PATCH v2 51/70] net/ice/base: update PHY type high max index Qi Zhang
2022-08-15 7:31 ` [PATCH v2 52/70] net/ice/base: clean the main timer command register Qi Zhang
2022-08-15 7:31 ` [PATCH v2 53/70] net/ice/base: add support for custom WPC and LGB NICs Qi Zhang
2022-08-15 7:31 ` [PATCH v2 54/70] net/ice/base: add generic MAC with 3K signature segment Qi Zhang
2022-08-15 7:31 ` [PATCH v2 55/70] net/ice/base: enable RSS support for L2TPv2 session ID Qi Zhang
2022-08-15 7:31 ` [PATCH v2 56/70] net/ice/base: enable FDIR support for L2TPv2 Qi Zhang
2022-08-15 7:31 ` [PATCH v2 57/70] net/ice/base: add GRE Tap tunnel type Qi Zhang
2022-08-15 7:31 ` [PATCH v2 58/70] net/ice/base: fix wrong inputset of GTPoGRE packet Qi Zhang
2022-08-15 7:31 ` [PATCH v2 59/70] net/ice/base: add unload flag for control queue shutdown Qi Zhang
2022-08-15 7:31 ` [PATCH v2 60/70] net/ice/base: update comment for overloaded GCO bit Qi Zhang
2022-08-15 7:31 ` [PATCH v2 61/70] net/ice/base: complete pending LLDP MIB Qi Zhang
2022-08-15 7:31 ` [PATCH v2 62/70] net/ice/base: add function to parse DCBX config Qi Zhang
2022-08-15 7:31 ` [PATCH v2 63/70] net/ice/base: handle default VSI lookup type Qi Zhang
2022-08-15 7:32 ` [PATCH v2 64/70] net/ice/base: convert 1588 structs to use bitfields Qi Zhang
2022-08-15 7:32 ` [PATCH v2 65/70] net/ice/base: remove unnecessary fields Qi Zhang
2022-08-15 7:32 ` [PATCH v2 66/70] net/ice/base: add GTP tunnel Qi Zhang
2022-08-15 7:32 ` [PATCH v2 67/70] net/ice/base: check for PTP HW lock more frequently Qi Zhang
2022-08-15 7:32 ` [PATCH v2 68/70] net/ice/base: expose API for move sched element Qi Zhang
2022-08-15 7:32 ` [PATCH v2 69/70] net/ice/base: couple code clean Qi Zhang
2022-08-15 7:32 ` [PATCH v2 70/70] net/ice/base: update copyright Qi Zhang
2022-08-22 5:36 ` [PATCH v2 00/70] ice base code update Yang, Qiming
2022-09-01 13:11 ` Zhang, Qi Z
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