From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8CE8AA00C3; Mon, 15 Aug 2022 01:08:58 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8B14442C9A; Mon, 15 Aug 2022 01:04:47 +0200 (CEST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id 80AE842B9C for ; Mon, 15 Aug 2022 01:04:44 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660518284; x=1692054284; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=FL09qs5FTxTm5U/G5Lkqalzep3yqgoMc+SxeMdh67Uw=; b=IKSg2+2kU9Wkuwc29OmZhDZWgez2tRNhlPm5upc8ntc+FFSXbCS9BSwC lcSw37Qj0YsUW6pJHWBlKENv0Y0Y5gVI0qJJoAO8qHQF1WGvLDoulQBpJ TnVpGDIIqd7DwB89JyCgDhgBHs0q3T+syBfNn/Dmfx9lyLUE7HJSDhQP6 lakNQbm65fOlnuLXO2BDWh2AZzYn8Rr5ayTQe5VF4iYe+eMpctaSbGbn4 VDiMacWa29LReF3s/b7cdszwLnkoYREOL1KHIi9yW9h7b+5owccHtIb6w +wFQQuwgAzTzXjVc5DFDWfa1h+7RumraPUr9t2YNBLSLfHY8ldpNGf4J2 w==; X-IronPort-AV: E=McAfee;i="6400,9594,10439"; a="293128808" X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="293128808" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2022 16:04:44 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="934296921" Received: from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.4]) by fmsmga005.fm.intel.com with ESMTP; 14 Aug 2022 16:04:42 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, Qi Zhang , Tsotne Chakhvadze , Karen Sornek , Anatolii Gerasymenko Subject: [PATCH 61/70] net/ice/base: complete pending LLDP MIB Date: Mon, 15 Aug 2022 03:12:57 -0400 Message-Id: <20220815071306.2910599-62-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220815071306.2910599-1-qi.z.zhang@intel.com> References: <20220815071306.2910599-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Completed structure ice_aqc_lldp_get_mib. Added 'Pending Event Enable' bit. Signed-off-by: Tsotne Chakhvadze Signed-off-by: Karen Sornek Signed-off-by: Anatolii Gerasymenko Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_adminq_cmd.h | 20 ++++++++++++++++++-- drivers/net/ice/base/ice_dcb.c | 3 +++ 2 files changed, 21 insertions(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h index e1a6847157..dc3c3269d4 100644 --- a/drivers/net/ice/base/ice_adminq_cmd.h +++ b/drivers/net/ice/base/ice_adminq_cmd.h @@ -1998,14 +1998,25 @@ struct ice_aqc_lldp_get_mib { #define ICE_AQ_LLDP_TX_ACTIVE 0 #define ICE_AQ_LLDP_TX_SUSPENDED 1 #define ICE_AQ_LLDP_TX_FLUSHED 3 +/* DCBX mode */ +#define ICE_AQ_LLDP_DCBX_S 6 +#define ICE_AQ_LLDP_DCBX_M (0x3 << ICE_AQ_LLDP_DCBX_S) +#define ICE_AQ_LLDP_DCBX_NA 0 +#define ICE_AQ_LLDP_DCBX_IEEE 1 +#define ICE_AQ_LLDP_DCBX_CEE 2 /* The following bytes are reserved for the Get LLDP MIB command (0x0A00) * and in the LLDP MIB Change Event (0x0A01). They are valid for the * Get LLDP MIB (0x0A00) response only. */ - u8 reserved1; + u8 state; +#define ICE_AQ_LLDP_MIB_CHANGE_STATE_S 0 +#define ICE_AQ_LLDP_MIB_CHANGE_STATE_M \ + (0x1 << ICE_AQ_LLDP_MIB_CHANGE_STATE_S) +#define ICE_AQ_LLDP_MIB_CHANGE_EXECUTED 0 +#define ICE_AQ_LLDP_MIB_CHANGE_PENDING 1 __le16 local_len; __le16 remote_len; - u8 reserved2[2]; + u8 reserved[2]; __le32 addr_high; __le32 addr_low; }; @@ -2016,6 +2027,11 @@ struct ice_aqc_lldp_set_mib_change { u8 command; #define ICE_AQ_LLDP_MIB_UPDATE_ENABLE 0x0 #define ICE_AQ_LLDP_MIB_UPDATE_DIS 0x1 +#define ICE_AQ_LLDP_MIB_PENDING_S 1 +#define ICE_AQ_LLDP_MIB_PENDING_M \ + (0x1 << ICE_AQ_LLDP_MIB_PENDING_S) +#define ICE_AQ_LLDP_MIB_PENDING_DISABLE 0 +#define ICE_AQ_LLDP_MIB_PENDING_ENABLE 1 u8 reserved[15]; }; diff --git a/drivers/net/ice/base/ice_dcb.c b/drivers/net/ice/base/ice_dcb.c index 7a850e62f4..d511a5f5ec 100644 --- a/drivers/net/ice/base/ice_dcb.c +++ b/drivers/net/ice/base/ice_dcb.c @@ -74,6 +74,9 @@ ice_aq_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_update, if (!ena_update) cmd->command |= ICE_AQ_LLDP_MIB_UPDATE_DIS; + else + cmd->command |= ICE_AQ_LLDP_MIB_PENDING_ENABLE << + ICE_AQ_LLDP_MIB_PENDING_S; return ice_aq_send_cmd(hw, &desc, NULL, 0, cd); } -- 2.31.1