From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 149CAA00C3; Mon, 15 Aug 2022 01:25:05 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 7E2FE42C73; Mon, 15 Aug 2022 01:23:06 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mails.dpdk.org (Postfix) with ESMTP id 9FA6C42C6F; Mon, 15 Aug 2022 01:23:04 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660519384; x=1692055384; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=J43I6398FsLaf+0CgJG9oYHwdzs/Fe3qvqKhitBSb1Q=; b=IkeCC2y4PcEwjci9HtTVQcEkt/wznxP4lNetodA47UVhFwrbQzG2Puvm xbgim5SzoGDBcIWVAqagQhJNy/6eHXqaG3QkpoEtG390GxVh6dKCvhLVl taOrCLoQrvi7BxHTh1BZpx04km/xmkPwtd/eauf42XTDzLnGpPyknTdu4 lvU2xDLyIicSk8R5BSG9sRAhO/9oUUGr9w6WL+NJZtM5/odcjFPex4EfA xu5540HFU854Mm0Jd00Vi612A9sg46AcQSEY4tkJDB+lzqdc5GNHBMwfK c//sH1h+sMzx7SF/WuJCI8zwXfNwkW23w7CLRBNhbXIMYesXoDI6usAAg g==; X-IronPort-AV: E=McAfee;i="6400,9594,10439"; a="291857966" X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="291857966" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2022 16:23:04 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="635283155" Received: from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.4]) by orsmga008.jf.intel.com with ESMTP; 14 Aug 2022 16:23:02 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, Qi Zhang , stable@dpdk.org, Jesse Brandeburg Subject: [PATCH v2 29/70] net/ice/base: fix array overflow in add switch recipe code Date: Mon, 15 Aug 2022 03:31:25 -0400 Message-Id: <20220815073206.2917968-30-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220815073206.2917968-1-qi.z.zhang@intel.com> References: <20220815071306.2910599-1-qi.z.zhang@intel.com> <20220815073206.2917968-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The array indexes in this function are used with a zero index in the fv_idx table, and with a +1 index in the lkup_idx arrays. The code was using the lookup index for the field vector in only one place in this function, but the code was never used after this point so just remove the bad line. This was caught by the undefined behavior sanitizer. Fixes: fed0c5ca5f19 ("net/ice/base: support programming a new switch recipe") Cc: stable@dpdk.org Signed-off-by: Jesse Brandeburg Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_switch.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index e59d191c46..b8e733f539 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -7315,7 +7315,6 @@ ice_add_sw_recipe(struct ice_hw *hw, struct ice_sw_recipe *rm, last_chain_entry->chain_idx = ICE_INVAL_CHAIN_IND; LIST_FOR_EACH_ENTRY(entry, &rm->rg_list, ice_recp_grp_entry, l_entry) { - last_chain_entry->fv_idx[i] = entry->chain_idx; buf[recps].content.lkup_indx[i] = entry->chain_idx; buf[recps].content.mask[i++] = CPU_TO_LE16(0xFFFF); ice_set_bit(entry->rid, rm->r_bitmap); -- 2.31.1