From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A4F4EA00C3; Mon, 15 Aug 2022 01:27:21 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E779142D06; Mon, 15 Aug 2022 01:23:53 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mails.dpdk.org (Postfix) with ESMTP id 9389842D00; Mon, 15 Aug 2022 01:23:51 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660519431; x=1692055431; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=4+wd5lS6D+HqVSHf9XmXUS0DeKv2p2HB5dkMe7oBb5w=; b=VM1baH5/zCnst9/uMh4KCsDnq9rdv5sZ9VncNcJSgHxaEbDNnd08fCTK fJ0HwMZ9ZVk53O6EErf7z/T596i2TOkAeeeOfCAO6Gcugqphq3Uy8i19R NP3dNs7f/ZLE2o82MGxQKg7BwWz4FnFCi1UCKeE5zI8WBuuJ2QuaRnFbH rz1dYjH02vhEivNdOatBPM8lBi8wn5FA/TDVbKJnhJgabCeZuc5lyGidq wRT7hLF+eylLBqAx6/cALK6MXJPwAKSIMclEgQOzIb/eYwpAHVLVZc5r3 dZHgY77Jk+hfZvJX7rwAEzTfsa86J0ML8HqRRqVXXWmcAhIZ7mwo8gpqe w==; X-IronPort-AV: E=McAfee;i="6400,9594,10439"; a="274914511" X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="274914511" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2022 16:23:51 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="635283312" Received: from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.4]) by orsmga008.jf.intel.com with ESMTP; 14 Aug 2022 16:23:49 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, Qi Zhang , stable@dpdk.org, Kevin Liu Subject: [PATCH v2 58/70] net/ice/base: fix wrong inputset of GTPoGRE packet Date: Mon, 15 Aug 2022 03:31:54 -0400 Message-Id: <20220815073206.2917968-59-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220815073206.2917968-1-qi.z.zhang@intel.com> References: <20220815071306.2910599-1-qi.z.zhang@intel.com> <20220815073206.2917968-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org For GTPoGRE, When setting the prot_id of prot, it should be set to second inner. Fixes: 34a0e7c44f2b ("net/ice/base: improve flow director masking") Cc: stable@dpdk.org Signed-off-by: Kevin Liu Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_flow.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 182fac08a9..33e97ec333 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -1404,7 +1404,10 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params, case ICE_FLOW_FIELD_IDX_IPV4_TTL: case ICE_FLOW_FIELD_IDX_IPV4_PROT: prot_id = seg == 0 ? ICE_PROT_IPV4_OF_OR_S : ICE_PROT_IPV4_IL; - + if (params->prof->segs[0].hdrs & ICE_FLOW_SEG_HDR_GRE && + params->prof->segs[1].hdrs & ICE_FLOW_SEG_HDR_GTPU && + seg == 1) + prot_id = ICE_PROT_IPV4_IL_IL; /* TTL and PROT share the same extraction seq. entry. * Each is considered a sibling to the other in terms of sharing * the same extraction sequence entry. @@ -1432,7 +1435,10 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params, prot_id = seg == 0 ? ICE_PROT_IPV6_NEXT_PROTO : ICE_PROT_IPV6_IL; - + if (params->prof->segs[0].hdrs & ICE_FLOW_SEG_HDR_GRE && + params->prof->segs[1].hdrs & ICE_FLOW_SEG_HDR_GTPU && + seg == 1) + prot_id = ICE_PROT_IPV6_IL_IL; /* TTL and PROT share the same extraction seq. entry. * Each is considered a sibling to the other in terms of sharing * the same extraction sequence entry. -- 2.31.1