From: Hernan Vargas <hernan.vargas@intel.com>
To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com
Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com,
Hernan Vargas <hernan.vargas@intel.com>
Subject: [PATCH v1 10/33] baseband/acc10x: limit cases for HARQ pruning
Date: Mon, 15 Aug 2022 22:52:35 -0700 [thread overview]
Message-ID: <20220816055258.107564-11-hernan.vargas@intel.com> (raw)
In-Reply-To: <20220816055258.107564-1-hernan.vargas@intel.com>
Add flag ACC101_HARQ_PRUNING_OPTIMIZATION to limit cases when HARQ
pruning is valid.
Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
drivers/baseband/acc100/rte_acc100_pmd.c | 52 +++++++++++++++++++-----
1 file changed, 41 insertions(+), 11 deletions(-)
diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index b0f41f15cb..6c639698db 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -1373,17 +1373,23 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
harq_index = hq_index(op->ldpc_dec.harq_combined_output.offset);
#ifdef ACC100_EXT_MEM
/* Limit cases when HARQ pruning is valid */
+#ifdef ACC100_HARQ_PRUNING_OPTIMIZATION
harq_prun = ((op->ldpc_dec.harq_combined_output.offset %
- ACC100_HARQ_OFFSET) == 0) &&
- (op->ldpc_dec.harq_combined_output.offset <= UINT16_MAX
- * ACC100_HARQ_OFFSET);
+ ACC100_HARQ_OFFSET) == 0);
+#endif
#endif
if (fcw->hcin_en > 0) {
harq_in_length = op->ldpc_dec.harq_combined_input.length;
if (fcw->hcin_decomp_mode > 0)
harq_in_length = harq_in_length * 8 / 6;
- harq_in_length = RTE_ALIGN(harq_in_length, 64);
- if ((harq_layout[harq_index].offset > 0) & harq_prun) {
+ harq_in_length = RTE_MIN(harq_in_length, op->ldpc_dec.n_cb
+ - op->ldpc_dec.n_filler);
+ /* Alignment on next 64B - Already enforced from HC output */
+ harq_in_length = RTE_ALIGN_FLOOR(harq_in_length, 64);
+ /* Stronger alignment requirement when in decompression mode */
+ if (fcw->hcin_decomp_mode > 0)
+ harq_in_length = RTE_ALIGN_FLOOR(harq_in_length, 256);
+ if ((harq_layout[harq_index].offset > 0) && harq_prun) {
rte_bbdev_log_debug("HARQ IN offset unexpected for now\n");
fcw->hcin_size0 = harq_layout[harq_index].size0;
fcw->hcin_offset = harq_layout[harq_index].offset;
@@ -1458,6 +1464,7 @@ acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
uint16_t harq_out_length, harq_in_length, ncb_p, k0_p, parity_offset;
uint32_t harq_index;
uint32_t l;
+ bool harq_prun = false;
fcw->qm = op->ldpc_dec.q_m;
fcw->nfiller = op->ldpc_dec.n_filler;
@@ -1503,6 +1510,13 @@ acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
fcw->llr_pack_mode = check_bit(op->ldpc_dec.op_flags,
RTE_BBDEV_LDPC_LLR_COMPRESSION);
harq_index = hq_index(op->ldpc_dec.harq_combined_output.offset);
+ #ifdef ACC100_EXT_MEM
+ /* Limit cases when HARQ pruning is valid */
+#ifdef ACC101_HARQ_PRUNING_OPTIMIZATION
+ harq_prun = ((op->ldpc_dec.harq_combined_output.offset %
+ ACC101_HARQ_OFFSET) == 0);
+#endif
+#endif
if (fcw->hcin_en > 0) {
harq_in_length = op->ldpc_dec.harq_combined_input.length;
if (fcw->hcin_decomp_mode > 0)
@@ -1511,9 +1525,17 @@ acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
- op->ldpc_dec.n_filler);
/* Alignment on next 64B - Already enforced from HC output */
harq_in_length = RTE_ALIGN_FLOOR(harq_in_length, 64);
- fcw->hcin_size0 = harq_in_length;
- fcw->hcin_offset = 0;
- fcw->hcin_size1 = 0;
+ if ((harq_layout[harq_index].offset > 0) && harq_prun) {
+ rte_bbdev_log_debug("HARQ IN offset unexpected for now\n");
+ fcw->hcin_size0 = harq_layout[harq_index].size0;
+ fcw->hcin_offset = harq_layout[harq_index].offset;
+ fcw->hcin_size1 = harq_in_length -
+ harq_layout[harq_index].offset;
+ } else {
+ fcw->hcin_size0 = harq_in_length;
+ fcw->hcin_offset = 0;
+ fcw->hcin_size1 = 0;
+ }
} else {
fcw->hcin_size0 = 0;
fcw->hcin_offset = 0;
@@ -1554,9 +1576,17 @@ acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
harq_out_length = RTE_MIN(harq_out_length, ncb_p);
/* Alignment on next 64B */
harq_out_length = RTE_ALIGN_CEIL(harq_out_length, 64);
- fcw->hcout_size0 = harq_out_length;
- fcw->hcout_size1 = 0;
- fcw->hcout_offset = 0;
+ if ((k0_p > fcw->hcin_size0 + ACC100_HARQ_OFFSET_THRESHOLD) &&
+ harq_prun) {
+ fcw->hcout_size0 = (uint16_t) fcw->hcin_size0;
+ fcw->hcout_offset = k0_p & 0xFFC0;
+ fcw->hcout_size1 = harq_out_length - fcw->hcout_offset;
+ } else {
+ fcw->hcout_size0 = harq_out_length;
+ fcw->hcout_size1 = 0;
+ fcw->hcout_offset = 0;
+ }
+
harq_layout[harq_index].offset = fcw->hcout_offset;
harq_layout[harq_index].size0 = fcw->hcout_size0;
} else {
--
2.37.1
next prev parent reply other threads:[~2022-08-15 21:58 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-16 5:52 [PATCH v1 00/33] baseband/acc100: changes for 22.11 Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 01/33] baseband/acc100: update dev close function Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 02/33] baseband/acc100: quit queue setup for undef dev Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 03/33] baseband/acc100: add default e value for FCW Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 04/33] baseband/acc100: add LDPC encoder padding function Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 05/33] baseband/acc100: add scatter-gather support Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 06/33] baseband/acc100: add HARQ index helper function Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 07/33] baseband/acc100: avoid mux for small inbound frames Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 08/33] baseband/acc100: separate validation functions from debug Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 09/33] baseband/acc100: add LDPC transport block support Hernan Vargas
2022-08-16 5:52 ` Hernan Vargas [this message]
2022-08-16 5:52 ` [PATCH v1 11/33] baseband/acc100: update validate LDPC enc/dec Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 12/33] baseband/acc100: add workaround for deRM corner cases Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 13/33] baseband/acc100: enable vf2pf doorbell register Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 14/33] baseband/acc100: add ring companion address Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 15/33] baseband/acc100: configure PMON control registers Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 16/33] baseband/acc100: configurable queue depth Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 17/33] baseband/acc100: add queue stop operation Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 18/33] basbeband/acc100: check turbo dec/enc input Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 19/33] baseband/acc100: check for unlikely operation vals Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 20/33] baseband/acc100: enforce additional check on FCW Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 21/33] baseband/acc100: update uplink CB input length Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 22/33] baseband/acc100: rename ldpc encode function arg Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 23/33] baseband/acc100: update log messages Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 24/33] baseband/acc100: allocate ring/queue mem when NULL Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 25/33] baseband/acc100: store FCW from first CB descriptor Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 26/33] baseband/acc100: remove input error check from enc Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 27/33] baseband/acc100: make desc optimization optional Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 28/33] baseband/acc100: update device info Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 29/33] baseband/acc100: reduce input length for CRC24B Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 30/33] baseband/acc100: initialize ring data value Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 31/33] baseband/acc100: update debug print for LDPC FCW Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 32/33] baseband/acc100: set device min alignment to 1 Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 33/33] baseband/acc100: update meson file sdk dependency Hernan Vargas
2022-08-16 17:16 ` [PATCH v1 00/33] baseband/acc100: changes for 22.11 Tom Rix
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220816055258.107564-11-hernan.vargas@intel.com \
--to=hernan.vargas@intel.com \
--cc=dev@dpdk.org \
--cc=gakhil@marvell.com \
--cc=nicolas.chautru@intel.com \
--cc=qi.z.zhang@intel.com \
--cc=trix@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).