From: Hernan Vargas <hernan.vargas@intel.com>
To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com
Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com,
Hernan Vargas <hernan.vargas@intel.com>
Subject: [PATCH v1 06/33] baseband/acc100: add HARQ index helper function
Date: Mon, 15 Aug 2022 22:52:31 -0700 [thread overview]
Message-ID: <20220816055258.107564-7-hernan.vargas@intel.com> (raw)
In-Reply-To: <20220816055258.107564-1-hernan.vargas@intel.com>
Refactor code to use the HARQ index helper function and make harq_idx
uint32.
Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
drivers/baseband/acc100/rte_acc100_pmd.c | 32 +++++++++++-------------
1 file changed, 14 insertions(+), 18 deletions(-)
diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 31d6ad422a..97e4078a24 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -1307,6 +1307,11 @@ acc100_fcw_td_fill(const struct rte_bbdev_dec_op *op, struct acc100_fcw_td *fcw)
RTE_BBDEV_TURBO_HALF_ITERATION_EVEN);
}
+/* Convert offset to harq index for harq_layout structure */
+static inline uint32_t hq_index(uint32_t offset)
+{
+ return (offset >> ACC100_HARQ_OFFSET_SHIFT) & ACC100_HARQ_OFFSET_MASK;
+}
static inline bool
is_acc100(struct acc100_queue *q)
@@ -1326,7 +1331,7 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
union acc100_harq_layout_data *harq_layout)
{
uint16_t harq_out_length, harq_in_length, ncb_p, k0_p, parity_offset;
- uint16_t harq_index;
+ uint32_t harq_index;
uint32_t l;
bool harq_prun = false;
@@ -1365,8 +1370,7 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
RTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION);
fcw->llr_pack_mode = check_bit(op->ldpc_dec.op_flags,
RTE_BBDEV_LDPC_LLR_COMPRESSION);
- harq_index = op->ldpc_dec.harq_combined_output.offset /
- ACC100_HARQ_OFFSET;
+ harq_index = hq_index(op->ldpc_dec.harq_combined_output.offset);
#ifdef ACC100_EXT_MEM
/* Limit cases when HARQ pruning is valid */
harq_prun = ((op->ldpc_dec.harq_combined_output.offset %
@@ -1446,12 +1450,6 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
}
}
-/* Convert offset to harq index for harq_layout structure */
-static inline uint32_t hq_index(uint32_t offset)
-{
- return (offset >> ACC100_HARQ_OFFSET_SHIFT) & ACC100_HARQ_OFFSET_MASK;
-}
-
/* Fill in a frame control word for LDPC decoding for ACC101 */
static inline void
acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
@@ -2135,12 +2133,11 @@ acc100_dma_desc_ld_update(struct rte_bbdev_dec_op *op,
struct rte_bbdev_dec_op *prev_op = desc->op_addr;
op->ldpc_dec.harq_combined_output.length =
prev_op->ldpc_dec.harq_combined_output.length;
- int16_t hq_idx = op->ldpc_dec.harq_combined_output.offset /
- ACC100_HARQ_OFFSET;
- int16_t prev_hq_idx =
- prev_op->ldpc_dec.harq_combined_output.offset
- / ACC100_HARQ_OFFSET;
- harq_layout[hq_idx].val = harq_layout[prev_hq_idx].val;
+ uint32_t harq_idx = hq_index(
+ op->ldpc_dec.harq_combined_output.offset);
+ uint32_t prev_harq_idx = hq_index(
+ prev_op->ldpc_dec.harq_combined_output.offset);
+ harq_layout[harq_idx].val = harq_layout[prev_harq_idx].val;
#ifndef ACC100_EXT_MEM
struct rte_bbdev_op_data ho =
op->ldpc_dec.harq_combined_output;
@@ -2972,10 +2969,9 @@ harq_loopback(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
bool ddr_mem_in = check_bit(op->ldpc_dec.op_flags,
RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_IN_ENABLE);
union acc100_harq_layout_data *harq_layout = q->d->harq_layout;
- uint16_t harq_index = (ddr_mem_in ?
+ uint32_t harq_index = hq_index(ddr_mem_in ?
op->ldpc_dec.harq_combined_input.offset :
- op->ldpc_dec.harq_combined_output.offset)
- / ACC100_HARQ_OFFSET;
+ op->ldpc_dec.harq_combined_output.offset);
uint16_t desc_idx = ((q->sw_ring_head + total_enqueued_cbs)
& q->sw_ring_wrap_mask);
--
2.37.1
next prev parent reply other threads:[~2022-08-15 21:58 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-16 5:52 [PATCH v1 00/33] baseband/acc100: changes for 22.11 Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 01/33] baseband/acc100: update dev close function Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 02/33] baseband/acc100: quit queue setup for undef dev Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 03/33] baseband/acc100: add default e value for FCW Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 04/33] baseband/acc100: add LDPC encoder padding function Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 05/33] baseband/acc100: add scatter-gather support Hernan Vargas
2022-08-16 5:52 ` Hernan Vargas [this message]
2022-08-16 5:52 ` [PATCH v1 07/33] baseband/acc100: avoid mux for small inbound frames Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 08/33] baseband/acc100: separate validation functions from debug Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 09/33] baseband/acc100: add LDPC transport block support Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 10/33] baseband/acc10x: limit cases for HARQ pruning Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 11/33] baseband/acc100: update validate LDPC enc/dec Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 12/33] baseband/acc100: add workaround for deRM corner cases Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 13/33] baseband/acc100: enable vf2pf doorbell register Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 14/33] baseband/acc100: add ring companion address Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 15/33] baseband/acc100: configure PMON control registers Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 16/33] baseband/acc100: configurable queue depth Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 17/33] baseband/acc100: add queue stop operation Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 18/33] basbeband/acc100: check turbo dec/enc input Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 19/33] baseband/acc100: check for unlikely operation vals Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 20/33] baseband/acc100: enforce additional check on FCW Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 21/33] baseband/acc100: update uplink CB input length Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 22/33] baseband/acc100: rename ldpc encode function arg Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 23/33] baseband/acc100: update log messages Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 24/33] baseband/acc100: allocate ring/queue mem when NULL Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 25/33] baseband/acc100: store FCW from first CB descriptor Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 26/33] baseband/acc100: remove input error check from enc Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 27/33] baseband/acc100: make desc optimization optional Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 28/33] baseband/acc100: update device info Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 29/33] baseband/acc100: reduce input length for CRC24B Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 30/33] baseband/acc100: initialize ring data value Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 31/33] baseband/acc100: update debug print for LDPC FCW Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 32/33] baseband/acc100: set device min alignment to 1 Hernan Vargas
2022-08-16 5:52 ` [PATCH v1 33/33] baseband/acc100: update meson file sdk dependency Hernan Vargas
2022-08-16 17:16 ` [PATCH v1 00/33] baseband/acc100: changes for 22.11 Tom Rix
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