From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BB594A0542; Mon, 29 Aug 2022 10:42:28 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2C80E42B70; Mon, 29 Aug 2022 10:42:07 +0200 (CEST) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by mails.dpdk.org (Postfix) with ESMTP id 7B59442836 for ; Mon, 29 Aug 2022 10:42:05 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1661762525; x=1693298525; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Y66wUCJO/ZxOhlRayTF3bsbmqPeTqqT1Sbax7dhpbQw=; b=lFyRtsQfH7HpbvJMXfKhsqcwQ0QwXGN0kvveURKjlPM5PUeeS2CzqUE+ 7GhD0yU29CK0JvN30BAqdPexTlKg3/Zr2l7inPaEaowuTdE2eUVyLFSka rMyOqZmilSWMMyDqCpI3SxEJzsDvUJRePyt4yzVG5n3I5U6nMAshG3ICF rzJ4VqCtpzXwq8LkiAXQFELL0BDC4hu5eOEMNMq3ZallPUHBr+Z6DPSVo QumKb6s9u2Ij3Hmqri8PqdL8cbrx5P+GV6FbJcKwVl153Yg9cQugLjAJ4 TM3GGO2UhFUj1oVV1mc5VVbvoucSUipvisnsyqYCrmzHLh7Wj0tgUgqBG A==; X-IronPort-AV: E=McAfee;i="6500,9779,10453"; a="356559837" X-IronPort-AV: E=Sophos;i="5.93,272,1654585200"; d="scan'208";a="356559837" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2022 01:42:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,272,1654585200"; d="scan'208";a="640856878" Received: from dpdk-jf-ntb-one.sh.intel.com ([10.67.111.104]) by orsmga008.jf.intel.com with ESMTP; 29 Aug 2022 01:42:03 -0700 From: Junfeng Guo To: qi.z.zhang@intel.com, jingjing.wu@intel.com Cc: ferruh.yigit@xilinx.com, dev@dpdk.org, xiaoyun.li@intel.com, awogbemila@google.com, bruce.richardson@intel.com, junfeng.guo@intel.com Subject: [PATCH v2 05/10] net/gve: add MTU set support Date: Mon, 29 Aug 2022 16:41:22 +0800 Message-Id: <20220829084127.934183-6-junfeng.guo@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220829084127.934183-1-junfeng.guo@intel.com> References: <20220729193042.2764633-2-xiaoyun.li@intel.com> <20220829084127.934183-1-junfeng.guo@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Support dev_ops mtu_set. Signed-off-by: Xiaoyun Li Signed-off-by: Junfeng Guo --- drivers/net/gve/gve_ethdev.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/net/gve/gve_ethdev.c b/drivers/net/gve/gve_ethdev.c index 435115c047..26b45fde6f 100644 --- a/drivers/net/gve/gve_ethdev.c +++ b/drivers/net/gve/gve_ethdev.c @@ -97,12 +97,41 @@ gve_dev_close(struct rte_eth_dev *dev) return err; } +static int +gve_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) +{ + struct gve_priv *priv = dev->data->dev_private; + int err; + + if (mtu < RTE_ETHER_MIN_MTU || mtu > priv->max_mtu) { + PMD_DRV_LOG(ERR, "MIN MTU is %u MAX MTU is %u", RTE_ETHER_MIN_MTU, priv->max_mtu); + return -EINVAL; + } + + /* mtu setting is forbidden if port is start */ + if (dev->data->dev_started) { + PMD_DRV_LOG(ERR, "Port must be stopped before configuration"); + return -EBUSY; + } + + dev->data->dev_conf.rxmode.mtu = mtu + RTE_ETHER_HDR_LEN; + + err = gve_adminq_set_mtu(priv, mtu); + if (err) { + PMD_DRV_LOG(ERR, "Failed to set mtu as %u err = %d", mtu, err); + return err; + } + + return 0; +} + static const struct eth_dev_ops gve_eth_dev_ops = { .dev_configure = gve_dev_configure, .dev_start = gve_dev_start, .dev_stop = gve_dev_stop, .dev_close = gve_dev_close, .link_update = gve_link_update, + .mtu_set = gve_dev_mtu_set, }; static void -- 2.34.1