From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 18997A054F; Mon, 5 Sep 2022 12:59:17 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 411A742B78; Mon, 5 Sep 2022 12:58:50 +0200 (CEST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id 3575C42B78 for ; Mon, 5 Sep 2022 12:58:49 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662375529; x=1693911529; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=H/bV7VRBoz49AClpUE6jCXSaKj5u5dRzskV7Bb8vavs=; b=fzZRpxRobgcx0+iO/RR4GCwN0dl/0ZHqhG0BXrka8eDHAyNBgazMv4Ss bYHo4UhZEZHcPFShjih6yA4Bka6Kg4X9RNpQeqB6arLSvNIs2lhNvhqWb kEdzy7rElyLwKnwdfxT/yURZc+0S51pKafmw1gD1OijQhEXnPwFJqSA57 fvFUGgakz6SDrXghf+EAnpHJZPkkUajRX4DtVTzZQTsPpzwLdGNggZJvy s4cLOyKXNnoMFNZyJn1Oq0P9Zfxw9rIZ8bcZhW4niWRIBX/sIDUJuz1wF n6kRgsYVnz6+yxqARkFMHKGZ/cnx+Tw6NVT6YtQIPVAqQcLnURQy6yw8m Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10460"; a="297676310" X-IronPort-AV: E=Sophos;i="5.93,291,1654585200"; d="scan'208";a="297676310" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Sep 2022 03:58:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,291,1654585200"; d="scan'208";a="682023881" Received: from dpdk-jf-ntb-v2.sh.intel.com ([10.67.118.246]) by fmsmga004.fm.intel.com with ESMTP; 05 Sep 2022 03:58:45 -0700 From: Junfeng Guo To: qi.z.zhang@intel.com, jingjing.wu@intel.com, beilei.xing@intel.com Cc: dev@dpdk.org, xiao.w.wang@intel.com, junfeng.guo@intel.com Subject: [PATCH v2 05/14] net/idpf: add support for device information get Date: Mon, 5 Sep 2022 18:58:19 +0800 Message-Id: <20220905105828.3190335-6-junfeng.guo@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220905105828.3190335-1-junfeng.guo@intel.com> References: <20220803113104.1184059-1-junfeng.guo@intel.com> <20220905105828.3190335-1-junfeng.guo@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add dev ops dev_infos_get. Signed-off-by: Beilei Xing Signed-off-by: Junfeng Guo --- drivers/net/idpf/idpf_ethdev.c | 80 ++++++++++++++++++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/drivers/net/idpf/idpf_ethdev.c b/drivers/net/idpf/idpf_ethdev.c index 0349ec6e9d..8852b7ce22 100644 --- a/drivers/net/idpf/idpf_ethdev.c +++ b/drivers/net/idpf/idpf_ethdev.c @@ -28,6 +28,8 @@ static int idpf_dev_configure(struct rte_eth_dev *dev); static int idpf_dev_start(struct rte_eth_dev *dev); static int idpf_dev_stop(struct rte_eth_dev *dev); static int idpf_dev_close(struct rte_eth_dev *dev); +static int idpf_dev_info_get(struct rte_eth_dev *dev, + struct rte_eth_dev_info *dev_info); static const struct eth_dev_ops idpf_eth_dev_ops = { .dev_configure = idpf_dev_configure, @@ -42,8 +44,86 @@ static const struct eth_dev_ops idpf_eth_dev_ops = { .rx_queue_release = idpf_dev_rx_queue_release, .tx_queue_setup = idpf_tx_queue_setup, .tx_queue_release = idpf_dev_tx_queue_release, + .dev_infos_get = idpf_dev_info_get, }; +static int +idpf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) +{ + struct idpf_vport *vport = dev->data->dev_private; + struct idpf_adapter *adapter = vport->adapter; + + dev_info->max_rx_queues = adapter->caps->max_rx_q; + dev_info->max_tx_queues = adapter->caps->max_tx_q; + dev_info->min_rx_bufsize = IDPF_MIN_BUF_SIZE; + dev_info->max_rx_pktlen = IDPF_MAX_FRAME_SIZE; + + dev_info->max_mtu = dev_info->max_rx_pktlen - IDPF_ETH_OVERHEAD; + dev_info->min_mtu = RTE_ETHER_MIN_MTU; + + dev_info->max_mac_addrs = IDPF_NUM_MACADDR_MAX; + dev_info->dev_capa = RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP | + RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP; + dev_info->rx_offload_capa = + RTE_ETH_RX_OFFLOAD_VLAN_STRIP | + RTE_ETH_RX_OFFLOAD_QINQ_STRIP | + RTE_ETH_RX_OFFLOAD_IPV4_CKSUM | + RTE_ETH_RX_OFFLOAD_UDP_CKSUM | + RTE_ETH_RX_OFFLOAD_TCP_CKSUM | + RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM | + RTE_ETH_RX_OFFLOAD_SCATTER | + RTE_ETH_RX_OFFLOAD_VLAN_FILTER | + RTE_ETH_RX_OFFLOAD_RSS_HASH | + RTE_ETH_RX_OFFLOAD_TIMESTAMP; + + dev_info->tx_offload_capa = + RTE_ETH_TX_OFFLOAD_VLAN_INSERT | + RTE_ETH_TX_OFFLOAD_QINQ_INSERT | + RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | + RTE_ETH_TX_OFFLOAD_UDP_CKSUM | + RTE_ETH_TX_OFFLOAD_TCP_CKSUM | + RTE_ETH_TX_OFFLOAD_SCTP_CKSUM | + RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM | + RTE_ETH_TX_OFFLOAD_TCP_TSO | + RTE_ETH_TX_OFFLOAD_VXLAN_TNL_TSO | + RTE_ETH_TX_OFFLOAD_GRE_TNL_TSO | + RTE_ETH_TX_OFFLOAD_IPIP_TNL_TSO | + RTE_ETH_TX_OFFLOAD_GENEVE_TNL_TSO | + RTE_ETH_TX_OFFLOAD_MULTI_SEGS | + RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE; + + dev_info->default_rxconf = (struct rte_eth_rxconf) { + .rx_free_thresh = IDPF_DEFAULT_RX_FREE_THRESH, + .rx_drop_en = 0, + .offloads = 0, + }; + + dev_info->default_txconf = (struct rte_eth_txconf) { + .tx_free_thresh = IDPF_DEFAULT_TX_FREE_THRESH, + .tx_rs_thresh = IDPF_DEFAULT_TX_RS_THRESH, + .offloads = 0, + }; + + dev_info->rx_desc_lim = (struct rte_eth_desc_lim) { + .nb_max = IDPF_MAX_RING_DESC, + .nb_min = IDPF_MIN_RING_DESC, + .nb_align = IDPF_ALIGN_RING_DESC, + }; + + dev_info->tx_desc_lim = (struct rte_eth_desc_lim) { + .nb_max = IDPF_MAX_RING_DESC, + .nb_min = IDPF_MIN_RING_DESC, + .nb_align = IDPF_ALIGN_RING_DESC, + }; + + dev_info->default_rxportconf.burst_size = IDPF_RX_MAX_BURST; + dev_info->default_txportconf.burst_size = IDPF_TX_MAX_BURST; + dev_info->default_rxportconf.nb_queues = 1; + dev_info->default_txportconf.nb_queues = 1; + + return 0; +} + static int idpf_init_vport_req_info(struct rte_eth_dev *dev) { -- 2.25.1