From: Nithin Dabilpuram <ndabilpuram@marvell.com>
To: Nithin Dabilpuram <ndabilpuram@marvell.com>,
Kiran Kumar K <kirankumark@marvell.com>,
Sunil Kumar Kori <skori@marvell.com>,
Satha Rao <skoteshwar@marvell.com>
Cc: <jerinj@marvell.com>, <dev@dpdk.org>,
Rakesh Kudurumalla <rkudurumalla@marvell.com>
Subject: [PATCH v2 30/31] common/cnxk: dump device basic info to file
Date: Mon, 5 Sep 2022 19:02:27 +0530 [thread overview]
Message-ID: <20220905133228.818616-30-ndabilpuram@marvell.com> (raw)
In-Reply-To: <20220905133228.818616-1-ndabilpuram@marvell.com>
From: Rakesh Kudurumalla <rkudurumalla@marvell.com>
Add helper API to complete device info for debug purposes.
This is used by ethdev dump API to dump ethdev's internal info.
Signed-off-by: Rakesh Kudurumalla <rkudurumalla@marvell.com>
---
drivers/common/cnxk/roc_nix.h | 12 +-
drivers/common/cnxk/roc_nix_debug.c | 726 +++++++++++-----------
drivers/common/cnxk/roc_nix_inl.h | 4 +-
drivers/common/cnxk/roc_nix_inl_dev_irq.c | 6 +-
drivers/common/cnxk/roc_nix_irq.c | 6 +-
drivers/common/cnxk/roc_nix_priv.h | 2 +-
drivers/common/cnxk/roc_nix_tm.c | 4 +-
7 files changed, 395 insertions(+), 365 deletions(-)
diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 8cea3232d0..5c2a869eba 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -493,13 +493,13 @@ int __roc_api roc_nix_rx_drop_re_set(struct roc_nix *roc_nix, bool ena);
/* Debug */
int __roc_api roc_nix_lf_get_reg_count(struct roc_nix *roc_nix);
int __roc_api roc_nix_lf_reg_dump(struct roc_nix *roc_nix, uint64_t *data);
-int __roc_api roc_nix_queues_ctx_dump(struct roc_nix *roc_nix);
+int __roc_api roc_nix_queues_ctx_dump(struct roc_nix *roc_nix, FILE *file);
void __roc_api roc_nix_cqe_dump(const struct nix_cqe_hdr_s *cq);
-void __roc_api roc_nix_rq_dump(struct roc_nix_rq *rq);
-void __roc_api roc_nix_cq_dump(struct roc_nix_cq *cq);
-void __roc_api roc_nix_sq_dump(struct roc_nix_sq *sq);
-void __roc_api roc_nix_tm_dump(struct roc_nix *roc_nix);
-void __roc_api roc_nix_dump(struct roc_nix *roc_nix);
+void __roc_api roc_nix_rq_dump(struct roc_nix_rq *rq, FILE *file);
+void __roc_api roc_nix_cq_dump(struct roc_nix_cq *cq, FILE *file);
+void __roc_api roc_nix_sq_dump(struct roc_nix_sq *sq, FILE *file);
+void __roc_api roc_nix_tm_dump(struct roc_nix *roc_nix, FILE *file);
+void __roc_api roc_nix_dump(struct roc_nix *roc_nix, FILE *file);
/* IRQ */
void __roc_api roc_nix_rx_queue_intr_enable(struct roc_nix *roc_nix,
diff --git a/drivers/common/cnxk/roc_nix_debug.c b/drivers/common/cnxk/roc_nix_debug.c
index bd7a5d3dc2..6f82350b53 100644
--- a/drivers/common/cnxk/roc_nix_debug.c
+++ b/drivers/common/cnxk/roc_nix_debug.c
@@ -5,14 +5,27 @@
#include "roc_api.h"
#include "roc_priv.h"
-#define nix_dump plt_dump
+
+#define nix_dump(file, fmt, ...) do { \
+ if ((file) == NULL) \
+ plt_dump(fmt, ##__VA_ARGS__); \
+ else \
+ fprintf(file, fmt "\n", ##__VA_ARGS__); \
+} while (0)
+
#define NIX_REG_INFO(reg) \
{ \
reg, #reg \
}
#define NIX_REG_NAME_SZ 48
-#define nix_dump_no_nl plt_dump_no_nl
+#define nix_dump_no_nl(file, fmt, ...) do { \
+ if ((file) == NULL) \
+ plt_dump_no_nl(fmt, ##__VA_ARGS__); \
+ else \
+ fprintf(file, fmt, ##__VA_ARGS__); \
+} while (0)
+
struct nix_lf_reg_info {
uint32_t offset;
@@ -45,7 +58,7 @@ static const struct nix_lf_reg_info nix_lf_reg[] = {
};
static void
-nix_bitmap_dump(struct plt_bitmap *bmp)
+nix_bitmap_dump(struct plt_bitmap *bmp, FILE *file)
{
uint32_t pos = 0, start_pos;
uint64_t slab = 0;
@@ -57,7 +70,7 @@ nix_bitmap_dump(struct plt_bitmap *bmp)
start_pos = pos;
- nix_dump_no_nl(" \t\t[");
+ nix_dump_no_nl(file, " \t\t[");
do {
if (!slab)
break;
@@ -65,12 +78,12 @@ nix_bitmap_dump(struct plt_bitmap *bmp)
for (i = 0; i < 64; i++)
if (slab & (1ULL << i))
- nix_dump_no_nl("%d, ", i);
+ nix_dump_no_nl(file, "%d, ", i);
if (!plt_bitmap_scan(bmp, &pos, &slab))
break;
} while (start_pos != pos);
- nix_dump_no_nl(" ]");
+ nix_dump_no_nl(file, " ]");
}
int
@@ -114,6 +127,7 @@ roc_nix_lf_get_reg_count(struct roc_nix *roc_nix)
int
nix_lf_gen_reg_dump(uintptr_t nix_lf_base, uint64_t *data)
{
+ FILE *file = NULL;
bool dump_stdout;
uint64_t reg;
uint32_t i;
@@ -123,7 +137,7 @@ nix_lf_gen_reg_dump(uintptr_t nix_lf_base, uint64_t *data)
for (i = 0; i < PLT_DIM(nix_lf_reg); i++) {
reg = plt_read64(nix_lf_base + nix_lf_reg[i].offset);
if (dump_stdout && reg)
- nix_dump("%32s = 0x%" PRIx64, nix_lf_reg[i].name, reg);
+ nix_dump(file, "%32s = 0x%" PRIx64, nix_lf_reg[i].name, reg);
if (data)
*data++ = reg;
}
@@ -136,6 +150,7 @@ nix_lf_stat_reg_dump(uintptr_t nix_lf_base, uint64_t *data, uint8_t lf_tx_stats,
uint8_t lf_rx_stats)
{
uint32_t i, count = 0;
+ FILE *file = NULL;
bool dump_stdout;
uint64_t reg;
@@ -145,7 +160,7 @@ nix_lf_stat_reg_dump(uintptr_t nix_lf_base, uint64_t *data, uint8_t lf_tx_stats,
for (i = 0; i < lf_tx_stats; i++) {
reg = plt_read64(nix_lf_base + NIX_LF_TX_STATX(i));
if (dump_stdout && reg)
- nix_dump("%32s_%d = 0x%" PRIx64, "NIX_LF_TX_STATX", i,
+ nix_dump(file, "%32s_%d = 0x%" PRIx64, "NIX_LF_TX_STATX", i,
reg);
if (data)
*data++ = reg;
@@ -156,7 +171,7 @@ nix_lf_stat_reg_dump(uintptr_t nix_lf_base, uint64_t *data, uint8_t lf_tx_stats,
for (i = 0; i < lf_rx_stats; i++) {
reg = plt_read64(nix_lf_base + NIX_LF_RX_STATX(i));
if (dump_stdout && reg)
- nix_dump("%32s_%d = 0x%" PRIx64, "NIX_LF_RX_STATX", i,
+ nix_dump(file, "%32s_%d = 0x%" PRIx64, "NIX_LF_RX_STATX", i,
reg);
if (data)
*data++ = reg;
@@ -170,6 +185,7 @@ nix_lf_int_reg_dump(uintptr_t nix_lf_base, uint64_t *data, uint16_t qints,
uint16_t cints)
{
uint32_t i, count = 0;
+ FILE *file = NULL;
bool dump_stdout;
uint64_t reg;
@@ -179,7 +195,7 @@ nix_lf_int_reg_dump(uintptr_t nix_lf_base, uint64_t *data, uint16_t qints,
for (i = 0; i < qints; i++) {
reg = plt_read64(nix_lf_base + NIX_LF_QINTX_CNT(i));
if (dump_stdout && reg)
- nix_dump("%32s_%d = 0x%" PRIx64, "NIX_LF_QINTX_CNT", i,
+ nix_dump(file, "%32s_%d = 0x%" PRIx64, "NIX_LF_QINTX_CNT", i,
reg);
if (data)
*data++ = reg;
@@ -190,7 +206,7 @@ nix_lf_int_reg_dump(uintptr_t nix_lf_base, uint64_t *data, uint16_t qints,
for (i = 0; i < qints; i++) {
reg = plt_read64(nix_lf_base + NIX_LF_QINTX_INT(i));
if (dump_stdout && reg)
- nix_dump("%32s_%d = 0x%" PRIx64, "NIX_LF_QINTX_INT", i,
+ nix_dump(file, "%32s_%d = 0x%" PRIx64, "NIX_LF_QINTX_INT", i,
reg);
if (data)
*data++ = reg;
@@ -201,7 +217,7 @@ nix_lf_int_reg_dump(uintptr_t nix_lf_base, uint64_t *data, uint16_t qints,
for (i = 0; i < qints; i++) {
reg = plt_read64(nix_lf_base + NIX_LF_QINTX_ENA_W1S(i));
if (dump_stdout && reg)
- nix_dump("%32s_%d = 0x%" PRIx64, "NIX_LF_QINTX_ENA_W1S",
+ nix_dump(file, "%32s_%d = 0x%" PRIx64, "NIX_LF_QINTX_ENA_W1S",
i, reg);
if (data)
*data++ = reg;
@@ -212,7 +228,7 @@ nix_lf_int_reg_dump(uintptr_t nix_lf_base, uint64_t *data, uint16_t qints,
for (i = 0; i < qints; i++) {
reg = plt_read64(nix_lf_base + NIX_LF_QINTX_ENA_W1C(i));
if (dump_stdout && reg)
- nix_dump("%32s_%d = 0x%" PRIx64, "NIX_LF_QINTX_ENA_W1C",
+ nix_dump(file, "%32s_%d = 0x%" PRIx64, "NIX_LF_QINTX_ENA_W1C",
i, reg);
if (data)
*data++ = reg;
@@ -223,7 +239,7 @@ nix_lf_int_reg_dump(uintptr_t nix_lf_base, uint64_t *data, uint16_t qints,
for (i = 0; i < cints; i++) {
reg = plt_read64(nix_lf_base + NIX_LF_CINTX_CNT(i));
if (dump_stdout && reg)
- nix_dump("%32s_%d = 0x%" PRIx64, "NIX_LF_CINTX_CNT", i,
+ nix_dump(file, "%32s_%d = 0x%" PRIx64, "NIX_LF_CINTX_CNT", i,
reg);
if (data)
*data++ = reg;
@@ -234,7 +250,7 @@ nix_lf_int_reg_dump(uintptr_t nix_lf_base, uint64_t *data, uint16_t qints,
for (i = 0; i < cints; i++) {
reg = plt_read64(nix_lf_base + NIX_LF_CINTX_WAIT(i));
if (dump_stdout && reg)
- nix_dump("%32s_%d = 0x%" PRIx64, "NIX_LF_CINTX_WAIT", i,
+ nix_dump(file, "%32s_%d = 0x%" PRIx64, "NIX_LF_CINTX_WAIT", i,
reg);
if (data)
*data++ = reg;
@@ -245,7 +261,7 @@ nix_lf_int_reg_dump(uintptr_t nix_lf_base, uint64_t *data, uint16_t qints,
for (i = 0; i < cints; i++) {
reg = plt_read64(nix_lf_base + NIX_LF_CINTX_INT(i));
if (dump_stdout && reg)
- nix_dump("%32s_%d = 0x%" PRIx64, "NIX_LF_CINTX_INT", i,
+ nix_dump(file, "%32s_%d = 0x%" PRIx64, "NIX_LF_CINTX_INT", i,
reg);
if (data)
*data++ = reg;
@@ -256,7 +272,7 @@ nix_lf_int_reg_dump(uintptr_t nix_lf_base, uint64_t *data, uint16_t qints,
for (i = 0; i < cints; i++) {
reg = plt_read64(nix_lf_base + NIX_LF_CINTX_INT_W1S(i));
if (dump_stdout && reg)
- nix_dump("%32s_%d = 0x%" PRIx64, "NIX_LF_CINTX_INT_W1S",
+ nix_dump(file, "%32s_%d = 0x%" PRIx64, "NIX_LF_CINTX_INT_W1S",
i, reg);
if (data)
*data++ = reg;
@@ -267,7 +283,7 @@ nix_lf_int_reg_dump(uintptr_t nix_lf_base, uint64_t *data, uint16_t qints,
for (i = 0; i < cints; i++) {
reg = plt_read64(nix_lf_base + NIX_LF_CINTX_ENA_W1S(i));
if (dump_stdout && reg)
- nix_dump("%32s_%d = 0x%" PRIx64, "NIX_LF_CINTX_ENA_W1S",
+ nix_dump(file, "%32s_%d = 0x%" PRIx64, "NIX_LF_CINTX_ENA_W1S",
i, reg);
if (data)
*data++ = reg;
@@ -278,7 +294,7 @@ nix_lf_int_reg_dump(uintptr_t nix_lf_base, uint64_t *data, uint16_t qints,
for (i = 0; i < cints; i++) {
reg = plt_read64(nix_lf_base + NIX_LF_CINTX_ENA_W1C(i));
if (dump_stdout && reg)
- nix_dump("%32s_%d = 0x%" PRIx64, "NIX_LF_CINTX_ENA_W1C",
+ nix_dump(file, "%32s_%d = 0x%" PRIx64, "NIX_LF_CINTX_ENA_W1C",
i, reg);
if (data)
*data++ = reg;
@@ -368,296 +384,296 @@ nix_q_ctx_get(struct dev *dev, uint8_t ctype, uint16_t qid, __io void **ctx_p)
}
static inline void
-nix_cn9k_lf_sq_dump(__io struct nix_sq_ctx_s *ctx, uint32_t *sqb_aura_p)
+nix_cn9k_lf_sq_dump(__io struct nix_sq_ctx_s *ctx, uint32_t *sqb_aura_p, FILE *file)
{
- nix_dump("W0: sqe_way_mask \t\t%d\nW0: cq \t\t\t\t%d",
+ nix_dump(file, "W0: sqe_way_mask \t\t%d\nW0: cq \t\t\t\t%d",
ctx->sqe_way_mask, ctx->cq);
- nix_dump("W0: sdp_mcast \t\t\t%d\nW0: substream \t\t\t0x%03x",
+ nix_dump(file, "W0: sdp_mcast \t\t\t%d\nW0: substream \t\t\t0x%03x",
ctx->sdp_mcast, ctx->substream);
- nix_dump("W0: qint_idx \t\t\t%d\nW0: ena \t\t\t%d\n", ctx->qint_idx,
+ nix_dump(file, "W0: qint_idx \t\t\t%d\nW0: ena \t\t\t%d\n", ctx->qint_idx,
ctx->ena);
- nix_dump("W1: sqb_count \t\t\t%d\nW1: default_chan \t\t%d",
+ nix_dump(file, "W1: sqb_count \t\t\t%d\nW1: default_chan \t\t%d",
ctx->sqb_count, ctx->default_chan);
- nix_dump("W1: smq_rr_quantum \t\t%d\nW1: sso_ena \t\t\t%d",
+ nix_dump(file, "W1: smq_rr_quantum \t\t%d\nW1: sso_ena \t\t\t%d",
ctx->smq_rr_quantum, ctx->sso_ena);
- nix_dump("W1: xoff \t\t\t%d\nW1: cq_ena \t\t\t%d\nW1: smq\t\t\t\t%d\n",
+ nix_dump(file, "W1: xoff \t\t\t%d\nW1: cq_ena \t\t\t%d\nW1: smq\t\t\t\t%d\n",
ctx->xoff, ctx->cq_ena, ctx->smq);
- nix_dump("W2: sqe_stype \t\t\t%d\nW2: sq_int_ena \t\t\t%d",
+ nix_dump(file, "W2: sqe_stype \t\t\t%d\nW2: sq_int_ena \t\t\t%d",
ctx->sqe_stype, ctx->sq_int_ena);
- nix_dump("W2: sq_int \t\t\t%d\nW2: sqb_aura \t\t\t%d", ctx->sq_int,
+ nix_dump(file, "W2: sq_int \t\t\t%d\nW2: sqb_aura \t\t\t%d", ctx->sq_int,
ctx->sqb_aura);
- nix_dump("W2: smq_rr_count \t\t%d\n", ctx->smq_rr_count);
+ nix_dump(file, "W2: smq_rr_count \t\t%d\n", ctx->smq_rr_count);
- nix_dump("W3: smq_next_sq_vld\t\t%d\nW3: smq_pend\t\t\t%d",
+ nix_dump(file, "W3: smq_next_sq_vld\t\t%d\nW3: smq_pend\t\t\t%d",
ctx->smq_next_sq_vld, ctx->smq_pend);
- nix_dump("W3: smenq_next_sqb_vld \t%d\nW3: head_offset\t\t\t%d",
+ nix_dump(file, "W3: smenq_next_sqb_vld \t%d\nW3: head_offset\t\t\t%d",
ctx->smenq_next_sqb_vld, ctx->head_offset);
- nix_dump("W3: smenq_offset\t\t%d\nW3: tail_offset \t\t%d",
+ nix_dump(file, "W3: smenq_offset\t\t%d\nW3: tail_offset \t\t%d",
ctx->smenq_offset, ctx->tail_offset);
- nix_dump("W3: smq_lso_segnum \t\t%d\nW3: smq_next_sq \t\t%d",
+ nix_dump(file, "W3: smq_lso_segnum \t\t%d\nW3: smq_next_sq \t\t%d",
ctx->smq_lso_segnum, ctx->smq_next_sq);
- nix_dump("W3: mnq_dis \t\t\t%d\nW3: lmt_dis \t\t\t%d", ctx->mnq_dis,
+ nix_dump(file, "W3: mnq_dis \t\t\t%d\nW3: lmt_dis \t\t\t%d", ctx->mnq_dis,
ctx->lmt_dis);
- nix_dump("W3: cq_limit\t\t\t%d\nW3: max_sqe_size\t\t%d\n",
+ nix_dump(file, "W3: cq_limit\t\t\t%d\nW3: max_sqe_size\t\t%d\n",
ctx->cq_limit, ctx->max_sqe_size);
- nix_dump("W4: next_sqb \t\t\t0x%" PRIx64 "", ctx->next_sqb);
- nix_dump("W5: tail_sqb \t\t\t0x%" PRIx64 "", ctx->tail_sqb);
- nix_dump("W6: smenq_sqb \t\t\t0x%" PRIx64 "", ctx->smenq_sqb);
- nix_dump("W7: smenq_next_sqb \t\t0x%" PRIx64 "", ctx->smenq_next_sqb);
- nix_dump("W8: head_sqb \t\t\t0x%" PRIx64 "", ctx->head_sqb);
+ nix_dump(file, "W4: next_sqb \t\t\t0x%" PRIx64 "", ctx->next_sqb);
+ nix_dump(file, "W5: tail_sqb \t\t\t0x%" PRIx64 "", ctx->tail_sqb);
+ nix_dump(file, "W6: smenq_sqb \t\t\t0x%" PRIx64 "", ctx->smenq_sqb);
+ nix_dump(file, "W7: smenq_next_sqb \t\t0x%" PRIx64 "", ctx->smenq_next_sqb);
+ nix_dump(file, "W8: head_sqb \t\t\t0x%" PRIx64 "", ctx->head_sqb);
- nix_dump("W9: vfi_lso_vld \t\t%d\nW9: vfi_lso_vlan1_ins_ena\t%d",
+ nix_dump(file, "W9: vfi_lso_vld \t\t%d\nW9: vfi_lso_vlan1_ins_ena\t%d",
ctx->vfi_lso_vld, ctx->vfi_lso_vlan1_ins_ena);
- nix_dump("W9: vfi_lso_vlan0_ins_ena\t%d\nW9: vfi_lso_mps\t\t\t%d",
+ nix_dump(file, "W9: vfi_lso_vlan0_ins_ena\t%d\nW9: vfi_lso_mps\t\t\t%d",
ctx->vfi_lso_vlan0_ins_ena, ctx->vfi_lso_mps);
- nix_dump("W9: vfi_lso_sb \t\t\t%d\nW9: vfi_lso_sizem1\t\t%d",
+ nix_dump(file, "W9: vfi_lso_sb \t\t\t%d\nW9: vfi_lso_sizem1\t\t%d",
ctx->vfi_lso_sb, ctx->vfi_lso_sizem1);
- nix_dump("W9: vfi_lso_total\t\t%d", ctx->vfi_lso_total);
+ nix_dump(file, "W9: vfi_lso_total\t\t%d", ctx->vfi_lso_total);
- nix_dump("W10: scm_lso_rem \t\t0x%" PRIx64 "",
+ nix_dump(file, "W10: scm_lso_rem \t\t0x%" PRIx64 "",
(uint64_t)ctx->scm_lso_rem);
- nix_dump("W11: octs \t\t\t0x%" PRIx64 "", (uint64_t)ctx->octs);
- nix_dump("W12: pkts \t\t\t0x%" PRIx64 "", (uint64_t)ctx->pkts);
- nix_dump("W14: dropped_octs \t\t0x%" PRIx64 "",
+ nix_dump(file, "W11: octs \t\t\t0x%" PRIx64 "", (uint64_t)ctx->octs);
+ nix_dump(file, "W12: pkts \t\t\t0x%" PRIx64 "", (uint64_t)ctx->pkts);
+ nix_dump(file, "W14: dropped_octs \t\t0x%" PRIx64 "",
(uint64_t)ctx->drop_octs);
- nix_dump("W15: dropped_pkts \t\t0x%" PRIx64 "",
+ nix_dump(file, "W15: dropped_pkts \t\t0x%" PRIx64 "",
(uint64_t)ctx->drop_pkts);
*sqb_aura_p = ctx->sqb_aura;
}
static inline void
-nix_lf_sq_dump(__io struct nix_cn10k_sq_ctx_s *ctx, uint32_t *sqb_aura_p)
+nix_lf_sq_dump(__io struct nix_cn10k_sq_ctx_s *ctx, uint32_t *sqb_aura_p, FILE *file)
{
- nix_dump("W0: sqe_way_mask \t\t%d\nW0: cq \t\t\t\t%d",
+ nix_dump(file, "W0: sqe_way_mask \t\t%d\nW0: cq \t\t\t\t%d",
ctx->sqe_way_mask, ctx->cq);
- nix_dump("W0: sdp_mcast \t\t\t%d\nW0: substream \t\t\t0x%03x",
+ nix_dump(file, "W0: sdp_mcast \t\t\t%d\nW0: substream \t\t\t0x%03x",
ctx->sdp_mcast, ctx->substream);
- nix_dump("W0: qint_idx \t\t\t%d\nW0: ena \t\t\t%d\n", ctx->qint_idx,
+ nix_dump(file, "W0: qint_idx \t\t\t%d\nW0: ena \t\t\t%d\n", ctx->qint_idx,
ctx->ena);
- nix_dump("W1: sqb_count \t\t\t%d\nW1: default_chan \t\t%d",
+ nix_dump(file, "W1: sqb_count \t\t\t%d\nW1: default_chan \t\t%d",
ctx->sqb_count, ctx->default_chan);
- nix_dump("W1: smq_rr_weight \t\t%d\nW1: sso_ena \t\t\t%d",
+ nix_dump(file, "W1: smq_rr_weight \t\t%d\nW1: sso_ena \t\t\t%d",
ctx->smq_rr_weight, ctx->sso_ena);
- nix_dump("W1: xoff \t\t\t%d\nW1: cq_ena \t\t\t%d\nW1: smq\t\t\t\t%d\n",
+ nix_dump(file, "W1: xoff \t\t\t%d\nW1: cq_ena \t\t\t%d\nW1: smq\t\t\t\t%d\n",
ctx->xoff, ctx->cq_ena, ctx->smq);
- nix_dump("W2: sqe_stype \t\t\t%d\nW2: sq_int_ena \t\t\t%d",
+ nix_dump(file, "W2: sqe_stype \t\t\t%d\nW2: sq_int_ena \t\t\t%d",
ctx->sqe_stype, ctx->sq_int_ena);
- nix_dump("W2: sq_int \t\t\t%d\nW2: sqb_aura \t\t\t%d", ctx->sq_int,
+ nix_dump(file, "W2: sq_int \t\t\t%d\nW2: sqb_aura \t\t\t%d", ctx->sq_int,
ctx->sqb_aura);
- nix_dump("W2: smq_rr_count[ub:lb] \t\t%x:%x\n", ctx->smq_rr_count_ub,
+ nix_dump(file, "W2: smq_rr_count[ub:lb] \t\t%x:%x\n", ctx->smq_rr_count_ub,
ctx->smq_rr_count_lb);
- nix_dump("W3: smq_next_sq_vld\t\t%d\nW3: smq_pend\t\t\t%d",
+ nix_dump(file, "W3: smq_next_sq_vld\t\t%d\nW3: smq_pend\t\t\t%d",
ctx->smq_next_sq_vld, ctx->smq_pend);
- nix_dump("W3: smenq_next_sqb_vld \t%d\nW3: head_offset\t\t\t%d",
+ nix_dump(file, "W3: smenq_next_sqb_vld \t%d\nW3: head_offset\t\t\t%d",
ctx->smenq_next_sqb_vld, ctx->head_offset);
- nix_dump("W3: smenq_offset\t\t%d\nW3: tail_offset \t\t%d",
+ nix_dump(file, "W3: smenq_offset\t\t%d\nW3: tail_offset \t\t%d",
ctx->smenq_offset, ctx->tail_offset);
- nix_dump("W3: smq_lso_segnum \t\t%d\nW3: smq_next_sq \t\t%d",
+ nix_dump(file, "W3: smq_lso_segnum \t\t%d\nW3: smq_next_sq \t\t%d",
ctx->smq_lso_segnum, ctx->smq_next_sq);
- nix_dump("W3: mnq_dis \t\t\t%d\nW3: lmt_dis \t\t\t%d", ctx->mnq_dis,
+ nix_dump(file, "W3: mnq_dis \t\t\t%d\nW3: lmt_dis \t\t\t%d", ctx->mnq_dis,
ctx->lmt_dis);
- nix_dump("W3: cq_limit\t\t\t%d\nW3: max_sqe_size\t\t%d\n",
+ nix_dump(file, "W3: cq_limit\t\t\t%d\nW3: max_sqe_size\t\t%d\n",
ctx->cq_limit, ctx->max_sqe_size);
- nix_dump("W4: next_sqb \t\t\t0x%" PRIx64 "", ctx->next_sqb);
- nix_dump("W5: tail_sqb \t\t\t0x%" PRIx64 "", ctx->tail_sqb);
- nix_dump("W6: smenq_sqb \t\t\t0x%" PRIx64 "", ctx->smenq_sqb);
- nix_dump("W7: smenq_next_sqb \t\t0x%" PRIx64 "", ctx->smenq_next_sqb);
- nix_dump("W8: head_sqb \t\t\t0x%" PRIx64 "", ctx->head_sqb);
+ nix_dump(file, "W4: next_sqb \t\t\t0x%" PRIx64 "", ctx->next_sqb);
+ nix_dump(file, "W5: tail_sqb \t\t\t0x%" PRIx64 "", ctx->tail_sqb);
+ nix_dump(file, "W6: smenq_sqb \t\t\t0x%" PRIx64 "", ctx->smenq_sqb);
+ nix_dump(file, "W7: smenq_next_sqb \t\t0x%" PRIx64 "", ctx->smenq_next_sqb);
+ nix_dump(file, "W8: head_sqb \t\t\t0x%" PRIx64 "", ctx->head_sqb);
- nix_dump("W9: vfi_lso_vld \t\t%d\nW9: vfi_lso_vlan1_ins_ena\t%d", ctx->vfi_lso_vld,
+ nix_dump(file, "W9: vfi_lso_vld \t\t%d\nW9: vfi_lso_vlan1_ins_ena\t%d", ctx->vfi_lso_vld,
ctx->vfi_lso_vlan1_ins_ena);
- nix_dump("W9: vfi_lso_vlan0_ins_ena\t%d\nW9: vfi_lso_mps\t\t\t%d",
+ nix_dump(file, "W9: vfi_lso_vlan0_ins_ena\t%d\nW9: vfi_lso_mps\t\t\t%d",
ctx->vfi_lso_vlan0_ins_ena, ctx->vfi_lso_mps);
- nix_dump("W9: vfi_lso_sb \t\t\t%d\nW9: vfi_lso_sizem1\t\t%d", ctx->vfi_lso_sb,
+ nix_dump(file, "W9: vfi_lso_sb \t\t\t%d\nW9: vfi_lso_sizem1\t\t%d", ctx->vfi_lso_sb,
ctx->vfi_lso_sizem1);
- nix_dump("W9: vfi_lso_total\t\t%d", ctx->vfi_lso_total);
+ nix_dump(file, "W9: vfi_lso_total\t\t%d", ctx->vfi_lso_total);
- nix_dump("W10: scm_lso_rem \t\t0x%" PRIx64 "", (uint64_t)ctx->scm_lso_rem);
- nix_dump("W11: octs \t\t\t0x%" PRIx64 "", (uint64_t)ctx->octs);
- nix_dump("W12: pkts \t\t\t0x%" PRIx64 "", (uint64_t)ctx->pkts);
- nix_dump("W13: aged_drop_pkts \t\t\t0x%" PRIx64 "", (uint64_t)ctx->aged_drop_pkts);
- nix_dump("W13: aged_drop_octs \t\t\t0x%" PRIx64 "", (uint64_t)ctx->aged_drop_octs);
- nix_dump("W14: dropped_octs \t\t0x%" PRIx64 "", (uint64_t)ctx->drop_octs);
- nix_dump("W15: dropped_pkts \t\t0x%" PRIx64 "", (uint64_t)ctx->drop_pkts);
+ nix_dump(file, "W10: scm_lso_rem \t\t0x%" PRIx64 "", (uint64_t)ctx->scm_lso_rem);
+ nix_dump(file, "W11: octs \t\t\t0x%" PRIx64 "", (uint64_t)ctx->octs);
+ nix_dump(file, "W12: pkts \t\t\t0x%" PRIx64 "", (uint64_t)ctx->pkts);
+ nix_dump(file, "W13: aged_drop_pkts \t\t\t0x%" PRIx64 "", (uint64_t)ctx->aged_drop_pkts);
+ nix_dump(file, "W13: aged_drop_octs \t\t\t0x%" PRIx64 "", (uint64_t)ctx->aged_drop_octs);
+ nix_dump(file, "W14: dropped_octs \t\t0x%" PRIx64 "", (uint64_t)ctx->drop_octs);
+ nix_dump(file, "W15: dropped_pkts \t\t0x%" PRIx64 "", (uint64_t)ctx->drop_pkts);
*sqb_aura_p = ctx->sqb_aura;
}
static inline void
-nix_cn9k_lf_rq_dump(__io struct nix_rq_ctx_s *ctx)
+nix_cn9k_lf_rq_dump(__io struct nix_rq_ctx_s *ctx, FILE *file)
{
- nix_dump("W0: wqe_aura \t\t\t%d\nW0: substream \t\t\t0x%03x",
+ nix_dump(file, "W0: wqe_aura \t\t\t%d\nW0: substream \t\t\t0x%03x",
ctx->wqe_aura, ctx->substream);
- nix_dump("W0: cq \t\t\t\t%d\nW0: ena_wqwd \t\t\t%d", ctx->cq,
+ nix_dump(file, "W0: cq \t\t\t\t%d\nW0: ena_wqwd \t\t\t%d", ctx->cq,
ctx->ena_wqwd);
- nix_dump("W0: ipsech_ena \t\t\t%d\nW0: sso_ena \t\t\t%d",
+ nix_dump(file, "W0: ipsech_ena \t\t\t%d\nW0: sso_ena \t\t\t%d",
ctx->ipsech_ena, ctx->sso_ena);
- nix_dump("W0: ena \t\t\t%d\n", ctx->ena);
+ nix_dump(file, "W0: ena \t\t\t%d\n", ctx->ena);
- nix_dump("W1: lpb_drop_ena \t\t%d\nW1: spb_drop_ena \t\t%d",
+ nix_dump(file, "W1: lpb_drop_ena \t\t%d\nW1: spb_drop_ena \t\t%d",
ctx->lpb_drop_ena, ctx->spb_drop_ena);
- nix_dump("W1: xqe_drop_ena \t\t%d\nW1: wqe_caching \t\t%d",
+ nix_dump(file, "W1: xqe_drop_ena \t\t%d\nW1: wqe_caching \t\t%d",
ctx->xqe_drop_ena, ctx->wqe_caching);
- nix_dump("W1: pb_caching \t\t\t%d\nW1: sso_tt \t\t\t%d",
+ nix_dump(file, "W1: pb_caching \t\t\t%d\nW1: sso_tt \t\t\t%d",
ctx->pb_caching, ctx->sso_tt);
- nix_dump("W1: sso_grp \t\t\t%d\nW1: lpb_aura \t\t\t%d", ctx->sso_grp,
+ nix_dump(file, "W1: sso_grp \t\t\t%d\nW1: lpb_aura \t\t\t%d", ctx->sso_grp,
ctx->lpb_aura);
- nix_dump("W1: spb_aura \t\t\t%d\n", ctx->spb_aura);
+ nix_dump(file, "W1: spb_aura \t\t\t%d\n", ctx->spb_aura);
- nix_dump("W2: xqe_hdr_split \t\t%d\nW2: xqe_imm_copy \t\t%d",
+ nix_dump(file, "W2: xqe_hdr_split \t\t%d\nW2: xqe_imm_copy \t\t%d",
ctx->xqe_hdr_split, ctx->xqe_imm_copy);
- nix_dump("W2: xqe_imm_size \t\t%d\nW2: later_skip \t\t\t%d",
+ nix_dump(file, "W2: xqe_imm_size \t\t%d\nW2: later_skip \t\t\t%d",
ctx->xqe_imm_size, ctx->later_skip);
- nix_dump("W2: first_skip \t\t\t%d\nW2: lpb_sizem1 \t\t\t%d",
+ nix_dump(file, "W2: first_skip \t\t\t%d\nW2: lpb_sizem1 \t\t\t%d",
ctx->first_skip, ctx->lpb_sizem1);
- nix_dump("W2: spb_ena \t\t\t%d\nW2: wqe_skip \t\t\t%d", ctx->spb_ena,
+ nix_dump(file, "W2: spb_ena \t\t\t%d\nW2: wqe_skip \t\t\t%d", ctx->spb_ena,
ctx->wqe_skip);
- nix_dump("W2: spb_sizem1 \t\t\t%d\n", ctx->spb_sizem1);
+ nix_dump(file, "W2: spb_sizem1 \t\t\t%d\n", ctx->spb_sizem1);
- nix_dump("W3: spb_pool_pass \t\t%d\nW3: spb_pool_drop \t\t%d",
+ nix_dump(file, "W3: spb_pool_pass \t\t%d\nW3: spb_pool_drop \t\t%d",
ctx->spb_pool_pass, ctx->spb_pool_drop);
- nix_dump("W3: spb_aura_pass \t\t%d\nW3: spb_aura_drop \t\t%d",
+ nix_dump(file, "W3: spb_aura_pass \t\t%d\nW3: spb_aura_drop \t\t%d",
ctx->spb_aura_pass, ctx->spb_aura_drop);
- nix_dump("W3: wqe_pool_pass \t\t%d\nW3: wqe_pool_drop \t\t%d",
+ nix_dump(file, "W3: wqe_pool_pass \t\t%d\nW3: wqe_pool_drop \t\t%d",
ctx->wqe_pool_pass, ctx->wqe_pool_drop);
- nix_dump("W3: xqe_pass \t\t\t%d\nW3: xqe_drop \t\t\t%d\n",
+ nix_dump(file, "W3: xqe_pass \t\t\t%d\nW3: xqe_drop \t\t\t%d\n",
ctx->xqe_pass, ctx->xqe_drop);
- nix_dump("W4: qint_idx \t\t\t%d\nW4: rq_int_ena \t\t\t%d",
+ nix_dump(file, "W4: qint_idx \t\t\t%d\nW4: rq_int_ena \t\t\t%d",
ctx->qint_idx, ctx->rq_int_ena);
- nix_dump("W4: rq_int \t\t\t%d\nW4: lpb_pool_pass \t\t%d", ctx->rq_int,
+ nix_dump(file, "W4: rq_int \t\t\t%d\nW4: lpb_pool_pass \t\t%d", ctx->rq_int,
ctx->lpb_pool_pass);
- nix_dump("W4: lpb_pool_drop \t\t%d\nW4: lpb_aura_pass \t\t%d",
+ nix_dump(file, "W4: lpb_pool_drop \t\t%d\nW4: lpb_aura_pass \t\t%d",
ctx->lpb_pool_drop, ctx->lpb_aura_pass);
- nix_dump("W4: lpb_aura_drop \t\t%d\n", ctx->lpb_aura_drop);
+ nix_dump(file, "W4: lpb_aura_drop \t\t%d\n", ctx->lpb_aura_drop);
- nix_dump("W5: flow_tagw \t\t\t%d\nW5: bad_utag \t\t\t%d",
+ nix_dump(file, "W5: flow_tagw \t\t\t%d\nW5: bad_utag \t\t\t%d",
ctx->flow_tagw, ctx->bad_utag);
- nix_dump("W5: good_utag \t\t\t%d\nW5: ltag \t\t\t%d\n", ctx->good_utag,
+ nix_dump(file, "W5: good_utag \t\t\t%d\nW5: ltag \t\t\t%d\n", ctx->good_utag,
ctx->ltag);
- nix_dump("W6: octs \t\t\t0x%" PRIx64 "", (uint64_t)ctx->octs);
- nix_dump("W7: pkts \t\t\t0x%" PRIx64 "", (uint64_t)ctx->pkts);
- nix_dump("W8: drop_octs \t\t\t0x%" PRIx64 "", (uint64_t)ctx->drop_octs);
- nix_dump("W9: drop_pkts \t\t\t0x%" PRIx64 "", (uint64_t)ctx->drop_pkts);
- nix_dump("W10: re_pkts \t\t\t0x%" PRIx64 "\n", (uint64_t)ctx->re_pkts);
+ nix_dump(file, "W6: octs \t\t\t0x%" PRIx64 "", (uint64_t)ctx->octs);
+ nix_dump(file, "W7: pkts \t\t\t0x%" PRIx64 "", (uint64_t)ctx->pkts);
+ nix_dump(file, "W8: drop_octs \t\t\t0x%" PRIx64 "", (uint64_t)ctx->drop_octs);
+ nix_dump(file, "W9: drop_pkts \t\t\t0x%" PRIx64 "", (uint64_t)ctx->drop_pkts);
+ nix_dump(file, "W10: re_pkts \t\t\t0x%" PRIx64 "\n", (uint64_t)ctx->re_pkts);
}
void
-nix_lf_rq_dump(__io struct nix_cn10k_rq_ctx_s *ctx)
+nix_lf_rq_dump(__io struct nix_cn10k_rq_ctx_s *ctx, FILE *file)
{
- nix_dump("W0: wqe_aura \t\t\t%d\nW0: len_ol3_dis \t\t\t%d",
+ nix_dump(file, "W0: wqe_aura \t\t\t%d\nW0: len_ol3_dis \t\t\t%d",
ctx->wqe_aura, ctx->len_ol3_dis);
- nix_dump("W0: len_ol4_dis \t\t\t%d\nW0: len_il3_dis \t\t\t%d",
+ nix_dump(file, "W0: len_ol4_dis \t\t\t%d\nW0: len_il3_dis \t\t\t%d",
ctx->len_ol4_dis, ctx->len_il3_dis);
- nix_dump("W0: len_il4_dis \t\t\t%d\nW0: csum_ol4_dis \t\t\t%d",
+ nix_dump(file, "W0: len_il4_dis \t\t\t%d\nW0: csum_ol4_dis \t\t\t%d",
ctx->len_il4_dis, ctx->csum_ol4_dis);
- nix_dump("W0: csum_ol3_dis \t\t\t%d\nW0: lenerr_dis \t\t\t%d",
+ nix_dump(file, "W0: csum_ol3_dis \t\t\t%d\nW0: lenerr_dis \t\t\t%d",
ctx->csum_ol4_dis, ctx->lenerr_dis);
- nix_dump("W0: cq \t\t\t\t%d\nW0: ena_wqwd \t\t\t%d", ctx->cq,
+ nix_dump(file, "W0: cq \t\t\t\t%d\nW0: ena_wqwd \t\t\t%d", ctx->cq,
ctx->ena_wqwd);
- nix_dump("W0: ipsech_ena \t\t\t%d\nW0: sso_ena \t\t\t%d",
+ nix_dump(file, "W0: ipsech_ena \t\t\t%d\nW0: sso_ena \t\t\t%d",
ctx->ipsech_ena, ctx->sso_ena);
- nix_dump("W0: ena \t\t\t%d\n", ctx->ena);
+ nix_dump(file, "W0: ena \t\t\t%d\n", ctx->ena);
- nix_dump("W1: chi_ena \t\t%d\nW1: ipsecd_drop_en \t\t%d", ctx->chi_ena,
+ nix_dump(file, "W1: chi_ena \t\t%d\nW1: ipsecd_drop_en \t\t%d", ctx->chi_ena,
ctx->ipsecd_drop_en);
- nix_dump("W1: pb_stashing \t\t\t%d", ctx->pb_stashing);
- nix_dump("W1: lpb_drop_ena \t\t%d\nW1: spb_drop_ena \t\t%d",
+ nix_dump(file, "W1: pb_stashing \t\t\t%d", ctx->pb_stashing);
+ nix_dump(file, "W1: lpb_drop_ena \t\t%d\nW1: spb_drop_ena \t\t%d",
ctx->lpb_drop_ena, ctx->spb_drop_ena);
- nix_dump("W1: xqe_drop_ena \t\t%d\nW1: wqe_caching \t\t%d",
+ nix_dump(file, "W1: xqe_drop_ena \t\t%d\nW1: wqe_caching \t\t%d",
ctx->xqe_drop_ena, ctx->wqe_caching);
- nix_dump("W1: pb_caching \t\t\t%d\nW1: sso_tt \t\t\t%d",
+ nix_dump(file, "W1: pb_caching \t\t\t%d\nW1: sso_tt \t\t\t%d",
ctx->pb_caching, ctx->sso_tt);
- nix_dump("W1: sso_grp \t\t\t%d\nW1: lpb_aura \t\t\t%d", ctx->sso_grp,
+ nix_dump(file, "W1: sso_grp \t\t\t%d\nW1: lpb_aura \t\t\t%d", ctx->sso_grp,
ctx->lpb_aura);
- nix_dump("W1: spb_aura \t\t\t%d\n", ctx->spb_aura);
+ nix_dump(file, "W1: spb_aura \t\t\t%d\n", ctx->spb_aura);
- nix_dump("W2: xqe_hdr_split \t\t%d\nW2: xqe_imm_copy \t\t%d",
+ nix_dump(file, "W2: xqe_hdr_split \t\t%d\nW2: xqe_imm_copy \t\t%d",
ctx->xqe_hdr_split, ctx->xqe_imm_copy);
- nix_dump("W2: xqe_imm_size \t\t%d\nW2: later_skip \t\t\t%d",
+ nix_dump(file, "W2: xqe_imm_size \t\t%d\nW2: later_skip \t\t\t%d",
ctx->xqe_imm_size, ctx->later_skip);
- nix_dump("W2: first_skip \t\t\t%d\nW2: lpb_sizem1 \t\t\t%d",
+ nix_dump(file, "W2: first_skip \t\t\t%d\nW2: lpb_sizem1 \t\t\t%d",
ctx->first_skip, ctx->lpb_sizem1);
- nix_dump("W2: spb_ena \t\t\t%d\nW2: wqe_skip \t\t\t%d", ctx->spb_ena,
+ nix_dump(file, "W2: spb_ena \t\t\t%d\nW2: wqe_skip \t\t\t%d", ctx->spb_ena,
ctx->wqe_skip);
- nix_dump("W2: spb_sizem1 \t\t\t%d\nW2: policer_ena \t\t\t%d",
+ nix_dump(file, "W2: spb_sizem1 \t\t\t%d\nW2: policer_ena \t\t\t%d",
ctx->spb_sizem1, ctx->policer_ena);
- nix_dump("W2: band_prof_id \t\t\t%d", ctx->band_prof_id);
+ nix_dump(file, "W2: band_prof_id \t\t\t%d", ctx->band_prof_id);
- nix_dump("W3: spb_pool_pass \t\t%d\nW3: spb_pool_drop \t\t%d",
+ nix_dump(file, "W3: spb_pool_pass \t\t%d\nW3: spb_pool_drop \t\t%d",
ctx->spb_pool_pass, ctx->spb_pool_drop);
- nix_dump("W3: spb_aura_pass \t\t%d\nW3: spb_aura_drop \t\t%d",
+ nix_dump(file, "W3: spb_aura_pass \t\t%d\nW3: spb_aura_drop \t\t%d",
ctx->spb_aura_pass, ctx->spb_aura_drop);
- nix_dump("W3: wqe_pool_pass \t\t%d\nW3: wqe_pool_drop \t\t%d",
+ nix_dump(file, "W3: wqe_pool_pass \t\t%d\nW3: wqe_pool_drop \t\t%d",
ctx->wqe_pool_pass, ctx->wqe_pool_drop);
- nix_dump("W3: xqe_pass \t\t\t%d\nW3: xqe_drop \t\t\t%d\n",
+ nix_dump(file, "W3: xqe_pass \t\t\t%d\nW3: xqe_drop \t\t\t%d\n",
ctx->xqe_pass, ctx->xqe_drop);
- nix_dump("W4: qint_idx \t\t\t%d\nW4: rq_int_ena \t\t\t%d",
+ nix_dump(file, "W4: qint_idx \t\t\t%d\nW4: rq_int_ena \t\t\t%d",
ctx->qint_idx, ctx->rq_int_ena);
- nix_dump("W4: rq_int \t\t\t%d\nW4: lpb_pool_pass \t\t%d", ctx->rq_int,
+ nix_dump(file, "W4: rq_int \t\t\t%d\nW4: lpb_pool_pass \t\t%d", ctx->rq_int,
ctx->lpb_pool_pass);
- nix_dump("W4: lpb_pool_drop \t\t%d\nW4: lpb_aura_pass \t\t%d",
+ nix_dump(file, "W4: lpb_pool_drop \t\t%d\nW4: lpb_aura_pass \t\t%d",
ctx->lpb_pool_drop, ctx->lpb_aura_pass);
- nix_dump("W4: lpb_aura_drop \t\t%d\n", ctx->lpb_aura_drop);
+ nix_dump(file, "W4: lpb_aura_drop \t\t%d\n", ctx->lpb_aura_drop);
- nix_dump("W5: vwqe_skip \t\t\t%d\nW5: max_vsize_exp \t\t\t%d",
+ nix_dump(file, "W5: vwqe_skip \t\t\t%d\nW5: max_vsize_exp \t\t\t%d",
ctx->vwqe_skip, ctx->max_vsize_exp);
- nix_dump("W5: vtime_wait \t\t\t%d\nW5: vwqe_ena \t\t\t%d",
+ nix_dump(file, "W5: vtime_wait \t\t\t%d\nW5: vwqe_ena \t\t\t%d",
ctx->vtime_wait, ctx->max_vsize_exp);
- nix_dump("W5: ipsec_vwqe \t\t\t%d", ctx->ipsec_vwqe);
- nix_dump("W5: flow_tagw \t\t\t%d\nW5: bad_utag \t\t\t%d",
+ nix_dump(file, "W5: ipsec_vwqe \t\t\t%d", ctx->ipsec_vwqe);
+ nix_dump(file, "W5: flow_tagw \t\t\t%d\nW5: bad_utag \t\t\t%d",
ctx->flow_tagw, ctx->bad_utag);
- nix_dump("W5: good_utag \t\t\t%d\nW5: ltag \t\t\t%d\n", ctx->good_utag,
+ nix_dump(file, "W5: good_utag \t\t\t%d\nW5: ltag \t\t\t%d\n", ctx->good_utag,
ctx->ltag);
- nix_dump("W6: octs \t\t\t0x%" PRIx64 "", (uint64_t)ctx->octs);
- nix_dump("W7: pkts \t\t\t0x%" PRIx64 "", (uint64_t)ctx->pkts);
- nix_dump("W8: drop_octs \t\t\t0x%" PRIx64 "", (uint64_t)ctx->drop_octs);
- nix_dump("W9: drop_pkts \t\t\t0x%" PRIx64 "", (uint64_t)ctx->drop_pkts);
- nix_dump("W10: re_pkts \t\t\t0x%" PRIx64 "\n", (uint64_t)ctx->re_pkts);
+ nix_dump(file, "W6: octs \t\t\t0x%" PRIx64 "", (uint64_t)ctx->octs);
+ nix_dump(file, "W7: pkts \t\t\t0x%" PRIx64 "", (uint64_t)ctx->pkts);
+ nix_dump(file, "W8: drop_octs \t\t\t0x%" PRIx64 "", (uint64_t)ctx->drop_octs);
+ nix_dump(file, "W9: drop_pkts \t\t\t0x%" PRIx64 "", (uint64_t)ctx->drop_pkts);
+ nix_dump(file, "W10: re_pkts \t\t\t0x%" PRIx64 "\n", (uint64_t)ctx->re_pkts);
}
static inline void
-nix_lf_cq_dump(__io struct nix_cq_ctx_s *ctx)
+nix_lf_cq_dump(__io struct nix_cq_ctx_s *ctx, FILE *file)
{
- nix_dump("W0: base \t\t\t0x%" PRIx64 "\n", ctx->base);
+ nix_dump(file, "W0: base \t\t\t0x%" PRIx64 "\n", ctx->base);
- nix_dump("W1: wrptr \t\t\t%" PRIx64 "", (uint64_t)ctx->wrptr);
- nix_dump("W1: avg_con \t\t\t%d\nW1: cint_idx \t\t\t%d", ctx->avg_con,
+ nix_dump(file, "W1: wrptr \t\t\t%" PRIx64 "", (uint64_t)ctx->wrptr);
+ nix_dump(file, "W1: avg_con \t\t\t%d\nW1: cint_idx \t\t\t%d", ctx->avg_con,
ctx->cint_idx);
- nix_dump("W1: cq_err \t\t\t%d\nW1: qint_idx \t\t\t%d", ctx->cq_err,
+ nix_dump(file, "W1: cq_err \t\t\t%d\nW1: qint_idx \t\t\t%d", ctx->cq_err,
ctx->qint_idx);
- nix_dump("W1: bpid \t\t\t%d\nW1: bp_ena \t\t\t%d\n", ctx->bpid,
+ nix_dump(file, "W1: bpid \t\t\t%d\nW1: bp_ena \t\t\t%d\n", ctx->bpid,
ctx->bp_ena);
- nix_dump("W2: update_time \t\t%d\nW2: avg_level \t\t\t%d",
+ nix_dump(file, "W2: update_time \t\t%d\nW2: avg_level \t\t\t%d",
ctx->update_time, ctx->avg_level);
- nix_dump("W2: head \t\t\t%d\nW2: tail \t\t\t%d\n", ctx->head,
+ nix_dump(file, "W2: head \t\t\t%d\nW2: tail \t\t\t%d\n", ctx->head,
ctx->tail);
- nix_dump("W3: cq_err_int_ena \t\t%d\nW3: cq_err_int \t\t\t%d",
+ nix_dump(file, "W3: cq_err_int_ena \t\t%d\nW3: cq_err_int \t\t\t%d",
ctx->cq_err_int_ena, ctx->cq_err_int);
- nix_dump("W3: qsize \t\t\t%d\nW3: caching \t\t\t%d", ctx->qsize,
+ nix_dump(file, "W3: qsize \t\t\t%d\nW3: caching \t\t\t%d", ctx->qsize,
ctx->caching);
- nix_dump("W3: substream \t\t\t0x%03x\nW3: ena \t\t\t%d", ctx->substream,
+ nix_dump(file, "W3: substream \t\t\t0x%03x\nW3: ena \t\t\t%d", ctx->substream,
ctx->ena);
- nix_dump("W3: drop_ena \t\t\t%d\nW3: drop \t\t\t%d", ctx->drop_ena,
+ nix_dump(file, "W3: drop_ena \t\t\t%d\nW3: drop \t\t\t%d", ctx->drop_ena,
ctx->drop);
- nix_dump("W3: bp \t\t\t\t%d\n", ctx->bp);
+ nix_dump(file, "W3: bp \t\t\t\t%d\n", ctx->bp);
}
int
-roc_nix_queues_ctx_dump(struct roc_nix *roc_nix)
+roc_nix_queues_ctx_dump(struct roc_nix *roc_nix, FILE *file)
{
struct nix *nix = roc_nix_to_nix_priv(roc_nix);
int rc = -1, q, rq = nix->nb_rx_queues;
@@ -679,9 +695,9 @@ roc_nix_queues_ctx_dump(struct roc_nix *roc_nix)
plt_err("Failed to get cq context");
goto fail;
}
- nix_dump("============== port=%d cq=%d ===============",
+ nix_dump(file, "============== port=%d cq=%d ===============",
roc_nix->port_id, q);
- nix_lf_cq_dump(ctx);
+ nix_lf_cq_dump(ctx, file);
}
for (q = 0; q < rq; q++) {
@@ -690,12 +706,12 @@ roc_nix_queues_ctx_dump(struct roc_nix *roc_nix)
plt_err("Failed to get rq context");
goto fail;
}
- nix_dump("============== port=%d rq=%d ===============",
+ nix_dump(file, "============== port=%d rq=%d ===============",
roc_nix->port_id, q);
if (roc_model_is_cn9k())
- nix_cn9k_lf_rq_dump(ctx);
+ nix_cn9k_lf_rq_dump(ctx, file);
else
- nix_lf_rq_dump(ctx);
+ nix_lf_rq_dump(ctx, file);
}
for (q = 0; q < sq; q++) {
@@ -704,12 +720,12 @@ roc_nix_queues_ctx_dump(struct roc_nix *roc_nix)
plt_err("Failed to get sq context");
goto fail;
}
- nix_dump("============== port=%d sq=%d ===============",
+ nix_dump(file, "============== port=%d sq=%d ===============",
roc_nix->port_id, q);
if (roc_model_is_cn9k())
- nix_cn9k_lf_sq_dump(ctx, &sqb_aura);
+ nix_cn9k_lf_sq_dump(ctx, &sqb_aura, file);
else
- nix_lf_sq_dump(ctx, &sqb_aura);
+ nix_lf_sq_dump(ctx, &sqb_aura, file);
if (!npa_lf) {
plt_err("NPA LF does not exist");
@@ -730,15 +746,15 @@ roc_nix_queues_ctx_dump(struct roc_nix *roc_nix)
continue;
}
- nix_dump("\nSQB Aura W0: Pool addr\t\t0x%" PRIx64 "",
+ nix_dump(file, "\nSQB Aura W0: Pool addr\t\t0x%" PRIx64 "",
npa_rsp->aura.pool_addr);
- nix_dump("SQB Aura W1: ena\t\t\t%d", npa_rsp->aura.ena);
- nix_dump("SQB Aura W2: count\t\t%" PRIx64 "",
+ nix_dump(file, "SQB Aura W1: ena\t\t\t%d", npa_rsp->aura.ena);
+ nix_dump(file, "SQB Aura W2: count\t\t%" PRIx64 "",
(uint64_t)npa_rsp->aura.count);
- nix_dump("SQB Aura W3: limit\t\t%" PRIx64 "",
+ nix_dump(file, "SQB Aura W3: limit\t\t%" PRIx64 "",
(uint64_t)npa_rsp->aura.limit);
- nix_dump("SQB Aura W3: fc_ena\t\t%d", npa_rsp->aura.fc_ena);
- nix_dump("SQB Aura W4: fc_addr\t\t0x%" PRIx64 "\n",
+ nix_dump(file, "SQB Aura W3: fc_ena\t\t%d", npa_rsp->aura.fc_ena);
+ nix_dump(file, "SQB Aura W4: fc_addr\t\t0x%" PRIx64 "\n",
npa_rsp->aura.fc_addr);
}
@@ -750,120 +766,122 @@ roc_nix_queues_ctx_dump(struct roc_nix *roc_nix)
void
roc_nix_cqe_dump(const struct nix_cqe_hdr_s *cq)
{
+ FILE *file = NULL;
const union nix_rx_parse_u *rx =
(const union nix_rx_parse_u *)((const uint64_t *)cq + 1);
const uint64_t *sgs = (const uint64_t *)(rx + 1);
int i;
- nix_dump("tag \t\t0x%x\tq \t\t%d\t\tnode \t\t%d\tcqe_type \t%d",
+ nix_dump(file, "tag \t\t0x%x\tq \t\t%d\t\tnode \t\t%d\tcqe_type \t%d",
cq->tag, cq->q, cq->node, cq->cqe_type);
- nix_dump("W0: chan \t0x%x\t\tdesc_sizem1 \t%d", rx->chan,
+ nix_dump(file, "W0: chan \t0x%x\t\tdesc_sizem1 \t%d", rx->chan,
rx->desc_sizem1);
- nix_dump("W0: imm_copy \t%d\t\texpress \t%d", rx->imm_copy,
+ nix_dump(file, "W0: imm_copy \t%d\t\texpress \t%d", rx->imm_copy,
rx->express);
- nix_dump("W0: wqwd \t%d\t\terrlev \t\t%d\t\terrcode \t%d", rx->wqwd,
+ nix_dump(file, "W0: wqwd \t%d\t\terrlev \t\t%d\t\terrcode \t%d", rx->wqwd,
rx->errlev, rx->errcode);
- nix_dump("W0: latype \t%d\t\tlbtype \t\t%d\t\tlctype \t\t%d",
+ nix_dump(file, "W0: latype \t%d\t\tlbtype \t\t%d\t\tlctype \t\t%d",
rx->latype, rx->lbtype, rx->lctype);
- nix_dump("W0: ldtype \t%d\t\tletype \t\t%d\t\tlftype \t\t%d",
+ nix_dump(file, "W0: ldtype \t%d\t\tletype \t\t%d\t\tlftype \t\t%d",
rx->ldtype, rx->letype, rx->lftype);
- nix_dump("W0: lgtype \t%d \t\tlhtype \t\t%d", rx->lgtype, rx->lhtype);
+ nix_dump(file, "W0: lgtype \t%d \t\tlhtype \t\t%d", rx->lgtype, rx->lhtype);
- nix_dump("W1: pkt_lenm1 \t%d", rx->pkt_lenm1);
- nix_dump("W1: l2m \t%d\t\tl2b \t\t%d\t\tl3m \t\t%d\tl3b \t\t%d",
+ nix_dump(file, "W1: pkt_lenm1 \t%d", rx->pkt_lenm1);
+ nix_dump(file, "W1: l2m \t%d\t\tl2b \t\t%d\t\tl3m \t\t%d\tl3b \t\t%d",
rx->l2m, rx->l2b, rx->l3m, rx->l3b);
- nix_dump("W1: vtag0_valid %d\t\tvtag0_gone \t%d", rx->vtag0_valid,
+ nix_dump(file, "W1: vtag0_valid %d\t\tvtag0_gone \t%d", rx->vtag0_valid,
rx->vtag0_gone);
- nix_dump("W1: vtag1_valid %d\t\tvtag1_gone \t%d", rx->vtag1_valid,
+ nix_dump(file, "W1: vtag1_valid %d\t\tvtag1_gone \t%d", rx->vtag1_valid,
rx->vtag1_gone);
- nix_dump("W1: pkind \t%d", rx->pkind);
- nix_dump("W1: vtag0_tci \t%d\t\tvtag1_tci \t%d", rx->vtag0_tci,
+ nix_dump(file, "W1: pkind \t%d", rx->pkind);
+ nix_dump(file, "W1: vtag0_tci \t%d\t\tvtag1_tci \t%d", rx->vtag0_tci,
rx->vtag1_tci);
- nix_dump("W2: laflags \t%d\t\tlbflags\t\t%d\t\tlcflags \t%d",
+ nix_dump(file, "W2: laflags \t%d\t\tlbflags\t\t%d\t\tlcflags \t%d",
rx->laflags, rx->lbflags, rx->lcflags);
- nix_dump("W2: ldflags \t%d\t\tleflags\t\t%d\t\tlfflags \t%d",
+ nix_dump(file, "W2: ldflags \t%d\t\tleflags\t\t%d\t\tlfflags \t%d",
rx->ldflags, rx->leflags, rx->lfflags);
- nix_dump("W2: lgflags \t%d\t\tlhflags \t%d", rx->lgflags, rx->lhflags);
+ nix_dump(file, "W2: lgflags \t%d\t\tlhflags \t%d", rx->lgflags, rx->lhflags);
- nix_dump("W3: eoh_ptr \t%d\t\twqe_aura \t%d\t\tpb_aura \t%d",
+ nix_dump(file, "W3: eoh_ptr \t%d\t\twqe_aura \t%d\t\tpb_aura \t%d",
rx->eoh_ptr, rx->wqe_aura, rx->pb_aura);
- nix_dump("W3: match_id \t%d", rx->match_id);
+ nix_dump(file, "W3: match_id \t%d", rx->match_id);
- nix_dump("W4: laptr \t%d\t\tlbptr \t\t%d\t\tlcptr \t\t%d", rx->laptr,
+ nix_dump(file, "W4: laptr \t%d\t\tlbptr \t\t%d\t\tlcptr \t\t%d", rx->laptr,
rx->lbptr, rx->lcptr);
- nix_dump("W4: ldptr \t%d\t\tleptr \t\t%d\t\tlfptr \t\t%d", rx->ldptr,
+ nix_dump(file, "W4: ldptr \t%d\t\tleptr \t\t%d\t\tlfptr \t\t%d", rx->ldptr,
rx->leptr, rx->lfptr);
- nix_dump("W4: lgptr \t%d\t\tlhptr \t\t%d", rx->lgptr, rx->lhptr);
+ nix_dump(file, "W4: lgptr \t%d\t\tlhptr \t\t%d", rx->lgptr, rx->lhptr);
- nix_dump("W5: vtag0_ptr \t%d\t\tvtag1_ptr \t%d\t\tflow_key_alg \t%d",
+ nix_dump(file, "W5: vtag0_ptr \t%d\t\tvtag1_ptr \t%d\t\tflow_key_alg \t%d",
rx->vtag0_ptr, rx->vtag1_ptr, rx->flow_key_alg);
for (i = 0; i < (rx->desc_sizem1 + 1) << 1; i++)
- nix_dump("sg[%u] = %p", i, (void *)sgs[i]);
+ nix_dump(file, "sg[%u] = %p", i, (void *)sgs[i]);
}
void
-roc_nix_rq_dump(struct roc_nix_rq *rq)
+roc_nix_rq_dump(struct roc_nix_rq *rq, FILE *file)
{
- nix_dump("nix_rq@%p", rq);
- nix_dump(" qid = %d", rq->qid);
- nix_dump(" aura_handle = 0x%" PRIx64 "", rq->aura_handle);
- nix_dump(" ipsec_ena = %d", rq->ipsech_ena);
- nix_dump(" first_skip = %d", rq->first_skip);
- nix_dump(" later_skip = %d", rq->later_skip);
- nix_dump(" lpb_size = %d", rq->lpb_size);
- nix_dump(" sso_ena = %d", rq->sso_ena);
- nix_dump(" tag_mask = %d", rq->tag_mask);
- nix_dump(" flow_tag_width = %d", rq->flow_tag_width);
- nix_dump(" tt = %d", rq->tt);
- nix_dump(" hwgrp = %d", rq->hwgrp);
- nix_dump(" vwqe_ena = %d", rq->vwqe_ena);
- nix_dump(" vwqe_first_skip = %d", rq->vwqe_first_skip);
- nix_dump(" vwqe_max_sz_exp = %d", rq->vwqe_max_sz_exp);
- nix_dump(" vwqe_wait_tmo = %ld", rq->vwqe_wait_tmo);
- nix_dump(" vwqe_aura_handle = %ld", rq->vwqe_aura_handle);
- nix_dump(" roc_nix = %p", rq->roc_nix);
- nix_dump(" inl_dev_refs = %d", rq->inl_dev_refs);
+ nix_dump(file, "nix_rq@%p", rq);
+ nix_dump(file, " qid = %d", rq->qid);
+ nix_dump(file, " aura_handle = 0x%" PRIx64 "", rq->aura_handle);
+ nix_dump(file, " ipsec_ena = %d", rq->ipsech_ena);
+ nix_dump(file, " first_skip = %d", rq->first_skip);
+ nix_dump(file, " later_skip = %d", rq->later_skip);
+ nix_dump(file, " lpb_size = %d", rq->lpb_size);
+ nix_dump(file, " sso_ena = %d", rq->sso_ena);
+ nix_dump(file, " tag_mask = %d", rq->tag_mask);
+ nix_dump(file, " flow_tag_width = %d", rq->flow_tag_width);
+ nix_dump(file, " tt = %d", rq->tt);
+ nix_dump(file, " hwgrp = %d", rq->hwgrp);
+ nix_dump(file, " vwqe_ena = %d", rq->vwqe_ena);
+ nix_dump(file, " vwqe_first_skip = %d", rq->vwqe_first_skip);
+ nix_dump(file, " vwqe_max_sz_exp = %d", rq->vwqe_max_sz_exp);
+ nix_dump(file, " vwqe_wait_tmo = %ld", rq->vwqe_wait_tmo);
+ nix_dump(file, " vwqe_aura_handle = %ld", rq->vwqe_aura_handle);
+ nix_dump(file, " roc_nix = %p", rq->roc_nix);
+ nix_dump(file, " inl_dev_refs = %d", rq->inl_dev_refs);
}
void
-roc_nix_cq_dump(struct roc_nix_cq *cq)
+roc_nix_cq_dump(struct roc_nix_cq *cq, FILE *file)
{
- nix_dump("nix_cq@%p", cq);
- nix_dump(" qid = %d", cq->qid);
- nix_dump(" qnb_desc = %d", cq->nb_desc);
- nix_dump(" roc_nix = %p", cq->roc_nix);
- nix_dump(" door = 0x%" PRIx64 "", cq->door);
- nix_dump(" status = %p", cq->status);
- nix_dump(" wdata = 0x%" PRIx64 "", cq->wdata);
- nix_dump(" desc_base = %p", cq->desc_base);
- nix_dump(" qmask = 0x%" PRIx32 "", cq->qmask);
+ nix_dump(file, "nix_cq@%p", cq);
+ nix_dump(file, " qid = %d", cq->qid);
+ nix_dump(file, " qnb_desc = %d", cq->nb_desc);
+ nix_dump(file, " roc_nix = %p", cq->roc_nix);
+ nix_dump(file, " door = 0x%" PRIx64 "", cq->door);
+ nix_dump(file, " status = %p", cq->status);
+ nix_dump(file, " wdata = 0x%" PRIx64 "", cq->wdata);
+ nix_dump(file, " desc_base = %p", cq->desc_base);
+ nix_dump(file, " qmask = 0x%" PRIx32 "", cq->qmask);
}
void
-roc_nix_sq_dump(struct roc_nix_sq *sq)
+roc_nix_sq_dump(struct roc_nix_sq *sq, FILE *file)
{
- nix_dump("nix_sq@%p", sq);
- nix_dump(" qid = %d", sq->qid);
- nix_dump(" max_sqe_sz = %d", sq->max_sqe_sz);
- nix_dump(" nb_desc = %d", sq->nb_desc);
- nix_dump(" sqes_per_sqb_log2 = %d", sq->sqes_per_sqb_log2);
- nix_dump(" roc_nix= %p", sq->roc_nix);
- nix_dump(" aura_handle = 0x%" PRIx64 "", sq->aura_handle);
- nix_dump(" nb_sqb_bufs_adj = %d", sq->nb_sqb_bufs_adj);
- nix_dump(" nb_sqb_bufs = %d", sq->nb_sqb_bufs);
- nix_dump(" io_addr = 0x%" PRIx64 "", sq->io_addr);
- nix_dump(" lmt_addr = %p", sq->lmt_addr);
- nix_dump(" sqe_mem = %p", sq->sqe_mem);
- nix_dump(" fc = %p", sq->fc);
+ nix_dump(file, "nix_sq@%p", sq);
+ nix_dump(file, " qid = %d", sq->qid);
+ nix_dump(file, " max_sqe_sz = %d", sq->max_sqe_sz);
+ nix_dump(file, " nb_desc = %d", sq->nb_desc);
+ nix_dump(file, " sqes_per_sqb_log2 = %d", sq->sqes_per_sqb_log2);
+ nix_dump(file, " roc_nix= %p", sq->roc_nix);
+ nix_dump(file, " aura_handle = 0x%" PRIx64 "", sq->aura_handle);
+ nix_dump(file, " nb_sqb_bufs_adj = %d", sq->nb_sqb_bufs_adj);
+ nix_dump(file, " nb_sqb_bufs = %d", sq->nb_sqb_bufs);
+ nix_dump(file, " io_addr = 0x%" PRIx64 "", sq->io_addr);
+ nix_dump(file, " lmt_addr = %p", sq->lmt_addr);
+ nix_dump(file, " sqe_mem = %p", sq->sqe_mem);
+ nix_dump(file, " fc = %p", sq->fc);
};
static uint8_t
nix_tm_reg_dump_prep(uint16_t hw_lvl, uint16_t schq, uint16_t link,
uint64_t *reg, char regstr[][NIX_REG_NAME_SZ])
{
+ FILE *file = NULL;
uint8_t k = 0;
switch (hw_lvl) {
@@ -1022,7 +1040,7 @@ nix_tm_reg_dump_prep(uint16_t hw_lvl, uint16_t schq, uint16_t link,
}
if (k > MAX_REGS_PER_MBOX_MSG) {
- nix_dump("\t!!!NIX TM Registers request overflow!!!");
+ nix_dump(file, "\t!!!NIX TM Registers request overflow!!!");
return 0;
}
return k;
@@ -1040,6 +1058,7 @@ nix_tm_dump_lvl(struct nix *nix, struct nix_tm_node_list *list, uint8_t hw_lvl)
struct nix_tm_node *root = NULL;
uint32_t schq, parent_schq;
bool found = false;
+ FILE *file = NULL;
uint8_t j, k, rc;
TAILQ_FOREACH(node, list, node) {
@@ -1067,7 +1086,7 @@ nix_tm_dump_lvl(struct nix *nix, struct nix_tm_node_list *list, uint8_t hw_lvl)
parent_lvlstr = nix_tm_hwlvl2str(node->hw_lvl + 1);
}
- nix_dump("\t(%p%s) %s_%d->%s_%d", node,
+ nix_dump(file, "\t(%p%s) %s_%d->%s_%d", node,
node->child_realloc ? "[CR]" : "", lvlstr, schq,
parent_lvlstr, parent_schq);
@@ -1092,15 +1111,15 @@ nix_tm_dump_lvl(struct nix *nix, struct nix_tm_node_list *list, uint8_t hw_lvl)
rc = mbox_process_msg(mbox, (void **)&rsp);
if (!rc) {
for (j = 0; j < k; j++)
- nix_dump("\t\t%s=0x%016" PRIx64, regstr[j],
+ nix_dump(file, "\t\t%s=0x%016" PRIx64, regstr[j],
rsp->regval[j]);
} else {
- nix_dump("\t!!!Failed to dump registers!!!");
+ nix_dump(file, "\t!!!Failed to dump registers!!!");
}
}
if (found)
- nix_dump("\n");
+ nix_dump(file, "\n");
/* Dump TL1 node data when root level is TL2 */
if (root && root->hw_lvl == NIX_TXSCH_LVL_TL2) {
@@ -1117,171 +1136,182 @@ nix_tm_dump_lvl(struct nix *nix, struct nix_tm_node_list *list, uint8_t hw_lvl)
rc = mbox_process_msg(mbox, (void **)&rsp);
if (!rc) {
for (j = 0; j < k; j++)
- nix_dump("\t\t%s=0x%016" PRIx64, regstr[j],
+ nix_dump(file, "\t\t%s=0x%016" PRIx64, regstr[j],
rsp->regval[j]);
} else {
- nix_dump("\t!!!Failed to dump registers!!!");
+ nix_dump(file, "\t!!!Failed to dump registers!!!");
}
- nix_dump("\n");
+ nix_dump(file, "\n");
}
}
void
-roc_nix_tm_dump(struct roc_nix *roc_nix)
+roc_nix_tm_dump(struct roc_nix *roc_nix, FILE *file)
{
struct nix *nix = roc_nix_to_nix_priv(roc_nix);
struct dev *dev = &nix->dev;
uint8_t hw_lvl, i;
- nix_dump("===TM hierarchy and registers dump of %s (pf:vf) (%d:%d)===",
+ nix_dump(file, "===TM hierarchy and registers dump of %s (pf:vf) (%d:%d)===",
nix->pci_dev->name, dev_get_pf(dev->pf_func),
dev_get_vf(dev->pf_func));
/* Dump all trees */
for (i = 0; i < ROC_NIX_TM_TREE_MAX; i++) {
- nix_dump("\tTM %s:", nix_tm_tree2str(i));
+ nix_dump(file, "\tTM %s:", nix_tm_tree2str(i));
for (hw_lvl = 0; hw_lvl <= NIX_TXSCH_LVL_CNT; hw_lvl++)
nix_tm_dump_lvl(nix, &nix->trees[i], hw_lvl);
}
/* Dump unused resources */
- nix_dump("\tTM unused resources:");
+ nix_dump(file, "\tTM unused resources:");
hw_lvl = NIX_TXSCH_LVL_SMQ;
for (; hw_lvl < NIX_TXSCH_LVL_CNT; hw_lvl++) {
- nix_dump("\t\ttxschq %7s num = %d",
+ nix_dump(file, "\t\ttxschq %7s num = %d",
nix_tm_hwlvl2str(hw_lvl),
nix_tm_resource_avail(nix, hw_lvl, false));
- nix_bitmap_dump(nix->schq_bmp[hw_lvl]);
- nix_dump("\n");
+ nix_bitmap_dump(nix->schq_bmp[hw_lvl], file);
+ nix_dump(file, "\n");
- nix_dump("\t\ttxschq_contig %7s num = %d",
+ nix_dump(file, "\t\ttxschq_contig %7s num = %d",
nix_tm_hwlvl2str(hw_lvl),
nix_tm_resource_avail(nix, hw_lvl, true));
- nix_bitmap_dump(nix->schq_contig_bmp[hw_lvl]);
- nix_dump("\n");
+ nix_bitmap_dump(nix->schq_contig_bmp[hw_lvl], file);
+ nix_dump(file, "\n");
}
}
void
-roc_nix_dump(struct roc_nix *roc_nix)
+roc_nix_dump(struct roc_nix *roc_nix, FILE *file)
{
struct nix *nix = roc_nix_to_nix_priv(roc_nix);
struct dev *dev = &nix->dev;
int i;
- nix_dump("nix@%p", nix);
- nix_dump(" pf = %d", dev_get_pf(dev->pf_func));
- nix_dump(" vf = %d", dev_get_vf(dev->pf_func));
- nix_dump(" bar2 = 0x%" PRIx64, dev->bar2);
- nix_dump(" bar4 = 0x%" PRIx64, dev->bar4);
- nix_dump(" port_id = %d", roc_nix->port_id);
- nix_dump(" rss_tag_as_xor = %d", roc_nix->rss_tag_as_xor);
- nix_dump(" rss_tag_as_xor = %d", roc_nix->max_sqb_count);
- nix_dump(" outb_nb_desc = %u", roc_nix->outb_nb_desc);
+ nix_dump(file, "nix@%p", nix);
+ nix_dump(file, " pf = %d", dev_get_pf(dev->pf_func));
+ nix_dump(file, " vf = %d", dev_get_vf(dev->pf_func));
+ nix_dump(file, " bar2 = 0x%" PRIx64, dev->bar2);
+ nix_dump(file, " bar4 = 0x%" PRIx64, dev->bar4);
+ nix_dump(file, " port_id = %d", roc_nix->port_id);
+ nix_dump(file, " rss_tag_as_xor = %d", roc_nix->rss_tag_as_xor);
+ nix_dump(file, " rss_tag_as_xor = %d", roc_nix->max_sqb_count);
+ nix_dump(file, " outb_nb_desc = %u", roc_nix->outb_nb_desc);
- nix_dump(" \tpci_dev = %p", nix->pci_dev);
- nix_dump(" \tbase = 0x%" PRIxPTR "", nix->base);
- nix_dump(" \tlmt_base = 0x%" PRIxPTR "", nix->lmt_base);
- nix_dump(" \treta_size = %d", nix->reta_sz);
- nix_dump(" \ttx_chan_base = %d", nix->tx_chan_base);
- nix_dump(" \trx_chan_base = %d", nix->rx_chan_base);
- nix_dump(" \tnb_rx_queues = %d", nix->nb_rx_queues);
- nix_dump(" \tnb_tx_queues = %d", nix->nb_tx_queues);
- nix_dump(" \tlso_tsov6_idx = %d", nix->lso_tsov6_idx);
- nix_dump(" \tlso_tsov4_idx = %d", nix->lso_tsov4_idx);
- nix_dump(" \tlso_udp_tun_v4v4 = %d",
+ nix_dump(file, " \tpci_dev = %p", nix->pci_dev);
+ nix_dump(file, " \tbase = 0x%" PRIxPTR "", nix->base);
+ nix_dump(file, " \tlmt_base = 0x%" PRIxPTR "", nix->lmt_base);
+ nix_dump(file, " \treta_size = %d", nix->reta_sz);
+ nix_dump(file, " \ttx_chan_base = %d", nix->tx_chan_base);
+ nix_dump(file, " \trx_chan_base = %d", nix->rx_chan_base);
+ nix_dump(file, " \tnb_rx_queues = %d", nix->nb_rx_queues);
+ nix_dump(file, " \tnb_tx_queues = %d", nix->nb_tx_queues);
+ nix_dump(file, " \tlso_tsov6_idx = %d", nix->lso_tsov6_idx);
+ nix_dump(file, " \tlso_tsov4_idx = %d", nix->lso_tsov4_idx);
+ nix_dump(file, " \tlso_udp_tun_v4v4 = %d",
nix->lso_udp_tun_idx[ROC_NIX_LSO_TUN_V4V4]);
- nix_dump(" \tlso_udp_tun_v4v6 = %d",
+ nix_dump(file, " \tlso_udp_tun_v4v6 = %d",
nix->lso_udp_tun_idx[ROC_NIX_LSO_TUN_V4V6]);
- nix_dump(" \tlso_udp_tun_v6v4 = %d",
+ nix_dump(file, " \tlso_udp_tun_v6v4 = %d",
nix->lso_udp_tun_idx[ROC_NIX_LSO_TUN_V6V4]);
- nix_dump(" \tlso_udp_tun_v6v6 = %d",
+ nix_dump(file, " \tlso_udp_tun_v6v6 = %d",
nix->lso_udp_tun_idx[ROC_NIX_LSO_TUN_V6V6]);
- nix_dump(" \tlso_tun_v4v4 = %d",
+ nix_dump(file, " \tlso_tun_v4v4 = %d",
nix->lso_tun_idx[ROC_NIX_LSO_TUN_V4V4]);
- nix_dump(" \tlso_tun_v4v6 = %d",
+ nix_dump(file, " \tlso_tun_v4v6 = %d",
nix->lso_tun_idx[ROC_NIX_LSO_TUN_V4V6]);
- nix_dump(" \tlso_tun_v6v4 = %d",
+ nix_dump(file, " \tlso_tun_v6v4 = %d",
nix->lso_tun_idx[ROC_NIX_LSO_TUN_V6V4]);
- nix_dump(" \tlso_tun_v6v6 = %d",
+ nix_dump(file, " \tlso_tun_v6v6 = %d",
nix->lso_tun_idx[ROC_NIX_LSO_TUN_V6V6]);
- nix_dump(" \tlf_rx_stats = %d", nix->lf_rx_stats);
- nix_dump(" \tlf_tx_stats = %d", nix->lf_tx_stats);
- nix_dump(" \trx_chan_cnt = %d", nix->rx_chan_cnt);
- nix_dump(" \ttx_chan_cnt = %d", nix->tx_chan_cnt);
- nix_dump(" \tcgx_links = %d", nix->cgx_links);
- nix_dump(" \tlbk_links = %d", nix->lbk_links);
- nix_dump(" \tsdp_links = %d", nix->sdp_links);
- nix_dump(" \ttx_link = %d", nix->tx_link);
- nix_dump(" \tsqb_size = %d", nix->sqb_size);
- nix_dump(" \tmsixoff = %d", nix->msixoff);
+ nix_dump(file, " \tlf_rx_stats = %d", nix->lf_rx_stats);
+ nix_dump(file, " \tlf_tx_stats = %d", nix->lf_tx_stats);
+ nix_dump(file, " \trx_chan_cnt = %d", nix->rx_chan_cnt);
+ nix_dump(file, " \ttx_chan_cnt = %d", nix->tx_chan_cnt);
+ nix_dump(file, " \tcgx_links = %d", nix->cgx_links);
+ nix_dump(file, " \tlbk_links = %d", nix->lbk_links);
+ nix_dump(file, " \tsdp_links = %d", nix->sdp_links);
+ nix_dump(file, " \ttx_link = %d", nix->tx_link);
+ nix_dump(file, " \tsqb_size = %d", nix->sqb_size);
+ nix_dump(file, " \tmsixoff = %d", nix->msixoff);
for (i = 0; i < nix->nb_cpt_lf; i++)
- nix_dump(" \tcpt_msixoff[%d] = %d", i, nix->cpt_msixoff[i]);
- nix_dump(" \tcints = %d", nix->cints);
- nix_dump(" \tqints = %d", nix->qints);
- nix_dump(" \tsdp_link = %d", nix->sdp_link);
- nix_dump(" \tptp_en = %d", nix->ptp_en);
- nix_dump(" \trss_alg_idx = %d", nix->rss_alg_idx);
- nix_dump(" \ttx_pause = %d", nix->tx_pause);
- nix_dump(" \tinl_inb_ena = %d", nix->inl_inb_ena);
- nix_dump(" \tinl_outb_ena = %d", nix->inl_outb_ena);
- nix_dump(" \tinb_sa_base = 0x%p", nix->inb_sa_base);
- nix_dump(" \tinb_sa_sz = %" PRIu64, nix->inb_sa_sz);
- nix_dump(" \toutb_sa_base = 0x%p", nix->outb_sa_base);
- nix_dump(" \toutb_sa_sz = %" PRIu64, nix->outb_sa_sz);
- nix_dump(" \toutb_err_sso_pffunc = 0x%x", nix->outb_err_sso_pffunc);
- nix_dump(" \tcpt_lf_base = 0x%p", nix->cpt_lf_base);
- nix_dump(" \tnb_cpt_lf = %d", nix->nb_cpt_lf);
- nix_dump(" \tinb_inl_dev = %d", nix->inb_inl_dev);
+ nix_dump(file, " \tcpt_msixoff[%d] = %d", i, nix->cpt_msixoff[i]);
+ nix_dump(file, " \tcints = %d", nix->cints);
+ nix_dump(file, " \tqints = %d", nix->qints);
+ nix_dump(file, " \tsdp_link = %d", nix->sdp_link);
+ nix_dump(file, " \tptp_en = %d", nix->ptp_en);
+ nix_dump(file, " \trss_alg_idx = %d", nix->rss_alg_idx);
+ nix_dump(file, " \ttx_pause = %d", nix->tx_pause);
+ nix_dump(file, " \tinl_inb_ena = %d", nix->inl_inb_ena);
+ nix_dump(file, " \tinl_outb_ena = %d", nix->inl_outb_ena);
+ nix_dump(file, " \tinb_sa_base = 0x%p", nix->inb_sa_base);
+ nix_dump(file, " \tinb_sa_sz = %" PRIu64, nix->inb_sa_sz);
+ nix_dump(file, " \toutb_sa_base = 0x%p", nix->outb_sa_base);
+ nix_dump(file, " \toutb_sa_sz = %" PRIu64, nix->outb_sa_sz);
+ nix_dump(file, " \toutb_err_sso_pffunc = 0x%x", nix->outb_err_sso_pffunc);
+ nix_dump(file, " \tcpt_lf_base = 0x%p", nix->cpt_lf_base);
+ nix_dump(file, " \tnb_cpt_lf = %d", nix->nb_cpt_lf);
+ nix_dump(file, " \tinb_inl_dev = %d", nix->inb_inl_dev);
+
}
void
-roc_nix_inl_dev_dump(struct roc_nix_inl_dev *roc_inl_dev)
+roc_nix_inl_dev_dump(struct roc_nix_inl_dev *roc_inl_dev, FILE *file)
{
- struct nix_inl_dev *inl_dev =
- (struct nix_inl_dev *)&roc_inl_dev->reserved;
- struct dev *dev = &inl_dev->dev;
+ struct idev_cfg *idev = idev_get_cfg();
+ struct nix_inl_dev *inl_dev = NULL;
+ struct dev *dev = NULL;
int i;
- nix_dump("nix_inl_dev@%p", inl_dev);
- nix_dump(" pf = %d", dev_get_pf(dev->pf_func));
- nix_dump(" vf = %d", dev_get_vf(dev->pf_func));
- nix_dump(" bar2 = 0x%" PRIx64, dev->bar2);
- nix_dump(" bar4 = 0x%" PRIx64, dev->bar4);
+ if (roc_inl_dev) {
+ inl_dev = (struct nix_inl_dev *)&roc_inl_dev->reserved;
+ } else {
+ if (idev && idev->nix_inl_dev)
+ inl_dev = idev->nix_inl_dev;
+ else
+ return;
+ }
- nix_dump(" \tpci_dev = %p", inl_dev->pci_dev);
- nix_dump(" \tnix_base = 0x%" PRIxPTR "", inl_dev->nix_base);
- nix_dump(" \tsso_base = 0x%" PRIxPTR "", inl_dev->sso_base);
- nix_dump(" \tssow_base = 0x%" PRIxPTR "", inl_dev->ssow_base);
- nix_dump(" \tnix_msixoff = %d", inl_dev->nix_msixoff);
- nix_dump(" \tsso_msixoff = %d", inl_dev->sso_msixoff);
- nix_dump(" \tssow_msixoff = %d", inl_dev->ssow_msixoff);
- nix_dump(" \tnix_cints = %d", inl_dev->cints);
- nix_dump(" \tnix_qints = %d", inl_dev->qints);
- nix_dump(" \tinb_sa_base = 0x%p", inl_dev->inb_sa_base);
- nix_dump(" \tinb_sa_sz = %d", inl_dev->inb_sa_sz);
- nix_dump(" \txaq_buf_size = %u", inl_dev->xaq_buf_size);
- nix_dump(" \txae_waes = %u", inl_dev->xae_waes);
- nix_dump(" \tiue = %u", inl_dev->iue);
- nix_dump(" \txaq_aura = 0x%" PRIx64, inl_dev->xaq.aura_handle);
- nix_dump(" \txaq_mem = 0x%p", inl_dev->xaq.mem);
+ dev = &inl_dev->dev;
+ nix_dump(file, "nix_inl_dev@%p", inl_dev);
+ nix_dump(file, " pf = %d", dev_get_pf(dev->pf_func));
+ nix_dump(file, " vf = %d", dev_get_vf(dev->pf_func));
+ nix_dump(file, " bar2 = 0x%" PRIx64, dev->bar2);
+ nix_dump(file, " bar4 = 0x%" PRIx64, dev->bar4);
- nix_dump(" \tinl_dev_rq:");
+ nix_dump(file, " \tpci_dev = %p", inl_dev->pci_dev);
+ nix_dump(file, " \tnix_base = 0x%" PRIxPTR "", inl_dev->nix_base);
+ nix_dump(file, " \tsso_base = 0x%" PRIxPTR "", inl_dev->sso_base);
+ nix_dump(file, " \tssow_base = 0x%" PRIxPTR "", inl_dev->ssow_base);
+ nix_dump(file, " \tnix_msixoff = %d", inl_dev->nix_msixoff);
+ nix_dump(file, " \tsso_msixoff = %d", inl_dev->sso_msixoff);
+ nix_dump(file, " \tssow_msixoff = %d", inl_dev->ssow_msixoff);
+ nix_dump(file, " \tnix_cints = %d", inl_dev->cints);
+ nix_dump(file, " \tnix_qints = %d", inl_dev->qints);
+ nix_dump(file, " \tinb_sa_base = 0x%p", inl_dev->inb_sa_base);
+ nix_dump(file, " \tinb_sa_sz = %d", inl_dev->inb_sa_sz);
+ nix_dump(file, " \txaq_buf_size = %u", inl_dev->xaq_buf_size);
+ nix_dump(file, " \txae_waes = %u", inl_dev->xae_waes);
+ nix_dump(file, " \tiue = %u", inl_dev->iue);
+ nix_dump(file, " \txaq_aura = 0x%" PRIx64, inl_dev->xaq.aura_handle);
+ nix_dump(file, " \txaq_mem = 0x%p", inl_dev->xaq.mem);
+
+ nix_dump(file, " \tinl_dev_rq:");
for (i = 0; i < inl_dev->nb_rqs; i++)
- roc_nix_rq_dump(&inl_dev->rqs[i]);
+ roc_nix_rq_dump(&inl_dev->rqs[i], file);
}
void
-roc_nix_inl_outb_cpt_lfs_dump(struct roc_nix *roc_nix)
+roc_nix_inl_outb_cpt_lfs_dump(struct roc_nix *roc_nix, FILE *file)
{
struct nix *nix = roc_nix_to_nix_priv(roc_nix);
struct roc_cpt_lf *lf_base = nix->cpt_lf_base;
int i;
- nix_dump("nix@%p", nix);
+ nix_dump(file, "nix@%p", nix);
for (i = 0; i < nix->nb_cpt_lf; i++) {
- nix_dump("NIX inline dev outbound CPT LFs:");
+ nix_dump(file, "NIX inline dev outbound CPT LFs:");
cpt_lf_print(&lf_base[i]);
}
}
diff --git a/drivers/common/cnxk/roc_nix_inl.h b/drivers/common/cnxk/roc_nix_inl.h
index 555cb28c1a..019cf6d28b 100644
--- a/drivers/common/cnxk/roc_nix_inl.h
+++ b/drivers/common/cnxk/roc_nix_inl.h
@@ -195,7 +195,7 @@ struct roc_nix_inl_dev {
/* NIX Inline Device API */
int __roc_api roc_nix_inl_dev_init(struct roc_nix_inl_dev *roc_inl_dev);
int __roc_api roc_nix_inl_dev_fini(struct roc_nix_inl_dev *roc_inl_dev);
-void __roc_api roc_nix_inl_dev_dump(struct roc_nix_inl_dev *roc_inl_dev);
+void __roc_api roc_nix_inl_dev_dump(struct roc_nix_inl_dev *roc_inl_dev, FILE *file);
bool __roc_api roc_nix_inl_dev_is_probed(void);
void __roc_api roc_nix_inl_dev_lock(void);
void __roc_api roc_nix_inl_dev_unlock(void);
@@ -257,6 +257,6 @@ int __roc_api roc_nix_inl_sa_sync(struct roc_nix *roc_nix, void *sa, bool inb,
enum roc_nix_inl_sa_sync_op op);
int __roc_api roc_nix_inl_ctx_write(struct roc_nix *roc_nix, void *sa_dptr,
void *sa_cptr, bool inb, uint16_t sa_len);
-void __roc_api roc_nix_inl_outb_cpt_lfs_dump(struct roc_nix *roc_nix);
+void __roc_api roc_nix_inl_outb_cpt_lfs_dump(struct roc_nix *roc_nix, FILE *file);
#endif /* _ROC_NIX_INL_H_ */
diff --git a/drivers/common/cnxk/roc_nix_inl_dev_irq.c b/drivers/common/cnxk/roc_nix_inl_dev_irq.c
index 5c19bc33fc..445b440447 100644
--- a/drivers/common/cnxk/roc_nix_inl_dev_irq.c
+++ b/drivers/common/cnxk/roc_nix_inl_dev_irq.c
@@ -230,7 +230,7 @@ nix_inl_nix_q_irq(void *param)
plt_err("Failed to get rq %d context, rc=%d", q, rc);
continue;
}
- nix_lf_rq_dump(ctx);
+ nix_lf_rq_dump(ctx, NULL);
}
}
@@ -262,7 +262,7 @@ nix_inl_nix_ras_irq(void *param)
plt_err("Failed to get rq %d context, rc=%d", q, rc);
continue;
}
- nix_lf_rq_dump(ctx);
+ nix_lf_rq_dump(ctx, NULL);
}
}
@@ -295,7 +295,7 @@ nix_inl_nix_err_irq(void *param)
plt_err("Failed to get rq %d context, rc=%d", q, rc);
continue;
}
- nix_lf_rq_dump(ctx);
+ nix_lf_rq_dump(ctx, NULL);
}
}
diff --git a/drivers/common/cnxk/roc_nix_irq.c b/drivers/common/cnxk/roc_nix_irq.c
index 71971ef261..d72980fb18 100644
--- a/drivers/common/cnxk/roc_nix_irq.c
+++ b/drivers/common/cnxk/roc_nix_irq.c
@@ -76,7 +76,7 @@ nix_lf_err_irq(void *param)
plt_write64(intr, nix->base + NIX_LF_ERR_INT);
/* Dump registers to std out */
roc_nix_lf_reg_dump(nix_priv_to_roc_nix(nix), NULL);
- roc_nix_queues_ctx_dump(nix_priv_to_roc_nix(nix));
+ roc_nix_queues_ctx_dump(nix_priv_to_roc_nix(nix), NULL);
}
static int
@@ -125,7 +125,7 @@ nix_lf_ras_irq(void *param)
/* Dump registers to std out */
roc_nix_lf_reg_dump(nix_priv_to_roc_nix(nix), NULL);
- roc_nix_queues_ctx_dump(nix_priv_to_roc_nix(nix));
+ roc_nix_queues_ctx_dump(nix_priv_to_roc_nix(nix), NULL);
}
static int
@@ -320,7 +320,7 @@ nix_lf_q_irq(void *param)
/* Dump registers to std out */
roc_nix_lf_reg_dump(nix_priv_to_roc_nix(nix), NULL);
- roc_nix_queues_ctx_dump(nix_priv_to_roc_nix(nix));
+ roc_nix_queues_ctx_dump(nix_priv_to_roc_nix(nix), NULL);
}
int
diff --git a/drivers/common/cnxk/roc_nix_priv.h b/drivers/common/cnxk/roc_nix_priv.h
index a253f412de..2eba44c248 100644
--- a/drivers/common/cnxk/roc_nix_priv.h
+++ b/drivers/common/cnxk/roc_nix_priv.h
@@ -455,7 +455,7 @@ struct nix_tm_shaper_profile *nix_tm_shaper_profile_alloc(void);
void nix_tm_shaper_profile_free(struct nix_tm_shaper_profile *profile);
uint64_t nix_get_blkaddr(struct dev *dev);
-void nix_lf_rq_dump(__io struct nix_cn10k_rq_ctx_s *ctx);
+void nix_lf_rq_dump(__io struct nix_cn10k_rq_ctx_s *ctx, FILE *file);
int nix_lf_gen_reg_dump(uintptr_t nix_lf_base, uint64_t *data);
int nix_lf_stat_reg_dump(uintptr_t nix_lf_base, uint64_t *data,
uint8_t lf_tx_stats, uint8_t lf_rx_stats);
diff --git a/drivers/common/cnxk/roc_nix_tm.c b/drivers/common/cnxk/roc_nix_tm.c
index 81d491a3fd..81fa6b1d93 100644
--- a/drivers/common/cnxk/roc_nix_tm.c
+++ b/drivers/common/cnxk/roc_nix_tm.c
@@ -606,8 +606,8 @@ roc_nix_tm_sq_flush_spin(struct roc_nix_sq *sq)
return 0;
exit:
- roc_nix_tm_dump(sq->roc_nix);
- roc_nix_queues_ctx_dump(sq->roc_nix);
+ roc_nix_tm_dump(sq->roc_nix, NULL);
+ roc_nix_queues_ctx_dump(sq->roc_nix, NULL);
return -EFAULT;
}
--
2.25.1
next prev parent reply other threads:[~2022-09-05 13:35 UTC|newest]
Thread overview: 89+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-09 18:48 [PATCH 01/23] common/cnxk: fix part value for cn10k Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 02/23] common/cnxk: add cn10ka A1 platform Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 03/23] common/cnxk: update inbound inline IPsec config mailbox Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 04/23] net/cnxk: fix missing fc wait for outbound path in vec mode Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 05/23] common/cnxk: limit meta aura workaround to CN10K A0 Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 06/23] common/cnxk: delay inline device RQ enable to dev start Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 07/23] common/cnxk: reserve aura zero on cn10ka NPA Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 08/23] common/cnxk: add support to set NPA buf type Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 09/23] common/cnxk: update attributes to pools used by NIX Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 10/23] common/cnxk: support zero aura for inline inbound meta Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 11/23] net/cnxk: support for zero aura for inline meta Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 12/23] common/cnxk: avoid the use of platform specific APIs Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 13/23] net/cnxk: use full context IPsec structures in fp Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 14/23] net/cnxk: add crypto capabilities for HMAC-SHA2 Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 15/23] common/cnxk: enable aging on CN10K platform Nithin Dabilpuram
2022-08-09 18:49 ` [PATCH 16/23] common/cnxk: updated shaper profile with red algorithm Nithin Dabilpuram
2022-08-09 18:49 ` [PATCH 17/23] common/cnxk: add 98xx A1 platform Nithin Dabilpuram
2022-08-09 18:49 ` [PATCH 18/23] net/cnxk: enable additional ciphers for inline Nithin Dabilpuram
2022-08-09 18:49 ` [PATCH 19/23] net/cnxk: enable 3des-cbc cipher capability Nithin Dabilpuram
2022-08-09 18:49 ` [PATCH 20/23] net/cnxk: skip PFC configuration on LBK Nithin Dabilpuram
2022-08-09 18:49 ` [PATCH 21/23] common/cnxk: add support for CPT second pass Nithin Dabilpuram
2022-08-09 18:49 ` [PATCH 22/23] common/cnxk: add CQ limit associated with SQ Nithin Dabilpuram
2022-08-09 18:49 ` [PATCH 23/23] common/cnxk: support Tx compl event via RQ to CQ mapping Nithin Dabilpuram
2022-08-30 4:51 ` [PATCH 01/23] common/cnxk: fix part value for cn10k Jerin Jacob
2022-08-30 5:16 ` [EXT] " Nithin Kumar Dabilpuram
2022-09-05 13:31 ` [PATCH v2 01/31] cnxk/net: add fc check in vector event Tx path Nithin Dabilpuram
2022-09-05 13:31 ` [PATCH v2 02/31] common/cnxk: fix part value for cn10k Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 03/31] common/cnxk: add cn10ka A1 platform Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 04/31] common/cnxk: update inbound inline IPsec config mailbox Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 05/31] net/cnxk: fix missing fc wait for outbound path in vec mode Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 06/31] common/cnxk: limit meta aura workaround to CN10K A0 Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 07/31] common/cnxk: delay inline device RQ enable to dev start Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 08/31] common/cnxk: reserve aura zero on cn10ka NPA Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 09/31] common/cnxk: add support to set NPA buf type Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 10/31] common/cnxk: update attributes to pools used by NIX Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 11/31] common/cnxk: support zero aura for inline inbound meta Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 12/31] net/cnxk: support for zero aura for inline meta Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 13/31] common/cnxk: avoid the use of platform specific APIs Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 14/31] net/cnxk: use full context IPsec structures in fp Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 15/31] net/cnxk: add crypto capabilities for HMAC-SHA2 Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 16/31] common/cnxk: enable aging on CN10K platform Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 17/31] common/cnxk: updated shaper profile with red algorithm Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 18/31] common/cnxk: add 98xx A1 platform Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 19/31] net/cnxk: enable additional ciphers for inline Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 20/31] net/cnxk: enable 3des-cbc cipher capability Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 21/31] net/cnxk: skip PFC configuration on LBK Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 22/31] common/cnxk: add support for CPT second pass Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 23/31] common/cnxk: add CQ limit associated with SQ Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 24/31] common/cnxk: support Tx compl event via RQ to CQ mapping Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 25/31] event/cnxk: wait for CPT fc on wqe path Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 26/31] net/cnxk: limit port specific SA table size Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 27/31] net/cnxk: add support for crypto cipher DES-CBC Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 28/31] net/cnxk: Add support for crypto auth alg MD5 Nithin Dabilpuram
2022-09-05 13:32 ` [PATCH v2 29/31] net/cnxk: enable esn and antireplay support Nithin Dabilpuram
2022-09-05 13:32 ` Nithin Dabilpuram [this message]
2022-09-05 13:32 ` [PATCH v2 31/31] net/cnxk: dumps device private information Nithin Dabilpuram
2022-09-12 13:13 ` [PATCH v3 01/32] net/cnxk: add eth port specific PTP enable Nithin Dabilpuram
2022-09-12 13:13 ` [PATCH v3 02/32] cnxk/net: add fc check in vector event Tx path Nithin Dabilpuram
2022-09-12 13:13 ` [PATCH v3 03/32] common/cnxk: fix part value for cn10k Nithin Dabilpuram
2022-09-12 13:13 ` [PATCH v3 04/32] common/cnxk: add cn10ka A1 platform Nithin Dabilpuram
2022-09-12 13:13 ` [PATCH v3 05/32] common/cnxk: update inbound inline IPsec config mailbox Nithin Dabilpuram
2022-09-12 13:13 ` [PATCH v3 06/32] net/cnxk: fix missing fc wait for outbound path in vec mode Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 07/32] common/cnxk: limit meta aura workaround to CN10K A0 Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 08/32] common/cnxk: delay inline device RQ enable to dev start Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 09/32] common/cnxk: reserve aura zero on cn10ka NPA Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 10/32] common/cnxk: add support to set NPA buf type Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 11/32] common/cnxk: update attributes to pools used by NIX Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 12/32] common/cnxk: support zero aura for inline inbound meta Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 13/32] net/cnxk: support for zero aura for inline meta Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 14/32] common/cnxk: avoid the use of platform specific APIs Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 15/32] net/cnxk: use full context IPsec structures in fp Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 16/32] net/cnxk: add crypto capabilities for HMAC-SHA2 Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 17/32] common/cnxk: enable aging on CN10K platform Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 18/32] common/cnxk: updated shaper profile with red algorithm Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 19/32] common/cnxk: add 98xx A1 platform Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 20/32] net/cnxk: enable additional ciphers for inline Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 21/32] net/cnxk: enable 3des-cbc cipher capability Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 22/32] net/cnxk: skip PFC configuration on LBK Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 23/32] common/cnxk: add support for CPT second pass Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 24/32] common/cnxk: add CQ limit associated with SQ Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 25/32] common/cnxk: support Tx compl event via RQ to CQ mapping Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 26/32] event/cnxk: wait for CPT fc on wqe path Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 27/32] net/cnxk: limit port specific SA table size Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 28/32] net/cnxk: add support for crypto cipher DES-CBC Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 29/32] net/cnxk: add support for crypto auth alg MD5 Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 30/32] net/cnxk: enable esn and antireplay support Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 31/32] common/cnxk: dump device basic info to file Nithin Dabilpuram
2022-09-12 13:14 ` [PATCH v3 32/32] net/cnxk: dumps device private information Nithin Dabilpuram
2022-09-16 11:36 ` Jerin Jacob
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