From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A81A7A00C3; Tue, 20 Sep 2022 11:14:03 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 46CDB40DFB; Tue, 20 Sep 2022 11:14:03 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mails.dpdk.org (Postfix) with ESMTP id 8220D4069B for ; Tue, 20 Sep 2022 11:14:01 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1663665241; x=1695201241; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7iFpcUqQyHdajeixNirEEkTrDEpywPcv7TG5spfy7oI=; b=GnrVLMiYSNbgs+GFMvPvd3weyhq1JGS3j7ojGPYSkMm56EPtrtLdFqxW WDYsBUtoWwwsybF7AR5rVT39i516AiZrgDsIvWdyANmrQ7k1qTZT9ArIF Xzaf6voPhuTE4fnuweXijJbB6PlK33g1ynjxU3rdHmUn49bKhroS24Za1 YIIT2Gdpynr2xECN3S3U+E1rEf+qe0akqJRZ/oll2hdwhCtP5ru+Fs/X8 SP0YCUc88peMe9seIUM0+yJuywmhtXNICKPryzar+7GBoXquh6wL1VjHt BtTzw9kq2WoyMnAEF8UFumqdYhIIXiznNa4TVh7El1nwO3uu5JLDfWBhy g==; X-IronPort-AV: E=McAfee;i="6500,9779,10475"; a="363602949" X-IronPort-AV: E=Sophos;i="5.93,330,1654585200"; d="scan'208";a="363602949" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Sep 2022 02:14:00 -0700 X-IronPort-AV: E=Sophos;i="5.93,330,1654585200"; d="scan'208";a="722661332" Received: from unknown (HELO localhost.localdomain) ([10.239.252.103]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Sep 2022 02:13:57 -0700 From: Zhichao Zeng To: dev@dpdk.org Cc: qiming.yang@intel.com, yidingx.zhou@intel.com, qi.z.zhang@intel.com, Zhichao Zeng , Peng Zhang , Jingjing Wu , Beilei Xing Subject: [PATCH v3] net/iavf: enable inner and outer Tx checksum offload Date: Tue, 20 Sep 2022 17:14:52 +0800 Message-Id: <20220920091452.188014-1-zhichaox.zeng@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220901093307.284903-1-peng1x.zhang@intel.com> References: <20220901093307.284903-1-peng1x.zhang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch is to enable scalar path inner and outer Tx checksum offload for tunnel packet by configure ol_flags. Signed-off-by: Peng Zhang Signed-off-by: Zhichao Zeng --- v2: add outer udp cksum flag and remove unrelated code --- v3: specify the patch scope and update document --- doc/guides/nics/features/iavf.ini | 2 ++ drivers/net/iavf/iavf_ethdev.c | 1 + drivers/net/iavf/iavf_rxtx.c | 48 +++++++++++++++++++++++++++++-- drivers/net/iavf/iavf_rxtx.h | 9 +++++- 4 files changed, 57 insertions(+), 3 deletions(-) diff --git a/doc/guides/nics/features/iavf.ini b/doc/guides/nics/features/iavf.ini index dfaa82b83d..eeda6b7210 100644 --- a/doc/guides/nics/features/iavf.ini +++ b/doc/guides/nics/features/iavf.ini @@ -25,6 +25,8 @@ VLAN offload = Y L3 checksum offload = P L4 checksum offload = P Timestamp offload = P +Inner L3 checksum = P +Inner L4 checksum = P Packet type parsing = Y Rx descriptor status = Y Tx descriptor status = Y diff --git a/drivers/net/iavf/iavf_ethdev.c b/drivers/net/iavf/iavf_ethdev.c index 506fcff6e3..fa040766e5 100644 --- a/drivers/net/iavf/iavf_ethdev.c +++ b/drivers/net/iavf/iavf_ethdev.c @@ -1134,6 +1134,7 @@ iavf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) RTE_ETH_TX_OFFLOAD_TCP_CKSUM | RTE_ETH_TX_OFFLOAD_SCTP_CKSUM | RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM | + RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM | RTE_ETH_TX_OFFLOAD_TCP_TSO | RTE_ETH_TX_OFFLOAD_VXLAN_TNL_TSO | RTE_ETH_TX_OFFLOAD_GRE_TNL_TSO | diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c index 3deabe1d7e..b784c5cc18 100644 --- a/drivers/net/iavf/iavf_rxtx.c +++ b/drivers/net/iavf/iavf_rxtx.c @@ -2334,7 +2334,8 @@ static inline uint16_t iavf_calc_context_desc(uint64_t flags, uint8_t vlan_flag) { if (flags & (RTE_MBUF_F_TX_TCP_SEG | RTE_MBUF_F_TX_UDP_SEG | - RTE_MBUF_F_TX_TUNNEL_MASK)) + RTE_MBUF_F_TX_TUNNEL_MASK | RTE_MBUF_F_TX_OUTER_IP_CKSUM | + RTE_MBUF_F_TX_OUTER_UDP_CKSUM)) return 1; if (flags & RTE_MBUF_F_TX_VLAN && vlan_flag & IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG2) @@ -2399,6 +2400,44 @@ iavf_fill_ctx_desc_tunnelling_field(volatile uint64_t *qw0, break; } + /* L4TUNT: L4 Tunneling Type */ + switch (m->ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) { + case RTE_MBUF_F_TX_TUNNEL_IPIP: + /* for non UDP / GRE tunneling, set to 00b */ + break; + case RTE_MBUF_F_TX_TUNNEL_VXLAN: + case RTE_MBUF_F_TX_TUNNEL_GTP: + case RTE_MBUF_F_TX_TUNNEL_GENEVE: + eip_typ |= IAVF_TXD_CTX_UDP_TUNNELING; + break; + case RTE_MBUF_F_TX_TUNNEL_GRE: + eip_typ |= IAVF_TXD_CTX_GRE_TUNNELING; + break; + default: + PMD_TX_LOG(ERR, "Tunnel type not supported"); + return; + } + + /* L4TUNLEN: L4 Tunneling Length, in Words + * + * We depend on app to set rte_mbuf.l2_len correctly. + * For IP in GRE it should be set to the length of the GRE + * header; + * For MAC in GRE or MAC in UDP it should be set to the length + * of the GRE or UDP headers plus the inner MAC up to including + * its last Ethertype. + * If MPLS labels exists, it should include them as well. + */ + eip_typ |= (m->l2_len >> 1) << IAVF_TXD_CTX_QW0_NATLEN_SHIFT; + + /** + * Calculate the tunneling UDP checksum. + * Shall be set only if L4TUNT = 01b and EIPT is not zero + */ + if (!(eip_typ & IAVF_TX_CTX_EXT_IP_NONE) && + (eip_typ & IAVF_TXD_CTX_UDP_TUNNELING)) + eip_typ |= IAVF_TXD_CTX_QW0_L4T_CS_MASK; + *qw0 = eip_typ << IAVF_TXD_CTX_QW0_TUN_PARAMS_EIPT_SHIFT | eip_len << IAVF_TXD_CTX_QW0_TUN_PARAMS_EIPLEN_SHIFT | eip_noinc << IAVF_TXD_CTX_QW0_TUN_PARAMS_EIP_NOINC_SHIFT; @@ -2535,7 +2574,12 @@ iavf_build_data_desc_cmd_offset_fields(volatile uint64_t *qw1, } /* Set MACLEN */ - offset |= (m->l2_len >> 1) << IAVF_TX_DESC_LENGTH_MACLEN_SHIFT; + if (m->ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) + offset |= (m->outer_l2_len >> 1) + << IAVF_TX_DESC_LENGTH_MACLEN_SHIFT; + else + offset |= (m->l2_len >> 1) + << IAVF_TX_DESC_LENGTH_MACLEN_SHIFT; /* Enable L3 checksum offloading inner */ if (m->ol_flags & RTE_MBUF_F_TX_IP_CKSUM) { diff --git a/drivers/net/iavf/iavf_rxtx.h b/drivers/net/iavf/iavf_rxtx.h index 1695e43cd5..66e832713c 100644 --- a/drivers/net/iavf/iavf_rxtx.h +++ b/drivers/net/iavf/iavf_rxtx.h @@ -26,6 +26,8 @@ #define IAVF_TX_NO_VECTOR_FLAGS ( \ RTE_ETH_TX_OFFLOAD_MULTI_SEGS | \ RTE_ETH_TX_OFFLOAD_TCP_TSO | \ + RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM | \ + RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM | \ RTE_ETH_TX_OFFLOAD_SECURITY) #define IAVF_TX_VECTOR_OFFLOAD ( \ @@ -56,7 +58,9 @@ #define IAVF_TX_CKSUM_OFFLOAD_MASK ( \ RTE_MBUF_F_TX_IP_CKSUM | \ RTE_MBUF_F_TX_L4_MASK | \ - RTE_MBUF_F_TX_TCP_SEG) + RTE_MBUF_F_TX_TCP_SEG | \ + RTE_MBUF_F_TX_OUTER_IP_CKSUM | \ + RTE_MBUF_F_TX_OUTER_UDP_CKSUM) #define IAVF_TX_OFFLOAD_MASK ( \ RTE_MBUF_F_TX_OUTER_IPV6 | \ @@ -67,6 +71,9 @@ RTE_MBUF_F_TX_IP_CKSUM | \ RTE_MBUF_F_TX_L4_MASK | \ RTE_MBUF_F_TX_TCP_SEG | \ + RTE_MBUF_F_TX_TUNNEL_MASK | \ + RTE_MBUF_F_TX_OUTER_IP_CKSUM | \ + RTE_MBUF_F_TX_OUTER_UDP_CKSUM | \ RTE_ETH_TX_OFFLOAD_SECURITY) #define IAVF_TX_OFFLOAD_NOTSUP_MASK \ -- 2.25.1