From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 23778A0543; Thu, 22 Sep 2022 21:05:28 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C841342B76; Thu, 22 Sep 2022 21:05:06 +0200 (CEST) Received: from NAM11-BN8-obe.outbound.protection.outlook.com (mail-bn8nam11on2041.outbound.protection.outlook.com [40.107.236.41]) by mails.dpdk.org (Postfix) with ESMTP id C36BB4281E for ; Thu, 22 Sep 2022 21:05:05 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=ehCAyA01UDlPTXyFax0HS4JcfrlXC3zUusCoEy97vp770fPaQ/kgxqDuWuZzHzvelqyoRMaPXIHZSXKXJ7wB+eJ8DxqGOxf/geMXUg3466Jrn4jxVHgIGNqKr+6EZrCnV2uncIMlgTIfJGl4VFV2y+0enwCWzgN8jS4VKAFod/4ynuakHY1eML+o6JcMykxFLT4PUNZHsaEdOwH/731sZW86UNZ9iPGth1G+jc/ta4RROd2n/pjJYJ+YonM9Qb1/TkcZ/7SEhgzjzFlgxOXXai6NjK089ZH/BJuwgidmOZVUM2E82clcLdXHLHAxwi/rncg0SGJzl1bLM7Q7yP+moA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=84GuJSTJp10fnV+25jpt4XCzBT8169EutQS8lDNC6o8=; b=erhDUTbaiLzd/uyfVrEi/xvgCgrqL3Kp7kQ1fxITmXe420wI9php0PFXvK2lUhNN/3zs3DYkuPMEM+CVEzZLmXOuiLJJjUHSiXTeY98DiRPLjkooiLvJk43CXDFH7e8KareGzSXvIpU80WIfSXndQDlGSqCHWEV1653Of3rMowwnA5Py/vt5Pn8+bHE6n9rXgP7nPqu79eRZoFui7iDAr/GIoqgvuobKH/V3p+AGrTN8cQqUnKDbVnUVaEAPhvXO81LZxV1V7Mv5J07y2kQVfafWFP+tImqoq0WKBFhtnSoNbet9LbK3ePd4bj40jCwe2ekHQRQaqTVPWEXPEDWMZw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=monjalon.net smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=84GuJSTJp10fnV+25jpt4XCzBT8169EutQS8lDNC6o8=; b=KfrmFU6ahioAazuKe82ulL/YoWjL+ghdRxAtkXjIEHG9ZsbUsZC0M1VZEVGpF2o91p4PnLBF1iz3tFGNVfPEr0BMG9p8WzLzM9o4eJ0K7WFqVm115Ze3bwpbNIolPRIsWC5S3RRQNhCZRp1lkoYMH/VXUNYIQivkG7hloXW99kJW86X8kU9T9cxryJTV3OpEwJmwESBdyIuNhklHQ4HlpempGMvkGH6K8KWb0pj2RffNOdreFoKfeSNO0lBqsECVBn/3Pap3eZ4rIeDsrzSYFFG9CkyCyTddzSK2LM/Wd/UBrYnGq0iEJGOFkTVCFP3UpUoxzpsZ0MXhtVsw/zY6Sg== Received: from MW4PR04CA0387.namprd04.prod.outlook.com (2603:10b6:303:81::32) by CH2PR12MB4311.namprd12.prod.outlook.com (2603:10b6:610:a8::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5654.18; Thu, 22 Sep 2022 19:05:04 +0000 Received: from CO1NAM11FT018.eop-nam11.prod.protection.outlook.com (2603:10b6:303:81:cafe::50) by MW4PR04CA0387.outlook.office365.com (2603:10b6:303:81::32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5654.19 via Frontend Transport; Thu, 22 Sep 2022 19:05:04 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by CO1NAM11FT018.mail.protection.outlook.com (10.13.175.16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5654.14 via Frontend Transport; Thu, 22 Sep 2022 19:05:02 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.26; Thu, 22 Sep 2022 12:04:45 -0700 Received: from nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Thu, 22 Sep 2022 12:04:43 -0700 From: Alex Vesker To: , , , , , Matan Azrad CC: , , Dariusz Sosnowski Subject: [v1 04/19] net/mlx5: add port to metadata conversion Date: Thu, 22 Sep 2022 22:03:29 +0300 Message-ID: <20220922190345.394-5-valex@nvidia.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: <20220922190345.394-1-valex@nvidia.com> References: <20220922190345.394-1-valex@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT018:EE_|CH2PR12MB4311:EE_ X-MS-Office365-Filtering-Correlation-Id: fb9285a1-f84f-4c84-5101-08da9ccd5ab4 X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: L131EbSkIN/IGvETWIjUOk+mWrU6lJZzPhBHcqqC8DfOLm4LtX7p3iJ3Oth5m/THLUoihhw66ndQ7wUAXL6aT78lpe02RXprjksj6ugNxxdtlnsbKSgFkRc7CAolGjXbusqM1VXl9rzKCQiZE9bYL96BsOdvca7q3k2bP+9LB8MJWulUI6cpYh5ef14rV+rsD7zurajtPJNIST9sEk+7YsNJLUv8wSjO6r6hYzk5l0Vcg9PAiCz0uEt+eQO+MPNTSeCPoHIa02NyIkyIrnS4AM0jO6HX//ZpUTv6m7UwcGPhBxcVq9tLJU9ej32JQ9HmZxNYIETpfebj3Nb9VO+WVuG6ws9/L3mFqK4goHL7//FhYY7h2qAVBssHhtzsyj5HHSHC3N5B4zemSiD3C6ggq75jWc8EXtFYDSAAoa4zt6AUFcYeJntkzLnilqXDGvb9CA8JkYCfNHwtFfvtrC7ejDCGSqzzjYdalxiCALZd81NUb9ck4GOmctBLGxIIwekAV+grwrGBRidDUnnIiSK6yZD9xFOe94jErcAJV7qSEIcZUhdqq+gkG+H3pcaz63No4koJVqf6hPIK6qolNcpRDYitcUskPCoN8BwNc6326lJuD37pnpsJjsNjgYuPN6hatGrE3l0QINaUsno2Zdxwg7jSI+KITos5pxI58+GiSdacVhKu40Nyu4nbr+TcsVPqm53wYMyCkCpSzdIh70qSThkqw9AaGnyeFf19AHzlEF1U5omE+LBmV0eW78hDeBi7dwgzmxHa/rpNDTueeHVPQz6jKnyUfaunuI+80PjfeERic+K0AXqL21/K9x8fnT+7 X-Forefront-Antispam-Report: CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230022)(4636009)(376002)(39860400002)(136003)(396003)(346002)(451199015)(40470700004)(46966006)(36840700001)(6286002)(26005)(70586007)(4326008)(70206006)(8676002)(82310400005)(86362001)(36756003)(41300700001)(47076005)(8936002)(54906003)(6636002)(316002)(2906002)(426003)(110136005)(356005)(5660300002)(478600001)(40460700003)(6666004)(107886003)(7696005)(16526019)(82740400003)(7636003)(2616005)(1076003)(186003)(40480700001)(36860700001)(336012)(83380400001)(55016003)(21314003)(309714004); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Sep 2022 19:05:02.9248 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fb9285a1-f84f-4c84-5101-08da9ccd5ab4 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT018.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4311 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Dariusz Sosnowski This patch initial version of functions used to: - convert between ethdev port_id and internal tag/mask value, - convert between IB context and internal tag/mask value. Signed-off-by: Dariusz Sosnowski --- drivers/net/mlx5/linux/mlx5_os.c | 2 ++ drivers/net/mlx5/mlx5.c | 1 + drivers/net/mlx5/mlx5_flow.c | 6 ++++ drivers/net/mlx5/mlx5_flow.h | 50 ++++++++++++++++++++++++++++++++ drivers/net/mlx5/mlx5_flow_hw.c | 29 ++++++++++++++++++ 5 files changed, 88 insertions(+) diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c index 2a539eb085..7e316d9dce 100644 --- a/drivers/net/mlx5/linux/mlx5_os.c +++ b/drivers/net/mlx5/linux/mlx5_os.c @@ -1540,6 +1540,8 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, if (!priv->hrxqs) goto error; rte_rwlock_init(&priv->ind_tbls_lock); + if (priv->vport_meta_mask) + flow_hw_set_port_info(eth_dev); if (priv->sh->config.dv_flow_en == 2) return eth_dev; /* Port representor shares the same max priority with pf port. */ diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index 5829b66b0b..abdf867ea8 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -1945,6 +1945,7 @@ mlx5_dev_close(struct rte_eth_dev *dev) #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H) flow_hw_resource_release(dev); #endif + flow_hw_clear_port_info(dev); if (priv->rxq_privs != NULL) { /* XXX race condition if mlx5_rx_burst() is still running. */ rte_delay_us_sleep(1000); diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index e4744b0a67..acf1467bf6 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -33,6 +33,12 @@ #include "mlx5_common_os.h" #include "rte_pmd_mlx5.h" +/* + * Shared array for quick translation between port_id and vport mask/values + * used for HWS rules. + */ +struct flow_hw_port_info mlx5_flow_hw_port_infos[RTE_MAX_ETHPORTS]; + struct tunnel_default_miss_ctx { uint16_t *queue; __extension__ diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 86a08074dc..2eb2b46060 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -1320,6 +1320,56 @@ struct mlx5_flow_split_info { uint64_t prefix_layers; /**< Prefix subflow layers. */ }; +struct flow_hw_port_info { + uint32_t regc_mask; + uint32_t regc_value; + uint32_t is_wire:1; +}; + +extern struct flow_hw_port_info mlx5_flow_hw_port_infos[RTE_MAX_ETHPORTS]; + +/* + * Get metadata match tag and mask for given rte_eth_dev port. + * Used in HWS rule creation. + */ +static __rte_always_inline const struct flow_hw_port_info * +flow_hw_conv_port_id(const uint16_t port_id) +{ + struct flow_hw_port_info *port_info; + + if (port_id >= RTE_MAX_ETHPORTS) + return NULL; + port_info = &mlx5_flow_hw_port_infos[port_id]; + return !!port_info->regc_mask ? port_info : NULL; +} + +/* + * Get metadata match tag and mask for the uplink port represented + * by given IB context. Used in HWS context creation. + */ +static __rte_always_inline const struct flow_hw_port_info * +flow_hw_get_wire_port(struct ibv_context *ibctx) +{ + struct ibv_device *ibdev = ibctx->device; + uint16_t port_id; + + MLX5_ETH_FOREACH_DEV(port_id, NULL) { + const struct mlx5_priv *priv = + rte_eth_devices[port_id].data->dev_private; + + if (priv && priv->master) { + struct ibv_context *port_ibctx = priv->sh->cdev->ctx; + + if (port_ibctx->device == ibdev) + return flow_hw_conv_port_id(port_id); + } + } + return NULL; +} + +void flow_hw_set_port_info(struct rte_eth_dev *dev); +void flow_hw_clear_port_info(struct rte_eth_dev *dev); + typedef int (*mlx5_flow_validate_t)(struct rte_eth_dev *dev, const struct rte_flow_attr *attr, const struct rte_flow_item items[], diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index 12498794a5..fe809a83b9 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -2208,6 +2208,35 @@ flow_hw_resource_release(struct rte_eth_dev *dev) priv->nb_queue = 0; } +/* Sets vport tag and mask, for given port, used in HWS rules. */ +void +flow_hw_set_port_info(struct rte_eth_dev *dev) +{ + struct mlx5_priv *priv = dev->data->dev_private; + uint16_t port_id = dev->data->port_id; + struct flow_hw_port_info *info; + + MLX5_ASSERT(port_id < RTE_MAX_ETHPORTS); + info = &mlx5_flow_hw_port_infos[port_id]; + info->regc_mask = priv->vport_meta_mask; + info->regc_value = priv->vport_meta_tag; + info->is_wire = priv->master; +} + +/* Clears vport tag and mask used for HWS rules. */ +void +flow_hw_clear_port_info(struct rte_eth_dev *dev) +{ + uint16_t port_id = dev->data->port_id; + struct flow_hw_port_info *info; + + MLX5_ASSERT(port_id < RTE_MAX_ETHPORTS); + info = &mlx5_flow_hw_port_infos[port_id]; + info->regc_mask = 0; + info->regc_value = 0; + info->is_wire = 0; +} + /** * Create shared action. * -- 2.18.1