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From: Min Zhou <zhoumin@loongson.cn>
To: thomas@monjalon.net, david.marchand@redhat.com,
	bruce.richardson@intel.com, anatoly.burakov@intel.com,
	qiming.yang@intel.com, Yuying.Zhang@intel.com,
	jgrajcia@cisco.com, konstantin.v.ananyev@yandex.ru,
	zhoumin@loongson.cn
Cc: dev@dpdk.org, maobibo@loongson.cn
Subject: [PATCH v7 0/7] Introduce support for LoongArch architecture
Date: Fri, 30 Sep 2022 16:02:21 +0800	[thread overview]
Message-ID: <20220930080228.864681-1-zhoumin@loongson.cn> (raw)

Dear team,

The following patch set is intended to support DPDK running on LoongArch
architecture.

LoongArch is the general processor architecture of Loongson Corporation
and is a new RISC ISA, which is a bit like MIPS or RISC-V.

The online documents of LoongArch architecture are here:
    https://loongson.github.io/LoongArch-Documentation/README-EN.html

The latest build tools for LoongArch (binary) can be downloaded from:
    https://github.com/loongson/build-tools

v7:
    - rebase the patchset on the main repository
    - add errno.h to rte_power_intrinsics.c according with
      commit 72b452c5f259

v6:
    - place some blocks for LoongArch in a pseudo alphabetical order
    - remove some macros not used
    - update release notes in the correct format
    - remove some headers for LoongArch, including msclock, pflock and
      ticketlock, which are now non-arch specific
    - rename some helpers to make them more readable 
    - remove some copied comments
    - force-set RTE_FORCE_INTRINSICS in config and remove non-arch
      specific implementations
    - fix format errors in meson file reported by check-meson.py
    - rebase the patchset on the main repository

v5:
    - merge all patches for supporting LoongArch EAL into one patch
    - add LoongArch cross compilation document and update some documents
      related to architecture
    - remove vector stubs added for LoongArch in net/i40e and net/ixgbe
    - add LOONGARCH64 cross compilation job in github ci

v4:
    - rebase the patchset on the main repository of version 22.07.0

v3:
    - add URL for cross compile tool chain
    - remove rte_lpm_lsx.h which was a dummy vector implementation
      because there is already a scalar implementation, thanks to
      Michal Mazurek
    - modify the name of compiler for cross compiling
    - remove useless variable in meson.build

v2:
    - use standard atomics of toolchain to implement
      atomic operations
    - implement spinlock based on standard atomics

Min Zhou (7):
  eal/loongarch: support LoongArch architecture
  net/ixgbe: add vector stubs for LoongArch
  net/memif: set memfd syscall ID on LoongArch
  net/tap: set BPF syscall ID for LoongArch
  examples/l3fwd: enable LoongArch operation
  test/cpuflags: add test for LoongArch cpu flag
  ci: add LOONGARCH64 cross compilation job

 .ci/linux-build.sh                            | 10 ++
 .github/workflows/build.yml                   | 10 +-
 MAINTAINERS                                   |  6 ++
 app/test/test_cpuflags.c                      | 41 ++++++++
 app/test/test_xmmt_ops.h                      | 12 +++
 .../loongarch/loongarch_loongarch64_linux_gcc | 16 ++++
 config/loongarch/meson.build                  | 43 +++++++++
 doc/guides/contributing/design.rst            |  2 +-
 .../cross_build_dpdk_for_loongarch.rst        | 87 +++++++++++++++++
 doc/guides/linux_gsg/index.rst                |  1 +
 doc/guides/nics/features.rst                  |  8 ++
 doc/guides/nics/features/default.ini          |  1 +
 doc/guides/nics/features/ixgbe.ini            |  1 +
 doc/guides/rel_notes/release_22_11.rst        |  7 ++
 drivers/net/i40e/meson.build                  |  6 ++
 drivers/net/ixgbe/ixgbe_rxtx.c                |  7 +-
 drivers/net/memif/rte_eth_memif.h             |  2 +
 drivers/net/tap/tap_bpf.h                     |  2 +
 examples/l3fwd/l3fwd_em.c                     |  8 ++
 lib/eal/linux/eal_memory.c                    |  4 +
 lib/eal/loongarch/include/meson.build         | 18 ++++
 lib/eal/loongarch/include/rte_atomic.h        | 47 ++++++++++
 lib/eal/loongarch/include/rte_byteorder.h     | 40 ++++++++
 lib/eal/loongarch/include/rte_cpuflags.h      | 39 ++++++++
 lib/eal/loongarch/include/rte_cycles.h        | 47 ++++++++++
 lib/eal/loongarch/include/rte_io.h            | 18 ++++
 lib/eal/loongarch/include/rte_memcpy.h        | 61 ++++++++++++
 lib/eal/loongarch/include/rte_pause.h         | 24 +++++
 .../loongarch/include/rte_power_intrinsics.h  | 20 ++++
 lib/eal/loongarch/include/rte_prefetch.h      | 47 ++++++++++
 lib/eal/loongarch/include/rte_rwlock.h        | 42 +++++++++
 lib/eal/loongarch/include/rte_spinlock.h      | 64 +++++++++++++
 lib/eal/loongarch/include/rte_vect.h          | 65 +++++++++++++
 lib/eal/loongarch/meson.build                 | 11 +++
 lib/eal/loongarch/rte_cpuflags.c              | 93 +++++++++++++++++++
 lib/eal/loongarch/rte_cycles.c                | 45 +++++++++
 lib/eal/loongarch/rte_hypervisor.c            | 11 +++
 lib/eal/loongarch/rte_power_intrinsics.c      | 53 +++++++++++
 meson.build                                   |  2 +
 39 files changed, 1017 insertions(+), 4 deletions(-)
 create mode 100644 config/loongarch/loongarch_loongarch64_linux_gcc
 create mode 100644 config/loongarch/meson.build
 create mode 100644 doc/guides/linux_gsg/cross_build_dpdk_for_loongarch.rst
 create mode 100644 lib/eal/loongarch/include/meson.build
 create mode 100644 lib/eal/loongarch/include/rte_atomic.h
 create mode 100644 lib/eal/loongarch/include/rte_byteorder.h
 create mode 100644 lib/eal/loongarch/include/rte_cpuflags.h
 create mode 100644 lib/eal/loongarch/include/rte_cycles.h
 create mode 100644 lib/eal/loongarch/include/rte_io.h
 create mode 100644 lib/eal/loongarch/include/rte_memcpy.h
 create mode 100644 lib/eal/loongarch/include/rte_pause.h
 create mode 100644 lib/eal/loongarch/include/rte_power_intrinsics.h
 create mode 100644 lib/eal/loongarch/include/rte_prefetch.h
 create mode 100644 lib/eal/loongarch/include/rte_rwlock.h
 create mode 100644 lib/eal/loongarch/include/rte_spinlock.h
 create mode 100644 lib/eal/loongarch/include/rte_vect.h
 create mode 100644 lib/eal/loongarch/meson.build
 create mode 100644 lib/eal/loongarch/rte_cpuflags.c
 create mode 100644 lib/eal/loongarch/rte_cycles.c
 create mode 100644 lib/eal/loongarch/rte_hypervisor.c
 create mode 100644 lib/eal/loongarch/rte_power_intrinsics.c

-- 
2.31.1


             reply	other threads:[~2022-09-30  8:02 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-30  8:02 Min Zhou [this message]
2022-09-30  8:02 ` [PATCH v7 1/7] eal/loongarch: support " Min Zhou
2022-10-03 17:15   ` David Marchand
2022-10-04  8:49     ` zhoumin
2022-09-30  8:02 ` [PATCH v7 2/7] net/ixgbe: add vector stubs for LoongArch Min Zhou
2022-09-30  8:02 ` [PATCH v7 3/7] net/memif: set memfd syscall ID on LoongArch Min Zhou
2022-09-30  8:02 ` [PATCH v7 4/7] net/tap: set BPF syscall ID for LoongArch Min Zhou
2022-09-30  8:02 ` [PATCH v7 5/7] examples/l3fwd: enable LoongArch operation Min Zhou
2022-09-30  8:02 ` [PATCH v7 6/7] test/cpuflags: add test for LoongArch cpu flag Min Zhou
2022-09-30  8:02 ` [PATCH v7 7/7] ci: add LOONGARCH64 cross compilation job Min Zhou
2022-09-30  8:13 ` [PATCH v7 0/7] Introduce support for LoongArch architecture David Marchand
2022-09-30 10:05   ` zhoumin
2022-09-30 14:20     ` David Marchand
2022-10-01 14:25       ` zhoumin
2022-10-03 16:30         ` David Marchand
2022-10-04  8:49           ` zhoumin
2022-10-03  8:14       ` Ali Alnubani
2022-10-03 12:44         ` zhoumin
2022-10-04  6:59 ` David Marchand
2022-10-04  8:50   ` zhoumin

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