From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 11B0BA0544; Tue, 11 Oct 2022 02:54:08 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 82FAE42C25; Tue, 11 Oct 2022 02:52:22 +0200 (CEST) Received: from NAM12-BN8-obe.outbound.protection.outlook.com (mail-bn8nam12on2066.outbound.protection.outlook.com [40.107.237.66]) by mails.dpdk.org (Postfix) with ESMTP id 3B7C942C15 for ; Tue, 11 Oct 2022 02:52:19 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=RwKs6RO/iz03Gxx3GUDx4hdyLTpTGteP7VLZj1mpSP4ODewaF9s3OzStexJRbvxGXUUyqXdaH3L8iNrglXKv7sKubK/vm/n52TuHyuL7IB3z6KsaJVs25DY/MduFtBqM80iWi8I089HaDxhzSoaoP1OpulANMPdzNl3vg1SKkSLpV1fjJw90I4ZnZQPVFcVnDu28Bvy3ofjneED50otdAqCXTOmu83RYccpV17KPFGXQzVtvCN9RLiJH2K+iRO+LxqQlhnh5QA6ruXLrZnCct3dDZiyJWyLZ6gBiXgRw+eWIdXvJiiZ/rR0cF6qgnB3dVN3eHfGAuV1zLN0EnwheZw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=oCZ7Asm9RQ8f2c4SY3RzcXiJ/Yv2z9cHTmx2X5dMTrY=; b=TqsRPFgKJAX2dPUXtJkTJXLWs4LKIcNusu76IuQfFBmJivyXEmStdkZxoTrbj6yIZbWegc5v7HYQGj4RYfPdlp5Q8fpUmfotc7BabYedenVp4Ghxabebuq2JgoqH+vONVKs24+rM956nEUb4I0HEMdewfxwu2r+78VLXAmcmjdbHxb2GDSwtCdfjJCWRSqsywrkf3aNEdBCBzKQAj1572S+tUW+zAIfJq+ElBnOF/ykIoTTsT1C98KoHRByKv24qw6ManG+oBZJRalWefCk8VOyiKcwPbrdQfJV7phWOwJeIlEL3JVOm4LIjxoC6QXiT+9iGOMeHJQmM/KzI29UBBQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=dpdk.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=oCZ7Asm9RQ8f2c4SY3RzcXiJ/Yv2z9cHTmx2X5dMTrY=; b=Ay82bCTceNpvcGsQcEcaqSCqjUKScQoOOZwTNM2ms5tNNIJhu7EsN2vjYO0F06rG82cHVvlDcOpnO3LvGdG34J6my7dU7PpJWyEW2NYLXbVkDlWLhf0KhW5f1JZLUhDa7otRKeDGuuwN+sW8Wio2U6dKvM3UlETLsKwZD9Hs3ho= Received: from BN9PR03CA0035.namprd03.prod.outlook.com (2603:10b6:408:fb::10) by BL1PR12MB5947.namprd12.prod.outlook.com (2603:10b6:208:39a::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5709.15; Tue, 11 Oct 2022 00:52:17 +0000 Received: from BN8NAM11FT089.eop-nam11.prod.protection.outlook.com (2603:10b6:408:fb:cafe::9b) by BN9PR03CA0035.outlook.office365.com (2603:10b6:408:fb::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5709.15 via Frontend Transport; Tue, 11 Oct 2022 00:52:17 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT089.mail.protection.outlook.com (10.13.176.105) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5709.10 via Frontend Transport; Tue, 11 Oct 2022 00:52:17 +0000 Received: from driver-dev1.pensando.io (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.28; Mon, 10 Oct 2022 19:52:15 -0500 From: Andrew Boyer To: CC: Andrew Boyer , Allen Hubbe Subject: [PATCH v1 27/35] net/ionic: add Tx descriptor status function Date: Mon, 10 Oct 2022 17:50:24 -0700 Message-ID: <20221011005032.47584-28-andrew.boyer@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221007174336.54354-1-andrew.boyer@amd.com> References: <20221007174336.54354-1-andrew.boyer@amd.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT089:EE_|BL1PR12MB5947:EE_ X-MS-Office365-Filtering-Correlation-Id: 28b22fe5-aa14-4631-fa4c-08daab22d84c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: /AUpI0Z7+0PFvlBSJjSQhp2R443fpaIX1rk8f312JnVpAJaJfwZzaTeB9xaEFIyNHC1NXeGguPzQeS0hIoOLrScbeskOU46RZBNyMSlhiflW7iUXai+4uFdZCfHoSLNrc8hRGWvJV+m1BM7Y3D8VmmnWT3ryVNVWmL92vgekM7NtUEgBIrQ8kt7v4sDYEwrJ5uDSYaq4SL+Lyrj3HE5YGzgzjTTaEbo1JPhDKO+ZfMZfjHCnZVa75UKdKWq+ki0LNGLrWWd5nxBZAXlbHuumyqdQVBTx+yfMaNFY2gHu6Onr+DBWJZ0F+0iOdkR+O/UOZVTQ0eJNYw77M/4dNfq4ogUP5CAqPeWoMp0P5oU2sr41oAZxGwWF+AWnHQjMA2EtnDPE3nqX+CISdyU/Mls97raA9oDaQ8GIb2Ol00tqOX5WXbXemMuPfuKfOXV9fgmXWt6lE32sXs+QxxJN/dzE9nJUhcvK5f2AxtT4tOrTS62G4AB8pAN5V7iWHVD73/vPGO9MpFrhSr2MKoaNSLtUD8nmWuzyFfENbFY8KO4t6O0Vd0WBRKqlONe0O4uJSey4Ogpol21JjfnZFIs88tu++RdI8+OtDX4rcNlHS1Gmm5HGwy+OyQlT5fsEemEnS8F+m351t9UIJnnOJZsWhvIZULBqSPkz1r6IkxAG/nS6uxo61j5obOFDv74TrEQX48H5ptAJzWDFVmyYrMBztX3yIxoNq5/qbBJu0Gn2WNnFi2jzNB/kW12rpRTciGBLjy8HM15uqhzzRe3DG3e2NW7yiFdxar8IKDFJcLyGnuoxRKM= X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230022)(4636009)(39860400002)(346002)(136003)(376002)(396003)(451199015)(40470700004)(36840700001)(46966006)(8676002)(41300700001)(316002)(6916009)(54906003)(4326008)(44832011)(2906002)(70586007)(5660300002)(8936002)(70206006)(186003)(40460700003)(82740400003)(81166007)(6666004)(86362001)(478600001)(2616005)(26005)(426003)(1076003)(40480700001)(47076005)(356005)(82310400005)(36860700001)(36756003)(336012)(16526019)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Oct 2022 00:52:17.2039 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 28b22fe5-aa14-4631-fa4c-08daab22d84c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT089.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5947 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This may be useful for clients. Signed-off-by: Andrew Boyer Signed-off-by: Allen Hubbe --- doc/guides/nics/features/ionic.ini | 1 + drivers/net/ionic/ionic_ethdev.c | 1 + drivers/net/ionic/ionic_rxtx.c | 51 ++++++++++++++++++++++++++++++ drivers/net/ionic/ionic_rxtx.h | 1 + 4 files changed, 54 insertions(+) diff --git a/doc/guides/nics/features/ionic.ini b/doc/guides/nics/features/ionic.ini index e01ba87135..af0fc5462a 100644 --- a/doc/guides/nics/features/ionic.ini +++ b/doc/guides/nics/features/ionic.ini @@ -28,6 +28,7 @@ L3 checksum offload = Y L4 checksum offload = Y Packet type parsing = Y Rx descriptor status = Y +Tx descriptor status = Y Basic stats = Y Extended stats = Y Stats per queue = Y diff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c index 7ac7006d88..cf74600f22 100644 --- a/drivers/net/ionic/ionic_ethdev.c +++ b/drivers/net/ionic/ionic_ethdev.c @@ -985,6 +985,7 @@ eth_ionic_dev_init(struct rte_eth_dev *eth_dev, void *init_params) eth_dev->tx_pkt_prepare = &ionic_prep_pkts; eth_dev->rx_descriptor_status = ionic_dev_rx_descriptor_status; + eth_dev->tx_descriptor_status = ionic_dev_tx_descriptor_status; /* Multi-process not supported, primary does initialization anyway */ if (rte_eal_process_type() != RTE_PROC_PRIMARY) diff --git a/drivers/net/ionic/ionic_rxtx.c b/drivers/net/ionic/ionic_rxtx.c index 64cbbd9815..4f84fa7df1 100644 --- a/drivers/net/ionic/ionic_rxtx.c +++ b/drivers/net/ionic/ionic_rxtx.c @@ -1274,3 +1274,54 @@ ionic_dev_rx_descriptor_status(void *rx_queue, uint16_t offset) return RTE_ETH_RX_DESC_AVAIL; } + +int +ionic_dev_tx_descriptor_status(void *tx_queue, uint16_t offset) +{ + struct ionic_tx_qcq *txq = tx_queue; + struct ionic_qcq *qcq = &txq->qcq; + struct ionic_txq_comp *cq_desc; + uint16_t mask, head, tail, pos, cq_pos; + bool done_color; + + mask = qcq->q.size_mask; + + /* offset must be within the size of the ring */ + if (offset > mask) + return -EINVAL; + + head = qcq->q.head_idx; + tail = qcq->q.tail_idx; + + /* offset is beyond what is posted */ + if (offset >= ((head - tail) & mask)) + return RTE_ETH_TX_DESC_DONE; + + /* interested in this absolute position in the txq */ + pos = (tail + offset) & mask; + + /* tx cq position != tx q position, need to walk cq */ + cq_pos = qcq->cq.tail_idx; + cq_desc = qcq->cq.base; + cq_desc = &cq_desc[cq_pos]; + + /* how far behind is pos from head? */ + offset = (head - pos) & mask; + + /* walk cq descriptors that match the expected done color */ + done_color = qcq->cq.done_color; + while (color_match(cq_desc->color, done_color)) { + /* is comp index no further behind than pos? */ + tail = rte_cpu_to_le_16(cq_desc->comp_index); + if (((head - tail) & mask) <= offset) + return RTE_ETH_TX_DESC_DONE; + + cq_pos = (cq_pos + 1) & mask; + cq_desc = qcq->cq.base; + cq_desc = &cq_desc[cq_pos]; + + done_color = done_color != (cq_pos == 0); + } + + return RTE_ETH_TX_DESC_FULL; +} diff --git a/drivers/net/ionic/ionic_rxtx.h b/drivers/net/ionic/ionic_rxtx.h index 465001a063..f950d6472c 100644 --- a/drivers/net/ionic/ionic_rxtx.h +++ b/drivers/net/ionic/ionic_rxtx.h @@ -41,6 +41,7 @@ void ionic_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, struct rte_eth_txq_info *qinfo); int ionic_dev_rx_descriptor_status(void *rx_queue, uint16_t offset); +int ionic_dev_tx_descriptor_status(void *tx_queue, uint16_t offset); const uint32_t *ionic_dev_supported_ptypes_get(struct rte_eth_dev *dev); -- 2.17.1