From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: <dev-bounces@dpdk.org> Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3887DA0545; Tue, 11 Oct 2022 14:02:37 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0268442DE0; Tue, 11 Oct 2022 14:02:07 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 00B3742DDA for <dev@dpdk.org>; Tue, 11 Oct 2022 14:02:04 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 29B8OJEu030159 for <dev@dpdk.org>; Tue, 11 Oct 2022 05:02:04 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=6g7GC0RsvZ35s3dbeA4n9hbJelNaKCDAormmkyQLDis=; b=JniQyzNM8wFinX/Gn4ChHPLB0cagK/T5/6dsZ8vVzFFd91SrV/illve2aZDCRw3qagD8 /dgWe3beSFXyrCyH3LKejedhucb0+E1mLlEqyxYJQCC0kZxTkIFwoEh8Q6EvLe0ZRb4z KgyRK4jWkJDMnZKDnaD/Vpv15XM9YUaZDFuLLAzabkKGRbLbzFGNhvkfoSCj0e4LFBL0 raIIe8n+8cDRcZDKYlCx6KSCfrwj4IZzYQhGufS9+D/Z7Cm33mg8iDN7B6v7wVMu4OSy WlrnwjUsRSCZI8rw2NjRHemel17wIjlMerSzx8Tj09Hylo9wHdSgEBCGE8H8VLgzoXCh gQ== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3k54xugqa4-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for <dev@dpdk.org>; Tue, 11 Oct 2022 05:02:04 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 11 Oct 2022 05:02:02 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Tue, 11 Oct 2022 05:02:02 -0700 Received: from localhost.localdomain (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 1C97D3F7050; Tue, 11 Oct 2022 05:01:59 -0700 (PDT) From: Nithin Dabilpuram <ndabilpuram@marvell.com> To: Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao <skoteshwar@marvell.com> CC: <jerinj@marvell.com>, <dev@dpdk.org> Subject: [PATCH 09/13] common/cnxk: set hysteresis bit to one Date: Tue, 11 Oct 2022 17:31:31 +0530 Message-ID: <20221011120135.45846-9-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221011120135.45846-1-ndabilpuram@marvell.com> References: <20221011120135.45846-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: MZYGXwm0JhsQ1rbxYAn0NWg2rplAxxdS X-Proofpoint-ORIG-GUID: MZYGXwm0JhsQ1rbxYAn0NWg2rplAxxdS X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-10-11_07,2022-10-11_02,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions <dev.dpdk.org> List-Unsubscribe: <https://mails.dpdk.org/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://mails.dpdk.org/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <https://mails.dpdk.org/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> Errors-To: dev-bounces@dpdk.org From: Satha Rao <skoteshwar@marvell.com> Setting non zero FC_HYST_BITS to reduce mesh traffic on HW. Signed-off-by: Satha Rao <skoteshwar@marvell.com> --- drivers/common/cnxk/roc_nix_queue.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c index 7f001efbb0..040b9cc45b 100644 --- a/drivers/common/cnxk/roc_nix_queue.c +++ b/drivers/common/cnxk/roc_nix_queue.c @@ -834,7 +834,7 @@ sqb_pool_populate(struct roc_nix *roc_nix, struct roc_nix_sq *sq) else aura.fc_stype = 0x3; /* STSTP */ aura.fc_addr = (uint64_t)sq->fc; - aura.fc_hyst_bits = 0; /* Store count on all updates */ + aura.fc_hyst_bits = 1; /* Store count on all updates */ rc = roc_npa_pool_create(&sq->aura_handle, blk_sz, nb_sqb_bufs, &aura, &pool, 0); if (rc) -- 2.25.1