From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id EA9DCA0548; Tue, 11 Oct 2022 20:57:57 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9923842BB7; Tue, 11 Oct 2022 20:57:28 +0200 (CEST) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mails.dpdk.org (Postfix) with ESMTP id 5323840687; Tue, 11 Oct 2022 20:57:23 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1665514643; x=1697050643; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=BWdJhO+6zwjGTNK3ivjo2yG59YQlqETNZX+di7IG528=; b=c8i0/ZBWCA6ZugGV97alAW6+HQzDMkQ8xgR4AbEn2TTeoBWoqpFFsKyT lYj/gGsSg4eF2oh7jRSsrbYpW7zer0WPXaB8E9Kbu1C8l7j4uHpgKSQoS 34eORGIC00l0wbyq0lW/hYhL3vWAOmGpRlYmTuTNmakTI4qW4pkGMp3GP v5YFS89ReaHEzJPWslQpsaNy3Tfy2+t949NEFmIKWAfR/HaUbBK4HM4fn 0IwYipbzaozYpd9UPG1YkkWEYdx5F1LrIsyzas+eyxscj7ryuXrU3VXq5 1+k+kY8+uW4t9GGlAFngZMBxnSbF1Xt5DBuvJPjgYi7zwr9DXpv6FMSe6 A==; X-IronPort-AV: E=McAfee;i="6500,9779,10497"; a="284981622" X-IronPort-AV: E=Sophos;i="5.95,177,1661842800"; d="scan'208";a="284981622" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Oct 2022 11:57:22 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10497"; a="604261527" X-IronPort-AV: E=Sophos;i="5.95,177,1661842800"; d="scan'208";a="604261527" Received: from unknown (HELO csl-npg-qt0.la.intel.com) ([10.233.181.103]) by orsmga006.jf.intel.com with ESMTP; 11 Oct 2022 11:57:22 -0700 From: Hernan Vargas To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com, maxime.coquelin@redhat.com Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com, Hernan Vargas , stable@dpdk.org Subject: [PATCH v3 06/30] baseband/acc100: check for unlikely operation vals Date: Tue, 11 Oct 2022 19:53:22 -0700 Message-Id: <20221012025346.204394-7-hernan.vargas@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20221012025346.204394-1-hernan.vargas@intel.com> References: <20221012025346.204394-1-hernan.vargas@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add unlikely checks for NULL operation values. Fixes: f404dfe35cc ("baseband/acc100: support 4G processing") Cc: stable@dpdk.org Signed-off-by: Hernan Vargas Reviewed-by: Maxime Coquelin --- drivers/baseband/acc/rte_acc100_pmd.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c index 3a008a3b88..5e8ed78559 100644 --- a/drivers/baseband/acc/rte_acc100_pmd.c +++ b/drivers/baseband/acc/rte_acc100_pmd.c @@ -2184,6 +2184,10 @@ enqueue_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op *op, r = op->turbo_enc.tb_params.r; while (mbuf_total_left > 0 && r < c) { + if (unlikely(input == 0)) { + rte_bbdev_log(ERR, "Not enough input segment"); + return -EINVAL; + } seg_total_left = rte_pktmbuf_data_len(input) - in_offset; /* Set up DMA descriptor */ desc = q->ring_addr + ((q->sw_ring_head + total_enqueued_cbs) @@ -3128,6 +3132,8 @@ acc100_enqueue_ldpc_dec_tb(struct rte_bbdev_queue_data *q_data, break; enqueued_cbs += ret; } + if (unlikely(enqueued_cbs == 0)) + return 0; /* Nothing to enqueue */ acc_dma_enqueue(q, enqueued_cbs, &q_data->queue_stats); @@ -3669,6 +3675,8 @@ acc100_dequeue_dec(struct rte_bbdev_queue_data *q_data, for (i = 0; i < dequeue_num; ++i) { op = (q->ring_addr + ((q->sw_ring_tail + dequeued_cbs) & q->sw_ring_wrap_mask))->req.op_addr; + if (unlikely(op == NULL)) + break; if (op->turbo_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK) ret = dequeue_dec_one_op_tb(q, &ops[i], dequeued_cbs, &aq_dequeued); @@ -3714,6 +3722,8 @@ acc100_dequeue_ldpc_dec(struct rte_bbdev_queue_data *q_data, for (i = 0; i < dequeue_num; ++i) { op = (q->ring_addr + ((q->sw_ring_tail + dequeued_cbs) & q->sw_ring_wrap_mask))->req.op_addr; + if (unlikely(op == NULL)) + break; if (op->ldpc_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK) ret = dequeue_dec_one_op_tb(q, &ops[i], dequeued_cbs, &aq_dequeued); -- 2.37.1