From: Tejasree Kondoj <ktejasree@marvell.com>
To: Akhil Goyal <gakhil@marvell.com>
Cc: Anoob Joseph <anoobj@marvell.com>,
Vidya Sagar Velumuri <vvelumuri@marvell.com>, <dev@dpdk.org>
Subject: [PATCH 02/13] common/cnxk: set inplace bit of lookaside IPsec
Date: Wed, 19 Oct 2022 19:45:02 +0530 [thread overview]
Message-ID: <20221019141513.1969052-3-ktejasree@marvell.com> (raw)
In-Reply-To: <20221019141513.1969052-1-ktejasree@marvell.com>
Set inplace bit of lookaside IPsec and remove
rptr population in datapath.
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
---
drivers/common/cnxk/roc_ie_on.h | 1 +
drivers/common/cnxk/roc_ie_ot.h | 2 ++
drivers/crypto/cnxk/cn10k_ipsec.c | 4 ++--
drivers/crypto/cnxk/cn10k_ipsec_la_ops.h | 2 --
drivers/crypto/cnxk/cn9k_ipsec.c | 4 ++--
drivers/crypto/cnxk/cn9k_ipsec_la_ops.h | 3 +--
6 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/common/cnxk/roc_ie_on.h b/drivers/common/cnxk/roc_ie_on.h
index 961d5fc95e..5d02684e34 100644
--- a/drivers/common/cnxk/roc_ie_on.h
+++ b/drivers/common/cnxk/roc_ie_on.h
@@ -30,6 +30,7 @@ enum roc_ie_on_ucc_ipsec {
#define ROC_IE_ON_INB_RPTR_HDR 16
#define ROC_IE_ON_MAX_IV_LEN 16
#define ROC_IE_ON_PER_PKT_IV BIT(43)
+#define ROC_IE_ON_INPLACE_BIT BIT(6)
enum {
ROC_IE_ON_SA_ENC_NULL = 0,
diff --git a/drivers/common/cnxk/roc_ie_ot.h b/drivers/common/cnxk/roc_ie_ot.h
index 56a1e9f1d6..722fbc1ddc 100644
--- a/drivers/common/cnxk/roc_ie_ot.h
+++ b/drivers/common/cnxk/roc_ie_ot.h
@@ -18,6 +18,8 @@
#define ROC_IE_OT_CPT_TS_PKIND 54
#define ROC_IE_OT_SA_CTX_HDR_SIZE 1
+#define ROC_IE_OT_INPLACE_BIT BIT(6)
+
enum roc_ie_ot_ucc_ipsec {
ROC_IE_OT_UCC_SUCCESS = 0x00,
ROC_IE_OT_UCC_ERR_SA_INVAL = 0xb0,
diff --git a/drivers/crypto/cnxk/cn10k_ipsec.c b/drivers/crypto/cnxk/cn10k_ipsec.c
index ef013c8bae..1740a73c36 100644
--- a/drivers/crypto/cnxk/cn10k_ipsec.c
+++ b/drivers/crypto/cnxk/cn10k_ipsec.c
@@ -99,7 +99,7 @@ cn10k_ipsec_outb_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf,
/* pre-populate CPT INST word 4 */
inst_w4.u64 = 0;
- inst_w4.s.opcode_major = ROC_IE_OT_MAJOR_OP_PROCESS_OUTBOUND_IPSEC;
+ inst_w4.s.opcode_major = ROC_IE_OT_MAJOR_OP_PROCESS_OUTBOUND_IPSEC | ROC_IE_OT_INPLACE_BIT;
param1.u16 = 0;
@@ -193,7 +193,7 @@ cn10k_ipsec_inb_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf,
/* pre-populate CPT INST word 4 */
inst_w4.u64 = 0;
- inst_w4.s.opcode_major = ROC_IE_OT_MAJOR_OP_PROCESS_INBOUND_IPSEC;
+ inst_w4.s.opcode_major = ROC_IE_OT_MAJOR_OP_PROCESS_INBOUND_IPSEC | ROC_IE_OT_INPLACE_BIT;
param1.u16 = 0;
diff --git a/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h b/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h
index a75e88cb28..084198b5bb 100644
--- a/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h
+++ b/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h
@@ -83,7 +83,6 @@ process_outb_sa(struct roc_cpt_lf *lf, struct rte_crypto_op *cop, struct cn10k_s
inst->w4.u64 = inst_w4_u64 | rte_pktmbuf_pkt_len(m_src);
dptr = rte_pktmbuf_mtod(m_src, uint64_t);
inst->dptr = dptr;
- inst->rptr = dptr;
return 0;
}
@@ -99,7 +98,6 @@ process_inb_sa(struct rte_crypto_op *cop, struct cn10k_sec_session *sess, struct
inst->w4.u64 = sess->inst.w4 | rte_pktmbuf_pkt_len(m_src);
dptr = rte_pktmbuf_mtod(m_src, uint64_t);
inst->dptr = dptr;
- inst->rptr = dptr;
return 0;
}
diff --git a/drivers/crypto/cnxk/cn9k_ipsec.c b/drivers/crypto/cnxk/cn9k_ipsec.c
index 5f3a74107b..55a13570ad 100644
--- a/drivers/crypto/cnxk/cn9k_ipsec.c
+++ b/drivers/crypto/cnxk/cn9k_ipsec.c
@@ -87,7 +87,7 @@ cn9k_ipsec_outb_sa_create(struct cnxk_cpt_qp *qp,
return ret;
w4.u64 = 0;
- w4.s.opcode_major = ROC_IE_ON_MAJOR_OP_PROCESS_OUTBOUND_IPSEC;
+ w4.s.opcode_major = ROC_IE_ON_MAJOR_OP_PROCESS_OUTBOUND_IPSEC | ROC_IE_ON_INPLACE_BIT;
w4.s.opcode_minor = ctx_len >> 3;
param1.u16 = 0;
@@ -174,7 +174,7 @@ cn9k_ipsec_inb_sa_create(struct cnxk_cpt_qp *qp,
return ret;
w4.u64 = 0;
- w4.s.opcode_major = ROC_IE_ON_MAJOR_OP_PROCESS_INBOUND_IPSEC;
+ w4.s.opcode_major = ROC_IE_ON_MAJOR_OP_PROCESS_INBOUND_IPSEC | ROC_IE_ON_INPLACE_BIT;
w4.s.opcode_minor = ctx_len >> 3;
param2.u16 = 0;
diff --git a/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h b/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h
index 8b4e636c70..52618e8840 100644
--- a/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h
+++ b/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h
@@ -82,7 +82,6 @@ process_outb_sa(struct rte_crypto_op *cop, struct cn9k_sec_session *sess, struct
/* Prepare CPT instruction */
inst->w4.u64 = sess->inst.w4 | dlen;
inst->dptr = PLT_U64_CAST(hdr);
- inst->rptr = PLT_U64_CAST(hdr);
inst->w7.u64 = sess->inst.w7;
return 0;
@@ -96,7 +95,7 @@ process_inb_sa(struct rte_crypto_op *cop, struct cn9k_sec_session *sess, struct
/* Prepare CPT instruction */
inst->w4.u64 = sess->inst.w4 | rte_pktmbuf_pkt_len(m_src);
- inst->dptr = inst->rptr = rte_pktmbuf_mtod(m_src, uint64_t);
+ inst->dptr = rte_pktmbuf_mtod(m_src, uint64_t);
inst->w7.u64 = sess->inst.w7;
}
#endif /* __CN9K_IPSEC_LA_OPS_H__ */
--
2.25.1
next prev parent reply other threads:[~2022-10-19 14:15 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20221019141513.1969052-1-ktejasree@marvell.com>
2022-10-19 14:15 ` [PATCH 01/13] crypto/cnxk: fix length of AES-CMAC algo Tejasree Kondoj
2022-10-19 14:15 ` Tejasree Kondoj [this message]
2022-10-19 14:15 ` [PATCH 03/13] crypto/cnxk: change capabilities as per firmware Tejasree Kondoj
2022-10-19 14:15 ` [PATCH 04/13] common/cnxk: support 103XX CPT Tejasree Kondoj
2022-10-19 14:15 ` [PATCH 05/13] common/cnxk: support custom UDP port values Tejasree Kondoj
2022-10-19 14:15 ` [PATCH 06/13] crypto/cnxk: update rlen calculation for lookaside mode Tejasree Kondoj
2022-10-19 14:15 ` [PATCH 07/13] crypto/cnxk: add support for DES and MD5 Tejasree Kondoj
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