From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E9141A06CC; Wed, 19 Oct 2022 16:43:27 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 955B142BB3; Wed, 19 Oct 2022 16:43:27 +0200 (CEST) Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2057.outbound.protection.outlook.com [40.107.94.57]) by mails.dpdk.org (Postfix) with ESMTP id 6275442BB1 for ; Wed, 19 Oct 2022 16:43:26 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Ik7fwdFfOCZ3W9huSUTgmbC9JaNB37O3Vd+mvsfA0WaZT8uqnTex2pB8CeAqeuV9VuaIGpYr1vItDPcqRikgQ+yfeWgeD2zCNssxciL9fPsQ6YY4yPLOaW3thR3bTKgF43nujAsuT+WX7ErgR4lSCAbk1uVQHtqCcoTgKdisd45cv3BVtRhQFnZ4322XpeqgfgRpXZ+qbm2cjosC2JOYLZLMCs18YcKKuJmsyGVCBvsOenXW1unwkSsXszNx4KYILrza9zqmM1dzCo6PvgvWuseC1YbuTLi794NbrwSNXwyCtCSEtxWVQbV/D15pJSG8BSkUxQJOYMquROHdfCkSiA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=+F3790x6yGxOeaV/ishIT4h49QTVxREFxululm6pq6Q=; b=E/nNDCJ+29slq5jWR4/4FxWjgb+V3bMxwSKv4tgSj8vxUvMp00kM81zs2DqF3vRzgasCCBxQSk841kVgGdIQZIfYMf2+svJ2jlbj5iWh1T1R+WcetGonF3AvfUZ5j4aLTEGCH8aBko0nhnIjSGwpJHPQSa2995+zQ+raIm0KhFgPmWzpuwhMNceY/DdG5BDcAq9Oe0raaS0Tz+jfyknOPhFDU0eMaBtS/BZ5jYuorF7mmx16yHuKN5e7//1rHPtII50TY50QMEViuHDV1LTgVcv5JBwOTezG1A+pRZJG5dQwH6T1KWYRMYsInAucG9RR42IZKR4zaS/I5TYVCBRYQw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=none (sender ip is 216.228.117.161) smtp.rcpttodomain=monjalon.net smtp.mailfrom=nvidia.com; dmarc=fail (p=reject sp=reject pct=100) action=oreject header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=+F3790x6yGxOeaV/ishIT4h49QTVxREFxululm6pq6Q=; b=AaRsjNtjid2i81sOfc3BP9dJCy53SsutZ25jb6J1lpqjRiIrOisBOqGY76H8Rxk/KrkgonqFs88aPrP6af27QWqKpQbUpIdT+r3WBHm4Can7YXn+NJRS7knXqK2UFAHFzxSe5T2L0xWBtkkQzNB/I3CwLGtur1BFtWfjgb2RSxykT+OjTCSTpS6RytPU0ZGR8ezeZqFuXgZRWqFNzwVLmSGD6AeR342hX1ZWpKF2DmVyy4hk48qg6y22q0OsRZd04zuwzS9f5GPuEOJb6xdjW3PS7lpovNwvju2iP7CE2p7mo9v5C4ggeEEqfWP3HWbVnZtBvMvQCAeGcubwx9zCsw== Received: from BN9PR03CA0218.namprd03.prod.outlook.com (2603:10b6:408:f8::13) by BL3PR12MB6475.namprd12.prod.outlook.com (2603:10b6:208:3bb::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5723.30; Wed, 19 Oct 2022 14:43:23 +0000 Received: from BN8NAM11FT052.eop-nam11.prod.protection.outlook.com (2603:10b6:408:f8:cafe::39) by BN9PR03CA0218.outlook.office365.com (2603:10b6:408:f8::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5723.32 via Frontend Transport; Wed, 19 Oct 2022 14:43:23 +0000 X-MS-Exchange-Authentication-Results: spf=none (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=fail action=oreject header.from=nvidia.com; Received-SPF: None (protection.outlook.com: nvidia.com does not designate permitted sender hosts) Received: from mail.nvidia.com (216.228.117.161) by BN8NAM11FT052.mail.protection.outlook.com (10.13.177.210) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5746.16 via Frontend Transport; Wed, 19 Oct 2022 14:43:23 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.26; Wed, 19 Oct 2022 07:43:15 -0700 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Wed, 19 Oct 2022 07:43:12 -0700 From: Alex Vesker To: , , , CC: , Subject: [v4 00/18] net/mlx5: Add HW steering low level support Date: Wed, 19 Oct 2022 17:42:40 +0300 Message-ID: <20221019144258.16282-1-valex@nvidia.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: <20220922190345.394-1-valex@nvidia.com> References: <20220922190345.394-1-valex@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT052:EE_|BL3PR12MB6475:EE_ X-MS-Office365-Filtering-Correlation-Id: d166f557-d7d6-4a79-b655-08dab1e04631 X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: rT7rnZEtfaYHzVbCkPoEBYzTJQ293TG5yKP47XPQzyAfIRphkfyLjwIUJQDellq8XuTv8NWrYY3E4jd9u2Xa0ZjoCZ/P2dTmEFU1XFrFSvxRwa+4csOaomYPpz4h9UFq0DlcgbWRqSgTP2EcC8cTk/UKmwXBK8oirT7AP968FtBtkfZQVado7i8h+ZBz1a5EYgRIiA9FXDRsaV4luA85dy+wjx+TCFzILu6+BycudLEiullV7sZ2NG8cyPRweIZVY0Fo6m00mh8wXFoyFwVQIz/oEAbiYzf07GROg5cIcxVSq33MS+uQ5HuP5ZduKIt1JqY9Ceh1shDwoNvUkh0hvuLps7HG7suZ4cdEhpjbHZY0m+JCcwzSPWGhjN5VVSaqX1QFam9GLYU6cXfET/Ma4OcLPjP0DEUxAoQ3cLBppv9c4Ot4uBv/+QAbIGGyu2rpc+Cyd+hmoIunsUWAoAVamm9wDPkLvfi3YfAqYJB4vD6SI8MG/Qmx2XXY4r8OaX9ZSLTSnIbbkS7bITmfJWoc5oT4G72Hj9PFNdy4j8P4qqzEB/zCWCGikIHEkUuMlJZ0mos0bbVMRNLTsDYZ6JhQst22eCgXGCB3hoPmVe7z/uUYupb5nfg706HN+L/BeaZR/iU2TitmAcjucD79rXAKb3+NbbyzNAQpCpLTUk0VcHv5gxatBLBrPG8J32bS0wZVseNF8sEv79qbluRP5/QlmebIixZ4LTqrQeTbA4bgeoDqlRGQu49bWmVRIR0IYh7j2k3So0WhGrRcI38sGRXDfw== X-Forefront-Antispam-Report: CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230022)(4636009)(39860400002)(346002)(376002)(136003)(396003)(451199015)(36840700001)(46966006)(40470700004)(316002)(54906003)(6636002)(110136005)(186003)(7696005)(2616005)(40460700003)(16526019)(2906002)(41300700001)(1076003)(36756003)(55016003)(26005)(5660300002)(8936002)(83380400001)(426003)(8676002)(86362001)(70586007)(6666004)(47076005)(70206006)(6286002)(4326008)(107886003)(336012)(82310400005)(356005)(7636003)(82740400003)(40480700001)(478600001)(36860700001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Oct 2022 14:43:23.2612 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d166f557-d7d6-4a79-b655-08dab1e04631 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT052.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL3PR12MB6475 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Mellanox ConnetX devices supports packet matching, packet modification and redirection. These functionalities are also referred to as flow-steering. To configure a steering rule, the rule is written to the device owned memory, this memory is accessed and cached by the device when processing a packet. The highlight of this patchset is supporting HW Steering (HWS) which is the new technology supported in new ConnectX devices, HWS allows configuring steering rules directly to the HW using special HW queues with minimal CPU effort. This patchset is the internal low layer implementation for HWS used by the mlx5 PMD. The mlx5dr (direct rule) is layer that bridges between the PMD and the HW by configuring the HW offloads based on the PMD logic v2: Fix check patch and cosmetic changes v3: -Fix unsupported items -Fix compilation with mlx5dv dependency v4: -Fix compile on Windows Alex Vesker (9): net/mlx5: Add additional glue functions for HWS net/mlx5/hws: Add HWS send layer net/mlx5/hws: Add HWS definer layer net/mlx5/hws: Add HWS context object net/mlx5/hws: Add HWS table object net/mlx5/hws: Add HWS matcher object net/mlx5/hws: Add HWS rule object net/mlx5/hws: Add HWS action object net/mlx5/hws: Enable HWS Bing Zhao (2): common/mlx5: query set capability of registers net/mlx5: provide the available tag registers Dariusz Sosnowski (1): net/mlx5: add port to metadata conversion Erez Shitrit (2): net/mlx5/hws: Add HWS command layer net/mlx5/hws: Add HWS pool and buddy Hamdan Igbaria (1): net/mlx5/hws: Add HWS debug layer Suanming Mou (3): net/mlx5: split flow item translation net/mlx5: split flow item matcher and value translation net/mlx5: add hardware steering item translation function doc/guides/nics/mlx5.rst | 5 +- doc/guides/rel_notes/release_22_11.rst | 4 + drivers/common/mlx5/linux/meson.build | 2 + drivers/common/mlx5/linux/mlx5_glue.c | 121 +- drivers/common/mlx5/linux/mlx5_glue.h | 17 + drivers/common/mlx5/mlx5_devx_cmds.c | 30 + drivers/common/mlx5/mlx5_devx_cmds.h | 2 + drivers/common/mlx5/mlx5_prm.h | 652 ++++- drivers/net/mlx5/hws/meson.build | 18 + drivers/net/mlx5/{mlx5_dr.h => hws/mlx5dr.h} | 209 +- drivers/net/mlx5/hws/mlx5dr_action.c | 2222 +++++++++++++++ drivers/net/mlx5/hws/mlx5dr_action.h | 253 ++ drivers/net/mlx5/hws/mlx5dr_buddy.c | 201 ++ drivers/net/mlx5/hws/mlx5dr_buddy.h | 22 + drivers/net/mlx5/hws/mlx5dr_cmd.c | 948 +++++++ drivers/net/mlx5/hws/mlx5dr_cmd.h | 230 ++ drivers/net/mlx5/hws/mlx5dr_context.c | 223 ++ drivers/net/mlx5/hws/mlx5dr_context.h | 40 + drivers/net/mlx5/hws/mlx5dr_debug.c | 462 +++ drivers/net/mlx5/hws/mlx5dr_debug.h | 28 + drivers/net/mlx5/hws/mlx5dr_definer.c | 1968 +++++++++++++ drivers/net/mlx5/hws/mlx5dr_definer.h | 585 ++++ drivers/net/mlx5/hws/mlx5dr_internal.h | 93 + drivers/net/mlx5/hws/mlx5dr_matcher.c | 922 ++++++ drivers/net/mlx5/hws/mlx5dr_matcher.h | 76 + drivers/net/mlx5/hws/mlx5dr_pat_arg.c | 511 ++++ drivers/net/mlx5/hws/mlx5dr_pat_arg.h | 83 + drivers/net/mlx5/hws/mlx5dr_pool.c | 672 +++++ drivers/net/mlx5/hws/mlx5dr_pool.h | 152 + drivers/net/mlx5/hws/mlx5dr_rule.c | 528 ++++ drivers/net/mlx5/hws/mlx5dr_rule.h | 50 + drivers/net/mlx5/hws/mlx5dr_send.c | 844 ++++++ drivers/net/mlx5/hws/mlx5dr_send.h | 275 ++ drivers/net/mlx5/hws/mlx5dr_table.c | 248 ++ drivers/net/mlx5/hws/mlx5dr_table.h | 44 + drivers/net/mlx5/linux/mlx5_os.c | 12 +- drivers/net/mlx5/meson.build | 7 +- drivers/net/mlx5/mlx5.c | 9 +- drivers/net/mlx5/mlx5.h | 8 +- drivers/net/mlx5/mlx5_defs.h | 2 + drivers/net/mlx5/mlx5_devx.c | 2 +- drivers/net/mlx5/mlx5_dr.c | 383 --- drivers/net/mlx5/mlx5_flow.c | 29 +- drivers/net/mlx5/mlx5_flow.h | 174 +- drivers/net/mlx5/mlx5_flow_dv.c | 2631 +++++++++--------- drivers/net/mlx5/mlx5_flow_hw.c | 115 +- 46 files changed, 14386 insertions(+), 1726 deletions(-) create mode 100644 drivers/net/mlx5/hws/meson.build rename drivers/net/mlx5/{mlx5_dr.h => hws/mlx5dr.h} (66%) create mode 100644 drivers/net/mlx5/hws/mlx5dr_action.c create mode 100644 drivers/net/mlx5/hws/mlx5dr_action.h create mode 100644 drivers/net/mlx5/hws/mlx5dr_buddy.c create mode 100644 drivers/net/mlx5/hws/mlx5dr_buddy.h create mode 100644 drivers/net/mlx5/hws/mlx5dr_cmd.c create mode 100644 drivers/net/mlx5/hws/mlx5dr_cmd.h create mode 100644 drivers/net/mlx5/hws/mlx5dr_context.c create mode 100644 drivers/net/mlx5/hws/mlx5dr_context.h create mode 100644 drivers/net/mlx5/hws/mlx5dr_debug.c create mode 100644 drivers/net/mlx5/hws/mlx5dr_debug.h create mode 100644 drivers/net/mlx5/hws/mlx5dr_definer.c create mode 100644 drivers/net/mlx5/hws/mlx5dr_definer.h create mode 100644 drivers/net/mlx5/hws/mlx5dr_internal.h create mode 100644 drivers/net/mlx5/hws/mlx5dr_matcher.c create mode 100644 drivers/net/mlx5/hws/mlx5dr_matcher.h create mode 100644 drivers/net/mlx5/hws/mlx5dr_pat_arg.c create mode 100644 drivers/net/mlx5/hws/mlx5dr_pat_arg.h create mode 100644 drivers/net/mlx5/hws/mlx5dr_pool.c create mode 100644 drivers/net/mlx5/hws/mlx5dr_pool.h create mode 100644 drivers/net/mlx5/hws/mlx5dr_rule.c create mode 100644 drivers/net/mlx5/hws/mlx5dr_rule.h create mode 100644 drivers/net/mlx5/hws/mlx5dr_send.c create mode 100644 drivers/net/mlx5/hws/mlx5dr_send.h create mode 100644 drivers/net/mlx5/hws/mlx5dr_table.c create mode 100644 drivers/net/mlx5/hws/mlx5dr_table.h delete mode 100644 drivers/net/mlx5/mlx5_dr.c -- 2.18.1