From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 85E05A0553; Thu, 20 Oct 2022 17:42:35 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 01B56427EB; Thu, 20 Oct 2022 17:42:34 +0200 (CEST) Received: from NAM12-MW2-obe.outbound.protection.outlook.com (mail-mw2nam12on2083.outbound.protection.outlook.com [40.107.244.83]) by mails.dpdk.org (Postfix) with ESMTP id E4B7A427EB for ; Thu, 20 Oct 2022 17:42:32 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=cvmapb9qglmPR74SZ2z5Kbn1FFuY98NCSwrIHO6BblvvULHOZ2nx0LxP191W1dJ6JVf0qe7f53Q8C2pXN2FAlfCClmS9r4/qzqiYnnCu98sGEYCbJLcplFi+j6o5mFaQlQdURpk64fKEIp/syOAX00XCUhtTdTJBBFal28RM7DLMGeFBFtjzSZ3hve9klMK2zB80P8tXVxmmGAhybG5jFtO86x3CUE2iV8OcNYO/KvVBdEuUxQQBu0Kjgw1CyXxe5+ocriN3qDEaBaIJp45IXG76dwveQm8bcJ9QdYKj2XIdQAg/fzKntRBOBLNIoKxqmyUVgt3rZ3OMG60tN72djw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=/FcW5anos3ETIxiwzXH8M+1WpiKcWhwbqrpExmsdJiI=; b=gT1svMHvUDIo2nLNey1g8idxvRPLS8CjGreeml/T5Sq156ZWcFJpzpFhB8unRTGAv1mGpNc2nGIc0k2ne55noyhLWWhRkqvODSFF2k1icgXNvox+9u0Iiq1LkDfziMOp2o94kk6sQI8ey9anZ+Vw/UtAIzC4yotGoWii/pCAn5ThTJAYFtiIjKTbLvrXSj54oUEYKc0rd2s56fdLf/dInK6GsqQj9GRv77y1c4QvsSXxpyAreO5Z/6BW5rHfCkQGBUNLm4aY0a5dft7y6jAvjO5k9QtT4Ts2xgkQRfSaSlGzJx1LI54hRwGOgTWinSCU4TbuKSUezRQwsb6rzsH3iw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=none (sender ip is 216.228.117.161) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com; dmarc=fail (p=reject sp=reject pct=100) action=oreject header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=/FcW5anos3ETIxiwzXH8M+1WpiKcWhwbqrpExmsdJiI=; b=jZkWJxBoKN6ACZUlEOwY3kIQnKOwPT5xCQCPcxbNow6YCDWVPmspbcVNgVgGc00ETeLKuFq+tMPSCQYUGBmjIMHpf8Lev7/u2YNvMFZgwP74F5trqn0uM159F2WYc9seeWNmpcji8csV5kuQmcU/Q4+K+sF85CanC7kL+d+/lFQbAgVJL5Y1soIg4JXUGvlgnoaBpAi4qoj6p2O+LFhgMZq/nDUdSDqvMl2dU0JFFI383iUw3Ztj4PTFG5gl8+KDqdetCYx5P4n2S8enu0ayiDlBVvAVmOBpVYKm37YcgPuLClv/Q6iz7Xy4K20ql8k2OPmpoaKxg4bxVAzL8bfc5g== Received: from BN9PR03CA0507.namprd03.prod.outlook.com (2603:10b6:408:130::32) by CY5PR12MB6179.namprd12.prod.outlook.com (2603:10b6:930:24::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5723.30; Thu, 20 Oct 2022 15:42:31 +0000 Received: from BL02EPF0000C402.namprd05.prod.outlook.com (2603:10b6:408:130:cafe::4f) by BN9PR03CA0507.outlook.office365.com (2603:10b6:408:130::32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5723.35 via Frontend Transport; Thu, 20 Oct 2022 15:42:31 +0000 X-MS-Exchange-Authentication-Results: spf=none (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=fail action=oreject header.from=nvidia.com; Received-SPF: None (protection.outlook.com: nvidia.com does not designate permitted sender hosts) Received: from mail.nvidia.com (216.228.117.161) by BL02EPF0000C402.mail.protection.outlook.com (10.167.241.4) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5723.20 via Frontend Transport; Thu, 20 Oct 2022 15:42:30 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.26; Thu, 20 Oct 2022 08:42:10 -0700 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Thu, 20 Oct 2022 08:42:08 -0700 From: Suanming Mou To: Matan Azrad , Viacheslav Ovsiienko CC: , , Subject: [PATCH v6 02/18] net/mlx5: fix IPv6 and TCP RSS hash fields Date: Thu, 20 Oct 2022 18:41:36 +0300 Message-ID: <20221020154152.28228-3-suanmingm@nvidia.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: <20221020154152.28228-1-suanmingm@nvidia.com> References: <20220923144334.27736-1-suanmingm@nvidia.com> <20221020154152.28228-1-suanmingm@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0000C402:EE_|CY5PR12MB6179:EE_ X-MS-Office365-Filtering-Correlation-Id: 92ee88ce-2ae4-410e-48cc-08dab2b1b331 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: VwZbNz51cnQh+eGNDyXRGGVjkBFM+mgAXu8SZeh+bCNSflmdW8YVXmu+kobgbp5only80MjOyrRdYrgjMufXHy65E1yRGstcTseyjiuhlpJLIDj6u9WDJaiWOCT5jTIiyhRU1atPh/jpJYaRsn8QaKt2/bwSoxthpnN7f489mtIrKYwtseU27jzNguEPkZZCCe8BJioy0K3OZ2QZHIAIUIGRRP1wvV2GoaV3U4+gmCO1saI+9fD0xxHHPN4wIKwqbESptW1ViurM23Bw0tJJ2adn+72tZ9lOT+GUzb7+benv7WyDPeF5FIDjaLC7fuWB6x3gviGw4mwDXf94RHdCqfarU/wGTlAS3IbYjZCA2Fw9DT+E5jH/JPFXydHF7HXy4l8ck6WKrnONMX7zTTELzoj89cQOHr+14vwMFMZPiKs8Z2LoWyBPj0hozgCnYcbOIKNzrtmH1pedi3NlegQIDB/1hDI4hbHMj3m18ud1AoWZ+dtg4k1EKIlMqJkOyKWW6PhE+jssulAiEHL1lxpx3pm3MRUGYwNUE4iZuYTtSzfq0Fx4PJjspC0FVv36oFUD33X1jf21zt6NTR/R1SXl5dSv18PE1KgZX7nM+/pyOWqi888G1eyC1LnIOKpVPgCjue09a7F9NoAYJBLA8Jw40WDTdx95vdnHJHVPpV/EReEVz+n+dCoI25H/G/1s7eGBAGd/p2aN33f/h3w3DsVgpckT+4F3G980YVKGj0iywgmruzhgXWkP8IyJPqD2/QEgDLQtUF2kCvoAGLveSC7TOA== X-Forefront-Antispam-Report: CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230022)(4636009)(376002)(136003)(396003)(346002)(39860400002)(451199015)(46966006)(36840700001)(40470700004)(6636002)(7636003)(82740400003)(82310400005)(36860700001)(356005)(478600001)(47076005)(54906003)(1076003)(2906002)(16526019)(36756003)(186003)(7696005)(2616005)(316002)(336012)(41300700001)(86362001)(6666004)(107886003)(83380400001)(40480700001)(55016003)(426003)(70586007)(70206006)(110136005)(8936002)(40460700003)(5660300002)(8676002)(6286002)(4326008)(26005); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Oct 2022 15:42:30.8841 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 92ee88ce-2ae4-410e-48cc-08dab2b1b331 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0000C402.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6179 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org In the flow_dv_hashfields_set() function, while item_flags was 0, the code went directly to the first if and the else case would never have chance be checked. This caused the IPv6 and TCP hash fields in the else case would never be set. This commit adds the dedicate HW steering hash field set function to generate the RSS hash fields. Fixes: 3a2f674b6aa8 ("net/mlx5: add queue and RSS HW steering action") Signed-off-by: Suanming Mou --- drivers/net/mlx5/mlx5_flow_dv.c | 12 +++---- drivers/net/mlx5/mlx5_flow_hw.c | 59 ++++++++++++++++++++++++++++++++- 2 files changed, 62 insertions(+), 9 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index fb542ffde9..5dd93078ac 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -11276,8 +11276,7 @@ flow_dv_hashfields_set(uint64_t item_flags, rss_inner = 1; #endif if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) || - (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4)) || - !items) { + (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) { if (rss_types & MLX5_IPV4_LAYER_TYPES) { if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY) fields |= IBV_RX_HASH_SRC_IPV4; @@ -11287,8 +11286,7 @@ flow_dv_hashfields_set(uint64_t item_flags, fields |= MLX5_IPV4_IBV_RX_HASH; } } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) || - (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6)) || - !items) { + (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) { if (rss_types & MLX5_IPV6_LAYER_TYPES) { if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY) fields |= IBV_RX_HASH_SRC_IPV6; @@ -11311,8 +11309,7 @@ flow_dv_hashfields_set(uint64_t item_flags, return; } if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) || - (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP)) || - !items) { + (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) { if (rss_types & RTE_ETH_RSS_UDP) { if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY) fields |= IBV_RX_HASH_SRC_PORT_UDP; @@ -11322,8 +11319,7 @@ flow_dv_hashfields_set(uint64_t item_flags, fields |= MLX5_UDP_IBV_RX_HASH; } } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) || - (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP)) || - !items) { + (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) { if (rss_types & RTE_ETH_RSS_TCP) { if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY) fields |= IBV_RX_HASH_SRC_PORT_TCP; diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index 8de6757737..28b24490e4 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -62,6 +62,63 @@ flow_hw_rxq_flag_set(struct rte_eth_dev *dev, bool enable) priv->mark_enabled = enable; } +/** + * Set the hash fields according to the @p rss_desc information. + * + * @param[in] rss_desc + * Pointer to the mlx5_flow_rss_desc. + * @param[out] hash_fields + * Pointer to the RSS hash fields. + */ +static void +flow_hw_hashfields_set(struct mlx5_flow_rss_desc *rss_desc, + uint64_t *hash_fields) +{ + uint64_t fields = 0; + int rss_inner = 0; + uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types); + +#ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT + if (rss_desc->level >= 2) + rss_inner = 1; +#endif + if (rss_types & MLX5_IPV4_LAYER_TYPES) { + if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY) + fields |= IBV_RX_HASH_SRC_IPV4; + else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY) + fields |= IBV_RX_HASH_DST_IPV4; + else + fields |= MLX5_IPV4_IBV_RX_HASH; + } else if (rss_types & MLX5_IPV6_LAYER_TYPES) { + if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY) + fields |= IBV_RX_HASH_SRC_IPV6; + else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY) + fields |= IBV_RX_HASH_DST_IPV6; + else + fields |= MLX5_IPV6_IBV_RX_HASH; + } + if (rss_types & RTE_ETH_RSS_UDP) { + if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY) + fields |= IBV_RX_HASH_SRC_PORT_UDP; + else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY) + fields |= IBV_RX_HASH_DST_PORT_UDP; + else + fields |= MLX5_UDP_IBV_RX_HASH; + } else if (rss_types & RTE_ETH_RSS_TCP) { + if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY) + fields |= IBV_RX_HASH_SRC_PORT_TCP; + else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY) + fields |= IBV_RX_HASH_DST_PORT_TCP; + else + fields |= MLX5_TCP_IBV_RX_HASH; + } + if (rss_types & RTE_ETH_RSS_ESP) + fields |= IBV_RX_HASH_IPSEC_SPI; + if (rss_inner) + fields |= IBV_RX_HASH_INNER; + *hash_fields = fields; +} + /** * Generate the pattern item flags. * Will be used for shared RSS action. @@ -225,7 +282,7 @@ flow_hw_tir_action_register(struct rte_eth_dev *dev, MLX5_RSS_HASH_KEY_LEN); rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN; rss_desc.types = !rss->types ? RTE_ETH_RSS_IP : rss->types; - flow_dv_hashfields_set(0, &rss_desc, &rss_desc.hash_fields); + flow_hw_hashfields_set(&rss_desc, &rss_desc.hash_fields); flow_dv_action_rss_l34_hash_adjust(rss->types, &rss_desc.hash_fields); if (rss->level > 1) { -- 2.25.1