From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <dev-bounces@dpdk.org>
Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124])
	by inbox.dpdk.org (Postfix) with ESMTP id EB25BA054A;
	Tue, 25 Oct 2022 11:09:46 +0200 (CEST)
Received: from [217.70.189.124] (localhost [127.0.0.1])
	by mails.dpdk.org (Postfix) with ESMTP id 707D542C1E;
	Tue, 25 Oct 2022 11:09:37 +0200 (CEST)
Received: from mga04.intel.com (mga04.intel.com [192.55.52.120])
 by mails.dpdk.org (Postfix) with ESMTP id EB48A42C07
 for <dev@dpdk.org>; Tue, 25 Oct 2022 11:09:29 +0200 (CEST)
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple;
 d=intel.com; i=@intel.com; q=dns/txt; s=Intel;
 t=1666688970; x=1698224970;
 h=from:to:cc:subject:date:message-id:in-reply-to:
 references:mime-version:content-transfer-encoding;
 bh=yNnJH1ymaunvLTTQwdmNYLiBxxYxje/rY7KlzCzs4A0=;
 b=KgbHAgEpe01HfYdw3UwF23S4ELNYz0EsFnZGYLTmG8uSphNn9RM3LJkZ
 SmmtiLYNOd8UFT/eEzi49UEMrkDV89RHHKxw8+vy/AUyZYtkUzYL+y9uW
 JLOub1kvaQn9N49E9ZVUkOUaTmbGCEzB/nJvjOM72hk8Brm4kP6saZb1K
 AbdgxowutNHvC1DWo1bFo+ZZvKAWrwrwG6UXjbV5C/lMWyKXV3yqxWO+C
 sG53WlWACbxbU6+gIm3bZ0zaO25RFnZe/HSEmgsP6XTu0BhPWnQotwFZv
 ufauhyBiW0koLdRcUyJYmVF9z153ktPAzepoykR1uQIKMEi8LtfRSPOwk g==;
X-IronPort-AV: E=McAfee;i="6500,9779,10510"; a="306358833"
X-IronPort-AV: E=Sophos;i="5.95,211,1661842800"; d="scan'208";a="306358833"
Received: from orsmga004.jf.intel.com ([10.7.209.38])
 by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;
 25 Oct 2022 02:09:29 -0700
X-ExtLoop1: 1
X-IronPort-AV: E=McAfee;i="6500,9779,10510"; a="756864596"
X-IronPort-AV: E=Sophos;i="5.95,211,1661842800"; d="scan'208";a="756864596"
Received: from dpdk-jf-ntb-one.sh.intel.com ([10.67.111.104])
 by orsmga004.jf.intel.com with ESMTP; 25 Oct 2022 02:09:26 -0700
From: Junfeng Guo <junfeng.guo@intel.com>
To: qi.z.zhang@intel.com, jingjing.wu@intel.com, ferruh.yigit@xilinx.com,
 beilei.xing@intel.com
Cc: dev@dpdk.org, xiaoyun.li@intel.com, awogbemila@google.com,
 bruce.richardson@intel.com, hemant.agrawal@nxp.com,
 stephen@networkplumber.org, chenbo.xia@intel.com, helin.zhang@intel.com,
 Junfeng Guo <junfeng.guo@intel.com>
Subject: [PATCH v8 5/8] net/gve: add support for MTU setting
Date: Tue, 25 Oct 2022 17:07:26 +0800
Message-Id: <20221025090729.2593603-6-junfeng.guo@intel.com>
X-Mailer: git-send-email 2.34.1
In-Reply-To: <20221025090729.2593603-1-junfeng.guo@intel.com>
References: <20221021091928.2674471-2-junfeng.guo@intel.com>
 <20221025090729.2593603-1-junfeng.guo@intel.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
X-BeenThere: dev@dpdk.org
X-Mailman-Version: 2.1.29
Precedence: list
List-Id: DPDK patches and discussions <dev.dpdk.org>
List-Unsubscribe: <https://mails.dpdk.org/options/dev>,
 <mailto:dev-request@dpdk.org?subject=unsubscribe>
List-Archive: <http://mails.dpdk.org/archives/dev/>
List-Post: <mailto:dev@dpdk.org>
List-Help: <mailto:dev-request@dpdk.org?subject=help>
List-Subscribe: <https://mails.dpdk.org/listinfo/dev>,
 <mailto:dev-request@dpdk.org?subject=subscribe>
Errors-To: dev-bounces@dpdk.org

Support dev_ops mtu_set.

Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
---
 doc/guides/nics/features/gve.ini |  1 +
 doc/guides/nics/gve.rst          |  2 ++
 drivers/net/gve/gve_ethdev.c     | 28 ++++++++++++++++++++++++++++
 3 files changed, 31 insertions(+)

diff --git a/doc/guides/nics/features/gve.ini b/doc/guides/nics/features/gve.ini
index ae466ad677..d1703d8dab 100644
--- a/doc/guides/nics/features/gve.ini
+++ b/doc/guides/nics/features/gve.ini
@@ -5,6 +5,7 @@
 ;
 [Features]
 Link status          = Y
+MTU update           = Y
 Linux                = Y
 x86-32               = Y
 x86-64               = Y
diff --git a/doc/guides/nics/gve.rst b/doc/guides/nics/gve.rst
index c42ff23841..36a65e4717 100644
--- a/doc/guides/nics/gve.rst
+++ b/doc/guides/nics/gve.rst
@@ -69,3 +69,5 @@ Jumbo Frame is not supported in PMD for now. It'll be added in the future
 DPDK release.
 Also, only GQI_QPL queue format is in use on GCP since GQI_RDA hasn't been
 released in production.
+
+Currently, setting MTU with value larger than 1460 is not supported.
diff --git a/drivers/net/gve/gve_ethdev.c b/drivers/net/gve/gve_ethdev.c
index 34243c1672..554f58640d 100644
--- a/drivers/net/gve/gve_ethdev.c
+++ b/drivers/net/gve/gve_ethdev.c
@@ -96,12 +96,40 @@ gve_dev_close(struct rte_eth_dev *dev)
 	return err;
 }
 
+static int
+gve_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
+{
+	struct gve_priv *priv = dev->data->dev_private;
+	int err;
+
+	if (mtu < RTE_ETHER_MIN_MTU || mtu > priv->max_mtu) {
+		PMD_DRV_LOG(ERR, "MIN MTU is %u, MAX MTU is %u",
+			    RTE_ETHER_MIN_MTU, priv->max_mtu);
+		return -EINVAL;
+	}
+
+	/* mtu setting is forbidden if port is start */
+	if (dev->data->dev_started) {
+		PMD_DRV_LOG(ERR, "Port must be stopped before configuration");
+		return -EBUSY;
+	}
+
+	err = gve_adminq_set_mtu(priv, mtu);
+	if (err) {
+		PMD_DRV_LOG(ERR, "Failed to set mtu as %u err = %d", mtu, err);
+		return err;
+	}
+
+	return 0;
+}
+
 static const struct eth_dev_ops gve_eth_dev_ops = {
 	.dev_configure        = gve_dev_configure,
 	.dev_start            = gve_dev_start,
 	.dev_stop             = gve_dev_stop,
 	.dev_close            = gve_dev_close,
 	.link_update          = gve_link_update,
+	.mtu_set              = gve_dev_mtu_set,
 };
 
 static void
-- 
2.34.1