From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C5288A0542; Wed, 26 Oct 2022 10:44:30 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2F8E142BB0; Wed, 26 Oct 2022 10:44:30 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mails.dpdk.org (Postfix) with ESMTP id 212C4400D6; Wed, 26 Oct 2022 10:44:27 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1666773868; x=1698309868; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=0ZMWMNiFdCY2DJud+qbHZbxmtqqErnte5bVN6LBL7S0=; b=abVp/Z//De49xlUjw3JU3sWDPvr+9zgGDxjutUr0aDBHe4gAE9tHJNBH qbkb02z/k56rna5478a6P80AjQ5y5dbfVRVe1o69DfjkfzYt5vu+6onxq 9Ii+SWL7VEEwjesd1UkKL/l97WMtgbvEUsopVYxwq1FeRnuFkhS2r/od+ TJP4KpVCw/ksM/RYFyzjSIj/8NIXUw4LM0sDq0hf3PLYv2tybxDW6wTho wLQzX/T8KZOQmzZEQUf8jBQNTxPHBP7+dBwjy9mE9t3KwEF4AvngKSVZq pGDgeZVvPAUdzF83UuHdli9d16ujjrMj2peXckWmZRo64ZOU3wRLPDxsT w==; X-IronPort-AV: E=McAfee;i="6500,9779,10511"; a="307889523" X-IronPort-AV: E=Sophos;i="5.95,214,1661842800"; d="scan'208";a="307889523" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Oct 2022 01:44:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10511"; a="700847033" X-IronPort-AV: E=Sophos;i="5.95,214,1661842800"; d="scan'208";a="700847033" Received: from dpdk-jf-ntb-one.sh.intel.com ([10.67.111.104]) by fmsmga004.fm.intel.com with ESMTP; 26 Oct 2022 01:44:23 -0700 From: Junfeng Guo To: qi.z.zhang@intel.com, jingjing.wu@intel.com, ferruh.yigit@xilinx.com, beilei.xing@intel.com Cc: dev@dpdk.org, xiaoyun.li@intel.com, awogbemila@google.com, bruce.richardson@intel.com, hemant.agrawal@nxp.com, stephen@networkplumber.org, chenbo.xia@intel.com, helin.zhang@intel.com, Junfeng Guo , stable@dpdk.org Subject: [PATCH] net/gve: fix meson build failure on non-Linux platforms Date: Wed, 26 Oct 2022 16:42:44 +0800 Message-Id: <20221026084244.22083-1-junfeng.guo@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Meson build may fail on FreeBSD with gcc and clang, due to missing the header file linux/pci_regs.h on non-Linux platform. Thus, in this patch, we removed the file include and added the used Macros derived from linux/pci_regs.h. Fixes: 3047a5ac8e66 ("net/gve: add support for device initialization") Cc: stable@dpdk.org Signed-off-by: Junfeng Guo --- drivers/net/gve/gve_ethdev.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/net/gve/gve_ethdev.c b/drivers/net/gve/gve_ethdev.c index b0f7b98daa..e968317737 100644 --- a/drivers/net/gve/gve_ethdev.c +++ b/drivers/net/gve/gve_ethdev.c @@ -1,12 +1,24 @@ /* SPDX-License-Identifier: BSD-3-Clause * Copyright(C) 2022 Intel Corporation */ -#include #include "gve_ethdev.h" #include "base/gve_adminq.h" #include "base/gve_register.h" +/* + * Following macros are derived from linux/pci_regs.h, however, + * we can't simply include that header here, as there is no such + * file for non-Linux platform. + */ +#define PCI_CFG_SPACE_SIZE 256 +#define PCI_CAPABILITY_LIST 0x34 /* Offset of first capability list entry */ +#define PCI_STD_HEADER_SIZEOF 64 +#define PCI_CAP_SIZEOF 4 +#define PCI_CAP_ID_MSIX 0x11 /* MSI-X */ +#define PCI_MSIX_FLAGS 2 /* Message Control */ +#define PCI_MSIX_FLAGS_QSIZE 0x07FF /* Table size */ + const char gve_version_str[] = GVE_VERSION; static const char gve_version_prefix[] = GVE_VERSION_PREFIX; -- 2.34.1