From: Junfeng Guo <junfeng.guo@intel.com>
To: qi.z.zhang@intel.com, jingjing.wu@intel.com,
ferruh.yigit@xilinx.com, beilei.xing@intel.com
Cc: dev@dpdk.org, xiaoyun.li@intel.com, awogbemila@google.com,
bruce.richardson@intel.com, hemant.agrawal@nxp.com,
stephen@networkplumber.org, chenbo.xia@intel.com,
helin.zhang@intel.com, Junfeng Guo <junfeng.guo@intel.com>
Subject: [PATCH v2] net/gve: fix meson build failure on non-Linux platforms
Date: Wed, 26 Oct 2022 18:23:21 +0800 [thread overview]
Message-ID: <20221026102321.260886-1-junfeng.guo@intel.com> (raw)
In-Reply-To: <20221026084244.22083-1-junfeng.guo@intel.com>
Meson build may fail on FreeBSD with gcc and clang, due to missing
the header file linux/pci_regs.h on non-Linux platform. Thus, in
this patch, we removed the file include and added the used Macros
derived from linux/pci_regs.h.
Fixes: 3047a5ac8e66 ("net/gve: add support for device initialization")
Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
---
drivers/net/gve/gve_ethdev.c | 1 -
drivers/net/gve/gve_ethdev.h | 13 +++++++++++++
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/net/gve/gve_ethdev.c b/drivers/net/gve/gve_ethdev.c
index b0f7b98daa..18c879b8d1 100644
--- a/drivers/net/gve/gve_ethdev.c
+++ b/drivers/net/gve/gve_ethdev.c
@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: BSD-3-Clause
* Copyright(C) 2022 Intel Corporation
*/
-#include <linux/pci_regs.h>
#include "gve_ethdev.h"
#include "base/gve_adminq.h"
diff --git a/drivers/net/gve/gve_ethdev.h b/drivers/net/gve/gve_ethdev.h
index 36b334c36b..f6cac3ff2b 100644
--- a/drivers/net/gve/gve_ethdev.h
+++ b/drivers/net/gve/gve_ethdev.h
@@ -11,6 +11,19 @@
#include "base/gve.h"
+/*
+ * Following macros are derived from linux/pci_regs.h, however,
+ * we can't simply include that header here, as there is no such
+ * file for non-Linux platform.
+ */
+#define PCI_CFG_SPACE_SIZE 256
+#define PCI_CAPABILITY_LIST 0x34 /* Offset of first capability list entry */
+#define PCI_STD_HEADER_SIZEOF 64
+#define PCI_CAP_SIZEOF 4
+#define PCI_CAP_ID_MSIX 0x11 /* MSI-X */
+#define PCI_MSIX_FLAGS 2 /* Message Control */
+#define PCI_MSIX_FLAGS_QSIZE 0x07FF /* Table size */
+
#define GVE_DEFAULT_RX_FREE_THRESH 512
#define GVE_DEFAULT_TX_FREE_THRESH 256
#define GVE_TX_MAX_FREE_SZ 512
--
2.34.1
next prev parent reply other threads:[~2022-10-26 10:25 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-26 8:42 [PATCH] " Junfeng Guo
2022-10-26 8:51 ` David Marchand
2022-10-26 9:10 ` Ferruh Yigit
2022-10-26 9:33 ` David Marchand
2022-10-26 10:01 ` Ferruh Yigit
2022-10-26 10:24 ` Guo, Junfeng
2022-10-26 10:05 ` Gao, DaxueX
2022-10-26 10:23 ` Junfeng Guo [this message]
2022-10-26 11:11 ` [PATCH v2] " Ferruh Yigit
2022-10-27 3:08 ` Gao, DaxueX
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