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From: Michael Baum <michaelba@nvidia.com>
To: <dev@dpdk.org>
Cc: Matan Azrad <matan@nvidia.com>,
	Raslan Darawsheh <rasland@nvidia.com>,
	Viacheslav Ovsiienko <viacheslavo@nvidia.com>,
	<jackmin@nvidia.com>
Subject: [PATCH 2/5] net/mlx5: fix accessing the wrong counter
Date: Mon, 31 Oct 2022 18:08:21 +0200	[thread overview]
Message-ID: <20221031160824.330200-3-michaelba@nvidia.com> (raw)
In-Reply-To: <20221031160824.330200-1-michaelba@nvidia.com>

The HWS counter has 2 different identifiers:
1. Type "cnt_id_t" which represents the counter inside caches and in
   the flow structure. This index cannot be zero and is mostly called
   "cnt_id".
 2. Internal index, the index in counters array with type "uint32_t".
    mostly it is called "iidx".
The second ID is calculated from the first using "mlx5_hws_cnt_iidx()"
function.

When a direct counter is allocated, if the queue cache is not empty, the
counter represented by cnt_id is popped from the cache. This counter may
be invalid according to the query_gen field. Thus, the "iidx" is parsed
from cnt_id and if it is valid, it is used to update the fields of the
counter structure.
When this counter is invalid, all the cache is flashed and new counters
are fetched into the cache. After fetching, another counter represented
by cnt_id is taken from the cache.
Unfortunately, for updating fields like "in_used" or "age_idx", the
function wrongly may use the old "iidx" coming from an invalid cnt_id.

Update the "iidx" in case of an invalid counter popped from the cache.

Fixes: 4d368e1da3a4 ("net/mlx5: support flow counter action for HWS")
Cc: jackmin@nvidia.com

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Xiaoyu Min <jackmin@nvidia.com>
---
 drivers/net/mlx5/mlx5_hws_cnt.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/mlx5/mlx5_hws_cnt.h b/drivers/net/mlx5/mlx5_hws_cnt.h
index e311923f71..196604aded 100644
--- a/drivers/net/mlx5/mlx5_hws_cnt.h
+++ b/drivers/net/mlx5/mlx5_hws_cnt.h
@@ -506,6 +506,7 @@ mlx5_hws_cnt_pool_get(struct mlx5_hws_cnt_pool *cpool, uint32_t *queue,
 		rte_ring_dequeue_zc_burst_elem_start(qcache, sizeof(cnt_id_t),
 				1, &zcdc, NULL);
 		*cnt_id = *(cnt_id_t *)zcdc.ptr1;
+		iidx = mlx5_hws_cnt_iidx(cpool, *cnt_id);
 	}
 	__hws_cnt_query_raw(cpool, *cnt_id, &cpool->pool[iidx].reset.hits,
 			    &cpool->pool[iidx].reset.bytes);
-- 
2.25.1


  parent reply	other threads:[~2022-10-31 16:08 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-31 16:08 [PATCH 0/5] net/mlx5: some counter fixes Michael Baum
2022-10-31 16:08 ` [PATCH 1/5] net/mlx5: fix race condition in counter pool resizing Michael Baum
2022-10-31 16:08 ` Michael Baum [this message]
2022-10-31 16:08 ` [PATCH 3/5] net/mlx5: fix missing counter elements copies in r2r cases Michael Baum
2022-10-31 16:08 ` [PATCH 4/5] net/mlx5: add assertions in counter get/put Michael Baum
2022-10-31 16:08 ` [PATCH 5/5] net/mlx5: assert for enough space in counter rings Michael Baum
2022-11-03 11:40 ` [PATCH 0/5] net/mlx5: some counter fixes Raslan Darawsheh

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