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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by DM6NAM11FT040.mail.protection.outlook.com (10.13.173.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5769.14 via Frontend Transport; Tue, 1 Nov 2022 10:07:49 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.26; Tue, 1 Nov 2022 03:07:40 -0700 Received: from nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Tue, 1 Nov 2022 03:07:38 -0700 From: Shun Hao To: , , , "Bing Zhao" CC: , , Subject: [PATCH v1] net/mlx5: fix action flag data type Date: Tue, 1 Nov 2022 12:07:24 +0200 Message-ID: <20221101100724.3190709-1-shunh@nvidia.com> X-Mailer: git-send-email 2.20.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT040:EE_|MW3PR12MB4379:EE_ X-MS-Office365-Filtering-Correlation-Id: a40f55bb-fafb-4359-4bcd-08dabbf0ee8b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Nov 2022 10:07:49.3435 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a40f55bb-fafb-4359-4bcd-08dabbf0ee8b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT040.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW3PR12MB4379 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org MLX5_FLOW_ACTION flags are used as uint64_t now, but some old flags are not defined as 64 bits. So if they are type casted to uint64 after bitwise operations, the high 32-bit data might be incorrect. E.g. Currently MLX5_FLOW_ACTION_DROP is defined as 0x1u, when it is used like: (action_flags & ~MLX5_FLOW_ACTION_DROP) action_flags is uint64_t so (~MLX5_FLOW_ACTION_DROP) will be casted to uint64_t as well, but its high 32 bits will be all 0s. This will make the result not as expected. This patch fixes this by making all action flags definition as 64-bit data type. Fixes: 4b7bf3ff ("net/mlx5: support yellow in meter policy validation") Cc: stable@dpdk.org Signed-off-by: Shun Hao Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5_flow.h | 56 ++++++++++++++++++------------------ 1 file changed, 28 insertions(+), 28 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index da9b65d8fe..91691806ad 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -258,34 +258,34 @@ enum mlx5_feature_name { (MLX5_FLOW_LAYER_OUTER_L4 | MLX5_FLOW_LAYER_INNER_L4) /* Actions */ -#define MLX5_FLOW_ACTION_DROP (1u << 0) -#define MLX5_FLOW_ACTION_QUEUE (1u << 1) -#define MLX5_FLOW_ACTION_RSS (1u << 2) -#define MLX5_FLOW_ACTION_FLAG (1u << 3) -#define MLX5_FLOW_ACTION_MARK (1u << 4) -#define MLX5_FLOW_ACTION_COUNT (1u << 5) -#define MLX5_FLOW_ACTION_PORT_ID (1u << 6) -#define MLX5_FLOW_ACTION_OF_POP_VLAN (1u << 7) -#define MLX5_FLOW_ACTION_OF_PUSH_VLAN (1u << 8) -#define MLX5_FLOW_ACTION_OF_SET_VLAN_VID (1u << 9) -#define MLX5_FLOW_ACTION_OF_SET_VLAN_PCP (1u << 10) -#define MLX5_FLOW_ACTION_SET_IPV4_SRC (1u << 11) -#define MLX5_FLOW_ACTION_SET_IPV4_DST (1u << 12) -#define MLX5_FLOW_ACTION_SET_IPV6_SRC (1u << 13) -#define MLX5_FLOW_ACTION_SET_IPV6_DST (1u << 14) -#define MLX5_FLOW_ACTION_SET_TP_SRC (1u << 15) -#define MLX5_FLOW_ACTION_SET_TP_DST (1u << 16) -#define MLX5_FLOW_ACTION_JUMP (1u << 17) -#define MLX5_FLOW_ACTION_SET_TTL (1u << 18) -#define MLX5_FLOW_ACTION_DEC_TTL (1u << 19) -#define MLX5_FLOW_ACTION_SET_MAC_SRC (1u << 20) -#define MLX5_FLOW_ACTION_SET_MAC_DST (1u << 21) -#define MLX5_FLOW_ACTION_ENCAP (1u << 22) -#define MLX5_FLOW_ACTION_DECAP (1u << 23) -#define MLX5_FLOW_ACTION_INC_TCP_SEQ (1u << 24) -#define MLX5_FLOW_ACTION_DEC_TCP_SEQ (1u << 25) -#define MLX5_FLOW_ACTION_INC_TCP_ACK (1u << 26) -#define MLX5_FLOW_ACTION_DEC_TCP_ACK (1u << 27) +#define MLX5_FLOW_ACTION_DROP (1ull << 0) +#define MLX5_FLOW_ACTION_QUEUE (1ull << 1) +#define MLX5_FLOW_ACTION_RSS (1ull << 2) +#define MLX5_FLOW_ACTION_FLAG (1ull << 3) +#define MLX5_FLOW_ACTION_MARK (1ull << 4) +#define MLX5_FLOW_ACTION_COUNT (1ull << 5) +#define MLX5_FLOW_ACTION_PORT_ID (1ull << 6) +#define MLX5_FLOW_ACTION_OF_POP_VLAN (1ull << 7) +#define MLX5_FLOW_ACTION_OF_PUSH_VLAN (1ull << 8) +#define MLX5_FLOW_ACTION_OF_SET_VLAN_VID (1ull << 9) +#define MLX5_FLOW_ACTION_OF_SET_VLAN_PCP (1ull << 10) +#define MLX5_FLOW_ACTION_SET_IPV4_SRC (1ull << 11) +#define MLX5_FLOW_ACTION_SET_IPV4_DST (1ull << 12) +#define MLX5_FLOW_ACTION_SET_IPV6_SRC (1ull << 13) +#define MLX5_FLOW_ACTION_SET_IPV6_DST (1ull << 14) +#define MLX5_FLOW_ACTION_SET_TP_SRC (1ull << 15) +#define MLX5_FLOW_ACTION_SET_TP_DST (1ull << 16) +#define MLX5_FLOW_ACTION_JUMP (1ull << 17) +#define MLX5_FLOW_ACTION_SET_TTL (1ull << 18) +#define MLX5_FLOW_ACTION_DEC_TTL (1ull << 19) +#define MLX5_FLOW_ACTION_SET_MAC_SRC (1ull << 20) +#define MLX5_FLOW_ACTION_SET_MAC_DST (1ull << 21) +#define MLX5_FLOW_ACTION_ENCAP (1ull << 22) +#define MLX5_FLOW_ACTION_DECAP (1ull << 23) +#define MLX5_FLOW_ACTION_INC_TCP_SEQ (1ull << 24) +#define MLX5_FLOW_ACTION_DEC_TCP_SEQ (1ull << 25) +#define MLX5_FLOW_ACTION_INC_TCP_ACK (1ull << 26) +#define MLX5_FLOW_ACTION_DEC_TCP_ACK (1ull << 27) #define MLX5_FLOW_ACTION_SET_TAG (1ull << 28) #define MLX5_FLOW_ACTION_MARK_EXT (1ull << 29) #define MLX5_FLOW_ACTION_SET_META (1ull << 30) -- 2.20.0