From: Nicolas Chautru <nicolas.chautru@intel.com>
To: dev@dpdk.org, gakhil@marvell.com, maxime.coquelin@redhat.com,
hernan.vargas@intel.com
Subject: [PATCH v1 4/6] baseband/acc: fix PMON register values
Date: Tue, 1 Nov 2022 16:04:57 -0700 [thread overview]
Message-ID: <20221101230459.50891-5-nicolas.chautru@intel.com> (raw)
In-Reply-To: <20221101230459.50891-1-nicolas.chautru@intel.com>
From: Hernan Vargas <hernan.vargas@intel.com>
Enable properly the PMon for ACC100.
Previous commit was missing actual implementation
and using incorrect register values.
Fixes: b4bd57b74c8 ("baseband/acc100: configure PMON control registers")
Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
drivers/baseband/acc/acc100_pmd.h | 6 ++++--
drivers/baseband/acc/rte_acc100_pmd.c | 5 +++++
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/baseband/acc/acc100_pmd.h b/drivers/baseband/acc/acc100_pmd.h
index 8c0aec5ed8..a48298650c 100644
--- a/drivers/baseband/acc/acc100_pmd.h
+++ b/drivers/baseband/acc/acc100_pmd.h
@@ -146,8 +146,8 @@ static const struct acc100_registry_addr pf_reg_addr = {
.depth_log1_offset = HWPfQmgrGrpDepthLog21Vf,
.qman_group_func = HWPfQmgrGrpFunction0,
.ddr_range = HWPfDmaVfDdrBaseRw,
- .pmon_ctrl_a = HWVfPmACntrlRegVf,
- .pmon_ctrl_b = HWVfPmBCntrlRegVf,
+ .pmon_ctrl_a = HWPfPermonACntrlRegVf,
+ .pmon_ctrl_b = HWPfPermonBCntrlRegVf,
};
/* Structure holding registry addresses for VF */
@@ -177,6 +177,8 @@ static const struct acc100_registry_addr vf_reg_addr = {
.depth_log1_offset = HWVfQmgrGrpDepthLog21Vf,
.qman_group_func = HWVfQmgrGrpFunction0Vf,
.ddr_range = HWVfDmaDdrBaseRangeRoVf,
+ .pmon_ctrl_a = HWVfPmACntrlRegVf,
+ .pmon_ctrl_b = HWVfPmBCntrlRegVf,
};
#endif /* _RTE_ACC100_PMD_H_ */
diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c
index b6e500c6bc..2999a6a81a 100644
--- a/drivers/baseband/acc/rte_acc100_pmd.c
+++ b/drivers/baseband/acc/rte_acc100_pmd.c
@@ -479,6 +479,11 @@ acc100_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
/* Read the populated cfg from ACC100 registers */
fetch_acc100_config(dev);
+ for (value = 0; value <= 2; value++) {
+ acc_reg_write(d, reg_addr->pmon_ctrl_a, value);
+ acc_reg_write(d, reg_addr->pmon_ctrl_b, value);
+ }
+
/* Release AXI from PF */
if (d->pf_device)
acc_reg_write(d, HWPfDmaAxiControl, 1);
--
2.37.1
next prev parent reply other threads:[~2022-11-01 23:05 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-01 23:04 [PATCH v1 0/6] baseband/acc: fixes on top of RC2 Nicolas Chautru
2022-11-01 23:04 ` [PATCH v1 1/6] baseband/acc: fix LTE half iteration flag Nicolas Chautru
2022-11-02 6:32 ` Maxime Coquelin
2022-11-01 23:04 ` [PATCH v1 2/6] baseband/acc: fix to possible overflow Nicolas Chautru
2022-11-02 6:51 ` Maxime Coquelin
2022-11-01 23:04 ` [PATCH v1 3/6] baseband/acc: fix to acc200 access corner case Nicolas Chautru
2022-11-02 6:52 ` Maxime Coquelin
2022-11-01 23:04 ` Nicolas Chautru [this message]
2022-11-02 7:01 ` [PATCH v1 4/6] baseband/acc: fix PMON register values Maxime Coquelin
2022-11-01 23:04 ` [PATCH v1 5/6] baseband/acc: fix double MSI intr in TB mode Nicolas Chautru
2022-11-02 7:16 ` Maxime Coquelin
2022-11-01 23:04 ` [PATCH v1 6/6] baseband/acc: fix redundant function definition Nicolas Chautru
2022-11-02 7:19 ` Maxime Coquelin
2022-11-02 17:16 ` Chautru, Nicolas
2022-11-03 8:26 ` [EXT] [PATCH v1 0/6] baseband/acc: fixes on top of RC2 Akhil Goyal
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