DPDK patches and discussions
 help / color / mirror / Atom feed
* [PATCH 0/2] net/mlx5: fix some sample/mirror issues
@ 2022-11-02 13:44 Jiawei Wang
  2022-11-02 13:44 ` [PATCH 1/2] net/mlx5: fix flow source port checking in sample flow rule Jiawei Wang
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Jiawei Wang @ 2022-11-02 13:44 UTC (permalink / raw)
  To: viacheslavo, matan; +Cc: dev, rasland

Some fixes for sample/mirror issues.

Jiawei Wang (2):
  net/mlx5: fix flow source port checking in sample flow rule
  net/mlx5: fix mirror flow validation with ASO action

 drivers/net/mlx5/mlx5_flow.c    |  55 +++++++++++++---
 drivers/net/mlx5/mlx5_flow.h    |  19 ++++++
 drivers/net/mlx5/mlx5_flow_dv.c | 110 ++++++++++++++++++++------------
 3 files changed, 133 insertions(+), 51 deletions(-)

-- 
2.18.1


^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PATCH 1/2] net/mlx5: fix flow source port checking in sample flow rule
  2022-11-02 13:44 [PATCH 0/2] net/mlx5: fix some sample/mirror issues Jiawei Wang
@ 2022-11-02 13:44 ` Jiawei Wang
  2022-11-02 13:44 ` [PATCH 2/2] net/mlx5: fix mirror flow validation with ASO action Jiawei Wang
  2022-11-03 11:41 ` [PATCH 0/2] net/mlx5: fix some sample/mirror issues Raslan Darawsheh
  2 siblings, 0 replies; 4+ messages in thread
From: Jiawei Wang @ 2022-11-02 13:44 UTC (permalink / raw)
  To: viacheslavo, matan; +Cc: dev, rasland, stable

The metadata register C value was lost in FDB egress while doing the
flow sampler on ConnectX-5. The FDB direction checking was decided by
the source port in the flow creation. If there's additional port item
was added in the flow match, then the actual source port was changed.

This patch adds the checking for the port id item:
RTE_FLOW_ITEM_TYPE_PORT_ID, RTE_FLOW_ITEM_TYPE_REPRESENTED_PORT,
and RTE_FLOW_ITEM_TYPE_PORT_REPRESENTOR,
then updates FDB egress checking and the source vport metadata
from the port item, also updates the PUSH VLAN, POP VLAN and
flow sampler action validation.

Fixes: 04c0d3f20f54 ("net/mlx5: fix port matching in sample flow rule")
Fixes: 255b8f86eb6e ("net/mlx5: fix E-Switch egress mirror flow validation")
Cc: stable@dpdk.org

Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow.c    | 55 ++++++++++++++++++++++------
 drivers/net/mlx5/mlx5_flow.h    | 19 ++++++++++
 drivers/net/mlx5/mlx5_flow_dv.c | 63 +++++++++++++++++++++------------
 3 files changed, 104 insertions(+), 33 deletions(-)

diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index 8e7d649d15..b638abf677 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -5934,7 +5934,8 @@ flow_check_match_action(const struct rte_flow_action actions[],
 			ratio = sample->ratio;
 			sub_type = ((const struct rte_flow_action *)
 					(sample->actions))->type;
-			if (ratio == 1 && attr->transfer)
+			if (ratio == 1 && attr->transfer &&
+			    sub_type != RTE_FLOW_ACTION_TYPE_END)
 				fdb_mirror = 1;
 			break;
 		case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
@@ -6106,9 +6107,11 @@ flow_sample_split_prep(struct rte_eth_dev *dev,
 				break;
 			case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
 			case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
-				push_vlan_idx = action_idx;
-				if (push_vlan_idx < sample_action_pos)
+				if (action_idx < sample_action_pos &&
+				    push_vlan_idx == -1) {
 					set_tag_idx = action_idx;
+					push_vlan_idx = action_idx;
+				}
 				break;
 			default:
 				break;
@@ -6171,18 +6174,20 @@ flow_sample_split_prep(struct rte_eth_dev *dev,
 			.data = tag_id,
 		};
 		/* Prepare the suffix subflow items. */
+		tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
+		tag_spec->data = tag_id;
+		tag_spec->id = set_tag->id;
+		tag_mask = tag_spec + 1;
+		tag_mask->data = UINT32_MAX;
 		for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
 			if (items->type == RTE_FLOW_ITEM_TYPE_PORT_ID ||
-			    items->type == RTE_FLOW_ITEM_TYPE_PORT_REPRESENTOR) {
+			    items->type == RTE_FLOW_ITEM_TYPE_PORT_REPRESENTOR ||
+			    items->type == RTE_FLOW_ITEM_TYPE_REPRESENTED_PORT) {
 				memcpy(sfx_items, items, sizeof(*sfx_items));
 				sfx_items++;
+				break;
 			}
 		}
-		tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
-		tag_spec->data = tag_id;
-		tag_spec->id = set_tag->id;
-		tag_mask = tag_spec + 1;
-		tag_mask->data = UINT32_MAX;
 		sfx_items[0] = (struct rte_flow_item){
 			.type = (enum rte_flow_item_type)
 				MLX5_RTE_FLOW_ITEM_TYPE_TAG,
@@ -6757,6 +6762,8 @@ flow_create_split_sample(struct rte_eth_dev *dev,
 	uint16_t jump_table = 0;
 	const uint32_t next_ft_step = 1;
 	int ret = 0;
+	struct mlx5_priv *item_port_priv = NULL;
+	const struct rte_flow_item *item;
 
 	if (priv->sampler_en)
 		actions_n = flow_check_match_action(actions, attr,
@@ -6776,8 +6783,36 @@ flow_create_split_sample(struct rte_eth_dev *dev,
 						  RTE_FLOW_ERROR_TYPE_ACTION,
 						  NULL, "no memory to split "
 						  "sample flow");
+		for (item = items; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
+			if (item->type == RTE_FLOW_ITEM_TYPE_PORT_ID) {
+				const struct rte_flow_item_port_id *spec;
+
+				spec = (const struct rte_flow_item_port_id *)item->spec;
+				if (spec)
+					item_port_priv =
+						mlx5_port_to_eswitch_info(spec->id, true);
+				break;
+			} else if (item->type == RTE_FLOW_ITEM_TYPE_REPRESENTED_PORT) {
+				const struct rte_flow_item_ethdev *spec;
+
+				spec = (const struct rte_flow_item_ethdev *)item->spec;
+				if (spec)
+					item_port_priv =
+						mlx5_port_to_eswitch_info(spec->port_id, true);
+				break;
+			} else if (item->type == RTE_FLOW_ITEM_TYPE_PORT_REPRESENTOR) {
+				const struct rte_flow_item_ethdev *spec;
+
+				spec = (const struct rte_flow_item_ethdev *)item->spec;
+				if (spec)
+					item_port_priv =
+						mlx5_port_to_eswitch_info(spec->port_id, true);
+				break;
+			}
+		}
 		/* The representor_id is UINT16_MAX for uplink. */
-		fdb_tx = (attr->transfer && priv->representor_id != UINT16_MAX);
+		fdb_tx = (attr->transfer &&
+			  flow_source_vport_representor(priv, item_port_priv));
 		/*
 		 * When reg_c_preserve is set, metadata registers Cx preserve
 		 * their value even through packet duplication.
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index da9b65d8fe..178c9afeff 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -2118,6 +2118,25 @@ rte_col_2_mlx5_col(enum rte_color rcol)
 	return MLX5_FLOW_COLOR_UNDEFINED;
 }
 
+/**
+ * Indicates whether flow source vport is representor port.
+ *
+ * @param[in] priv
+ *   Pointer to device private context structure.
+ * @param[in] act_priv
+ *   Pointer to actual device private context structure if have.
+ *
+ * @return
+ *   True when the flow source vport is representor port, false otherwise.
+ */
+static inline bool
+flow_source_vport_representor(struct mlx5_priv *priv, struct mlx5_priv *act_priv)
+{
+	MLX5_ASSERT(priv);
+	return (!act_priv ? (priv->representor_id != UINT16_MAX) :
+		 (act_priv->representor_id != UINT16_MAX));
+}
+
 /* All types of Ethernet patterns used in control flow rules. */
 enum mlx5_flow_ctrl_rx_eth_pattern_type {
 	MLX5_FLOW_HW_CTRL_RX_ETH_PATTERN_ALL = 0,
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 1e52278191..a2b85207b1 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -2208,6 +2208,7 @@ flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
 			      const struct rte_flow_item *item,
 			      const struct rte_flow_attr *attr,
 			      uint64_t item_flags,
+			      struct mlx5_priv **act_priv,
 			      struct rte_flow_error *error)
 {
 	const struct rte_flow_item_port_id *spec = item->spec;
@@ -2266,6 +2267,7 @@ flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
 					  RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
 					  "cannot match on a port from a"
 					  " different E-Switch");
+	*act_priv = esw_priv;
 	return 0;
 }
 
@@ -2291,6 +2293,7 @@ flow_dv_validate_item_represented_port(struct rte_eth_dev *dev,
 				       const struct rte_flow_item *item,
 				       const struct rte_flow_attr *attr,
 				       uint64_t item_flags,
+				       struct mlx5_priv **act_priv,
 				       struct rte_flow_error *error)
 {
 	const struct rte_flow_item_ethdev *spec = item->spec;
@@ -2340,6 +2343,7 @@ flow_dv_validate_item_represented_port(struct rte_eth_dev *dev,
 		return rte_flow_error_set(error, EINVAL,
 					  RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
 					  "cannot match on a port from a different E-Switch");
+	*act_priv = esw_priv;
 	return 0;
 }
 
@@ -2860,30 +2864,12 @@ flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
 				 struct rte_flow_error *error)
 {
 	const struct mlx5_priv *priv = dev->data->dev_private;
-	struct mlx5_dev_ctx_shared *sh = priv->sh;
-	bool direction_error = false;
 
 	if (!priv->sh->pop_vlan_action)
 		return rte_flow_error_set(error, ENOTSUP,
 					  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 					  NULL,
 					  "pop vlan action is not supported");
-	/* Pop VLAN is not supported in egress except for CX6 FDB mode. */
-	if (attr->transfer) {
-		bool fdb_tx = priv->representor_id != UINT16_MAX;
-		bool is_cx5 = sh->steering_format_version ==
-		    MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
-
-		if (fdb_tx && is_cx5)
-			direction_error = true;
-	} else if (attr->egress) {
-		direction_error = true;
-	}
-	if (direction_error)
-		return rte_flow_error_set(error, ENOTSUP,
-					  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
-					  NULL,
-					  "pop vlan action not supported for egress");
 	if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
 		return rte_flow_error_set(error, ENOTSUP,
 					  RTE_FLOW_ERROR_TYPE_ACTION, action,
@@ -5794,6 +5780,7 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
 			       const struct rte_flow_action_count **count,
 			       int *fdb_mirror_limit,
 			       bool root,
+			       struct mlx5_priv *act_priv,
 			       struct rte_flow_error *error)
 {
 	struct mlx5_priv *priv = dev->data->dev_private;
@@ -5982,7 +5969,7 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
 						  "E-Switch must has a dest "
 						  "port for mirroring");
 		if (!priv->sh->cdev->config.hca_attr.reg_c_preserve &&
-		     priv->representor_id != UINT16_MAX)
+		     flow_source_vport_representor(priv, act_priv))
 			*fdb_mirror_limit = 1;
 	}
 	/* Continue validation for Xcap actions.*/
@@ -7134,6 +7121,7 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
 	uint32_t tag_id = 0;
 	const struct rte_flow_action_age *non_shared_age = NULL;
 	const struct rte_flow_action_count *count = NULL;
+	struct mlx5_priv *act_priv = NULL;
 
 	if (items == NULL)
 		return -1;
@@ -7183,7 +7171,7 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
 			break;
 		case RTE_FLOW_ITEM_TYPE_PORT_ID:
 			ret = flow_dv_validate_item_port_id
-					(dev, items, attr, item_flags, error);
+					(dev, items, attr, item_flags, &act_priv, error);
 			if (ret < 0)
 				return ret;
 			last_item = MLX5_FLOW_ITEM_PORT_ID;
@@ -7192,7 +7180,7 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
 		case RTE_FLOW_ITEM_TYPE_REPRESENTED_PORT:
 		case RTE_FLOW_ITEM_TYPE_PORT_REPRESENTOR:
 			ret = flow_dv_validate_item_represented_port
-					(dev, items, attr, item_flags, error);
+					(dev, items, attr, item_flags, &act_priv, error);
 			if (ret < 0)
 				return ret;
 			last_item = MLX5_FLOW_ITEM_REPRESENTED_PORT;
@@ -8070,6 +8058,7 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
 							     &sample_count,
 							     &fdb_mirror_limit,
 							     is_root,
+							     act_priv,
 							     error);
 			if (ret < 0)
 				return ret;
@@ -8246,7 +8235,7 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
 			bool direction_error = false;
 
 			if (attr->transfer) {
-				bool fdb_tx = priv->representor_id != UINT16_MAX;
+				bool fdb_tx = flow_source_vport_representor(priv, act_priv);
 				bool is_cx5 = sh->steering_format_version ==
 				    MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
 
@@ -8278,6 +8267,27 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
 						 "multiple VLAN actions");
 		}
 	}
+	/* Pop VLAN is not supported in egress except for NICs newer than CX5. */
+	if (action_flags & MLX5_FLOW_ACTION_OF_POP_VLAN) {
+		struct mlx5_dev_ctx_shared *sh = priv->sh;
+		bool direction_error = false;
+
+		if (attr->transfer) {
+			bool fdb_tx = flow_source_vport_representor(priv, act_priv);
+			bool is_cx5 = sh->steering_format_version ==
+					MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
+
+			if (fdb_tx && is_cx5)
+				direction_error = true;
+		} else if (attr->egress) {
+			direction_error = true;
+		}
+		if (direction_error)
+			return rte_flow_error_set(error, ENOTSUP,
+						RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
+						NULL,
+						"pop vlan action not supported for egress");
+	}
 	if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
 		if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
 			~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
@@ -8396,6 +8406,7 @@ flow_dv_prepare(struct rte_eth_dev *dev,
 	wks->skip_matcher_reg = 0;
 	wks->policy = NULL;
 	wks->final_policy = NULL;
+	wks->vport_meta_tag = 0;
 	/* In case of corrupting the memory. */
 	if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
 		rte_flow_error_set(error, ENOSPC,
@@ -10081,10 +10092,12 @@ flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *key,
 {
 	const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
 	const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
+	struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
 	struct mlx5_priv *priv;
 	uint16_t mask, id;
 	uint32_t vport_meta;
 
+	MLX5_ASSERT(wks);
 	if (pid_v && pid_v->id == MLX5_PORT_ESW_MGR) {
 		flow_dv_translate_item_source_vport(key,
 				key_type & MLX5_SET_MATCHER_V ?
@@ -10102,6 +10115,7 @@ flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *key,
 	} else {
 		id = priv->vport_id;
 		vport_meta = priv->vport_meta_tag;
+		wks->vport_meta_tag = vport_meta;
 	}
 	/*
 	 * Translate to vport field or to metadata, depending on mode.
@@ -12273,6 +12287,9 @@ flow_dv_translate_action_sample(struct rte_eth_dev *dev,
 			uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
 			uint64_t set_action;
 		} action_ctx = { .set_action = 0 };
+		uint32_t vport_meta_tag = wks->vport_meta_tag ?
+					  wks->vport_meta_tag :
+					  priv->vport_meta_tag;
 
 		res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
 		MLX5_SET(set_action_in, action_ctx.action_in, action_type,
@@ -12280,7 +12297,7 @@ flow_dv_translate_action_sample(struct rte_eth_dev *dev,
 		MLX5_SET(set_action_in, action_ctx.action_in, field,
 			 MLX5_MODI_META_REG_C_0);
 		MLX5_SET(set_action_in, action_ctx.action_in, data,
-			 priv->vport_meta_tag);
+			 vport_meta_tag);
 		res->set_action = action_ctx.set_action;
 	} else if (attr->ingress) {
 		res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
-- 
2.18.1


^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PATCH 2/2] net/mlx5: fix mirror flow validation with ASO action
  2022-11-02 13:44 [PATCH 0/2] net/mlx5: fix some sample/mirror issues Jiawei Wang
  2022-11-02 13:44 ` [PATCH 1/2] net/mlx5: fix flow source port checking in sample flow rule Jiawei Wang
@ 2022-11-02 13:44 ` Jiawei Wang
  2022-11-03 11:41 ` [PATCH 0/2] net/mlx5: fix some sample/mirror issues Raslan Darawsheh
  2 siblings, 0 replies; 4+ messages in thread
From: Jiawei Wang @ 2022-11-02 13:44 UTC (permalink / raw)
  To: viacheslavo, matan, Dekel Peled; +Cc: dev, rasland, stable

While the ASO action(AGE, CT) with the sample action in the one
E-switch mirror flow, due to hardware limitation, the ASO action
after the sample action was not supported.

This patch adds the checking for this validation and reject the flows
with aso action after sample.

Fixes: f935ed4b645a ("net/mlx5: support flow hit action for aging")
Cc: stable@dpdk.org

Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_dv.c | 53 ++++++++++++++++++++-------------
 1 file changed, 32 insertions(+), 21 deletions(-)

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index a2b85207b1..eabedfac17 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -5759,8 +5759,8 @@ flow_dv_modify_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
  *   Pointer to the RSS action in sample action list.
  * @param[out] count
  *   Pointer to the COUNT action in sample action list.
- * @param[out] fdb_mirror_limit
- *   Pointer to the FDB mirror limitation flag.
+ * @param[out] fdb_mirror
+ *   Pointer to the FDB mirror flag.
  * @param root
  *   Whether action is on root table.
  * @param[out] error
@@ -5778,9 +5778,8 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
 			       const struct rte_flow_action_rss *rss,
 			       const struct rte_flow_action_rss **sample_rss,
 			       const struct rte_flow_action_count **count,
-			       int *fdb_mirror_limit,
+			       int *fdb_mirror,
 			       bool root,
-			       struct mlx5_priv *act_priv,
 			       struct rte_flow_error *error)
 {
 	struct mlx5_priv *priv = dev->data->dev_private;
@@ -5968,9 +5967,7 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
 						  NULL,
 						  "E-Switch must has a dest "
 						  "port for mirroring");
-		if (!priv->sh->cdev->config.hca_attr.reg_c_preserve &&
-		     flow_source_vport_representor(priv, act_priv))
-			*fdb_mirror_limit = 1;
+		*fdb_mirror = 1;
 	}
 	/* Continue validation for Xcap actions.*/
 	if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
@@ -7056,7 +7053,7 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
 	uint16_t ether_type = 0;
 	int actions_n = 0;
 	uint8_t item_ipv6_proto = 0;
-	int fdb_mirror_limit = 0;
+	int fdb_mirror = 0;
 	int modify_after_mirror = 0;
 	const struct rte_flow_item *geneve_item = NULL;
 	const struct rte_flow_item *gre_item = NULL;
@@ -7122,6 +7119,7 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
 	const struct rte_flow_action_age *non_shared_age = NULL;
 	const struct rte_flow_action_count *count = NULL;
 	struct mlx5_priv *act_priv = NULL;
+	int aso_after_sample = 0;
 
 	if (items == NULL)
 		return -1;
@@ -7902,12 +7900,6 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
 							   error);
 			if (ret)
 				return ret;
-			if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
-			    fdb_mirror_limit)
-				return rte_flow_error_set(error, EINVAL,
-						  RTE_FLOW_ERROR_TYPE_ACTION,
-						  NULL,
-						  "sample and jump action combination is not supported");
 			++actions_n;
 			action_flags |= MLX5_FLOW_ACTION_JUMP;
 			break;
@@ -7987,6 +7979,8 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
 						   RTE_FLOW_ERROR_TYPE_ACTION,
 						   NULL,
 						   "duplicate age actions set");
+			if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
+				aso_after_sample = 1;
 			action_flags |= MLX5_FLOW_ACTION_AGE;
 			++actions_n;
 			break;
@@ -8014,6 +8008,9 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
 						RTE_FLOW_ERROR_TYPE_ACTION,
 						NULL,
 						"old age action and count must be in the same sub flow");
+			} else {
+				if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
+					aso_after_sample = 1;
 			}
 			action_flags |= MLX5_FLOW_ACTION_AGE;
 			++actions_n;
@@ -8056,9 +8053,8 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
 							     attr, item_flags,
 							     rss, &sample_rss,
 							     &sample_count,
-							     &fdb_mirror_limit,
+							     &fdb_mirror,
 							     is_root,
-							     act_priv,
 							     error);
 			if (ret < 0)
 				return ret;
@@ -8093,6 +8089,8 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
 							     is_root, error);
 			if (ret < 0)
 				return ret;
+			if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
+				aso_after_sample = 1;
 			action_flags |= MLX5_FLOW_ACTION_CT;
 			break;
 		case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
@@ -8350,11 +8348,24 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
 					  NULL, "too many header modify"
 					  " actions to support");
 	}
-	/* Eswitch egress mirror and modify flow has limitation on CX5 */
-	if (fdb_mirror_limit && modify_after_mirror)
-		return rte_flow_error_set(error, EINVAL,
-				RTE_FLOW_ERROR_TYPE_ACTION, NULL,
-				"sample before modify action is not supported");
+	if (fdb_mirror) {
+		if (!priv->sh->cdev->config.hca_attr.reg_c_preserve &&
+		    flow_source_vport_representor(priv, act_priv)) {
+			/* Eswitch egress mirror and modify flow has limitation on CX5 */
+			if (modify_after_mirror)
+				return rte_flow_error_set(error, EINVAL,
+						RTE_FLOW_ERROR_TYPE_ACTION, NULL,
+						"sample before modify action is not supported");
+			if (action_flags & MLX5_FLOW_ACTION_JUMP)
+				return rte_flow_error_set(error, EINVAL,
+							RTE_FLOW_ERROR_TYPE_ACTION, NULL,
+							"sample and jump action combination is not supported");
+		}
+		if (aso_mask > 0 && aso_after_sample && fdb_mirror)
+			return rte_flow_error_set(error, ENOTSUP,
+						  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
+						  "sample before ASO action is not supported");
+	}
 	/*
 	 * Validation the NIC Egress flow on representor, except implicit
 	 * hairpin default egress flow with TX_QUEUE item, other flows not
-- 
2.18.1


^ permalink raw reply	[flat|nested] 4+ messages in thread

* RE: [PATCH 0/2] net/mlx5: fix some sample/mirror issues
  2022-11-02 13:44 [PATCH 0/2] net/mlx5: fix some sample/mirror issues Jiawei Wang
  2022-11-02 13:44 ` [PATCH 1/2] net/mlx5: fix flow source port checking in sample flow rule Jiawei Wang
  2022-11-02 13:44 ` [PATCH 2/2] net/mlx5: fix mirror flow validation with ASO action Jiawei Wang
@ 2022-11-03 11:41 ` Raslan Darawsheh
  2 siblings, 0 replies; 4+ messages in thread
From: Raslan Darawsheh @ 2022-11-03 11:41 UTC (permalink / raw)
  To: Jiawei(Jonny) Wang, Slava Ovsiienko, Matan Azrad; +Cc: dev


Hi,

> -----Original Message-----
> From: Jiawei(Jonny) Wang <jiaweiw@nvidia.com>
> Sent: Wednesday, November 2, 2022 3:44 PM
> To: Slava Ovsiienko <viacheslavo@nvidia.com>; Matan Azrad
> <matan@nvidia.com>
> Cc: dev@dpdk.org; Raslan Darawsheh <rasland@nvidia.com>
> Subject: [PATCH 0/2] net/mlx5: fix some sample/mirror issues
> 
> Some fixes for sample/mirror issues.
> 
> Jiawei Wang (2):
>   net/mlx5: fix flow source port checking in sample flow rule
>   net/mlx5: fix mirror flow validation with ASO action
> 
>  drivers/net/mlx5/mlx5_flow.c    |  55 +++++++++++++---
>  drivers/net/mlx5/mlx5_flow.h    |  19 ++++++
>  drivers/net/mlx5/mlx5_flow_dv.c | 110 ++++++++++++++++++++------------
>  3 files changed, 133 insertions(+), 51 deletions(-)
> 
> --
> 2.18.1
Series applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2022-11-03 11:41 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-11-02 13:44 [PATCH 0/2] net/mlx5: fix some sample/mirror issues Jiawei Wang
2022-11-02 13:44 ` [PATCH 1/2] net/mlx5: fix flow source port checking in sample flow rule Jiawei Wang
2022-11-02 13:44 ` [PATCH 2/2] net/mlx5: fix mirror flow validation with ASO action Jiawei Wang
2022-11-03 11:41 ` [PATCH 0/2] net/mlx5: fix some sample/mirror issues Raslan Darawsheh

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).