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From: Mingjin Ye <mingjinx.ye@intel.com>
To: dev@dpdk.org
Cc: stable@dpdk.org, yidingx.zhou@intel.com,
	Mingjin Ye <mingjinx.ye@intel.com>,
	Yuying Zhang <Yuying.Zhang@intel.com>,
	Beilei Xing <beilei.xing@intel.com>,
	Alvin Zhang <alvinx.zhang@intel.com>,
	Qi Zhang <qi.z.zhang@intel.com>
Subject: [PATCH] net/i40e: fix PCTYPE configuration for X722
Date: Thu,  3 Nov 2022 16:57:15 +0000	[thread overview]
Message-ID: <20221103165715.388374-1-mingjinx.ye@intel.com> (raw)

To make X722's PCTYPE is compatible with X710, the PCTYPE in the
FD programming descriptor is translated into different types by using
GLQF_FD_PCTYPE table. But the types of 'UNICAST_IPV4_UDP'
and 'MULTICAST_IPV4_UDP' are only supported for X722, so that
the corresponding registers can not be configured after translation.

This patch removes the transition before the FD filter is programmed.

Fixes: ef4c16fd9148 ("net/i40e: refactor RSS flow")
Cc: stable@dpdk.org

Signed-off-by: Mingjin Ye <mingjinx.ye@intel.com>
---
 drivers/net/i40e/i40e_hash.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/drivers/net/i40e/i40e_hash.c b/drivers/net/i40e/i40e_hash.c
index a1ff85fceb..0c84818977 100644
--- a/drivers/net/i40e/i40e_hash.c
+++ b/drivers/net/i40e/i40e_hash.c
@@ -659,10 +659,6 @@ i40e_hash_config_pctype_symmetric(struct i40e_hw *hw,
 	struct i40e_pf *pf = &((struct i40e_adapter *)hw->back)->pf;
 	uint32_t reg;
 
-	/* For X722, get translated pctype in fd pctype register */
-	if (hw->mac.type == I40E_MAC_X722)
-		pctype = i40e_read_rx_ctl(hw, I40E_GLQF_FD_PCTYPES(pctype));
-
 	reg = i40e_read_rx_ctl(hw, I40E_GLQF_HSYM(pctype));
 	if (symmetric) {
 		if (reg & I40E_GLQF_HSYM_SYMH_ENA_MASK)
-- 
2.34.1


             reply	other threads:[~2022-11-03  9:10 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-03 16:57 Mingjin Ye [this message]
2022-11-09  1:35 ` Chen, LingliX
2022-11-09  2:28   ` Zhang, Qi Z

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