From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 88EEEA00C2; Thu, 3 Nov 2022 10:10:34 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2333741143; Thu, 3 Nov 2022 10:10:33 +0100 (CET) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by mails.dpdk.org (Postfix) with ESMTP id 4F6C040693; Thu, 3 Nov 2022 10:10:30 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667466630; x=1699002630; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=3OM4vWsZ1pImNihkgNwsquqZnhq0wLhq9+dvCAiXjhc=; b=LAvafOpMm3taScmWaVRGA/9jCEgQ2LpVpKksckuT4mK5D1ZVSt+CqtRe XR96ul5eLNcQWa6oLdxYf1yIeptiwggHU6zE+237mB6rBubehEcoBwWqe 9elI+VGUWI72dd6Ty+FvcnrBcH/awIMcYzBOyUtTYKMiZI3oVe4lm0OYM 4lm52WFrzZHCgYBZwkwvIeIxQt9WdGzEEDubR5rxZAFGuxyHo7zmpyMzg MpvI/HvplRGOeDouQrvW2BFKMJYMzLKOypAwcbj/sSDeBb+VhH4XeAvdo NyklQFd2VFhVdOgkrLimSp/BmnIKonLzTO5LjK+5p31zC13YHh53oVXxd Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="371731421" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="371731421" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Nov 2022 02:10:29 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="667897839" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="667897839" Received: from unknown (HELO yemj..) ([10.239.252.253]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Nov 2022 02:10:23 -0700 From: Mingjin Ye To: dev@dpdk.org Cc: stable@dpdk.org, yidingx.zhou@intel.com, Mingjin Ye , Yuying Zhang , Beilei Xing , Alvin Zhang , Qi Zhang Subject: [PATCH] net/i40e: fix PCTYPE configuration for X722 Date: Thu, 3 Nov 2022 16:57:15 +0000 Message-Id: <20221103165715.388374-1-mingjinx.ye@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org To make X722's PCTYPE is compatible with X710, the PCTYPE in the FD programming descriptor is translated into different types by using GLQF_FD_PCTYPE table. But the types of 'UNICAST_IPV4_UDP' and 'MULTICAST_IPV4_UDP' are only supported for X722, so that the corresponding registers can not be configured after translation. This patch removes the transition before the FD filter is programmed. Fixes: ef4c16fd9148 ("net/i40e: refactor RSS flow") Cc: stable@dpdk.org Signed-off-by: Mingjin Ye --- drivers/net/i40e/i40e_hash.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/net/i40e/i40e_hash.c b/drivers/net/i40e/i40e_hash.c index a1ff85fceb..0c84818977 100644 --- a/drivers/net/i40e/i40e_hash.c +++ b/drivers/net/i40e/i40e_hash.c @@ -659,10 +659,6 @@ i40e_hash_config_pctype_symmetric(struct i40e_hw *hw, struct i40e_pf *pf = &((struct i40e_adapter *)hw->back)->pf; uint32_t reg; - /* For X722, get translated pctype in fd pctype register */ - if (hw->mac.type == I40E_MAC_X722) - pctype = i40e_read_rx_ctl(hw, I40E_GLQF_FD_PCTYPES(pctype)); - reg = i40e_read_rx_ctl(hw, I40E_GLQF_HSYM(pctype)); if (symmetric) { if (reg & I40E_GLQF_HSYM_SYMH_ENA_MASK) -- 2.34.1