From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D1D14A0547; Tue, 15 Nov 2022 21:00:20 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9B9E542D17; Tue, 15 Nov 2022 21:00:08 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mails.dpdk.org (Postfix) with ESMTP id 66D2940F18 for ; Tue, 15 Nov 2022 21:00:06 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668542406; x=1700078406; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=P99oTIuOJgKzqbPzjfA4tcfKv3t3+axMX11REwOGJnM=; b=SoDkQHprCwWZNnWDe/554i/8dgaiMcJFsE/YILkCKCtDR56cCG9E05wa JCkiTkNugNF8Gj7dQFLbnP+0MDVki41HnPCPFbylDShumlE5AAYMTk7IU 218A19TqoKHtI2hV5aQMnbc+waMy+PkoVAVYkusIXUzcyZFz4s5jae6uR iYPpDmmgnxMf2Mlc5LdeefgkmrBJS1Sx6wF7CgX9y6euN0CHyGgwY8qHF nmQkR8iKTXqE+oRV8Ybudm5CL5MkLPY8q+AL+/MAloI8m4rGgyJi3UPOZ TzM0rU22/znU+aNy3DB5YxZw6F2W5tNN2uUKnf1NoCs8rBGom8TbkzSJt A==; X-IronPort-AV: E=McAfee;i="6500,9779,10532"; a="299880973" X-IronPort-AV: E=Sophos;i="5.96,166,1665471600"; d="scan'208";a="299880973" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Nov 2022 11:59:49 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10532"; a="702570274" X-IronPort-AV: E=Sophos;i="5.96,166,1665471600"; d="scan'208";a="702570274" Received: from unknown (HELO icx-npg-scs1-cp1.localdomain) ([10.233.180.245]) by fmsmga008.fm.intel.com with ESMTP; 15 Nov 2022 11:59:48 -0800 From: Nicolas Chautru To: dev@dpdk.org, thomas@monjalon.net, gakhil@marvell.com Cc: maxime.coquelin@redhat.com, hernan.vargas@intel.com, Nicolas Chautru Subject: [PATCH v2 2/2] doc: simplify the binding steps Date: Tue, 15 Nov 2022 11:59:14 -0800 Message-Id: <20221115195914.34700-3-nicolas.chautru@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20221115195914.34700-1-nicolas.chautru@intel.com> References: <20221115195914.34700-1-nicolas.chautru@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The steps for binding to kernel modules which are generic are now only implicit and pointing towards common documentation. Signed-off-by: Nicolas Chautru --- doc/guides/bbdevs/acc100.rst | 90 +++------------- doc/guides/bbdevs/acc200.rst | 92 +++------------- doc/guides/bbdevs/fpga_5gnr_fec.rst | 157 +++------------------------- doc/guides/bbdevs/fpga_lte_fec.rst | 157 +++------------------------- 4 files changed, 62 insertions(+), 434 deletions(-) diff --git a/doc/guides/bbdevs/acc100.rst b/doc/guides/bbdevs/acc100.rst index 8a275dcdd4..9aefc5cc63 100644 --- a/doc/guides/bbdevs/acc100.rst +++ b/doc/guides/bbdevs/acc100.rst @@ -101,90 +101,29 @@ commands for ACC100 and ACC101 respectively: sudo lspci -vd8086:0d5c sudo lspci -vd8086:57c4 -The physical and virtual functions are compatible with Linux UIO drivers: -``vfio`` and ``igb_uio``. However, in order to work the 5G/4G -FEC device first needs to be bound to one of these linux drivers through DPDK. +Binding and Virtual Functions enablement +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -Bind PF UIO driver(s) -~~~~~~~~~~~~~~~~~~~~~ +The PMD relies on kernel modules to interface with the device: both UIO and VFIO kernel modules +are supported. +See :ref:`linux_gsg_binding_kernel` section for more details, notably with regards to +generic kernel modules binding and VF enablement. +More details on usage model is captured in the :ref:`pf_bb_config_acc100` section. -Install the DPDK igb_uio driver, bind it with the PF PCI device ID and use -``lspci`` to confirm the PF device is under use by ``igb_uio`` DPDK UIO driver. +Device configuration +~~~~~~~~~~~~~~~~~~~~ -The igb_uio driver may be bound to the PF PCI device using one of two methods for ACC100 -(for ACC101 the device id ``57c4`` should be used in lieu of ``0d5c``): - - -1. PCI functions (physical or virtual, depending on the use case) can be bound to -the UIO driver by repeating this command for every function. - -.. code-block:: console - - cd - insmod ./build/kmod/igb_uio.ko - echo "8086 0d5c" > /sys/bus/pci/drivers/igb_uio/new_id - lspci -vd8086:0d5c - - -2. Another way to bind PF with DPDK UIO driver is by using the ``dpdk-devbind.py`` tool - -.. code-block:: console - - cd - ./usertools/dpdk-devbind.py -b igb_uio 0000:06:00.0 - -where the PCI device ID (example: 0000:06:00.0) is obtained using lspci -vd8086:0d5c - - -In a similar way the 5G/4G FEC PF may be bound with vfio-pci as any PCIe device. - - -Enable Virtual Functions -~~~~~~~~~~~~~~~~~~~~~~~~ - -Now, it should be visible in the printouts that PCI PF is under igb_uio control -"``Kernel driver in use: igb_uio``" - -To show the number of available VFs on the device, read ``sriov_totalvfs`` file.. - -.. code-block:: console - - cat /sys/bus/pci/devices/0000\:\:./sriov_totalvfs - - where 0000\:\:. is the PCI device ID - - -To enable VFs via igb_uio, echo the number of virtual functions intended to -enable to ``max_vfs`` file.. - -.. code-block:: console - - echo > /sys/bus/pci/devices/0000\:\:./max_vfs - - -Afterwards, all VFs must be bound to appropriate UIO drivers as required, same -way it was done with the physical function previously. - -Enabling SR-IOV via vfio driver is pretty much the same, except that the file -name is different: - -.. code-block:: console - - echo > /sys/bus/pci/devices/0000\:\:./sriov_numvfs - - -Configure the VFs through PF -~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - -The PCI virtual functions must be configured before working or getting assigned -to VMs/Containers. The configuration involves allocating the number of hardware +The device must be configured to work properly. +The configuration involves allocating the number of hardware queues, priorities, load balance, bandwidth and other settings necessary for the device to perform FEC functions. This configuration needs to be executed at least once after reboot or PCI FLR and can -be achieved by using the functions ``rte_acc10x_configure()``, +be achieved by either using ``pf_bb_config`` or the function ``rte_acc10x_configure()``, which sets up the parameters defined in the compatible ``acc100_conf`` structure. +This is the method used in the bbdev-test test application. + Test Application ---------------- @@ -231,6 +170,7 @@ a range of additional tests under the test_vectors folder, which may be useful. of these tests will depend on the device 5G/4G FEC capabilities which may cause some testcases to be skipped, but no failure should be reported. +.. _pf_bb_config_acc100: Alternate Baseband Device configuration tool ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ diff --git a/doc/guides/bbdevs/acc200.rst b/doc/guides/bbdevs/acc200.rst index 012b3870a8..d1cc96f894 100644 --- a/doc/guides/bbdevs/acc200.rst +++ b/doc/guides/bbdevs/acc200.rst @@ -110,87 +110,28 @@ can be listed through these commands for ACC200: sudo lspci -vd8086:57c0 -The physical and virtual functions are compatible with Linux UIO drivers: -``vfio`` and ``igb_uio``. -However, in order to work the 5G/4G FEC device first needs to be bound -to one of these Linux drivers through DPDK. +Binding and Virtual Functions enablement +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -Bind PF UIO driver(s) -~~~~~~~~~~~~~~~~~~~~~ +The PMD relies on kernel modules to interface with the device: both UIO and VFIO kernel modules +are supported. +See :ref:`linux_gsg_binding_kernel` section for more details, notably with regards to +generic kernel modules binding and VF enablement. +More details on usage model is captured in the :ref:`pf_bb_config_acc200` section. -Install the DPDK igb_uio driver, bind it with the PF PCI device ID and use -``lspci`` to confirm the PF device is under use by ``igb_uio`` DPDK UIO driver. +Device configuration +~~~~~~~~~~~~~~~~~~~~ -The igb_uio driver may be bound to the PF PCI device using one of two methods -for ACC200: +The device must be configured to work properly. +The configuration involves allocating the number of hardware +queues, priorities, load balance, bandwidth and other settings necessary for the +device to perform FEC functions. -#. PCI functions (physical or virtual, depending on the use case) can be bound -to the UIO driver by repeating this command for every function. - -.. code-block:: console - - cd - insmod build/kmod/igb_uio.ko - echo "8086 57c0" > /sys/bus/pci/drivers/igb_uio/new_id - lspci -vd8086:57c0 - -#. Another way to bind PF with DPDK UIO driver is by using the ``dpdk-devbind.py`` tool - -.. code-block:: console - - cd - usertools/dpdk-devbind.py -b igb_uio 0000:f7:00.0 - -where the PCI device ID (example: 0000:f7:00.0) is obtained using ``lspci -vd8086:57c0``. - -In a similar way the PF may be bound with vfio-pci as any PCIe device. - - -Enable Virtual Functions -~~~~~~~~~~~~~~~~~~~~~~~~ - -Now, it should be visible in the printouts that PCI PF is under igb_uio control -"``Kernel driver in use: igb_uio``" - -To show the number of available VFs on the device, read ``sriov_totalvfs`` file. - -.. code-block:: console - - cat /sys/bus/pci/devices/0000\:\:./sriov_totalvfs - -where ``0000\:\:.`` is the PCI device ID - -To enable VFs via igb_uio, echo the number of virtual functions intended -to enable to ``max_vfs`` file. - -.. code-block:: console - - echo > /sys/bus/pci/devices/0000\:\:./max_vfs - -Afterwards, all VFs must be bound to appropriate UIO drivers as required, -same way it was done with the physical function previously. - -Enabling SR-IOV via VFIO driver is pretty much the same, -except that the file name is different: - -.. code-block:: console - - echo > /sys/bus/pci/devices/0000\:\:./sriov_numvfs - - -Configure the VFs through PF -~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - -The PCI virtual functions must be configured before working or getting assigned -to VMs/Containers. -The configuration involves allocating the number of hardware queues, priorities, -load balance, bandwidth and other settings necessary for the device -to perform FEC functions. - -This configuration needs to be executed at least once after reboot or PCI FLR -and can be achieved by using the functions ``rte_acc200_configure()``, +This configuration needs to be executed at least once after reboot or PCI FLR and can +be achieved by either using ``pf_bb_config ``or the function ``rte_acc200_configure()``, which sets up the parameters defined in the compatible ``acc200_conf`` structure. +This is the method used in the bbdev-test test application. Test Application @@ -240,6 +181,7 @@ which may be useful. The results of these tests will depend on the device capabilities which may cause some test cases to be skipped, but no failure should be reported. +.. _pf_bb_config_acc200: Alternate Baseband Device configuration tool ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ diff --git a/doc/guides/bbdevs/fpga_5gnr_fec.rst b/doc/guides/bbdevs/fpga_5gnr_fec.rst index 9d71585e9e..2524d7cdcd 100644 --- a/doc/guides/bbdevs/fpga_5gnr_fec.rst +++ b/doc/guides/bbdevs/fpga_5gnr_fec.rst @@ -71,156 +71,28 @@ When the device first powers up, its PCI Physical Functions (PF) can be listed t sudo lspci -vd8086:0d8f -The physical and virtual functions are compatible with Linux UIO drivers: -``vfio`` and ``igb_uio``. However, in order to work the FPGA 5GNR FEC device firstly needs -to be bound to one of these linux drivers through DPDK. +Binding and Virtual Functions enablement +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -Bind PF UIO driver(s) -~~~~~~~~~~~~~~~~~~~~~ +The PMD relies on kernel modules to interface with the device: both UIO and VFIO kernel modules +are supported. +See :ref:`linux_gsg_binding_kernel` section for more details, notably with regards to +generic kernel modules binding and VF enablement. +More details on usage model is captured in the :ref:`pf_bb_config_fpga_5gnr` section. -Install the DPDK igb_uio driver, bind it with the PF PCI device ID and use -``lspci`` to confirm the PF device is under use by ``igb_uio`` DPDK UIO driver. +Device configuration +~~~~~~~~~~~~~~~~~~~~ -The igb_uio driver may be bound to the PF PCI device using one of two methods: - - -1. PCI functions (physical or virtual, depending on the use case) can be bound to -the UIO driver by repeating this command for every function. - -.. code-block:: console - - insmod igb_uio.ko - echo "8086 0d8f" > /sys/bus/pci/drivers/igb_uio/new_id - lspci -vd8086:0d8f - - -2. Another way to bind PF with DPDK UIO driver is by using the ``dpdk-devbind.py`` tool - -.. code-block:: console - - cd - ./usertools/dpdk-devbind.py -b igb_uio 0000:06:00.0 - -where the PCI device ID (example: 0000:06:00.0) is obtained using lspci -vd8086:0d8f - - -In the same way the FPGA 5GNR FEC PF can be bound with vfio, but vfio driver does not -support SR-IOV configuration right out of the box, so it will need to be patched. - - -Enable Virtual Functions -~~~~~~~~~~~~~~~~~~~~~~~~ - -Now, it should be visible in the printouts that PCI PF is under igb_uio control -"``Kernel driver in use: igb_uio``" - -To show the number of available VFs on the device, read ``sriov_totalvfs`` file.. - -.. code-block:: console - - cat /sys/bus/pci/devices/0000\:\:./sriov_totalvfs - - where 0000\:\:. is the PCI device ID - - -To enable VFs via igb_uio, echo the number of virtual functions intended to -enable to ``max_vfs`` file.. - -.. code-block:: console - - echo > /sys/bus/pci/devices/0000\:\:./max_vfs - - -Afterwards, all VFs must be bound to appropriate UIO drivers as required, same -way it was done with the physical function previously. - -Enabling SR-IOV via vfio driver is pretty much the same, except that the file -name is different: - -.. code-block:: console - - echo > /sys/bus/pci/devices/0000\:\:./sriov_numvfs - - -Configure the VFs through PF -~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - -The PCI virtual functions must be configured before working or getting assigned -to VMs/Containers. The configuration involves allocating the number of hardware +The device must be configured to work properly. +The configuration involves allocating the number of hardware queues, priorities, load balance, bandwidth and other settings necessary for the device to perform FEC functions. This configuration needs to be executed at least once after reboot or PCI FLR and can -be achieved by using the function ``rte_fpga_5gnr_fec_configure()``, which sets up the -parameters defined in ``rte_fpga_5gnr_fec_conf`` structure: - -.. code-block:: c - - struct rte_fpga_5gnr_fec_conf { - bool pf_mode_en; - uint8_t vf_ul_queues_number[FPGA_5GNR_FEC_NUM_VFS]; - uint8_t vf_dl_queues_number[FPGA_5GNR_FEC_NUM_VFS]; - uint8_t ul_bandwidth; - uint8_t dl_bandwidth; - uint8_t ul_load_balance; - uint8_t dl_load_balance; - uint16_t flr_time_out; - }; - -- ``pf_mode_en``: identifies whether only PF is to be used, or the VFs. PF and - VFs are mutually exclusive and cannot run simultaneously. - Set to 1 for PF mode enabled. - If PF mode is enabled all queues available in the device are assigned - exclusively to PF and 0 queues given to VFs. - -- ``vf_*l_queues_number``: defines the hardware queue mapping for every VF. - -- ``*l_bandwidth``: in case of congestion on PCIe interface. The device - allocates different bandwidth to UL and DL. The weight is configured by this - setting. The unit of weight is 3 code blocks. For example, if the code block - cbps (code block per second) ratio between UL and DL is 12:1, then the - configuration value should be set to 36:3. The schedule algorithm is based - on code block regardless the length of each block. - -- ``*l_load_balance``: hardware queues are load-balanced in a round-robin - fashion. Queues get filled first-in first-out until they reach a pre-defined - watermark level, if exceeded, they won't get assigned new code blocks.. - This watermark is defined by this setting. - - If all hardware queues exceeds the watermark, no code blocks will be - streamed in from UL/DL code block FIFO. - -- ``flr_time_out``: specifies how many 16.384us to be FLR time out. The - time_out = flr_time_out x 16.384us. For instance, if you want to set 10ms for - the FLR time out then set this setting to 0x262=610. - - -An example configuration code calling the function ``rte_fpga_5gnr_fec_configure()`` is shown -below: - -.. code-block:: c - - struct rte_fpga_5gnr_fec_conf conf; - unsigned int i; - - memset(&conf, 0, sizeof(struct rte_fpga_5gnr_fec_conf)); - conf.pf_mode_en = 1; - - for (i = 0; i < FPGA_5GNR_FEC_NUM_VFS; ++i) { - conf.vf_ul_queues_number[i] = 4; - conf.vf_dl_queues_number[i] = 4; - } - conf.ul_bandwidth = 12; - conf.dl_bandwidth = 5; - conf.dl_load_balance = 64; - conf.ul_load_balance = 64; - - /* setup FPGA PF */ - ret = rte_fpga_5gnr_fec_configure(info->dev_name, &conf); - TEST_ASSERT_SUCCESS(ret, - "Failed to configure 4G FPGA PF for bbdev %s", - info->dev_name); +be achieved by either using ``pf_bb_config`` or the function ``rte_fpga_5gnr_fec_configure()``, +which sets up the parameters defined in the compatible ``rte_fpga_5gnr_fec_conf`` structure. +This is the method used in the bbdev-test test application. Test Application @@ -273,6 +145,7 @@ In addition to the simple LDPC decoder and LDPC encoder tests, bbdev also provid a range of additional tests under the test_vectors folder, which may be useful. The results of these tests will depend on the FPGA 5GNR FEC capabilities. +.. _pf_bb_config_fpga_5gnr: Alternate Baseband Device configuration tool ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ diff --git a/doc/guides/bbdevs/fpga_lte_fec.rst b/doc/guides/bbdevs/fpga_lte_fec.rst index c3379c24e3..505b429f3a 100644 --- a/doc/guides/bbdevs/fpga_lte_fec.rst +++ b/doc/guides/bbdevs/fpga_lte_fec.rst @@ -70,156 +70,28 @@ When the device first powers up, its PCI Physical Functions (PF) can be listed t sudo lspci -vd1172:5052 -The physical and virtual functions are compatible with Linux UIO drivers: -``vfio`` and ``igb_uio``. However, in order to work the FPGA LTE FEC device firstly needs -to be bound to one of these linux drivers through DPDK. +Binding and Virtual Functions enablement +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -Bind PF UIO driver(s) -~~~~~~~~~~~~~~~~~~~~~ +The PMD relies on kernel modules to interface with the device: both UIO and VFIO kernel modules +are supported. +See :ref:`linux_gsg_binding_kernel` section for more details, notably with regards to +generic kernel modules binding and VF enablement. +More details on usage model is captured in the :ref:`pf_bb_config_fpga_lte` section. -Install the DPDK igb_uio driver, bind it with the PF PCI device ID and use -``lspci`` to confirm the PF device is under use by ``igb_uio`` DPDK UIO driver. +Device configuration +~~~~~~~~~~~~~~~~~~~~ -The igb_uio driver may be bound to the PF PCI device using one of two methods: - - -1. PCI functions (physical or virtual, depending on the use case) can be bound to -the UIO driver by repeating this command for every function. - -.. code-block:: console - - insmod igb_uio.ko - echo "1172 5052" > /sys/bus/pci/drivers/igb_uio/new_id - lspci -vd1172: - - -2. Another way to bind PF with DPDK UIO driver is by using the ``dpdk-devbind.py`` tool - -.. code-block:: console - - cd - ./usertools/dpdk-devbind.py -b igb_uio 0000:06:00.0 - -where the PCI device ID (example: 0000:06:00.0) is obtained using lspci -vd1172: - - -In the same way the FPGA LTE FEC PF can be bound with vfio, but vfio driver does not -support SR-IOV configuration right out of the box, so it will need to be patched. - - -Enable Virtual Functions -~~~~~~~~~~~~~~~~~~~~~~~~ - -Now, it should be visible in the printouts that PCI PF is under igb_uio control -"``Kernel driver in use: igb_uio``" - -To show the number of available VFs on the device, read ``sriov_totalvfs`` file.. - -.. code-block:: console - - cat /sys/bus/pci/devices/0000\:\:./sriov_totalvfs - - where 0000\:\:. is the PCI device ID - - -To enable VFs via igb_uio, echo the number of virtual functions intended to -enable to ``max_vfs`` file.. - -.. code-block:: console - - echo > /sys/bus/pci/devices/0000\:\:./max_vfs - - -Afterwards, all VFs must be bound to appropriate UIO drivers as required, same -way it was done with the physical function previously. - -Enabling SR-IOV via vfio driver is pretty much the same, except that the file -name is different: - -.. code-block:: console - - echo > /sys/bus/pci/devices/0000\:\:./sriov_numvfs - - -Configure the VFs through PF -~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - -The PCI virtual functions must be configured before working or getting assigned -to VMs/Containers. The configuration involves allocating the number of hardware +The device must be configured to work properly. +The configuration involves allocating the number of hardware queues, priorities, load balance, bandwidth and other settings necessary for the device to perform FEC functions. This configuration needs to be executed at least once after reboot or PCI FLR and can -be achieved by using the function ``rte_fpga_lte_fec_configure()``, which sets up the -parameters defined in ``rte_fpga_lte_fec_conf`` structure: - -.. code-block:: c - - struct rte_fpga_lte_fec_conf { - bool pf_mode_en; - uint8_t vf_ul_queues_number[FPGA_LTE_FEC_NUM_VFS]; - uint8_t vf_dl_queues_number[FPGA_LTE_FEC_NUM_VFS]; - uint8_t ul_bandwidth; - uint8_t dl_bandwidth; - uint8_t ul_load_balance; - uint8_t dl_load_balance; - uint16_t flr_time_out; - }; - -- ``pf_mode_en``: identifies whether only PF is to be used, or the VFs. PF and - VFs are mutually exclusive and cannot run simultaneously. - Set to 1 for PF mode enabled. - If PF mode is enabled all queues available in the device are assigned - exclusively to PF and 0 queues given to VFs. - -- ``vf_*l_queues_number``: defines the hardware queue mapping for every VF. - -- ``*l_bandwidth``: in case of congestion on PCIe interface. The device - allocates different bandwidth to UL and DL. The weight is configured by this - setting. The unit of weight is 3 code blocks. For example, if the code block - cbps (code block per second) ratio between UL and DL is 12:1, then the - configuration value should be set to 36:3. The schedule algorithm is based - on code block regardless the length of each block. - -- ``*l_load_balance``: hardware queues are load-balanced in a round-robin - fashion. Queues get filled first-in first-out until they reach a pre-defined - watermark level, if exceeded, they won't get assigned new code blocks.. - This watermark is defined by this setting. - - If all hardware queues exceeds the watermark, no code blocks will be - streamed in from UL/DL code block FIFO. - -- ``flr_time_out``: specifies how many 16.384us to be FLR time out. The - time_out = flr_time_out x 16.384us. For instance, if you want to set 10ms for - the FLR time out then set this setting to 0x262=610. - - -An example configuration code calling the function ``rte_fpga_lte_fec_configure()`` is shown -below: - -.. code-block:: c - - struct rte_fpga_lte_fec_conf conf; - unsigned int i; - - memset(&conf, 0, sizeof(struct rte_fpga_lte_fec_conf)); - conf.pf_mode_en = 1; - - for (i = 0; i < FPGA_LTE_FEC_NUM_VFS; ++i) { - conf.vf_ul_queues_number[i] = 4; - conf.vf_dl_queues_number[i] = 4; - } - conf.ul_bandwidth = 12; - conf.dl_bandwidth = 5; - conf.dl_load_balance = 64; - conf.ul_load_balance = 64; - - /* setup FPGA PF */ - ret = rte_fpga_lte_fec_configure(info->dev_name, &conf); - TEST_ASSERT_SUCCESS(ret, - "Failed to configure 4G FPGA PF for bbdev %s", - info->dev_name); +be achieved by either using ``pf_bb_config`` or the function ``rte_fpga_lte_fec_configure()``, +which sets up the parameters defined in the compatible ``rte_fpga_lte_fec_conf`` structure. +This is the method used in the bbdev-test test application. Test Application @@ -292,6 +164,7 @@ of these tests will depend on the FPGA LTE FEC capabilities: - ``turbo_enc_c3_k4800_r2_e14412_crc24b.data`` - ``turbo_enc_c4_k4800_r2_e14412_crc24b.data`` +.. _pf_bb_config_fpga_lte: Alternate Baseband Device configuration tool ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -- 2.37.1