From: Nithin Dabilpuram <ndabilpuram@marvell.com>
To: Nithin Dabilpuram <ndabilpuram@marvell.com>,
Kiran Kumar K <kirankumark@marvell.com>,
Sunil Kumar Kori <skori@marvell.com>,
Satha Rao <skoteshwar@marvell.com>
Cc: <jerinj@marvell.com>, <dev@dpdk.org>
Subject: [PATCH 08/11] common/cnxk: use lcore LMT line for CPT context write
Date: Mon, 28 Nov 2022 15:24:39 +0530 [thread overview]
Message-ID: <20221128095442.3185112-8-ndabilpuram@marvell.com> (raw)
In-Reply-To: <20221128095442.3185112-1-ndabilpuram@marvell.com>
Use lcore LMT line for CPT context write as no one else
is using it.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
---
drivers/common/cnxk/roc_cpt.c | 3 ++-
drivers/common/cnxk/roc_io.h | 5 +++++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
index 9a90d4d853..e336edb77e 100644
--- a/drivers/common/cnxk/roc_cpt.c
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -1020,7 +1020,8 @@ roc_cpt_ctx_write(struct roc_cpt_lf *lf, void *sa_dptr, void *sa_cptr,
uint64_t *dptr;
int i;
- ROC_LMT_CPT_BASE_ID_GET(lmt_base, lmt_id);
+ /* Use this lcore's LMT line as no one else is using it */
+ ROC_LMT_BASE_ID_GET(lmt_base, lmt_id);
inst = (struct cpt_inst_s *)lmt_base;
memset(inst, 0, sizeof(struct cpt_inst_s));
diff --git a/drivers/common/cnxk/roc_io.h b/drivers/common/cnxk/roc_io.h
index 13f98ed549..1e5c1f8c04 100644
--- a/drivers/common/cnxk/roc_io.h
+++ b/drivers/common/cnxk/roc_io.h
@@ -7,6 +7,7 @@
#include "roc_platform.h" /* for __plt_always_inline macro */
+#ifndef ROC_LMT_BASE_ID_GET
#define ROC_LMT_BASE_ID_GET(lmt_addr, lmt_id) \
do { \
/* 32 Lines per core */ \
@@ -14,7 +15,10 @@
/* Each line is of 128B */ \
(lmt_addr) += ((uint64_t)lmt_id << ROC_LMT_LINE_SIZE_LOG2); \
} while (0)
+#endif
+/* Define it if not defined in roc_platform.h */
+#ifndef ROC_LMT_CPT_BASE_ID_GET
#define ROC_LMT_CPT_BASE_ID_GET(lmt_addr, lmt_id) \
do { \
/* 16 Lines per core */ \
@@ -23,6 +27,7 @@
/* Each line is of 128B */ \
(lmt_addr) += ((uint64_t)lmt_id << ROC_LMT_LINE_SIZE_LOG2); \
} while (0)
+#endif
#define roc_load_pair(val0, val1, addr) \
({ \
--
2.25.1
next prev parent reply other threads:[~2022-11-28 9:55 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-28 9:54 [PATCH 01/11] common/cnxk: free pending sqe buffers Nithin Dabilpuram
2022-11-28 9:54 ` [PATCH 02/11] net/cnxk: register callback to get queue errors Nithin Dabilpuram
2022-11-28 9:54 ` [PATCH 03/11] common/cnxk: set default SQ TC value Nithin Dabilpuram
2022-11-28 9:54 ` [PATCH 04/11] common/cnxk: split NIX TM hierarchy enable API Nithin Dabilpuram
2022-11-28 9:54 ` [PATCH 05/11] event/cnxk: net/cnxk: support transmit completion Nithin Dabilpuram
2022-11-28 9:54 ` [PATCH 06/11] net/cnxk: fix packet type for IPv6 packets post decryption Nithin Dabilpuram
2022-11-28 9:54 ` [PATCH 07/11] net/cnxk: add late backpressure support for cn10kb Nithin Dabilpuram
2022-11-28 9:54 ` Nithin Dabilpuram [this message]
2022-11-28 9:54 ` [PATCH 09/11] common/cnxk: convert aura handle to aura Nithin Dabilpuram
2022-11-28 9:54 ` [PATCH 10/11] net/cnxk: mark HW errors as bad checksum Nithin Dabilpuram
2022-11-28 9:54 ` [PATCH 11/11] common/cnxk: disable drop re in A1 chip revision Nithin Dabilpuram
2023-01-06 13:22 ` Jerin Jacob
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