* [dpdk-dev] [PATCH] common/cnxk: mask LA ltype for second pass for cnxk
@ 2022-12-01 4:07 psatheesh
2023-01-10 15:44 ` Jerin Jacob
0 siblings, 1 reply; 2+ messages in thread
From: psatheesh @ 2022-12-01 4:07 UTC (permalink / raw)
To: Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao
Cc: dev, Satheesh Paul
From: Kiran Kumar K <kirankumark@marvell.com>
While installing flow rule, if user provide item type
as RTE_FLOW_ITEM_TYPE_ETH, it should be applied to both
first and second pass. Adding changes to mask the ltype
to match both.
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Reviewed-by: Satheesh Paul <psatheesh@marvell.com>
---
drivers/common/cnxk/roc_npc_mcam.c | 29 +++++++++++++++++++++++------
drivers/common/cnxk/roc_npc_parse.c | 1 +
drivers/common/cnxk/roc_npc_priv.h | 1 +
3 files changed, 25 insertions(+), 6 deletions(-)
diff --git a/drivers/common/cnxk/roc_npc_mcam.c b/drivers/common/cnxk/roc_npc_mcam.c
index a725cabc57..526a6d1579 100644
--- a/drivers/common/cnxk/roc_npc_mcam.c
+++ b/drivers/common/cnxk/roc_npc_mcam.c
@@ -551,6 +551,8 @@ npc_mcam_alloc_and_write(struct npc *npc, struct roc_npc_flow *flow,
struct idev_cfg *idev;
uint16_t pf_func = 0;
uint16_t ctr = ~(0);
+ uint32_t la_offset;
+ uint64_t mask;
int rc, idx;
int entry;
@@ -617,17 +619,32 @@ npc_mcam_alloc_and_write(struct npc *npc, struct roc_npc_flow *flow,
flow->npc_action &= ~(GENMASK(19, 4));
flow->npc_action |= (uint64_t)pf_func << 4;
- npc_mcam_set_channel(flow, req, inl_dev->channel,
- inl_dev->chan_mask, false);
+ npc_mcam_set_channel(flow, req, inl_dev->channel, inl_dev->chan_mask,
+ false);
} else if (npc->is_sdp_link) {
- npc_mcam_set_channel(flow, req, npc->sdp_channel,
- npc->sdp_channel_mask,
+ npc_mcam_set_channel(flow, req, npc->sdp_channel, npc->sdp_channel_mask,
pst->is_second_pass_rule);
} else {
- npc_mcam_set_channel(flow, req, npc->channel,
- (BIT_ULL(12) - 1),
+ npc_mcam_set_channel(flow, req, npc->channel, (BIT_ULL(12) - 1),
pst->is_second_pass_rule);
}
+ /* Always match both 1st pass and 2nd pass ltypes for all rules */
+ if (!pst->is_second_pass_rule && pst->has_eth_type) {
+ la_offset = __builtin_popcount(npc->keyx_supp_nmask[flow->nix_intf] &
+ ((1ULL << 9 /* LA offset */) - 1));
+ la_offset *= 4;
+
+ mask = ~((0xfULL << la_offset));
+ /* Mask ltype ETHER (0x2) and CPT_HDR (0xa) */
+ req->entry_data.kw[0] &= mask;
+ req->entry_data.kw_mask[0] &= mask;
+ req->entry_data.kw[0] |= (0x2ULL << la_offset);
+ req->entry_data.kw_mask[0] |= (0x7ULL << la_offset);
+ flow->mcam_data[0] &= mask;
+ flow->mcam_mask[0] &= mask;
+ flow->mcam_data[0] |= (0x2ULL << la_offset);
+ flow->mcam_mask[0] |= (0x7ULL << la_offset);
+ }
} else {
uint16_t pf_func = (flow->npc_action >> 4) & 0xffff;
diff --git a/drivers/common/cnxk/roc_npc_parse.c b/drivers/common/cnxk/roc_npc_parse.c
index ff00c746d6..947e1ec53d 100644
--- a/drivers/common/cnxk/roc_npc_parse.c
+++ b/drivers/common/cnxk/roc_npc_parse.c
@@ -193,6 +193,7 @@ npc_parse_la(struct npc_parse_state *pst)
if (pst->pattern->type != ROC_NPC_ITEM_TYPE_ETH)
return 0;
+ pst->has_eth_type = true;
eth_item = pst->pattern->spec;
lid = NPC_LID_LA;
diff --git a/drivers/common/cnxk/roc_npc_priv.h b/drivers/common/cnxk/roc_npc_priv.h
index 1a597280d1..09a727b13e 100644
--- a/drivers/common/cnxk/roc_npc_priv.h
+++ b/drivers/common/cnxk/roc_npc_priv.h
@@ -196,6 +196,7 @@ struct npc_parse_state {
bool set_vlan_ltype_mask;
bool set_ipv6ext_ltype_mask;
bool is_second_pass_rule;
+ bool has_eth_type;
};
enum npc_kpu_parser_flag {
--
2.35.3
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [dpdk-dev] [PATCH] common/cnxk: mask LA ltype for second pass for cnxk
2022-12-01 4:07 [dpdk-dev] [PATCH] common/cnxk: mask LA ltype for second pass for cnxk psatheesh
@ 2023-01-10 15:44 ` Jerin Jacob
0 siblings, 0 replies; 2+ messages in thread
From: Jerin Jacob @ 2023-01-10 15:44 UTC (permalink / raw)
To: psatheesh
Cc: Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao, dev
On Thu, Dec 1, 2022 at 9:37 AM <psatheesh@marvell.com> wrote:
>
> From: Kiran Kumar K <kirankumark@marvell.com>
>
> While installing flow rule, if user provide item type
> as RTE_FLOW_ITEM_TYPE_ETH, it should be applied to both
> first and second pass. Adding changes to mask the ltype
> to match both.
>
> Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
> Reviewed-by: Satheesh Paul <psatheesh@marvell.com>
Updated the git commit as follows and applied to
dpdk-next-net-mrvl/for-next-net. Thanks
common/cnxk: mask LA layer type for second pass packet
While installing flow rule, if user provide item type
as RTE_FLOW_ITEM_TYPE_ETH, it should be applied to both
first and second pass. Adding changes to mask the layer
type to match both.
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Reviewed-by: Satheesh Paul <psatheesh@marvell.com>
> ---
> drivers/common/cnxk/roc_npc_mcam.c | 29 +++++++++++++++++++++++------
> drivers/common/cnxk/roc_npc_parse.c | 1 +
> drivers/common/cnxk/roc_npc_priv.h | 1 +
> 3 files changed, 25 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/common/cnxk/roc_npc_mcam.c b/drivers/common/cnxk/roc_npc_mcam.c
> index a725cabc57..526a6d1579 100644
> --- a/drivers/common/cnxk/roc_npc_mcam.c
> +++ b/drivers/common/cnxk/roc_npc_mcam.c
> @@ -551,6 +551,8 @@ npc_mcam_alloc_and_write(struct npc *npc, struct roc_npc_flow *flow,
> struct idev_cfg *idev;
> uint16_t pf_func = 0;
> uint16_t ctr = ~(0);
> + uint32_t la_offset;
> + uint64_t mask;
> int rc, idx;
> int entry;
>
> @@ -617,17 +619,32 @@ npc_mcam_alloc_and_write(struct npc *npc, struct roc_npc_flow *flow,
> flow->npc_action &= ~(GENMASK(19, 4));
> flow->npc_action |= (uint64_t)pf_func << 4;
>
> - npc_mcam_set_channel(flow, req, inl_dev->channel,
> - inl_dev->chan_mask, false);
> + npc_mcam_set_channel(flow, req, inl_dev->channel, inl_dev->chan_mask,
> + false);
> } else if (npc->is_sdp_link) {
> - npc_mcam_set_channel(flow, req, npc->sdp_channel,
> - npc->sdp_channel_mask,
> + npc_mcam_set_channel(flow, req, npc->sdp_channel, npc->sdp_channel_mask,
> pst->is_second_pass_rule);
> } else {
> - npc_mcam_set_channel(flow, req, npc->channel,
> - (BIT_ULL(12) - 1),
> + npc_mcam_set_channel(flow, req, npc->channel, (BIT_ULL(12) - 1),
> pst->is_second_pass_rule);
> }
> + /* Always match both 1st pass and 2nd pass ltypes for all rules */
> + if (!pst->is_second_pass_rule && pst->has_eth_type) {
> + la_offset = __builtin_popcount(npc->keyx_supp_nmask[flow->nix_intf] &
> + ((1ULL << 9 /* LA offset */) - 1));
> + la_offset *= 4;
> +
> + mask = ~((0xfULL << la_offset));
> + /* Mask ltype ETHER (0x2) and CPT_HDR (0xa) */
> + req->entry_data.kw[0] &= mask;
> + req->entry_data.kw_mask[0] &= mask;
> + req->entry_data.kw[0] |= (0x2ULL << la_offset);
> + req->entry_data.kw_mask[0] |= (0x7ULL << la_offset);
> + flow->mcam_data[0] &= mask;
> + flow->mcam_mask[0] &= mask;
> + flow->mcam_data[0] |= (0x2ULL << la_offset);
> + flow->mcam_mask[0] |= (0x7ULL << la_offset);
> + }
> } else {
> uint16_t pf_func = (flow->npc_action >> 4) & 0xffff;
>
> diff --git a/drivers/common/cnxk/roc_npc_parse.c b/drivers/common/cnxk/roc_npc_parse.c
> index ff00c746d6..947e1ec53d 100644
> --- a/drivers/common/cnxk/roc_npc_parse.c
> +++ b/drivers/common/cnxk/roc_npc_parse.c
> @@ -193,6 +193,7 @@ npc_parse_la(struct npc_parse_state *pst)
> if (pst->pattern->type != ROC_NPC_ITEM_TYPE_ETH)
> return 0;
>
> + pst->has_eth_type = true;
> eth_item = pst->pattern->spec;
>
> lid = NPC_LID_LA;
> diff --git a/drivers/common/cnxk/roc_npc_priv.h b/drivers/common/cnxk/roc_npc_priv.h
> index 1a597280d1..09a727b13e 100644
> --- a/drivers/common/cnxk/roc_npc_priv.h
> +++ b/drivers/common/cnxk/roc_npc_priv.h
> @@ -196,6 +196,7 @@ struct npc_parse_state {
> bool set_vlan_ltype_mask;
> bool set_ipv6ext_ltype_mask;
> bool is_second_pass_rule;
> + bool has_eth_type;
> };
>
> enum npc_kpu_parser_flag {
> --
> 2.35.3
>
^ permalink raw reply [flat|nested] 2+ messages in thread
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