From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C5FB2A0093; Thu, 8 Dec 2022 21:19:09 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9F2DF410D7; Thu, 8 Dec 2022 21:19:09 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 0657740E28 for ; Thu, 8 Dec 2022 21:19:07 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2B8JjbU3001986 for ; Thu, 8 Dec 2022 12:19:07 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=ow4rwDFad51TdxiNRVAerDLFPbzAdTtxTJGyepCDMSg=; b=h8EjxP7a/4PzTaNv3WmfjodJGdoq9PV/m9vSP29Bb74VGPIg9e1W0Rvvi1rPP311LpF8 cin8U0uvCmUZp2otDmJfuS63LVqffhVjdp/AnDGvvdLNyz4S89iEaLLZ/6hS1R2jivdH 5qhcmIRMPGlRqLutG84duFP+l64VkQHi2HELeXK1GOyNf/gVWH+Am5JYr6oZCqFyvVDr wvmD+D/XG72Zq0sz3flGqSkE/eI89byNGbC2H31kCBmgrSMvjldkrMC6NZC4z/F398wu IqoesOsw4oPmO42Io5ErQYmxYLa5vZH9JQmZ5Rk13CoTmMxSFExHTWFDmjDX0jSSoLgE 5A== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3mb22svrmf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 08 Dec 2022 12:19:07 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 8 Dec 2022 12:19:05 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Thu, 8 Dec 2022 12:19:05 -0800 Received: from ml-host-33.caveonetworks.com (unknown [10.110.143.233]) by maili.marvell.com (Postfix) with ESMTP id 2779B3F7454; Thu, 8 Dec 2022 12:18:11 -0800 (PST) From: Srikanth Yalavarthi To: CC: , , , , Srikanth Yalavarthi Subject: [PATCH v2 00/37] Implementation of ML CNXK driver Date: Thu, 8 Dec 2022 12:17:28 -0800 Message-ID: <20221208201806.21893-1-syalavarthi@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221208200220.20267-1-syalavarthi@marvell.com> References: <20221208200220.20267-1-syalavarthi@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-ORIG-GUID: tEgSvp1RTutcE6LXcUIF-tO5bNkQgQwd X-Proofpoint-GUID: tEgSvp1RTutcE6LXcUIF-tO5bNkQgQwd X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-08_11,2022-12-08_01,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Marvell ML CNXK Driver ---------------------- This patch series implements Machine Learning (ML) driver for Marvell Octeon 10 (cnxk) platform. ML inferencing is supported on cnxk platform through an integrated ML inferencing processor. The current driver supports programming the ML hardware engine through offload mode. All APIs proposed in the DPDK ML device specification are supported on the cnxk platform. Srikanth Yalavarthi (37): ml/cnxk: add skeleton for ML cnxk driver ml/cnxk: enable probe and remove of ML device ml/cnxk: add driver support to get device info ml/cnxk: add support for configure and close ml/cnxk: parse ML firmware path from device args ml/cnxk: enable firmware load and device reset ml/cnxk: enable support for simulator environment ml/cnxk: enable support for device start and stop ml/cnxk: add support to create device queue-pairs ml/cnxk: add functions to load and unload models ml/cnxk: enable validity checks for model metadata ml/cnxk: add internal structures for derived info ml/cnxk: add internal structures for tiles and OCM ml/cnxk: add structures for slow and fast path JDs ml/cnxk: find OCM mask and page slots for a model ml/cnxk: add support to reserve and free OCM pages ml/cnxk: enable support to start an ML model ml/cnxk: enable support to stop an ML models ml/cnxk: enable support to get model information ml/cnxk: enable support to update model params ml/cnxk: add support to get IO buffer sizes ml/cnxk: enable quantization and dequantization ml/cnxk: enable support to dump device debug info ml/cnxk: add driver support for device selftest ml/cnxk: enqueue a burst of inference requests ml/cnxk: dequeue a burst of inference requests ml/cnxk: add internal function for sync mode run ml/cnxk: enable support for firmware error codes ml/cnxk: add support to get and reset device stats ml/cnxk: add support to handle extended dev stats ml/cnxk: enable support to get xstats in cycles ml/cnxk: add support to report DPE FW warnings ml/cnxk: add support to enable model data caching ml/cnxk: add support to select OCM allocation mode ml/cnxk: add support to use lock during jcmd enq ml/cnxk: add support to select poll memory region ml/cnxk: add user guide for marvell cnxk ml driver MAINTAINERS | 3 + doc/guides/index.rst | 1 + doc/guides/mldevs/cnxk.rst | 238 +++ doc/guides/mldevs/index.rst | 14 + drivers/meson.build | 1 + drivers/ml/cnxk/cn10k_ml_dev.c | 823 +++++++++++ drivers/ml/cnxk/cn10k_ml_dev.h | 426 ++++++ drivers/ml/cnxk/cn10k_ml_model.c | 396 +++++ drivers/ml/cnxk/cn10k_ml_model.h | 511 +++++++ drivers/ml/cnxk/cn10k_ml_ocm.c | 509 +++++++ drivers/ml/cnxk/cn10k_ml_ocm.h | 91 ++ drivers/ml/cnxk/cn10k_ml_ops.c | 2310 ++++++++++++++++++++++++++++++ drivers/ml/cnxk/cn10k_ml_ops.h | 94 ++ drivers/ml/cnxk/meson.build | 32 + drivers/ml/meson.build | 8 + 15 files changed, 5457 insertions(+) create mode 100644 doc/guides/mldevs/cnxk.rst create mode 100644 doc/guides/mldevs/index.rst create mode 100644 drivers/ml/cnxk/cn10k_ml_dev.c create mode 100644 drivers/ml/cnxk/cn10k_ml_dev.h create mode 100644 drivers/ml/cnxk/cn10k_ml_model.c create mode 100644 drivers/ml/cnxk/cn10k_ml_model.h create mode 100644 drivers/ml/cnxk/cn10k_ml_ocm.c create mode 100644 drivers/ml/cnxk/cn10k_ml_ocm.h create mode 100644 drivers/ml/cnxk/cn10k_ml_ops.c create mode 100644 drivers/ml/cnxk/cn10k_ml_ops.h create mode 100644 drivers/ml/cnxk/meson.build create mode 100644 drivers/ml/meson.build -- 2.17.1