From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4AE96A00C2; Fri, 9 Dec 2022 14:41:33 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D4A53410FB; Fri, 9 Dec 2022 14:41:32 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 56E97410D7 for ; Fri, 9 Dec 2022 14:41:31 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2B97EMUH001963 for ; Fri, 9 Dec 2022 05:41:30 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=l4gdWF+PiuQLi0E9LNR3E65UuMnsuZXTNCXX4Sg+LbM=; b=hYvn+C9JvkDtZ3S9+dlQ710ZdeMDM/H+jVG23OyA42HHe7nGxnOEKgDV+ERuZR0oenne yUkIu69B2jpPqatdubJwvdDJ786WaTKJgocTsPTdu/RMN1ZlVok6eGzzaybIV4LP1/Dx LAiQiwKIFntSQxIfSK7+dMsDw0oyTsca+sRLXwv+uHQc6S0hcZAc+xfVuxpCnKKeLaU6 7pMU+PbUyOy657kxp8pARmMif070xGgtuyOruKtaxbgK5cqVsH1bhMBiYa+ns7XPtu2z z6emeDpGgYlvLhmVkqAXsdkwdJI0zEkXFK60zZ85jX0M2F7nkg8YeKZz2aRVbk4PBGsI Ng== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3mb22syn6d-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 09 Dec 2022 05:41:30 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 9 Dec 2022 05:41:28 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Fri, 9 Dec 2022 05:41:28 -0800 Received: from localhost.localdomain (unknown [10.28.36.158]) by maili.marvell.com (Postfix) with ESMTP id ECDDB3F704A; Fri, 9 Dec 2022 05:41:25 -0800 (PST) From: Rahul Bhansali To: , Pavan Nikhilesh , "Shijith Thotton" , Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , Rahul Bhansali Subject: [PATCH] event/cnxk: wait for CPT fc on wqe path Date: Fri, 9 Dec 2022 19:11:21 +0530 Message-ID: <20221209134121.1757306-1-rbhansali@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: JkkFcYmUJ_F_OvI4GG5BCsV-HXLl8DQ3 X-Proofpoint-GUID: JkkFcYmUJ_F_OvI4GG5BCsV-HXLl8DQ3 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-09_08,2022-12-08_01,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Wait for CPT flow control on WQE path. Signed-off-by: Rahul Bhansali --- drivers/event/cnxk/cn9k_worker.h | 1 + drivers/net/cnxk/cn9k_tx.h | 10 ++++++++++ 2 files changed, 11 insertions(+) diff --git a/drivers/event/cnxk/cn9k_worker.h b/drivers/event/cnxk/cn9k_worker.h index 4c3932da47..d3c5180fbc 100644 --- a/drivers/event/cnxk/cn9k_worker.h +++ b/drivers/event/cnxk/cn9k_worker.h @@ -730,6 +730,7 @@ cn9k_sso_hws_xmit_sec_one(const struct cn9k_eth_txq *txq, uint64_t base, rte_io_wmb(); cn9k_sso_txq_fc_wait(txq); + cn9k_nix_sec_fc_wait_one(txq); /* Write CPT instruction to lmt line */ vst1q_u64(lmt_addr, cmd01); diff --git a/drivers/net/cnxk/cn9k_tx.h b/drivers/net/cnxk/cn9k_tx.h index 404edd6aed..7362025a34 100644 --- a/drivers/net/cnxk/cn9k_tx.h +++ b/drivers/net/cnxk/cn9k_tx.h @@ -388,6 +388,16 @@ cn9k_nix_xmit_prep_lmt(uint64_t *cmd, void *lmt_addr, const uint32_t flags) roc_lmt_mov(lmt_addr, cmd, cn9k_nix_tx_ext_subs(flags)); } +static __rte_always_inline void +cn9k_nix_sec_fc_wait_one(const struct cn9k_eth_txq *txq) +{ + uint64_t nb_desc = txq->cpt_desc; + uint64_t *fc = txq->cpt_fc; + + while (nb_desc <= __atomic_load_n(fc, __ATOMIC_RELAXED)) + ; +} + static __rte_always_inline uint64_t cn9k_nix_xmit_submit_lmt(const rte_iova_t io_addr) { -- 2.25.1