From: Tejasree Kondoj <ktejasree@marvell.com>
To: Akhil Goyal <gakhil@marvell.com>
Cc: Anoob Joseph <anoobj@marvell.com>,
Vidya Sagar Velumuri <vvelumuri@marvell.com>,
Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>,
Volodymyr Fialko <vfialko@marvell.com>,
"Aakash Sasidharan" <asasidharan@marvell.com>, <dev@dpdk.org>
Subject: [PATCH 12/17] crypto/octeontx: support truncated digest size
Date: Tue, 20 Dec 2022 20:02:27 +0530 [thread overview]
Message-ID: <20221220143232.2519650-13-ktejasree@marvell.com> (raw)
In-Reply-To: <20221220143232.2519650-1-ktejasree@marvell.com>
Support truncated digest size for auth only mode.
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
---
drivers/common/cpt/cpt_ucode.h | 17 ++++---
.../octeontx/otx_cryptodev_capabilities.c | 48 +++++++++----------
2 files changed, 34 insertions(+), 31 deletions(-)
diff --git a/drivers/common/cpt/cpt_ucode.h b/drivers/common/cpt/cpt_ucode.h
index 22aabab6ac..b393be4cf6 100644
--- a/drivers/common/cpt/cpt_ucode.h
+++ b/drivers/common/cpt/cpt_ucode.h
@@ -41,30 +41,33 @@ cpt_mac_len_verify(struct rte_crypto_auth_xform *auth)
uint16_t mac_len = auth->digest_length;
int ret;
+ if ((auth->algo != RTE_CRYPTO_AUTH_NULL) && (mac_len == 0))
+ return -1;
+
switch (auth->algo) {
case RTE_CRYPTO_AUTH_MD5:
case RTE_CRYPTO_AUTH_MD5_HMAC:
- ret = (mac_len == 16) ? 0 : -1;
+ ret = (mac_len <= 16) ? 0 : -1;
break;
case RTE_CRYPTO_AUTH_SHA1:
case RTE_CRYPTO_AUTH_SHA1_HMAC:
- ret = (mac_len == 20) ? 0 : -1;
+ ret = (mac_len <= 20) ? 0 : -1;
break;
case RTE_CRYPTO_AUTH_SHA224:
case RTE_CRYPTO_AUTH_SHA224_HMAC:
- ret = (mac_len == 28) ? 0 : -1;
+ ret = (mac_len <= 28) ? 0 : -1;
break;
case RTE_CRYPTO_AUTH_SHA256:
case RTE_CRYPTO_AUTH_SHA256_HMAC:
- ret = (mac_len == 32) ? 0 : -1;
+ ret = (mac_len <= 32) ? 0 : -1;
break;
case RTE_CRYPTO_AUTH_SHA384:
case RTE_CRYPTO_AUTH_SHA384_HMAC:
- ret = (mac_len == 48) ? 0 : -1;
+ ret = (mac_len <= 48) ? 0 : -1;
break;
case RTE_CRYPTO_AUTH_SHA512:
case RTE_CRYPTO_AUTH_SHA512_HMAC:
- ret = (mac_len == 64) ? 0 : -1;
+ ret = (mac_len <= 64) ? 0 : -1;
break;
case RTE_CRYPTO_AUTH_NULL:
ret = 0;
@@ -523,7 +526,7 @@ cpt_digest_gen_prep(uint32_t flags,
/*GP op header */
vq_cmd_w0.s.opcode.minor = 0;
- vq_cmd_w0.s.param2 = ((uint16_t)hash_type << 8);
+ vq_cmd_w0.s.param2 = ((uint16_t)hash_type << 8) | mac_len;
if (ctx->hmac) {
vq_cmd_w0.s.opcode.major = CPT_MAJOR_OP_HMAC | CPT_DMA_MODE;
vq_cmd_w0.s.param1 = key_len;
diff --git a/drivers/crypto/octeontx/otx_cryptodev_capabilities.c b/drivers/crypto/octeontx/otx_cryptodev_capabilities.c
index 3f734b232c..80a9fe2123 100644
--- a/drivers/crypto/octeontx/otx_cryptodev_capabilities.c
+++ b/drivers/crypto/octeontx/otx_cryptodev_capabilities.c
@@ -86,9 +86,9 @@ static const struct rte_cryptodev_capabilities otx_sym_capabilities[] = {
.increment = 0
},
.digest_size = {
- .min = 16,
+ .min = 1,
.max = 16,
- .increment = 0
+ .increment = 1
},
}, }
}, }
@@ -106,9 +106,9 @@ static const struct rte_cryptodev_capabilities otx_sym_capabilities[] = {
.increment = 8
},
.digest_size = {
- .min = 16,
+ .min = 1,
.max = 16,
- .increment = 0
+ .increment = 1
},
}, }
}, }
@@ -126,9 +126,9 @@ static const struct rte_cryptodev_capabilities otx_sym_capabilities[] = {
.increment = 0
},
.digest_size = {
- .min = 20,
+ .min = 1,
.max = 20,
- .increment = 0
+ .increment = 1
},
}, }
}, }
@@ -146,9 +146,9 @@ static const struct rte_cryptodev_capabilities otx_sym_capabilities[] = {
.increment = 1
},
.digest_size = {
- .min = 20,
+ .min = 1,
.max = 20,
- .increment = 0
+ .increment = 1
},
}, }
}, }
@@ -166,9 +166,9 @@ static const struct rte_cryptodev_capabilities otx_sym_capabilities[] = {
.increment = 0
},
.digest_size = {
- .min = 28,
+ .min = 1,
.max = 28,
- .increment = 0
+ .increment = 1
},
}, }
}, }
@@ -186,9 +186,9 @@ static const struct rte_cryptodev_capabilities otx_sym_capabilities[] = {
.increment = 1
},
.digest_size = {
- .min = 28,
+ .min = 1,
.max = 28,
- .increment = 0
+ .increment = 1
},
}, }
}, }
@@ -206,9 +206,9 @@ static const struct rte_cryptodev_capabilities otx_sym_capabilities[] = {
.increment = 0
},
.digest_size = {
- .min = 32,
+ .min = 1,
.max = 32,
- .increment = 0
+ .increment = 1
},
}, }
}, }
@@ -226,9 +226,9 @@ static const struct rte_cryptodev_capabilities otx_sym_capabilities[] = {
.increment = 1
},
.digest_size = {
- .min = 32,
+ .min = 1,
.max = 32,
- .increment = 0
+ .increment = 1
},
}, }
}, }
@@ -246,9 +246,9 @@ static const struct rte_cryptodev_capabilities otx_sym_capabilities[] = {
.increment = 0
},
.digest_size = {
- .min = 48,
+ .min = 1,
.max = 48,
- .increment = 0
+ .increment = 1
},
}, }
}, }
@@ -266,9 +266,9 @@ static const struct rte_cryptodev_capabilities otx_sym_capabilities[] = {
.increment = 1
},
.digest_size = {
- .min = 48,
+ .min = 1,
.max = 48,
- .increment = 0
+ .increment = 1
},
}, }
}, }
@@ -286,9 +286,9 @@ static const struct rte_cryptodev_capabilities otx_sym_capabilities[] = {
.increment = 0
},
.digest_size = {
- .min = 64,
+ .min = 1,
.max = 64,
- .increment = 0
+ .increment = 1
},
}, }
}, }
@@ -306,9 +306,9 @@ static const struct rte_cryptodev_capabilities otx_sym_capabilities[] = {
.increment = 1
},
.digest_size = {
- .min = 64,
+ .min = 1,
.max = 64,
- .increment = 0
+ .increment = 1
},
}, }
}, }
--
2.25.1
next prev parent reply other threads:[~2022-12-20 14:34 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-20 14:32 [PATCH 00/17] fixes and improvements to cnxk crytpo PMD Tejasree Kondoj
2022-12-20 14:32 ` [PATCH 01/17] common/cnxk: perform LF fini ops only when allocated Tejasree Kondoj
2022-12-20 14:32 ` [PATCH 02/17] common/cnxk: generate opad and ipad in driver Tejasree Kondoj
2022-12-20 14:32 ` [PATCH 03/17] crypto/cnxk: update resp len calculation for IPv6 Tejasree Kondoj
2022-12-20 14:32 ` [PATCH 04/17] crypto/cnxk: add context to passthrough instruction Tejasree Kondoj
2022-12-20 14:32 ` [PATCH 05/17] crypto/cnxk: support truncated digest length Tejasree Kondoj
2022-12-20 14:32 ` [PATCH 06/17] crypto/cnxk: add queue pair check to meta set Tejasree Kondoj
2022-12-20 14:32 ` [PATCH 07/17] crypto/cnxk: update crypto completion code handling Tejasree Kondoj
2022-12-20 14:32 ` [PATCH 08/17] crypto/cnxk: fix incorrect digest for an empty input data Tejasree Kondoj
2022-12-20 14:32 ` [PATCH 09/17] crypto/cnxk: add CN9K IPsec SG support Tejasree Kondoj
2022-12-20 14:32 ` [PATCH 10/17] crypto/cnxk: add support for SHA3 hash Tejasree Kondoj
2022-12-20 14:32 ` [PATCH 11/17] common/cnxk: skip hmac hash precomputation Tejasree Kondoj
2022-12-20 14:32 ` Tejasree Kondoj [this message]
2022-12-20 14:32 ` [PATCH 13/17] crypto/cnxk: set device ops to null in PCI remove Tejasree Kondoj
2022-12-20 14:32 ` [PATCH 14/17] crypto/cnxk: add CTX for non IPsec operations Tejasree Kondoj
2022-12-20 14:32 ` [PATCH 15/17] crypto/cnxk: set salt in dptr as part of IV Tejasree Kondoj
2022-12-20 14:32 ` [PATCH 16/17] crypto/cnxk: remove null check of session priv Tejasree Kondoj
2022-12-20 14:32 ` [PATCH 17/17] common/cnxk: remove salt from session Tejasree Kondoj
2023-01-04 10:11 ` [PATCH 00/17] fixes and improvements to cnxk crytpo PMD Akhil Goyal
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