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From: Anoob Joseph <anoobj@marvell.com>
To: Thomas Monjalon <thomas@monjalon.net>, Akhil Goyal <gakhil@marvell.com>,
Jerin Jacob <jerinj@marvell.com>, Konstantin Ananyev
<konstantin.v.ananyev@yandex.ru>, Bernard Iremonger
<bernard.iremonger@intel.com>, Olivier Matz <olivier.matz@6wind.com>
CC: Volodymyr Fialko <vfialko@marvell.com>, Hemant Agrawal
<hemant.agrawal@nxp.com>, =?UTF-8?q?Mattias=20R=C3=B6nnblom?=
<mattias.ronnblom@ericsson.com>,
Kiran Kumar K <kirankumark@marvell.com>, <dev@dpdk.org>
Subject: [PATCH 1/5] net: add PDCP header
Date: Thu, 22 Dec 2022 14:55:18 +0530
Message-ID: <20221222092522.1628-2-anoobj@marvell.com>
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From: Volodymyr Fialko <vfialko@marvell.com>
Added PDCP protocol header to be used for supporting PDCP protocol
processing.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
---
doc/api/doxy-api-index.md | 3 +-
lib/net/meson.build | 1 +
lib/net/rte_pdcp_hdr.h | 93 +++++++++++++++++++++++++++++++++++++++
3 files changed, 96 insertions(+), 1 deletion(-)
create mode 100644 lib/net/rte_pdcp_hdr.h
diff --git a/doc/api/doxy-api-index.md b/doc/api/doxy-api-index.md
index de488c7abf..ae4b107240 100644
--- a/doc/api/doxy-api-index.md
+++ b/doc/api/doxy-api-index.md
@@ -125,7 +125,8 @@ The public API headers are grouped by topics:
[Geneve](@ref rte_geneve.h),
[eCPRI](@ref rte_ecpri.h),
[L2TPv2](@ref rte_l2tpv2.h),
- [PPP](@ref rte_ppp.h)
+ [PPP](@ref rte_ppp.h),
+ [PDCP hdr](@ref rte_pdcp_hdr.h)
- **QoS**:
[metering](@ref rte_meter.h),
diff --git a/lib/net/meson.build b/lib/net/meson.build
index 379d161ee0..bd56f91c22 100644
--- a/lib/net/meson.build
+++ b/lib/net/meson.build
@@ -22,6 +22,7 @@ headers = files(
'rte_geneve.h',
'rte_l2tpv2.h',
'rte_ppp.h',
+ 'rte_pdcp_hdr.h',
)
sources = files(
diff --git a/lib/net/rte_pdcp_hdr.h b/lib/net/rte_pdcp_hdr.h
new file mode 100644
index 0000000000..f9b8258949
--- /dev/null
+++ b/lib/net/rte_pdcp_hdr.h
@@ -0,0 +1,93 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2022 Marvell.
+ */
+
+#ifndef _RTE_PDCP_HDR_H_
+#define _RTE_PDCP_HDR_H_
+
+/**
+ * @file
+ *
+ * PDCP-related defines
+ *
+ * Based on - ETSI TS 138 323 V17.1.0 (2022-08)
+ * https://www.etsi.org/deliver/etsi_ts/138300_138399/138323/17.01.00_60/ts_138323v170100p.pdf
+ */
+
+#include <rte_byteorder.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * 6.2.2.1 Data PDU for SRBs
+ */
+__extension__
+struct rte_pdcp_cp_data_pdu_sn_12_hdr {
+#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
+ uint8_t sn_11_8 : 4; /**< Sequence number bits 8-11 */
+ uint8_t r : 4; /**< Reserved */
+#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
+ uint8_t r : 4; /**< Reserved */
+ uint8_t sn_11_8 : 4; /**< Sequence number bits 8-11 */
+#endif
+ uint8_t sn_7_0; /**< Sequence number bits 0-7 */
+};
+
+/**
+ * 6.2.2.2 Data PDU for DRBs and MRBs with 12 bits PDCP SN
+ */
+__extension__
+struct rte_pdcp_up_data_pdu_sn_12_hdr {
+#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
+ uint8_t sn_11_8 : 4; /**< Sequence number bits 8-11 */
+ uint8_t r : 3; /**< Reserved */
+ uint8_t d_c : 1; /**< D/C bit */
+#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
+ uint8_t d_c : 1; /**< D/C bit */
+ uint8_t r : 3; /**< Reserved */
+ uint8_t sn_11_8 : 4; /**< Sequence number bits 8-11 */
+#endif
+ uint8_t sn_7_0; /**< Sequence number bits 0-7 */
+};
+
+/**
+ * 6.2.2.3 Data PDU for DRBs and MRBs with 18 bits PDCP SN
+ */
+__extension__
+struct rte_pdcp_up_data_pdu_sn_18_hdr {
+#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
+ uint8_t sn_17_16 : 2; /**< Sequence number bits 16-17 */
+ uint8_t r : 5; /**< Reserved */
+ uint8_t d_c : 1; /**< D/C bit */
+#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
+ uint8_t d_c : 1; /**< D/C bit */
+ uint8_t r : 5; /**< Reserved */
+ uint8_t sn_17_16 : 2; /**< Sequence number bits 16-17 */
+#endif
+ uint8_t sn_15_8; /**< Sequence number bits 8-15 */
+ uint8_t sn_7_0; /**< Sequence number bits 0-7 */
+};
+
+/**
+ * 6.2.3.1 Control PDU for PDCP status report
+ */
+__extension__
+struct rte_pdcp_up_ctrl_pdu_hdr {
+#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
+ uint8_t r : 4; /**< Reserved */
+ uint8_t pdu_type : 3; /**< Control PDU type */
+ uint8_t d_c : 1; /**< D/C bit */
+#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
+ uint8_t d_c : 1; /**< D/C bit */
+ uint8_t pdu_type : 3; /**< Control PDU type */
+ uint8_t r : 4; /**< Reserved */
+#endif
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_PDCP_HDR_H_ */
--
2.25.1