From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5950D423F2; Mon, 16 Jan 2023 18:38:07 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A8EF840A7D; Mon, 16 Jan 2023 18:37:59 +0100 (CET) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id 279B542D0C; Mon, 16 Jan 2023 18:37:57 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1673890678; x=1705426678; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VPjhE4TyFn1xnrh9RXxQFdJknzloQglA6je+k/AymO0=; b=HeNt+8hQKKDlkTcNbc8kqS2z3CPGk8sTLbi+zPR5G6fBGFxymvk8okt3 T7b4mZSZyxA6II25mQHi+Sz3aDXPBarFQ93GH4a0OPBGcJj4vgBE5xtgE 7va/b2Tn4y5fur1cWdlTyNeiw0mBD8X1j3DeRI/SPg6EEIslVt6/ecxt2 ST4/skGpZ1q/oMa1U2kZL8pVI6+h/4ADxjSs6ruvutRhkkr5p9NqwilU2 VtnTRMgVJCUYDloB39+bWoyamupgIyjzeEdeloLxOcRtCImPO+b5IBCpZ xgmBxLqd65GCb42lm0Ehfato2vWZBU5rc6vI8wXW0aknc8f2iUac3lx7K Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10592"; a="326570391" X-IronPort-AV: E=Sophos;i="5.97,221,1669104000"; d="scan'208";a="326570391" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Jan 2023 09:37:57 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10592"; a="987869175" X-IronPort-AV: E=Sophos;i="5.97,221,1669104000"; d="scan'208";a="987869175" Received: from silpixa00401385.ir.intel.com ([10.237.214.55]) by fmsmga005.fm.intel.com with ESMTP; 16 Jan 2023 09:37:54 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: Bruce Richardson , conor.walsh@intel.com, stable@dpdk.org, Kevin Laatz Subject: [PATCH v2 2/6] dma/ioat: fix incorrectly set indexes after restart Date: Mon, 16 Jan 2023 17:37:33 +0000 Message-Id: <20230116173738.562322-3-bruce.richardson@intel.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230116173738.562322-1-bruce.richardson@intel.com> References: <20230116153714.554470-1-bruce.richardson@intel.com> <20230116173738.562322-1-bruce.richardson@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org As part of the process of restarting a dma instance, the IOAT driver will reset the HW addresses and state values. The read and write indexes for SW use need to be similarly reset to keep HW and SW in sync. Fixes: 583f046dd404 ("dma/ioat: add start and stop") Cc: conor.walsh@intel.com Cc: stable@dpdk.org Signed-off-by: Bruce Richardson --- drivers/dma/ioat/ioat_dmadev.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/dma/ioat/ioat_dmadev.c b/drivers/dma/ioat/ioat_dmadev.c index aff7bbbfde..072eb17cd9 100644 --- a/drivers/dma/ioat/ioat_dmadev.c +++ b/drivers/dma/ioat/ioat_dmadev.c @@ -146,6 +146,13 @@ ioat_dev_start(struct rte_dma_dev *dev) /* Prime the status register to be set to the last element. */ ioat->status = ioat->ring_addr + ((ioat->qcfg.nb_desc - 1) * DESC_SZ); + /* reset all counters */ + ioat->next_read = 0; + ioat->next_write = 0; + ioat->last_write = 0; + ioat->offset = 0; + ioat->failure = 0; + printf("IOAT.status: %s [0x%"PRIx64"]\n", chansts_readable[ioat->status & IOAT_CHANSTS_STATUS], ioat->status); -- 2.37.2