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From: Alexander Kozyrev <akozyrev@nvidia.com>
To: <dev@dpdk.org>
Cc: <thomas@monjalon.net>, <orika@nvidia.com>, <rasland@nvidia.com>,
	<matan@nvidia.com>, <viacheslavo@nvidia.com>
Subject: [PATCH 1/4] net/mlx5: add table insertion type and hash function
Date: Fri, 27 Jan 2023 01:40:51 +0200	[thread overview]
Message-ID: <20230126234054.3960463-2-akozyrev@nvidia.com> (raw)
In-Reply-To: <20230126234054.3960463-1-akozyrev@nvidia.com>

Pass the insertion type and hash calculation function of a table
to the mlx5 PMD driver. Create appropriate table as requested.
Note that 16-bit checksum hash calculation is not supported yet.

Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_hw.c | 26 +++++++++++++++++++++++++-
 1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index 20c71ff7f0..8002c88e4a 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -154,6 +154,23 @@ static const struct rte_flow_item_eth ctrl_rx_eth_bcast_spec = {
 	.src.addr_bytes = "\x00\x00\x00\x00\x00\x00",
 	.type = 0,
 };
+static inline enum mlx5dr_matcher_insert_mode
+flow_hw_matcher_insert_mode_get(enum rte_flow_table_insertion_type insert_type)
+{
+	if (insert_type == RTE_FLOW_TABLE_INSERTION_TYPE_PATTERN)
+		return MLX5DR_MATCHER_INSERT_BY_HASH;
+	else
+		return MLX5DR_MATCHER_INSERT_BY_INDEX;
+}
+
+static inline enum mlx5dr_matcher_distribute_mode
+flow_hw_matcher_distribute_mode_get(enum rte_flow_table_hash_func hash_func)
+{
+	if (hash_func == RTE_FLOW_TABLE_HASH_FUNC_LINEAR)
+		return MLX5DR_MATCHER_DISTRIBUTE_BY_LINEAR;
+	else
+		return MLX5DR_MATCHER_DISTRIBUTE_BY_HASH;
+}
 
 /**
  * Set the hash fields according to the @p rss_desc information.
@@ -3052,7 +3069,7 @@ flow_hw_table_create(struct rte_eth_dev *dev,
 		.type = "mlx5_hw_table_flow",
 	};
 	struct mlx5_list_entry *ge;
-	uint32_t i, max_tpl = MLX5_HW_TBL_MAX_ITEM_TEMPLATE;
+	uint32_t i = 0, max_tpl = MLX5_HW_TBL_MAX_ITEM_TEMPLATE;
 	uint32_t nb_flows = rte_align32pow2(attr->nb_flows);
 	bool port_started = !!dev->data->dev_started;
 	int err;
@@ -3093,6 +3110,13 @@ flow_hw_table_create(struct rte_eth_dev *dev,
 	matcher_attr.priority = attr->flow_attr.priority;
 	matcher_attr.optimize_using_rule_idx = true;
 	matcher_attr.mode = MLX5DR_MATCHER_RESOURCE_MODE_RULE;
+	matcher_attr.insert_mode = flow_hw_matcher_insert_mode_get(attr->insertion_type);
+	if (attr->hash_func == RTE_FLOW_TABLE_HASH_FUNC_CRC16) {
+		DRV_LOG(ERR, "16-bit checksum hash type is not supported");
+		rte_errno = ENOTSUP;
+		goto it_error;
+	}
+	matcher_attr.distribute_mode = flow_hw_matcher_distribute_mode_get(attr->hash_func);
 	matcher_attr.rule.num_log = rte_log2_u32(nb_flows);
 	/* Build the item template. */
 	for (i = 0; i < nb_item_templates; i++) {
-- 
2.18.2


  reply	other threads:[~2023-01-26 23:41 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-26 23:40 [PATCH 0/4] net/mlx5: add template table insertion and matching types Alexander Kozyrev
2023-01-26 23:40 ` Alexander Kozyrev [this message]
2023-03-06 15:16   ` [PATCH 1/4] net/mlx5: add table insertion type and hash function Slava Ovsiienko
2023-01-26 23:40 ` [PATCH 2/4] net/mlx5: add flow rule insertion by index Alexander Kozyrev
2023-03-06 15:17   ` Slava Ovsiienko
2023-01-26 23:40 ` [PATCH 3/4] net/mlx5: add hash result metadata to modify field Alexander Kozyrev
2023-03-06 15:18   ` Slava Ovsiienko
2023-01-26 23:40 ` [PATCH 4/4] net/mlx5: define index register for linear tables Alexander Kozyrev
2023-03-06 15:18   ` Slava Ovsiienko
2023-03-07 11:13 ` [PATCH 0/4] net/mlx5: add template table insertion and matching types Raslan Darawsheh

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