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From: <cburdick@nvidia.com>
To: <bruce.richardson@intel.com>
CC: <dev@dpdk.org>, cliffburdick <cburdick@nvidia.com>
Subject: [PATCH] config: added support for NVIDIA ARM implementer ID
Date: Thu, 2 Feb 2023 07:50:22 -0800
Message-ID: <20230202155022.4748-1-cburdick@nvidia.com>
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From: cliffburdick <cburdick@nvidia.com>
Signed-off-by: cliffburdick <cburdick@nvidia.com>
---
.mailmap | 1 +
config/arm/meson.build | 21 +++++++++++++++++++++
2 files changed, 22 insertions(+)
diff --git a/.mailmap b/.mailmap
index 6a91c11be4..2cb0d9e41b 100644
--- a/.mailmap
+++ b/.mailmap
@@ -230,6 +230,7 @@ Cian Ferriter <cian.ferriter@intel.com>
Ciara Loftus <ciara.loftus@intel.com>
Ciara Power <ciara.power@intel.com>
Claire Murphy <claire.k.murphy@intel.com>
+Cliff Burdick <cburdick@nvidia.com>
Cody Doucette <doucette@bu.edu>
Congwen Zhang <zhang.congwen@zte.com.cn>
Conor Fogarty <conor.fogarty@intel.com>
diff --git a/config/arm/meson.build b/config/arm/meson.build
index 6442ec9596..6c3de22f16 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -159,6 +159,26 @@ implementer_cavium = {
}
}
+implementer_nvidia = {
+ 'description': 'NVIDIA',
+ 'flags': [
+ ['RTE_CACHE_LINE_SIZE', 64]
+ ],
+ 'part_number_config': {
+ '0x4': {
+ 'march': 'armv8-a',
+ 'march_features': ['crc', 'crypto', 'lse'],
+ 'compiler_options': ['-march=armv8-a+crc+lse+simd'],
+ 'flags': [
+ ['RTE_USE_C11_MEM_MODEL', true],
+ ['RTE_MAX_LCORE', 8],
+ ['RTE_MAX_NUMA_NODES', 1],
+ ['RTE_MACHINE', '"armv8a"']
+ ]
+ }
+ }
+}
+
implementer_ampere = {
'description': 'Ampere Computing',
'flags': [
@@ -261,6 +281,7 @@ implementers = {
'0x41': implementer_arm,
'0x43': implementer_cavium,
'0x48': implementer_hisilicon,
+ '0x4e': implementer_nvidia,
'0x50': implementer_ampere,
'0x51': implementer_qualcomm,
'0x70': implementer_phytium,
--
2.25.1