From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E8D9541CC1; Fri, 17 Feb 2023 17:23:06 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D0BBC40F18; Fri, 17 Feb 2023 17:23:06 +0100 (CET) Received: from mail-pj1-f51.google.com (mail-pj1-f51.google.com [209.85.216.51]) by mails.dpdk.org (Postfix) with ESMTP id D40D640EE3 for ; Fri, 17 Feb 2023 17:23:04 +0100 (CET) Received: by mail-pj1-f51.google.com with SMTP id p15-20020a17090a2d8f00b00233ceae8407so1675930pjd.3 for ; Fri, 17 Feb 2023 08:23:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=networkplumber-org.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:subject:cc:to:from:date:from:to:cc:subject:date :message-id:reply-to; bh=pMjM1Z/oL1DdLqtfaB3RhgZLjpen2nXhv34R31qwTp8=; b=h1tn/8CvlRW+ipoTOWugkdKb5EQsdePP14buPZBZFN5M3BPTV7/fMdRA/YS6Nbcg38 8DXZpcqHIe+wQOeeWsDe70oc7qDUm9FKmQp9LBI9ls3Jms+6vrtTQvoKnggp01cpVEvD 628YiczveCQu9c2DnxF22Lu8WpiptciW37xeay/1k9ucnVIXNRaX6faB9+b6+Oab0mMX NDkmkjqN4sC5e/DMTQxVyHtIh8TQJV6H8e4vw0bCASPhauF9aTwWH2zF3dg7LIHsrh5e sn7p2avIcwCxmwy9daEMwS+3QKyMHkYpaeCZM+UqzsseKRMb4BBXIju7v/tsqlxgKwGY enjg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:subject:cc:to:from:date:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pMjM1Z/oL1DdLqtfaB3RhgZLjpen2nXhv34R31qwTp8=; b=KOZJQse8S4ufnhP7BcPf6MDEHHtGSS9OhMpE8pDsFmj+crhYlWFoCRgnRfQ63lQjLo Yzb5cZs4UexhVT40Ej1n33NbmRz0pLzRnj48VvKWLAU+LcKFPZoBGA3ijGQoZXoF4uK1 zvVO54ia5cDXVviN2jYAFokpVaVNhsIvhmgDT7OGg0VHGt5UjwkdIdT7S+RBlEKrOskL HAW3hHNn2Zocgf7YsevZN4Ax+9W9TVZB3FeydZG0DdlxN0TnDhr97R+obpJ2Qzyewiw8 SU+BLK5+/V1rIR7kW7uc0Z6/ab+bPpuC71By39ZPzuOCSFvJB9GMyKM4rgBtOBs3QHLw N7aQ== X-Gm-Message-State: AO0yUKVEssglMiDZJF5Xk99t7Rnp2ub6c6jxZ1l4mxys/m2bAz23yTr0 ZBG1rmrgK65QLCuBKh1jpGA+Tg== X-Google-Smtp-Source: AK7set82Yn0pg06xSiTwzge08zFkcG1Y650cbdbqz/sHw51h9HRvItlEeR3r0YT6iHug/5pB96TpoA== X-Received: by 2002:a17:90b:1b51:b0:231:1df1:7aea with SMTP id nv17-20020a17090b1b5100b002311df17aeamr6788162pjb.22.1676650983987; Fri, 17 Feb 2023 08:23:03 -0800 (PST) Received: from hermes.local (204-195-120-218.wavecable.com. [204.195.120.218]) by smtp.gmail.com with ESMTPSA id mt9-20020a17090b230900b00231261061a5sm3152371pjb.5.2023.02.17.08.23.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Feb 2023 08:23:03 -0800 (PST) Date: Fri, 17 Feb 2023 08:23:01 -0800 From: Stephen Hemminger To: Feifei Wang Cc: Ruifeng Wang , dev@dpdk.org, nd@arm.com, David Hunt Subject: Re: [PATCH v5 2/2] eal: add power mgmt support on Arm Message-ID: <20230217082301.644addae@hermes.local> In-Reply-To: <20221214081430.1717903-3-feifei.wang2@arm.com> References: <20220825064251.2637274-1-feifei.wang2@arm.com> <20221214081430.1717903-1-feifei.wang2@arm.com> <20221214081430.1717903-3-feifei.wang2@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Wed, 14 Dec 2022 16:14:30 +0800 Feifei Wang wrote: > +__check_val_size(const uint8_t sz) > +{ > + switch (sz) { > + case sizeof(uint8_t): /* fall-through */ > + case sizeof(uint16_t): /* fall-through */ > + case sizeof(uint32_t): /* fall-through */ > + case sizeof(uint64_t): /* fall-through */ > + return 0; > + default: > + /* unexpected size */ > + return -1; > + } > +} > +#endif One simplification would be to get rid of this function and just check for unexpected size in the switch statement in rte_power_monitor(). > + switch (pmc->size) { > + case sizeof(uint8_t): > + __RTE_ARM_LOAD_EXC_8(pmc->addr, cur_value, __ATOMIC_RELAXED); > + __RTE_ARM_WFE() > + break; > + case sizeof(uint16_t): > + __RTE_ARM_LOAD_EXC_16(pmc->addr, cur_value, __ATOMIC_RELAXED); > + __RTE_ARM_WFE() > + break; > + case sizeof(uint32_t): > + __RTE_ARM_LOAD_EXC_32(pmc->addr, cur_value, __ATOMIC_RELAXED); > + __RTE_ARM_WFE() > + break; > + case sizeof(uint64_t): > + __RTE_ARM_LOAD_EXC_64(pmc->addr, cur_value, __ATOMIC_RELAXED); > + __RTE_ARM_WFE() default: return -1; /* unexpected size */ > + }