From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4C0BF41E8C; Tue, 14 Mar 2023 07:45:08 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DDA3F40F16; Tue, 14 Mar 2023 07:45:07 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id A6C7E40A7E for ; Tue, 14 Mar 2023 07:45:06 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 32E4TKFh006629 for ; Mon, 13 Mar 2023 23:45:06 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=NtylZb2uwJRBfdX+Vt96LjkvtUlAnzRKyq/kJT3D534=; b=LkgMXiHHTZ/xSk8ymsjnxzTggN+eEmRBWE4SpfFFviGHVqySm2UPr5HPyhYt7rQmfyAV V+GptXcq/N5T5ZPDPWalxpVhJRARkIHUMosBZtLlE6A9hSptRTPwA6NKP7335yDpTeaV 0ybsEh3AuUmFVvEVUQMkaJFxbwPNS4G6LUg3OTjiajAOnehG3swmP1Wrv5jWz9aJK8tY Qirg+9NfiLx8h6DZVRB1I22vvEte0FY590Q/rmGx9PWegh+SklLY6mOZDJFdOyu2XY17 qMzW9cq+8k1u9grOi3L0AxpLKxYqEjT6/wflMGC+APZJPs6oecRdwBRrIJIcr0G0I4kw iw== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3paak89paw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 13 Mar 2023 23:45:05 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 13 Mar 2023 23:45:03 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.42 via Frontend Transport; Mon, 13 Mar 2023 23:45:03 -0700 Received: from ml-host-33.caveonetworks.com (unknown [10.110.143.233]) by maili.marvell.com (Postfix) with ESMTP id 5478B3F709C; Mon, 13 Mar 2023 23:45:03 -0700 (PDT) From: Srikanth Yalavarthi To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Srikanth Yalavarthi , Prince Takkar CC: , , Subject: [PATCH v2 1/1] doc: fix cnxk platform HW accelerator blocks list Date: Mon, 13 Mar 2023 23:45:01 -0700 Message-ID: <20230314064501.14876-1-syalavarthi@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230313174015.13602-1-syalavarthi@marvell.com> References: <20230313174015.13602-1-syalavarthi@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-ORIG-GUID: z881v3yYYzwKoafDwY6D1TgL0w1YYy1G X-Proofpoint-GUID: z881v3yYYzwKoafDwY6D1TgL0w1YYy1G X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-13_13,2023-03-14_01,2023-02-09_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add ML to the list of platform hardware accelerator blocks, and added reference to ML device driver. Fixes: fe83ffd9ec2e ("ml/cnxk: add skeleton") Signed-off-by: Srikanth Yalavarthi Acked-by: Jerin Jacob --- v2: * Updated fixes and commit message * Updated device table index doc/guides/platform/cnxk.rst | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/doc/guides/platform/cnxk.rst b/doc/guides/platform/cnxk.rst index aadd60b5d4..4a1966c66b 100644 --- a/doc/guides/platform/cnxk.rst +++ b/doc/guides/platform/cnxk.rst @@ -76,6 +76,8 @@ DPDK subsystem. +---+-----+--------------------------------------------------------------+ | 12| GPIO| rte_rawdev | +---+-----+--------------------------------------------------------------+ + | 13| ML | rte_mldev | + +---+-----+--------------------------------------------------------------+ PF0 is called the administrative / admin function (AF) and has exclusive privileges to provision RVU functional block's LFs to each of the PF/VF. @@ -165,6 +167,9 @@ This section lists dataplane H/W block(s) available in cnxk SoC. #. **Regex Device Driver** See :doc:`../regexdevs/cn9k` for REE Regex device driver information. +#. **ML Device Driver** + See :doc:`../mldevs/cnxk` for Machine Learning device driver information. + Procedure to Setup Platform --------------------------- -- 2.17.1