From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7B353427E2; Mon, 20 Mar 2023 15:13:27 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8FD6B4282D; Mon, 20 Mar 2023 15:13:19 +0100 (CET) Received: from NAM12-MW2-obe.outbound.protection.outlook.com (mail-mw2nam12on2063.outbound.protection.outlook.com [40.107.244.63]) by mails.dpdk.org (Postfix) with ESMTP id 89B6B410EF for ; Mon, 20 Mar 2023 15:13:18 +0100 (CET) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=T4VYQVTxeNiU5uR+dmrxpKTdDfgqd6QnKSc7SYS7/xjz3gtE6oDUxC0Im7eBHYEjZjX/kcACdGICzjkvE68RgHcYbbC8w1wmc0Z1O1vcaST5lslq1+KzyTNbTwwDAHkPRNZ8UC0PlhhcWKWwRpb6RkIokZxjJHcMpBArPhXPZnN6ZEqPixsPjyoWMtdFKHMeWE1M6T0Ws0Hq4esuLXw2hpYrHaHxklU9TWd71wQ+exkw2W9wtwuzBMMllbsJDPNuZ02cM6PvqmAreBNH9/zDmfGjzoBFrJXi7X4Ev6bHa0OzaRK7Z0q7xWir04QrfSDWeBjE0nWNlLDlcVvpq4+9AQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=9iut3h/BrppH1SuRzTSTKuprgdG1Z1zQdYqXj7AACgI=; b=kJeN8YVR2W0sWM6Hi9GS9brh3gNUwdvvmPjSmZ00bdwAwicAYUvzwS9t9gQvxXuQBPmnPyispoL5vBvXl7rJ1EKkxCJkWE7Hun+5h93QPjDDuL+5dgRF2RreaujB5EyaFYJiY4+ZfzA5EzVNIyQBnX8VYQpWSh8hZMMJ0ztYJoZ6gLwRhf8HMzGYMBXPKjLLwotLd24RqjrUX8+bwsiPtrpJtR6AQ2FQvLXZKjsqOPIyBvBwyBevVEXHJlnkYsEGtN3pYwTbIL0i2gQe2FToPfCf3Mm85cfUYqqU5C7lH4HgEx+fjyxcJS4RLwcsrB+qnsIKHA1XMoVTTovX3w1Wag== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=monjalon.net smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=9iut3h/BrppH1SuRzTSTKuprgdG1Z1zQdYqXj7AACgI=; b=OQT417FzaOXw8lY7vNcph5lUKBWyw8bJPTlxItQIswy8LKIlkpd9pI/JVOILCt8NyBtiSNMD0aQoe9UzXcjV4M5FhnUeuE8La3XnFiOglaFc/SR7Tk4qjMuRkzOZZoMqlx/JBd7jlP5NHYIedRq1FSvdHYvwwzZXekjfrfuHtrNcwE985nF641XB/puu8z9606uJvCP/4ZlJJaiHSe/5tzYyBlp6tvFPGuZNhGuecJUa2tA/Bs//lujsAElvOS3x6poHzbHAFCt+YxlAje/Js4gH1Lb87sTzba4wrfP5r33hpSUBIp5XYylPvr0zbPvAldbFx/Fm1tMXgxFwZrr7bA== Received: from MW4PR03CA0229.namprd03.prod.outlook.com (2603:10b6:303:b9::24) by LV2PR12MB6013.namprd12.prod.outlook.com (2603:10b6:408:171::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6178.37; Mon, 20 Mar 2023 14:13:15 +0000 Received: from CO1NAM11FT019.eop-nam11.prod.protection.outlook.com (2603:10b6:303:b9:cafe::4e) by MW4PR03CA0229.outlook.office365.com (2603:10b6:303:b9::24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6178.37 via Frontend Transport; Mon, 20 Mar 2023 14:13:15 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by CO1NAM11FT019.mail.protection.outlook.com (10.13.175.57) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6222.15 via Frontend Transport; Mon, 20 Mar 2023 14:13:14 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.5; Mon, 20 Mar 2023 07:13:05 -0700 Received: from nvidia.com (10.126.231.37) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.37; Mon, 20 Mar 2023 07:13:02 -0700 From: Hamdan Igbaria To: , , , , Matan Azrad CC: , , Subject: [v1 3/3] net/mlx5/hws: Enhance forward table and FTE creation Date: Mon, 20 Mar 2023 16:12:28 +0200 Message-ID: <20230320141229.104748-3-hamdani@nvidia.com> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20230320141229.104748-1-hamdani@nvidia.com> References: <20230320141229.104748-1-hamdani@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.231.37] X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT019:EE_|LV2PR12MB6013:EE_ X-MS-Office365-Filtering-Correlation-Id: a9909441-51fd-45b5-3030-08db294d3f16 X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: H07w99l4JCSY0nDMjAv//uJ4q97IsHtCt6K/jmKMXz6gXiOZc82v22Bio0YSRuB4JTFaOvIM4UF8zpBsr12J0pnaRiMqIHTfr4WAsC6eqWChfTcXSBD4/rbSFu8uMV9aYhhqdPCvGvxW6nHW1FIr6OX/GxsXhOXJdxsnZ+hKOcd7+AMeIUTBlqhXAYpS2YZIPmOTtcao6FL/Zz23VWBjqu1MUx4A+/1PFMmH6jEGJtGtFKY1I8JbSLqMnHSsogCMj7B8sqq2DfZFPNeprrpgtSJ1MO0JZHeFB/M5P9+Ar984qEVo7V1Y2oflFNAWcH9lpHypyW62qbpAJUQITiECndKMgKwGJIr/ovkYKyCyTvPS039QKm5YCwZyLI9l1Z1Oud6DOEXPX3a7LFZYsX20nVn2TPxnyeBYQA+VOEfCP2sVHdhsNvjVbHpzWT0exx8t51mYHBbOXFJu6GBVvkldrirE/TxBsqX/phydCRrHG+ItIzDoULJwAKki4TS1jNNtiVgnJgfXS/DtzzTwqGxwBu9WvHkyQg68PCc4EQ9F6gFZDkgnbtJ6atzLTXnY6qiG0MfEHoA2WcoI9MgFkWVEalgHLY1vYZAUhOCATSRxqU4W6WolsJiHAlP3mzv2y/pfI10nVSJfWiu9fMmPLh3u0C6Qu5hrh7ZkegN+eJt0MaulTRBOulUM+laVQm4N+nKLRseSbX9KkKUaz5MGmZEbPu+hImIjh3DmImiqP+at/m/9S2TKReanG0oEqJzyO9RY X-Forefront-Antispam-Report: CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230025)(4636009)(376002)(136003)(39860400002)(346002)(396003)(451199018)(46966006)(36840700001)(40470700004)(186003)(1076003)(26005)(7696005)(82740400003)(6286002)(426003)(47076005)(6636002)(2616005)(83380400001)(316002)(478600001)(54906003)(16526019)(110136005)(107886003)(336012)(6666004)(4326008)(8676002)(70586007)(70206006)(41300700001)(36860700001)(36756003)(40460700003)(5660300002)(7636003)(2906002)(8936002)(356005)(82310400005)(40480700001)(86362001)(55016003); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Mar 2023 14:13:14.9759 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a9909441-51fd-45b5-3030-08db294d3f16 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT019.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV2PR12MB6013 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Changed FW FT and FTE creation to allow dynamic creation. Till now only FTE with vport destination action was supported. Also enhanced forward table creation to be generic. Signed-off-by: Hamdan Igbaria Reviewed-by: Alex Vesker --- drivers/common/mlx5/mlx5_prm.h | 20 +++++++-- drivers/net/mlx5/hws/mlx5dr_cmd.c | 66 +++++++++++++++++------------ drivers/net/mlx5/hws/mlx5dr_cmd.h | 28 +++++++++--- drivers/net/mlx5/hws/mlx5dr_table.c | 12 ++++-- 4 files changed, 83 insertions(+), 43 deletions(-) diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index 6b72039bdd..d6af069fae 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -4951,10 +4951,17 @@ struct mlx5_ifc_query_flow_table_out_bits { enum mlx5_flow_destination_type { MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0, + MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1, }; -enum { - MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4, +enum mlx5_flow_context_action { + MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 1 << 2, +}; + +enum mlx5_flow_context_flow_source { + MLX5_FLOW_CONTEXT_FLOW_SOURCE_ANY_VPORT = 0x0, + MLX5_FLOW_CONTEXT_FLOW_SOURCE_UPLINK = 0x1, + MLX5_FLOW_CONTEXT_FLOW_SOURCE_LOCAL_VPORT = 0x2, }; struct mlx5_ifc_set_fte_out_bits { @@ -4992,11 +4999,16 @@ struct mlx5_ifc_flow_context_bits { u8 reserved_at_60[0x10]; u8 action[0x10]; u8 extended_destination[0x1]; - u8 reserved_at_81[0x7]; + u8 reserved_at_81[0x1]; + u8 flow_source[0x2]; + u8 encrypt_decrypt_type[0x4]; u8 destination_list_size[0x18]; u8 reserved_at_a0[0x8]; u8 flow_counter_list_size[0x18]; - u8 reserved_at_c0[0x1740]; + u8 packet_reformat_id[0x20]; + u8 reserved_at_e0[0x40]; + u8 encrypt_decrypt_obj_id[0x20]; + u8 reserved_at_140[0x16c0]; /* Currently only one destnation */ union mlx5_ifc_dest_format_flow_counter_list_auto_bits destination[1]; }; diff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.c b/drivers/net/mlx5/hws/mlx5dr_cmd.c index 6e7d6eb1ac..369bc8bf55 100644 --- a/drivers/net/mlx5/hws/mlx5dr_cmd.c +++ b/drivers/net/mlx5/hws/mlx5dr_cmd.c @@ -140,17 +140,18 @@ mlx5dr_cmd_flow_group_create(struct ibv_context *ctx, return devx_obj; } -static struct mlx5dr_devx_obj * -mlx5dr_cmd_set_vport_fte(struct ibv_context *ctx, - uint32_t table_type, - uint32_t table_id, - uint32_t group_id, - uint32_t vport_id) +struct mlx5dr_devx_obj * +mlx5dr_cmd_set_fte(struct ibv_context *ctx, + uint32_t table_type, + uint32_t table_id, + uint32_t group_id, + struct mlx5dr_cmd_set_fte_attr *fte_attr) { uint32_t in[MLX5_ST_SZ_DW(set_fte_in) + MLX5_ST_SZ_DW(dest_format)] = {0}; uint32_t out[MLX5_ST_SZ_DW(set_fte_out)] = {0}; struct mlx5dr_devx_obj *devx_obj; void *in_flow_context; + uint32_t action_flags; void *in_dests; devx_obj = simple_malloc(sizeof(*devx_obj)); @@ -166,50 +167,51 @@ mlx5dr_cmd_set_vport_fte(struct ibv_context *ctx, in_flow_context = MLX5_ADDR_OF(set_fte_in, in, flow_context); MLX5_SET(flow_context, in_flow_context, group_id, group_id); - MLX5_SET(flow_context, in_flow_context, destination_list_size, 1); - MLX5_SET(flow_context, in_flow_context, action, MLX5_FLOW_CONTEXT_ACTION_FWD_DEST); + MLX5_SET(flow_context, in_flow_context, flow_source, fte_attr->flow_source); + + action_flags = fte_attr->action_flags; + MLX5_SET(flow_context, in_flow_context, action, action_flags); - in_dests = MLX5_ADDR_OF(flow_context, in_flow_context, destination); - MLX5_SET(dest_format, in_dests, destination_type, - MLX5_FLOW_DESTINATION_TYPE_VPORT); - MLX5_SET(dest_format, in_dests, destination_id, vport_id); + if (action_flags & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) { + /* Only destination_list_size of size 1 is supported */ + MLX5_SET(flow_context, in_flow_context, destination_list_size, 1); + in_dests = MLX5_ADDR_OF(flow_context, in_flow_context, destination); + MLX5_SET(dest_format, in_dests, destination_type, fte_attr->destination_type); + MLX5_SET(dest_format, in_dests, destination_id, fte_attr->destination_id); + } devx_obj->obj = mlx5_glue->devx_obj_create(ctx, in, sizeof(in), out, sizeof(out)); if (!devx_obj->obj) { DR_LOG(ERR, "Failed to create FTE"); - simple_free(devx_obj); rte_errno = errno; - return NULL; + goto free_devx; } return devx_obj; -} -void mlx5dr_cmd_miss_ft_destroy(struct mlx5dr_cmd_forward_tbl *tbl) -{ - mlx5dr_cmd_destroy_obj(tbl->fte); - mlx5dr_cmd_destroy_obj(tbl->fg); - mlx5dr_cmd_destroy_obj(tbl->ft); +free_devx: + simple_free(devx_obj); + return NULL; } struct mlx5dr_cmd_forward_tbl * -mlx5dr_cmd_miss_ft_create(struct ibv_context *ctx, - struct mlx5dr_cmd_ft_create_attr *ft_attr, - uint32_t vport) +mlx5dr_cmd_forward_tbl_create(struct ibv_context *ctx, + struct mlx5dr_cmd_ft_create_attr *ft_attr, + struct mlx5dr_cmd_set_fte_attr *fte_attr) { struct mlx5dr_cmd_fg_attr fg_attr = {0}; struct mlx5dr_cmd_forward_tbl *tbl; tbl = simple_calloc(1, sizeof(*tbl)); if (!tbl) { - DR_LOG(ERR, "Failed to allocate memory for forward default"); + DR_LOG(ERR, "Failed to allocate memory"); rte_errno = ENOMEM; return NULL; } tbl->ft = mlx5dr_cmd_flow_table_create(ctx, ft_attr); if (!tbl->ft) { - DR_LOG(ERR, "Failed to create FT for miss-table"); + DR_LOG(ERR, "Failed to create FT"); goto free_tbl; } @@ -218,13 +220,13 @@ mlx5dr_cmd_miss_ft_create(struct ibv_context *ctx, tbl->fg = mlx5dr_cmd_flow_group_create(ctx, &fg_attr); if (!tbl->fg) { - DR_LOG(ERR, "Failed to create FG for miss-table"); + DR_LOG(ERR, "Failed to create FG"); goto free_ft; } - tbl->fte = mlx5dr_cmd_set_vport_fte(ctx, ft_attr->type, tbl->ft->id, tbl->fg->id, vport); + tbl->fte = mlx5dr_cmd_set_fte(ctx, ft_attr->type, tbl->ft->id, tbl->fg->id, fte_attr); if (!tbl->fte) { - DR_LOG(ERR, "Failed to create FTE for miss-table"); + DR_LOG(ERR, "Failed to create FTE"); goto free_fg; } return tbl; @@ -238,6 +240,14 @@ mlx5dr_cmd_miss_ft_create(struct ibv_context *ctx, return NULL; } +void mlx5dr_cmd_forward_tbl_destroy(struct mlx5dr_cmd_forward_tbl *tbl) +{ + mlx5dr_cmd_destroy_obj(tbl->fte); + mlx5dr_cmd_destroy_obj(tbl->fg); + mlx5dr_cmd_destroy_obj(tbl->ft); + simple_free(tbl); +} + void mlx5dr_cmd_set_attr_connect_miss_tbl(struct mlx5dr_context *ctx, uint32_t fw_ft_type, enum mlx5dr_table_type type, diff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.h b/drivers/net/mlx5/hws/mlx5dr_cmd.h index 7d03f3d169..e57013c309 100644 --- a/drivers/net/mlx5/hws/mlx5dr_cmd.h +++ b/drivers/net/mlx5/hws/mlx5dr_cmd.h @@ -5,6 +5,13 @@ #ifndef MLX5DR_CMD_H_ #define MLX5DR_CMD_H_ +struct mlx5dr_cmd_set_fte_attr { + uint32_t action_flags; + uint8_t destination_type; + uint32_t destination_id; + uint8_t flow_source; +}; + struct mlx5dr_cmd_ft_create_attr { uint8_t type; uint8_t level; @@ -263,6 +270,20 @@ mlx5dr_cmd_header_modify_pattern_create(struct ibv_context *ctx, uint32_t pattern_length, uint8_t *actions); +struct mlx5dr_devx_obj * +mlx5dr_cmd_set_fte(struct ibv_context *ctx, + uint32_t table_type, + uint32_t table_id, + uint32_t group_id, + struct mlx5dr_cmd_set_fte_attr *fte_attr); + +struct mlx5dr_cmd_forward_tbl * +mlx5dr_cmd_forward_tbl_create(struct ibv_context *ctx, + struct mlx5dr_cmd_ft_create_attr *ft_attr, + struct mlx5dr_cmd_set_fte_attr *fte_attr); + +void mlx5dr_cmd_forward_tbl_destroy(struct mlx5dr_cmd_forward_tbl *tbl); + struct mlx5dr_devx_obj * mlx5dr_cmd_alias_obj_create(struct ibv_context *ctx, struct mlx5dr_cmd_alias_obj_create_attr *alias_attr); @@ -275,13 +296,6 @@ int mlx5dr_cmd_query_ib_port(struct ibv_context *ctx, int mlx5dr_cmd_query_caps(struct ibv_context *ctx, struct mlx5dr_cmd_query_caps *caps); -void mlx5dr_cmd_miss_ft_destroy(struct mlx5dr_cmd_forward_tbl *tbl); - -struct mlx5dr_cmd_forward_tbl * -mlx5dr_cmd_miss_ft_create(struct ibv_context *ctx, - struct mlx5dr_cmd_ft_create_attr *ft_attr, - uint32_t vport); - void mlx5dr_cmd_set_attr_connect_miss_tbl(struct mlx5dr_context *ctx, uint32_t fw_ft_type, enum mlx5dr_table_type type, diff --git a/drivers/net/mlx5/hws/mlx5dr_table.c b/drivers/net/mlx5/hws/mlx5dr_table.c index 327e2ec710..8474a9cf61 100644 --- a/drivers/net/mlx5/hws/mlx5dr_table.c +++ b/drivers/net/mlx5/hws/mlx5dr_table.c @@ -20,6 +20,7 @@ static int mlx5dr_table_up_default_fdb_miss_tbl(struct mlx5dr_table *tbl) { struct mlx5dr_cmd_ft_create_attr ft_attr = {0}; + struct mlx5dr_cmd_set_fte_attr fte_attr = {0}; struct mlx5dr_cmd_forward_tbl *default_miss; struct mlx5dr_context *ctx = tbl->ctx; uint8_t tbl_type = tbl->type; @@ -40,8 +41,12 @@ mlx5dr_table_up_default_fdb_miss_tbl(struct mlx5dr_table *tbl) assert(ctx->caps->eswitch_manager); vport = ctx->caps->eswitch_manager_vport_number; - default_miss = mlx5dr_cmd_miss_ft_create(mlx5dr_context_get_local_ibv(ctx), - &ft_attr, vport); + fte_attr.action_flags = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST; + fte_attr.destination_type = MLX5_FLOW_DESTINATION_TYPE_VPORT; + fte_attr.destination_id = vport; + + default_miss = mlx5dr_cmd_forward_tbl_create(mlx5dr_context_get_local_ibv(ctx), + &ft_attr, &fte_attr); if (!default_miss) { DR_LOG(ERR, "Failed to default miss table type: 0x%x", tbl_type); return rte_errno; @@ -66,9 +71,8 @@ static void mlx5dr_table_down_default_fdb_miss_tbl(struct mlx5dr_table *tbl) if (--default_miss->refcount) return; - mlx5dr_cmd_miss_ft_destroy(default_miss); + mlx5dr_cmd_forward_tbl_destroy(default_miss); - simple_free(default_miss); ctx->common_res[tbl_type].default_miss = NULL; } -- 2.26.3