From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 91241428CE; Tue, 4 Apr 2023 16:19:56 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 966C542D37; Tue, 4 Apr 2023 16:19:13 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 14E7140EF0 for ; Tue, 4 Apr 2023 16:19:10 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 334ApmU3017569 for ; Tue, 4 Apr 2023 07:19:10 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=tUOxGFhthRmHBhFa4RE24L8wNzw2yu4oMliLz14QBsc=; b=iH+wxwWK+mEcOEeR90fK0FKo41wd6tTs9VZxac2IZlOmzmegbtrowI7SB9Kdj+aodEWi hs/y+BJ8VBi7FJfwmzO01cSMLkIpzslPELG77t0Fu4G6Gq/T0KXWFjeZKJVwZEZM8AHP cgJ9kqwM/V8FtSpL+Or8xmxJFFV40wETTS7cP2bxFFdgx06DrqrchlBpJ8Z/I1su5Nqk TE0ADXx+Lz/nQR3bI0HIdSi2OrgW15CWQGSU/qo5ra9YhR7Igwn03DClKiJIfg1Jkffm Y98W6xA/7HM1EEF7xp184bknpvEGratwJDdGZE0MfUu7IYhgF9+pveGhwJ8hA8VHKmli uQ== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3ppm4qw0wf-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 04 Apr 2023 07:19:10 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Tue, 4 Apr 2023 07:19:08 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Tue, 4 Apr 2023 07:19:08 -0700 Received: from localhost.marvell.com (unknown [10.106.27.249]) by maili.marvell.com (Postfix) with ESMTP id AD4D25B6930; Tue, 4 Apr 2023 07:19:08 -0700 (PDT) From: Sathesh Edara To: , , , "Radha Mohan Chintakuntla" , Veerasenareddy Burru CC: Subject: [PATCH v1 6/9] net/octeon_ep: fix DMA incompletion Date: Tue, 4 Apr 2023 07:18:51 -0700 Message-ID: <20230404141855.1025625-7-sedara@marvell.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20230404141855.1025625-1-sedara@marvell.com> References: <20230404141855.1025625-1-sedara@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: cSIsjB8Ug5PdsDKOoKbjrE8Ue6iTIezk X-Proofpoint-GUID: cSIsjB8Ug5PdsDKOoKbjrE8Ue6iTIezk X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-04_06,2023-04-04_04,2023-02-09_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch fixes the DMA incompletion during packet reads. Signed-off-by: Sathesh Edara --- drivers/net/octeon_ep/otx_ep_common.h | 8 ++++++++ drivers/net/octeon_ep/otx_ep_rxtx.c | 4 ++++ 2 files changed, 12 insertions(+) diff --git a/drivers/net/octeon_ep/otx_ep_common.h b/drivers/net/octeon_ep/otx_ep_common.h index 76528ed49d..1d9da5954e 100644 --- a/drivers/net/octeon_ep/otx_ep_common.h +++ b/drivers/net/octeon_ep/otx_ep_common.h @@ -345,6 +345,14 @@ struct otx_ep_droq { */ void *pkts_sent_reg; + /** Fix for DMA incompletion during pkt reads. + * This variable is used to initiate a sent_reg_read + * that completes pending dma + * this variable is used as lvalue so compiler cannot optimize + * the reads. + */ + uint32_t sent_reg_val; + /* Statistics for this DROQ. */ struct otx_ep_droq_stats stats; diff --git a/drivers/net/octeon_ep/otx_ep_rxtx.c b/drivers/net/octeon_ep/otx_ep_rxtx.c index c4153bd583..ca968f6fe7 100644 --- a/drivers/net/octeon_ep/otx_ep_rxtx.c +++ b/drivers/net/octeon_ep/otx_ep_rxtx.c @@ -917,6 +917,10 @@ otx_ep_droq_read_packet(struct otx_ep_device *otx_ep, struct rte_mbuf *first_buf = NULL; struct rte_mbuf *last_buf = NULL; + /* csr read helps to flush pending dma */ + droq->sent_reg_val = rte_read32(droq->pkts_sent_reg); + rte_rmb(); + while (pkt_len < total_pkt_len) { int cpy_len = 0; -- 2.31.1