From: Junfeng Guo <junfeng.guo@intel.com>
To: qi.z.zhang@intel.com, jingjing.wu@intel.com,
ferruh.yigit@amd.com, beilei.xing@intel.com
Cc: dev@dpdk.org, Junfeng Guo <junfeng.guo@intel.com>,
Rushil Gupta <rushilg@google.com>,
Joshua Washington <joshwash@google.com>,
Jeroen de Borst <jeroendb@google.com>
Subject: [PATCH] net/gve: add struct members and typedefs for DQO
Date: Mon, 10 Apr 2023 14:47:24 +0800 [thread overview]
Message-ID: <20230410064724.2094392-1-junfeng.guo@intel.com> (raw)
Add struct members for gve_tx_queue and gve_rx_queue.
Add typedefs for little endians.
Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Rushil Gupta <rushilg@google.com>
Signed-off-by: Joshua Washington <joshwash@google.com>
Signed-off-by: Jeroen de Borst <jeroendb@google.com>
---
.mailmap | 1 +
drivers/net/gve/base/gve_osdep.h | 4 ++++
drivers/net/gve/gve_ethdev.h | 9 +++++++++
3 files changed, 14 insertions(+)
diff --git a/.mailmap b/.mailmap
index 0859104404..10e1392cd8 100644
--- a/.mailmap
+++ b/.mailmap
@@ -590,6 +590,7 @@ Jens Freimann <jfreimann@redhat.com> <jfreiman@redhat.com>
Jeremy Plsek <jplsek@iol.unh.edu>
Jeremy Spewock <jspewock@iol.unh.edu>
Jerin Jacob <jerinj@marvell.com> <jerin.jacob@caviumnetworks.com> <jerinjacobk@gmail.com>
+Jeroen de Borst <jeroendb@google.com>
Jerome Jutteau <jerome.jutteau@outscale.com>
Jerry Hao OS <jerryhao@os.amperecomputing.com>
Jerry Lilijun <jerry.lilijun@huawei.com>
diff --git a/drivers/net/gve/base/gve_osdep.h b/drivers/net/gve/base/gve_osdep.h
index 7cb73002f4..abf3d379ae 100644
--- a/drivers/net/gve/base/gve_osdep.h
+++ b/drivers/net/gve/base/gve_osdep.h
@@ -35,6 +35,10 @@ typedef rte_be16_t __be16;
typedef rte_be32_t __be32;
typedef rte_be64_t __be64;
+typedef rte_le16_t __le16;
+typedef rte_le32_t __le32;
+typedef rte_le64_t __le64;
+
typedef rte_iova_t dma_addr_t;
#define ETH_MIN_MTU RTE_ETHER_MIN_MTU
diff --git a/drivers/net/gve/gve_ethdev.h b/drivers/net/gve/gve_ethdev.h
index 42a02cf5d4..0b825113f6 100644
--- a/drivers/net/gve/gve_ethdev.h
+++ b/drivers/net/gve/gve_ethdev.h
@@ -11,6 +11,9 @@
#include "base/gve.h"
+/* TODO: this is a workaround to ensure that Tx complq is enough */
+#define DQO_TX_MULTIPLIER 4
+
/*
* Following macros are derived from linux/pci_regs.h, however,
* we can't simply include that header here, as there is no such
@@ -124,6 +127,9 @@ struct gve_tx_queue {
const struct rte_memzone *qres_mz;
struct gve_queue_resources *qres;
+ /* newly added for DQO */
+ uint64_t compl_ring_phys_addr;
+
/* Only valid for DQO_RDA queue format */
struct gve_tx_queue *complq;
@@ -164,6 +170,9 @@ struct gve_rx_queue {
uint16_t ntfy_id;
uint16_t rx_buf_len;
+ /* newly added for DQO */
+ uint64_t compl_ring_phys_addr;
+
/* Only valid for DQO_RDA queue format */
struct gve_rx_queue *bufq;
--
2.34.1
next reply other threads:[~2023-04-10 6:47 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-10 6:47 Junfeng Guo [this message]
2023-05-04 8:13 ` Ferruh Yigit
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