* [PATCH 00/13] Sync the kernel driver logic
@ 2023-04-10 11:00 Chaoyong He
2023-04-10 11:00 ` [PATCH 01/13] net/nfp: define correct size for configuration BAR Chaoyong He
` (14 more replies)
0 siblings, 15 replies; 16+ messages in thread
From: Chaoyong He @ 2023-04-10 11:00 UTC (permalink / raw)
To: dev; +Cc: oss-drivers, niklas.soderlund, Chaoyong He
The DPDK NFP PMD share the same underlying data structure and API with
the NFP kernel driver, because they use the same firmware.
The DPDK NFP PMD only has a very initial version and not changed for a
long time, but the NFP kernel driver keeps evolve at the same time, so
the differece between them are keeping expand.
This patch series try to sync the needed logics to narrow the gap.
Chaoyong He (13):
net/nfp: define correct size for configuration BAR
net/nfp: move shared target logic to own source file
net/nfp: remove the redundant macro about CPP target
net/nfp: drop usage of return error helpers
net/nfp: use generic macros for array size and to set bits
net/nfp: remove dead code related to CPP
net/nfp: remove duplicated nffw defines
net/nfp: move NFD3 logic to own source file
net/nfp: adjust the coding style for NFD3
net/nfp: rename macro name of NFD3 Tx descriptor
net/nfp: move NFDk logic to own source file
net/nfp: adjust the coding style for NFDk
net/nfp: modify the logic of some NFDk function
drivers/net/nfp/flower/nfp_flower.c | 9 +-
drivers/net/nfp/flower/nfp_flower_ctrl.c | 3 +-
.../net/nfp/flower/nfp_flower_representor.c | 1 +
drivers/net/nfp/meson.build | 3 +
drivers/net/nfp/nfd3/nfp_nfd3.h | 161 +++
drivers/net/nfp/nfd3/nfp_nfd3_dp.c | 343 ++++++
drivers/net/nfp/nfdk/nfp_nfdk.h | 239 +++++
drivers/net/nfp/nfdk/nfp_nfdk_dp.c | 437 ++++++++
drivers/net/nfp/nfp_common.c | 6 +-
drivers/net/nfp/nfp_cpp_bridge.c | 5 +-
drivers/net/nfp/nfp_ctrl.h | 7 +-
drivers/net/nfp/nfp_ethdev.c | 5 +-
drivers/net/nfp/nfp_ethdev_vf.c | 2 +
drivers/net/nfp/nfp_rxtx.c | 844 +--------------
drivers/net/nfp/nfp_rxtx.h | 208 +---
.../net/nfp/nfpcore/nfp-common/nfp_cppat.h | 725 -------------
.../net/nfp/nfpcore/nfp-common/nfp_platform.h | 35 -
.../net/nfp/nfpcore/nfp-common/nfp_resid.h | 592 -----------
drivers/net/nfp/nfpcore/nfp6000/nfp6000.h | 20 +
drivers/net/nfp/nfpcore/nfp_cpp.h | 155 ++-
drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c | 3 +-
drivers/net/nfp/nfpcore/nfp_cppcore.c | 47 +-
drivers/net/nfp/nfpcore/nfp_hwinfo.h | 2 +-
drivers/net/nfp/nfpcore/nfp_mutex.c | 39 +-
drivers/net/nfp/nfpcore/nfp_nffw.c | 8 +-
drivers/net/nfp/nfpcore/nfp_nffw.h | 10 -
drivers/net/nfp/nfpcore/nfp_nsp.c | 2 +-
drivers/net/nfp/nfpcore/nfp_nsp.h | 12 +-
drivers/net/nfp/nfpcore/nfp_nsp_cmds.c | 2 +-
drivers/net/nfp/nfpcore/nfp_nsp_eth.c | 34 +-
drivers/net/nfp/nfpcore/nfp_resource.c | 2 +-
drivers/net/nfp/nfpcore/nfp_target.c | 994 ++++++++++++++++++
drivers/net/nfp/nfpcore/nfp_target.h | 3 -
33 files changed, 2417 insertions(+), 2541 deletions(-)
create mode 100644 drivers/net/nfp/nfd3/nfp_nfd3.h
create mode 100644 drivers/net/nfp/nfd3/nfp_nfd3_dp.c
create mode 100644 drivers/net/nfp/nfdk/nfp_nfdk.h
create mode 100644 drivers/net/nfp/nfdk/nfp_nfdk_dp.c
delete mode 100644 drivers/net/nfp/nfpcore/nfp-common/nfp_cppat.h
delete mode 100644 drivers/net/nfp/nfpcore/nfp-common/nfp_platform.h
delete mode 100644 drivers/net/nfp/nfpcore/nfp-common/nfp_resid.h
create mode 100644 drivers/net/nfp/nfpcore/nfp_target.c
--
2.39.1
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 01/13] net/nfp: define correct size for configuration BAR
2023-04-10 11:00 [PATCH 00/13] Sync the kernel driver logic Chaoyong He
@ 2023-04-10 11:00 ` Chaoyong He
2023-04-10 11:00 ` [PATCH 02/13] net/nfp: move shared target logic to own source file Chaoyong He
` (13 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Chaoyong He @ 2023-04-10 11:00 UTC (permalink / raw)
To: dev; +Cc: oss-drivers, niklas.soderlund, Chaoyong He
For NFP6000, the size of configuration BAR is always 32kB.
Remove the out of date value of macro and replace the hard
code value with this constant macro.
Signed-off-by: Chaoyong He <chaoyong.he@corigine.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund@corigine.com>
---
drivers/net/nfp/flower/nfp_flower.c | 4 ++--
drivers/net/nfp/nfp_ctrl.h | 7 +------
drivers/net/nfp/nfp_ethdev.c | 3 ++-
3 files changed, 5 insertions(+), 9 deletions(-)
diff --git a/drivers/net/nfp/flower/nfp_flower.c b/drivers/net/nfp/flower/nfp_flower.c
index 6f197396a4..4af1900bde 100644
--- a/drivers/net/nfp/flower/nfp_flower.c
+++ b/drivers/net/nfp/flower/nfp_flower.c
@@ -1108,7 +1108,7 @@ nfp_init_app_fw_flower(struct nfp_pf_dev *pf_dev)
/* Map the PF ctrl bar */
pf_dev->ctrl_bar = nfp_rtsym_map(pf_dev->sym_tbl, "_pf0_net_bar0",
- 32768, &pf_dev->ctrl_area);
+ NFP_NET_CFG_BAR_SZ, &pf_dev->ctrl_area);
if (pf_dev->ctrl_bar == NULL) {
PMD_INIT_LOG(ERR, "Cloud not map the PF vNIC ctrl bar");
ret = -ENODEV;
@@ -1145,7 +1145,7 @@ nfp_init_app_fw_flower(struct nfp_pf_dev *pf_dev)
/* Map the ctrl vNIC ctrl bar */
ctrl_hw->ctrl_bar = nfp_rtsym_map(pf_dev->sym_tbl, "_pf0_net_ctrl_bar",
- 32768, &ctrl_hw->ctrl_area);
+ NFP_NET_CFG_BAR_SZ, &ctrl_hw->ctrl_area);
if (ctrl_hw->ctrl_bar == NULL) {
PMD_INIT_LOG(ERR, "Cloud not map the ctrl vNIC ctrl bar");
ret = -ENODEV;
diff --git a/drivers/net/nfp/nfp_ctrl.h b/drivers/net/nfp/nfp_ctrl.h
index bcaac1f32a..c5961bdfcf 100644
--- a/drivers/net/nfp/nfp_ctrl.h
+++ b/drivers/net/nfp/nfp_ctrl.h
@@ -14,14 +14,9 @@
/*
* Configuration BAR size.
*
- * The configuration BAR is 8K in size, but on the NFP6000, due to
- * THB-350, 32k needs to be reserved.
+ * On the NFP6000, due to THB-350, the configuration BAR is 32K in size.
*/
-#ifdef __NFP_IS_6000
#define NFP_NET_CFG_BAR_SZ (32 * 1024)
-#else
-#define NFP_NET_CFG_BAR_SZ (8 * 1024)
-#endif
/* Offset in Freelist buffer where packet starts on RX */
#define NFP_NET_RX_OFFSET 32
diff --git a/drivers/net/nfp/nfp_ethdev.c b/drivers/net/nfp/nfp_ethdev.c
index 56fb8e8c73..26cf9cd01c 100644
--- a/drivers/net/nfp/nfp_ethdev.c
+++ b/drivers/net/nfp/nfp_ethdev.c
@@ -827,7 +827,8 @@ nfp_init_app_fw_nic(struct nfp_pf_dev *pf_dev)
/* Map the symbol table */
pf_dev->ctrl_bar = nfp_rtsym_map(pf_dev->sym_tbl, "_pf0_net_bar0",
- app_fw_nic->total_phyports * 32768, &pf_dev->ctrl_area);
+ app_fw_nic->total_phyports * NFP_NET_CFG_BAR_SZ,
+ &pf_dev->ctrl_area);
if (pf_dev->ctrl_bar == NULL) {
PMD_INIT_LOG(ERR, "nfp_rtsym_map fails for _pf0_net_ctrl_bar");
ret = -EIO;
--
2.39.1
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 02/13] net/nfp: move shared target logic to own source file
2023-04-10 11:00 [PATCH 00/13] Sync the kernel driver logic Chaoyong He
2023-04-10 11:00 ` [PATCH 01/13] net/nfp: define correct size for configuration BAR Chaoyong He
@ 2023-04-10 11:00 ` Chaoyong He
2023-04-10 11:00 ` [PATCH 03/13] net/nfp: remove the redundant macro about CPP target Chaoyong He
` (12 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Chaoyong He @ 2023-04-10 11:00 UTC (permalink / raw)
To: dev; +Cc: oss-drivers, niklas.soderlund, Chaoyong He
Move the needed logic of nfp_target.h and nfp_cppat.h
to a new source file nfp_target.c, and delete the logic
which are not used at all.
The code is moved verbatim from the header file to the source
file, no functional change.
This mainly to mimic the source file structure in the kernel
driver, and also gives a nice decrease in driver size.
Signed-off-by: Chaoyong He <chaoyong.he@corigine.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund@corigine.com>
---
drivers/net/nfp/meson.build | 1 +
.../net/nfp/nfpcore/nfp-common/nfp_cppat.h | 725 -------------
drivers/net/nfp/nfpcore/nfp6000/nfp6000.h | 20 +
drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c | 3 +-
drivers/net/nfp/nfpcore/nfp_cppcore.c | 1 -
drivers/net/nfp/nfpcore/nfp_target.c | 994 ++++++++++++++++++
drivers/net/nfp/nfpcore/nfp_target.h | 1 -
7 files changed, 1016 insertions(+), 729 deletions(-)
delete mode 100644 drivers/net/nfp/nfpcore/nfp-common/nfp_cppat.h
create mode 100644 drivers/net/nfp/nfpcore/nfp_target.c
diff --git a/drivers/net/nfp/meson.build b/drivers/net/nfp/meson.build
index b60eaed2b7..6d122f5ce9 100644
--- a/drivers/net/nfp/meson.build
+++ b/drivers/net/nfp/meson.build
@@ -22,6 +22,7 @@ sources = files(
'nfpcore/nfp_mutex.c',
'nfpcore/nfp_nsp_eth.c',
'nfpcore/nfp_hwinfo.c',
+ 'nfpcore/nfp_target.c',
'nfp_common.c',
'nfp_rxtx.c',
'nfp_cpp_bridge.c',
diff --git a/drivers/net/nfp/nfpcore/nfp-common/nfp_cppat.h b/drivers/net/nfp/nfpcore/nfp-common/nfp_cppat.h
deleted file mode 100644
index 538f882bf2..0000000000
--- a/drivers/net/nfp/nfpcore/nfp-common/nfp_cppat.h
+++ /dev/null
@@ -1,725 +0,0 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018 Netronome Systems, Inc.
- * All rights reserved.
- */
-
-#ifndef __NFP_CPPAT_H__
-#define __NFP_CPPAT_H__
-
-#include "nfp_platform.h"
-#include "nfp_resid.h"
-
-/* This file contains helpers for creating CPP commands
- *
- * All magic NFP-6xxx IMB 'mode' numbers here are from:
- * Databook (1 August 2013)
- * - System Overview and Connectivity
- * -- Internal Connectivity
- * --- Distributed Switch Fabric - Command Push/Pull (DSF-CPP) Bus
- * ---- CPP addressing
- * ----- Table 3.6. CPP Address Translation Mode Commands
- */
-
-#define _NIC_NFP6000_MU_LOCALITY_DIRECT 2
-
-static inline int
-_nfp6000_decode_basic(uint64_t addr, int *dest_island, int cpp_tgt, int mode,
- int addr40, int isld1, int isld0);
-
-static uint64_t
-_nic_mask64(int msb, int lsb, int at0)
-{
- uint64_t v;
- int w = msb - lsb + 1;
-
- if (w == 64)
- return ~(uint64_t)0;
-
- if ((lsb + w) > 64)
- return 0;
-
- v = (UINT64_C(1) << w) - 1;
-
- if (at0)
- return v;
-
- return v << lsb;
-}
-
-/* For VQDR, we may not modify the Channel bits, which might overlap
- * with the Index bit. When it does, we need to ensure that isld0 == isld1.
- */
-static inline int
-_nfp6000_encode_basic(uint64_t *addr, int dest_island, int cpp_tgt, int mode,
- int addr40, int isld1, int isld0)
-{
- uint64_t _u64;
- int iid_lsb, idx_lsb;
- int i, v = 0;
- int isld[2];
-
- isld[0] = isld0;
- isld[1] = isld1;
-
- switch (cpp_tgt) {
- case NFP6000_CPPTGT_MU:
- /* This function doesn't handle MU */
- return NFP_ERRNO(EINVAL);
- case NFP6000_CPPTGT_CTXPB:
- /* This function doesn't handle CTXPB */
- return NFP_ERRNO(EINVAL);
- default:
- break;
- }
-
- switch (mode) {
- case 0:
- if (cpp_tgt == NFP6000_CPPTGT_VQDR && !addr40) {
- /*
- * In this specific mode we'd rather not modify the
- * address but we can verify if the existing contents
- * will point to a valid island.
- */
- i = _nfp6000_decode_basic(*addr, &v, cpp_tgt, mode,
- addr40, isld1,
- isld0);
- if (i != 0)
- /* Full Island ID and channel bits overlap */
- return i;
-
- /*
- * If dest_island is invalid, the current address won't
- * go where expected.
- */
- if (dest_island != -1 && dest_island != v)
- return NFP_ERRNO(EINVAL);
-
- /* If dest_island was -1, we don't care */
- return 0;
- }
-
- iid_lsb = (addr40) ? 34 : 26;
-
- /* <39:34> or <31:26> */
- _u64 = _nic_mask64((iid_lsb + 5), iid_lsb, 0);
- *addr &= ~_u64;
- *addr |= (((uint64_t)dest_island) << iid_lsb) & _u64;
- return 0;
- case 1:
- if (cpp_tgt == NFP6000_CPPTGT_VQDR && !addr40) {
- i = _nfp6000_decode_basic(*addr, &v, cpp_tgt, mode,
- addr40, isld1, isld0);
- if (i != 0)
- /* Full Island ID and channel bits overlap */
- return i;
-
- /*
- * If dest_island is invalid, the current address won't
- * go where expected.
- */
- if (dest_island != -1 && dest_island != v)
- return NFP_ERRNO(EINVAL);
-
- /* If dest_island was -1, we don't care */
- return 0;
- }
-
- idx_lsb = (addr40) ? 39 : 31;
- if (dest_island == isld0) {
- /* Only need to clear the Index bit */
- *addr &= ~_nic_mask64(idx_lsb, idx_lsb, 0);
- return 0;
- }
-
- if (dest_island == isld1) {
- /* Only need to set the Index bit */
- *addr |= (UINT64_C(1) << idx_lsb);
- return 0;
- }
-
- return NFP_ERRNO(ENODEV);
- case 2:
- if (cpp_tgt == NFP6000_CPPTGT_VQDR && !addr40) {
- /* iid<0> = addr<30> = channel<0> */
- /* channel<1> = addr<31> = Index */
-
- /*
- * Special case where we allow channel bits to be set
- * before hand and with them select an island.
- * So we need to confirm that it's at least plausible.
- */
- i = _nfp6000_decode_basic(*addr, &v, cpp_tgt, mode,
- addr40, isld1, isld0);
- if (i != 0)
- /* Full Island ID and channel bits overlap */
- return i;
-
- /*
- * If dest_island is invalid, the current address won't
- * go where expected.
- */
- if (dest_island != -1 && dest_island != v)
- return NFP_ERRNO(EINVAL);
-
- /* If dest_island was -1, we don't care */
- return 0;
- }
-
- /*
- * Make sure we compare against isldN values by clearing the
- * LSB. This is what the silicon does.
- **/
- isld[0] &= ~1;
- isld[1] &= ~1;
-
- idx_lsb = (addr40) ? 39 : 31;
- iid_lsb = idx_lsb - 1;
-
- /*
- * Try each option, take first one that fits. Not sure if we
- * would want to do some smarter searching and prefer 0 or non-0
- * island IDs.
- */
-
- for (i = 0; i < 2; i++) {
- for (v = 0; v < 2; v++) {
- if (dest_island != (isld[i] | v))
- continue;
- *addr &= ~_nic_mask64(idx_lsb, iid_lsb, 0);
- *addr |= (((uint64_t)i) << idx_lsb);
- *addr |= (((uint64_t)v) << iid_lsb);
- return 0;
- }
- }
-
- return NFP_ERRNO(ENODEV);
- case 3:
- if (cpp_tgt == NFP6000_CPPTGT_VQDR && !addr40) {
- /*
- * iid<0> = addr<29> = data
- * iid<1> = addr<30> = channel<0>
- * channel<1> = addr<31> = Index
- */
- i = _nfp6000_decode_basic(*addr, &v, cpp_tgt, mode,
- addr40, isld1, isld0);
- if (i != 0)
- /* Full Island ID and channel bits overlap */
- return i;
-
- if (dest_island != -1 && dest_island != v)
- return NFP_ERRNO(EINVAL);
-
- /* If dest_island was -1, we don't care */
- return 0;
- }
-
- isld[0] &= ~3;
- isld[1] &= ~3;
-
- idx_lsb = (addr40) ? 39 : 31;
- iid_lsb = idx_lsb - 2;
-
- for (i = 0; i < 2; i++) {
- for (v = 0; v < 4; v++) {
- if (dest_island != (isld[i] | v))
- continue;
- *addr &= ~_nic_mask64(idx_lsb, iid_lsb, 0);
- *addr |= (((uint64_t)i) << idx_lsb);
- *addr |= (((uint64_t)v) << iid_lsb);
- return 0;
- }
- }
- return NFP_ERRNO(ENODEV);
- default:
- break;
- }
-
- return NFP_ERRNO(EINVAL);
-}
-
-static inline int
-_nfp6000_decode_basic(uint64_t addr, int *dest_island, int cpp_tgt, int mode,
- int addr40, int isld1, int isld0)
-{
- int iid_lsb, idx_lsb;
-
- switch (cpp_tgt) {
- case NFP6000_CPPTGT_MU:
- /* This function doesn't handle MU */
- return NFP_ERRNO(EINVAL);
- case NFP6000_CPPTGT_CTXPB:
- /* This function doesn't handle CTXPB */
- return NFP_ERRNO(EINVAL);
- default:
- break;
- }
-
- switch (mode) {
- case 0:
- /*
- * For VQDR, in this mode for 32-bit addressing it would be
- * islands 0, 16, 32 and 48 depending on channel and upper
- * address bits. Since those are not all valid islands, most
- * decode cases would result in bad island IDs, but we do them
- * anyway since this is decoding an address that is already
- * assumed to be used as-is to get to sram.
- */
- iid_lsb = (addr40) ? 34 : 26;
- *dest_island = (int)(addr >> iid_lsb) & 0x3F;
- return 0;
- case 1:
- /*
- * For VQDR 32-bit, this would decode as:
- * Channel 0: island#0
- * Channel 1: island#0
- * Channel 2: island#1
- * Channel 3: island#1
- *
- * That would be valid as long as both islands have VQDR.
- * Let's allow this.
- */
-
- idx_lsb = (addr40) ? 39 : 31;
- if (addr & _nic_mask64(idx_lsb, idx_lsb, 0))
- *dest_island = isld1;
- else
- *dest_island = isld0;
-
- return 0;
- case 2:
- /*
- * For VQDR 32-bit:
- * Channel 0: (island#0 | 0)
- * Channel 1: (island#0 | 1)
- * Channel 2: (island#1 | 0)
- * Channel 3: (island#1 | 1)
- *
- * Make sure we compare against isldN values by clearing the
- * LSB. This is what the silicon does.
- */
- isld0 &= ~1;
- isld1 &= ~1;
-
- idx_lsb = (addr40) ? 39 : 31;
- iid_lsb = idx_lsb - 1;
-
- if (addr & _nic_mask64(idx_lsb, idx_lsb, 0))
- *dest_island = isld1 | (int)((addr >> iid_lsb) & 1);
- else
- *dest_island = isld0 | (int)((addr >> iid_lsb) & 1);
-
- return 0;
- case 3:
- /*
- * In this mode the data address starts to affect the island ID
- * so rather not allow it. In some really specific case one
- * could use this to send the upper half of the VQDR channel to
- * another MU, but this is getting very specific. However, as
- * above for mode 0, this is the decoder and the caller should
- * validate the resulting IID. This blindly does what the
- * silicon would do.
- */
-
- isld0 &= ~3;
- isld1 &= ~3;
-
- idx_lsb = (addr40) ? 39 : 31;
- iid_lsb = idx_lsb - 2;
-
- if (addr & _nic_mask64(idx_lsb, idx_lsb, 0))
- *dest_island = isld1 | (int)((addr >> iid_lsb) & 3);
- else
- *dest_island = isld0 | (int)((addr >> iid_lsb) & 3);
-
- return 0;
- default:
- break;
- }
-
- return NFP_ERRNO(EINVAL);
-}
-
-static inline int
-_nfp6000_cppat_mu_locality_lsb(int mode, int addr40)
-{
- switch (mode) {
- case 0:
- case 1:
- case 2:
- case 3:
- return (addr40) ? 38 : 30;
- default:
- break;
- }
- return NFP_ERRNO(EINVAL);
-}
-
-static inline int
-_nfp6000_encode_mu(uint64_t *addr, int dest_island, int mode, int addr40,
- int isld1, int isld0)
-{
- uint64_t _u64;
- int iid_lsb, idx_lsb, locality_lsb;
- int i, v;
- int isld[2];
- int da;
-
- isld[0] = isld0;
- isld[1] = isld1;
- locality_lsb = _nfp6000_cppat_mu_locality_lsb(mode, addr40);
-
- if (locality_lsb < 0)
- return NFP_ERRNO(EINVAL);
-
- if (((*addr >> locality_lsb) & 3) == _NIC_NFP6000_MU_LOCALITY_DIRECT)
- da = 1;
- else
- da = 0;
-
- switch (mode) {
- case 0:
- iid_lsb = (addr40) ? 32 : 24;
- _u64 = _nic_mask64((iid_lsb + 5), iid_lsb, 0);
- *addr &= ~_u64;
- *addr |= (((uint64_t)dest_island) << iid_lsb) & _u64;
- return 0;
- case 1:
- if (da) {
- iid_lsb = (addr40) ? 32 : 24;
- _u64 = _nic_mask64((iid_lsb + 5), iid_lsb, 0);
- *addr &= ~_u64;
- *addr |= (((uint64_t)dest_island) << iid_lsb) & _u64;
- return 0;
- }
-
- idx_lsb = (addr40) ? 37 : 29;
- if (dest_island == isld0) {
- *addr &= ~_nic_mask64(idx_lsb, idx_lsb, 0);
- return 0;
- }
-
- if (dest_island == isld1) {
- *addr |= (UINT64_C(1) << idx_lsb);
- return 0;
- }
-
- return NFP_ERRNO(ENODEV);
- case 2:
- if (da) {
- iid_lsb = (addr40) ? 32 : 24;
- _u64 = _nic_mask64((iid_lsb + 5), iid_lsb, 0);
- *addr &= ~_u64;
- *addr |= (((uint64_t)dest_island) << iid_lsb) & _u64;
- return 0;
- }
-
- /*
- * Make sure we compare against isldN values by clearing the
- * LSB. This is what the silicon does.
- */
- isld[0] &= ~1;
- isld[1] &= ~1;
-
- idx_lsb = (addr40) ? 37 : 29;
- iid_lsb = idx_lsb - 1;
-
- /*
- * Try each option, take first one that fits. Not sure if we
- * would want to do some smarter searching and prefer 0 or
- * non-0 island IDs.
- */
-
- for (i = 0; i < 2; i++) {
- for (v = 0; v < 2; v++) {
- if (dest_island != (isld[i] | v))
- continue;
- *addr &= ~_nic_mask64(idx_lsb, iid_lsb, 0);
- *addr |= (((uint64_t)i) << idx_lsb);
- *addr |= (((uint64_t)v) << iid_lsb);
- return 0;
- }
- }
- return NFP_ERRNO(ENODEV);
- case 3:
- /*
- * Only the EMU will use 40 bit addressing. Silently set the
- * direct locality bit for everyone else. The SDK toolchain
- * uses dest_island <= 0 to test for atypical address encodings
- * to support access to local-island CTM with a 32-but address
- * (high-locality is effectively ignored and just used for
- * routing to island #0).
- */
- if (dest_island > 0 &&
- (dest_island < 24 || dest_island > 26)) {
- *addr |= ((uint64_t)_NIC_NFP6000_MU_LOCALITY_DIRECT)
- << locality_lsb;
- da = 1;
- }
-
- if (da) {
- iid_lsb = (addr40) ? 32 : 24;
- _u64 = _nic_mask64((iid_lsb + 5), iid_lsb, 0);
- *addr &= ~_u64;
- *addr |= (((uint64_t)dest_island) << iid_lsb) & _u64;
- return 0;
- }
-
- isld[0] &= ~3;
- isld[1] &= ~3;
-
- idx_lsb = (addr40) ? 37 : 29;
- iid_lsb = idx_lsb - 2;
-
- for (i = 0; i < 2; i++) {
- for (v = 0; v < 4; v++) {
- if (dest_island != (isld[i] | v))
- continue;
- *addr &= ~_nic_mask64(idx_lsb, iid_lsb, 0);
- *addr |= (((uint64_t)i) << idx_lsb);
- *addr |= (((uint64_t)v) << iid_lsb);
- return 0;
- }
- }
-
- return NFP_ERRNO(ENODEV);
- default:
- break;
- }
-
- return NFP_ERRNO(EINVAL);
-}
-
-static inline int
-_nfp6000_decode_mu(uint64_t addr, int *dest_island, int mode, int addr40,
- int isld1, int isld0)
-{
- int iid_lsb, idx_lsb, locality_lsb;
- int da;
-
- locality_lsb = _nfp6000_cppat_mu_locality_lsb(mode, addr40);
-
- if (((addr >> locality_lsb) & 3) == _NIC_NFP6000_MU_LOCALITY_DIRECT)
- da = 1;
- else
- da = 0;
-
- switch (mode) {
- case 0:
- iid_lsb = (addr40) ? 32 : 24;
- *dest_island = (int)(addr >> iid_lsb) & 0x3F;
- return 0;
- case 1:
- if (da) {
- iid_lsb = (addr40) ? 32 : 24;
- *dest_island = (int)(addr >> iid_lsb) & 0x3F;
- return 0;
- }
-
- idx_lsb = (addr40) ? 37 : 29;
-
- if (addr & _nic_mask64(idx_lsb, idx_lsb, 0))
- *dest_island = isld1;
- else
- *dest_island = isld0;
-
- return 0;
- case 2:
- if (da) {
- iid_lsb = (addr40) ? 32 : 24;
- *dest_island = (int)(addr >> iid_lsb) & 0x3F;
- return 0;
- }
- /*
- * Make sure we compare against isldN values by clearing the
- * LSB. This is what the silicon does.
- */
- isld0 &= ~1;
- isld1 &= ~1;
-
- idx_lsb = (addr40) ? 37 : 29;
- iid_lsb = idx_lsb - 1;
-
- if (addr & _nic_mask64(idx_lsb, idx_lsb, 0))
- *dest_island = isld1 | (int)((addr >> iid_lsb) & 1);
- else
- *dest_island = isld0 | (int)((addr >> iid_lsb) & 1);
-
- return 0;
- case 3:
- if (da) {
- iid_lsb = (addr40) ? 32 : 24;
- *dest_island = (int)(addr >> iid_lsb) & 0x3F;
- return 0;
- }
-
- isld0 &= ~3;
- isld1 &= ~3;
-
- idx_lsb = (addr40) ? 37 : 29;
- iid_lsb = idx_lsb - 2;
-
- if (addr & _nic_mask64(idx_lsb, idx_lsb, 0))
- *dest_island = isld1 | (int)((addr >> iid_lsb) & 3);
- else
- *dest_island = isld0 | (int)((addr >> iid_lsb) & 3);
-
- return 0;
- default:
- break;
- }
-
- return NFP_ERRNO(EINVAL);
-}
-
-static inline int
-_nfp6000_cppat_addr_encode(uint64_t *addr, int dest_island, int cpp_tgt,
- int mode, int addr40, int isld1, int isld0)
-{
- switch (cpp_tgt) {
- case NFP6000_CPPTGT_NBI:
- case NFP6000_CPPTGT_VQDR:
- case NFP6000_CPPTGT_ILA:
- case NFP6000_CPPTGT_PCIE:
- case NFP6000_CPPTGT_ARM:
- case NFP6000_CPPTGT_CRYPTO:
- case NFP6000_CPPTGT_CLS:
- return _nfp6000_encode_basic(addr, dest_island, cpp_tgt, mode,
- addr40, isld1, isld0);
-
- case NFP6000_CPPTGT_MU:
- return _nfp6000_encode_mu(addr, dest_island, mode, addr40,
- isld1, isld0);
-
- case NFP6000_CPPTGT_CTXPB:
- if (mode != 1 || addr40 != 0)
- return NFP_ERRNO(EINVAL);
-
- *addr &= ~_nic_mask64(29, 24, 0);
- *addr |= (((uint64_t)dest_island) << 24) &
- _nic_mask64(29, 24, 0);
- return 0;
- default:
- break;
- }
-
- return NFP_ERRNO(EINVAL);
-}
-
-static inline int
-_nfp6000_cppat_addr_decode(uint64_t addr, int *dest_island, int cpp_tgt,
- int mode, int addr40, int isld1, int isld0)
-{
- switch (cpp_tgt) {
- case NFP6000_CPPTGT_NBI:
- case NFP6000_CPPTGT_VQDR:
- case NFP6000_CPPTGT_ILA:
- case NFP6000_CPPTGT_PCIE:
- case NFP6000_CPPTGT_ARM:
- case NFP6000_CPPTGT_CRYPTO:
- case NFP6000_CPPTGT_CLS:
- return _nfp6000_decode_basic(addr, dest_island, cpp_tgt, mode,
- addr40, isld1, isld0);
-
- case NFP6000_CPPTGT_MU:
- return _nfp6000_decode_mu(addr, dest_island, mode, addr40,
- isld1, isld0);
-
- case NFP6000_CPPTGT_CTXPB:
- if (mode != 1 || addr40 != 0)
- return -EINVAL;
- *dest_island = (int)(addr >> 24) & 0x3F;
- return 0;
- default:
- break;
- }
-
- return -EINVAL;
-}
-
-static inline int
-_nfp6000_cppat_addr_iid_clear(uint64_t *addr, int cpp_tgt, int mode, int addr40)
-{
- int iid_lsb, locality_lsb, da;
-
- switch (cpp_tgt) {
- case NFP6000_CPPTGT_NBI:
- case NFP6000_CPPTGT_VQDR:
- case NFP6000_CPPTGT_ILA:
- case NFP6000_CPPTGT_PCIE:
- case NFP6000_CPPTGT_ARM:
- case NFP6000_CPPTGT_CRYPTO:
- case NFP6000_CPPTGT_CLS:
- switch (mode) {
- case 0:
- iid_lsb = (addr40) ? 34 : 26;
- *addr &= ~(UINT64_C(0x3F) << iid_lsb);
- return 0;
- case 1:
- iid_lsb = (addr40) ? 39 : 31;
- *addr &= ~_nic_mask64(iid_lsb, iid_lsb, 0);
- return 0;
- case 2:
- iid_lsb = (addr40) ? 38 : 30;
- *addr &= ~_nic_mask64(iid_lsb + 1, iid_lsb, 0);
- return 0;
- case 3:
- iid_lsb = (addr40) ? 37 : 29;
- *addr &= ~_nic_mask64(iid_lsb + 2, iid_lsb, 0);
- return 0;
- default:
- break;
- }
- case NFP6000_CPPTGT_MU:
- locality_lsb = _nfp6000_cppat_mu_locality_lsb(mode, addr40);
- da = (((*addr >> locality_lsb) & 3) ==
- _NIC_NFP6000_MU_LOCALITY_DIRECT);
- switch (mode) {
- case 0:
- iid_lsb = (addr40) ? 32 : 24;
- *addr &= ~(UINT64_C(0x3F) << iid_lsb);
- return 0;
- case 1:
- if (da) {
- iid_lsb = (addr40) ? 32 : 24;
- *addr &= ~(UINT64_C(0x3F) << iid_lsb);
- return 0;
- }
- iid_lsb = (addr40) ? 37 : 29;
- *addr &= ~_nic_mask64(iid_lsb, iid_lsb, 0);
- return 0;
- case 2:
- if (da) {
- iid_lsb = (addr40) ? 32 : 24;
- *addr &= ~(UINT64_C(0x3F) << iid_lsb);
- return 0;
- }
-
- iid_lsb = (addr40) ? 36 : 28;
- *addr &= ~_nic_mask64(iid_lsb + 1, iid_lsb, 0);
- return 0;
- case 3:
- if (da) {
- iid_lsb = (addr40) ? 32 : 24;
- *addr &= ~(UINT64_C(0x3F) << iid_lsb);
- return 0;
- }
-
- iid_lsb = (addr40) ? 35 : 27;
- *addr &= ~_nic_mask64(iid_lsb + 2, iid_lsb, 0);
- return 0;
- default:
- break;
- }
- case NFP6000_CPPTGT_CTXPB:
- if (mode != 1 || addr40 != 0)
- return 0;
- *addr &= ~(UINT64_C(0x3F) << 24);
- return 0;
- default:
- break;
- }
-
- return NFP_ERRNO(EINVAL);
-}
-
-#endif /* __NFP_CPPAT_H__ */
diff --git a/drivers/net/nfp/nfpcore/nfp6000/nfp6000.h b/drivers/net/nfp/nfpcore/nfp6000/nfp6000.h
index 47e1ddaeed..7750a0218e 100644
--- a/drivers/net/nfp/nfpcore/nfp6000/nfp6000.h
+++ b/drivers/net/nfp/nfpcore/nfp6000/nfp6000.h
@@ -26,6 +26,21 @@
#define NFP_MU_ADDR_ACCESS_TYPE_MASK 3ULL
#define NFP_MU_ADDR_ACCESS_TYPE_DIRECT 2ULL
+#define PUSHPULL(pull, push) (((pull) << 4) | ((push) << 0))
+#define PUSH_WIDTH(push_pull) pushpull_width((push_pull) >> 0)
+#define PULL_WIDTH(push_pull) pushpull_width((push_pull) >> 4)
+
+static inline int
+pushpull_width(int pp)
+{
+ pp &= 0xf;
+ if (pp == 0)
+ return -EINVAL;
+
+ return 2 << pp;
+}
+
+
static inline int
nfp_cppat_mu_locality_lsb(int mode, int addr40)
{
@@ -37,4 +52,9 @@ nfp_cppat_mu_locality_lsb(int mode, int addr40)
}
}
+int nfp_target_pushpull(uint32_t cpp_id, uint64_t address);
+int nfp_target_cpp(uint32_t cpp_island_id, uint64_t cpp_island_address,
+ uint32_t *cpp_target_id, uint64_t *cpp_target_address,
+ const uint32_t *imb_table);
+
#endif /* NFP_NFP6000_H */
diff --git a/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c b/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c
index 6029bd6c3a..edf4088747 100644
--- a/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c
+++ b/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c
@@ -34,7 +34,6 @@
#include "nfp_cpp.h"
#include "nfp_logs.h"
-#include "nfp_target.h"
#include "nfp6000/nfp6000.h"
#include "../nfp_logs.h"
@@ -406,7 +405,7 @@ nfp6000_area_init(struct nfp_cpp_area *area, uint32_t dest,
uint32_t token = NFP_CPP_ID_TOKEN_of(dest);
int pp, ret = 0;
- pp = nfp6000_target_pushpull(NFP_CPP_ID(target, action, token),
+ pp = nfp_target_pushpull(NFP_CPP_ID(target, action, token),
address);
if (pp < 0)
return pp;
diff --git a/drivers/net/nfp/nfpcore/nfp_cppcore.c b/drivers/net/nfp/nfpcore/nfp_cppcore.c
index 72f50ace38..1d2468ad7a 100644
--- a/drivers/net/nfp/nfpcore/nfp_cppcore.c
+++ b/drivers/net/nfp/nfpcore/nfp_cppcore.c
@@ -16,7 +16,6 @@
#include "nfp_cpp.h"
#include "nfp_logs.h"
-#include "nfp_target.h"
#include "nfp6000/nfp6000.h"
#include "nfp6000/nfp_xpb.h"
#include "nfp_nffw.h"
diff --git a/drivers/net/nfp/nfpcore/nfp_target.c b/drivers/net/nfp/nfpcore/nfp_target.c
new file mode 100644
index 0000000000..3f7ddfb5e9
--- /dev/null
+++ b/drivers/net/nfp/nfpcore/nfp_target.c
@@ -0,0 +1,994 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (c) 2022 Corigine, Inc.
+ * All rights reserved.
+ */
+
+#include "nfp_cpp.h"
+#include "nfp6000/nfp6000.h"
+
+#define P32 1
+#define P64 2
+
+/*
+ * All magic NFP-6xxx IMB 'mode' numbers here are from:
+ * Databook (1 August 2013)
+ * - System Overview and Connectivity
+ * -- Internal Connectivity
+ * --- Distributed Switch Fabric - Command Push/Pull (DSF-CPP) Bus
+ * ---- CPP addressing
+ * ----- Table 3.6. CPP Address Translation Mode Commands
+ */
+#define NFP6000_MU_LOCALITY_DIRECT 2
+
+static int
+target_rw(uint32_t cpp_id,
+ int pp,
+ int start,
+ int len)
+{
+ uint8_t island;
+
+ island = NFP_CPP_ID_ISLAND_of(cpp_id);
+ if (island != 0 && (island < start || island > (start + len)))
+ return -EINVAL;
+
+ switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
+ case NFP_CPP_ID(0, 0, 0):
+ return PUSHPULL(0, pp);
+ case NFP_CPP_ID(0, 1, 0):
+ return PUSHPULL(pp, 0);
+ case NFP_CPP_ID(0, NFP_CPP_ACTION_RW, 0):
+ return PUSHPULL(pp, pp);
+ default:
+ return -EINVAL;
+ }
+}
+
+static int
+nfp6000_nbi_dma(uint32_t cpp_id)
+{
+ switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
+ case NFP_CPP_ID(0, 0, 0): /* Read NBI DMA */
+ return PUSHPULL(0, P64);
+ case NFP_CPP_ID(0, 1, 0): /* Write NBI DMA */
+ return PUSHPULL(P64, 0);
+ case NFP_CPP_ID(0, NFP_CPP_ACTION_RW, 0):
+ return PUSHPULL(P64, P64);
+ default:
+ return -EINVAL;
+ }
+}
+
+static int
+nfp6000_nbi_stats(uint32_t cpp_id)
+{
+ switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
+ case NFP_CPP_ID(0, 0, 0): /* Read NBI Stats */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 1, 0): /* Write NBI Stats */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, NFP_CPP_ACTION_RW, 0):
+ return PUSHPULL(P32, P32);
+ default:
+ return -EINVAL;
+ }
+}
+
+static int
+nfp6000_nbi_tm(uint32_t cpp_id)
+{
+ switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
+ case NFP_CPP_ID(0, 0, 0): /* Read NBI TM */
+ return PUSHPULL(0, P64);
+ case NFP_CPP_ID(0, 1, 0): /* Write NBI TM */
+ return PUSHPULL(P64, 0);
+ case NFP_CPP_ID(0, NFP_CPP_ACTION_RW, 0):
+ return PUSHPULL(P64, P64);
+ default:
+ return -EINVAL;
+ }
+}
+
+static int
+nfp6000_nbi_ppc(uint32_t cpp_id)
+{
+ switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
+ case NFP_CPP_ID(0, 0, 0): /* Read NBI Preclassifier */
+ return PUSHPULL(0, P64);
+ case NFP_CPP_ID(0, 1, 0): /* Write NBI Preclassifier */
+ return PUSHPULL(P64, 0);
+ case NFP_CPP_ID(0, NFP_CPP_ACTION_RW, 0):
+ return PUSHPULL(P64, P64);
+ default:
+ return -EINVAL;
+ }
+}
+
+static int
+nfp6000_nbi(uint32_t cpp_id,
+ uint64_t address)
+{
+ uint8_t island;
+ uint64_t rel_addr;
+
+ island = NFP_CPP_ID_ISLAND_of(cpp_id);
+ if (island != 8 && island != 9)
+ return -EINVAL;
+
+ rel_addr = address & 0x3FFFFF;
+ if (rel_addr < (1 << 20)) /* [0x000000, 0x100000) */
+ return nfp6000_nbi_dma(cpp_id);
+ else if (rel_addr < (2 << 20)) /* [0x100000, 0x200000) */
+ return nfp6000_nbi_stats(cpp_id);
+ else if (rel_addr < (3 << 20)) /* [0x200000, 0x300000) */
+ return nfp6000_nbi_tm(cpp_id);
+ else /* [0x300000, 0x400000) */
+ return nfp6000_nbi_ppc(cpp_id);
+}
+
+/*
+ * This structure ONLY includes items that can be done with a read or write of
+ * 32-bit or 64-bit words. All others are not listed.
+ */
+static int
+nfp6000_mu_common(uint32_t cpp_id)
+{
+ switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
+ case NFP_CPP_ID(0, NFP_CPP_ACTION_RW, 0): /* read_be/write_be */
+ return PUSHPULL(P64, P64);
+ case NFP_CPP_ID(0, NFP_CPP_ACTION_RW, 1): /* read_le/write_le */
+ return PUSHPULL(P64, P64);
+ case NFP_CPP_ID(0, NFP_CPP_ACTION_RW, 2): /* read_swap_be/write_swap_be */
+ return PUSHPULL(P64, P64);
+ case NFP_CPP_ID(0, NFP_CPP_ACTION_RW, 3): /* read_swap_le/write_swap_le */
+ return PUSHPULL(P64, P64);
+ case NFP_CPP_ID(0, 0, 0): /* read_be */
+ return PUSHPULL(0, P64);
+ case NFP_CPP_ID(0, 0, 1): /* read_le */
+ return PUSHPULL(0, P64);
+ case NFP_CPP_ID(0, 0, 2): /* read_swap_be */
+ return PUSHPULL(0, P64);
+ case NFP_CPP_ID(0, 0, 3): /* read_swap_le */
+ return PUSHPULL(0, P64);
+ case NFP_CPP_ID(0, 1, 0): /* write_be */
+ return PUSHPULL(P64, 0);
+ case NFP_CPP_ID(0, 1, 1): /* write_le */
+ return PUSHPULL(P64, 0);
+ case NFP_CPP_ID(0, 1, 2): /* write_swap_be */
+ return PUSHPULL(P64, 0);
+ case NFP_CPP_ID(0, 1, 3): /* write_swap_le */
+ return PUSHPULL(P64, 0);
+ case NFP_CPP_ID(0, 3, 0): /* atomic_read */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 3, 2): /* mask_compare_write */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 4, 0): /* atomic_write */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 4, 2): /* atomic_write_imm */
+ return PUSHPULL(0, 0);
+ case NFP_CPP_ID(0, 4, 3): /* swap_imm */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 5, 0): /* set */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 5, 3): /* test_set_imm */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 6, 0): /* clr */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 6, 3): /* test_clr_imm */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 7, 0): /* add */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 7, 3): /* test_add_imm */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 8, 0): /* addsat */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 8, 3): /* test_subsat_imm */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 9, 0): /* sub */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 9, 3): /* test_sub_imm */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 10, 0): /* subsat */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 10, 3): /* test_subsat_imm */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 13, 0): /* microq128_get */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 13, 1): /* microq128_pop */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 13, 2): /* microq128_put */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 15, 0): /* xor */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 15, 3): /* test_xor_imm */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 28, 0): /* read32_be */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 28, 1): /* read32_le */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 28, 2): /* read32_swap_be */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 28, 3): /* read32_swap_le */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 31, 0): /* write32_be */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 31, 1): /* write32_le */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 31, 2): /* write32_swap_be */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 31, 3): /* write32_swap_le */
+ return PUSHPULL(P32, 0);
+ default:
+ return -EINVAL;
+ }
+}
+
+static int
+nfp6000_mu_ctm(uint32_t cpp_id)
+{
+ switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
+ case NFP_CPP_ID(0, 16, 1): /* packet_read_packet_status */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 17, 1): /* packet_credit_get */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 17, 3): /* packet_add_thread */
+ return PUSHPULL(0, P64);
+ case NFP_CPP_ID(0, 18, 2): /* packet_free_and_return_pointer */
+ return PUSHPULL(0, P64);
+ case NFP_CPP_ID(0, 18, 3): /* packet_return_pointer */
+ return PUSHPULL(0, P64);
+ case NFP_CPP_ID(0, 21, 0): /* pe_dma_to_memory_indirect */
+ return PUSHPULL(0, P64);
+ case NFP_CPP_ID(0, 21, 1): /* pe_dma_to_memory_indirect_swap */
+ return PUSHPULL(0, P64);
+ case NFP_CPP_ID(0, 21, 2): /* pe_dma_to_memory_indirect_free */
+ return PUSHPULL(0, P64);
+ case NFP_CPP_ID(0, 21, 3): /* pe_dma_to_memory_indirect_free_swap */
+ return PUSHPULL(0, P64);
+ default:
+ return nfp6000_mu_common(cpp_id);
+ }
+}
+
+static int
+nfp6000_mu_emu(uint32_t cpp_id)
+{
+ switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
+ case NFP_CPP_ID(0, 18, 0): /* read_queue */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 18, 1): /* read_queue_ring */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 18, 2): /* write_queue */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 18, 3): /* write_queue_ring */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 20, 2): /* journal */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 21, 0): /* get */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 21, 1): /* get_eop */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 21, 2): /* get_freely */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 22, 0): /* pop */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 22, 1): /* pop_eop */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 22, 2): /* pop_freely */
+ return PUSHPULL(0, P32);
+ default:
+ return nfp6000_mu_common(cpp_id);
+ }
+}
+
+static int
+nfp6000_mu_imu(uint32_t cpp_id)
+{
+ return nfp6000_mu_common(cpp_id);
+}
+
+static int
+nfp6000_mu(uint32_t cpp_id,
+ uint64_t address)
+{
+ int pp;
+ uint8_t island;
+
+ island = NFP_CPP_ID_ISLAND_of(cpp_id);
+ if (island == 0) {
+ if (address < 0x2000000000ULL)
+ pp = nfp6000_mu_ctm(cpp_id);
+ else if (address < 0x8000000000ULL)
+ pp = nfp6000_mu_emu(cpp_id);
+ else if (address < 0x9800000000ULL)
+ pp = nfp6000_mu_ctm(cpp_id);
+ else if (address < 0x9C00000000ULL)
+ pp = nfp6000_mu_emu(cpp_id);
+ else if (address < 0xA000000000ULL)
+ pp = nfp6000_mu_imu(cpp_id);
+ else
+ pp = nfp6000_mu_ctm(cpp_id);
+ } else if (island >= 24 && island <= 27) {
+ pp = nfp6000_mu_emu(cpp_id);
+ } else if (island >= 28 && island <= 31) {
+ pp = nfp6000_mu_imu(cpp_id);
+ } else if (island == 1 ||
+ (island >= 4 && island <= 7) ||
+ (island >= 12 && island <= 13) ||
+ (island >= 32 && island <= 47) ||
+ (island >= 48 && island <= 51)) {
+ pp = nfp6000_mu_ctm(cpp_id);
+ } else {
+ pp = -EINVAL;
+ }
+
+ return pp;
+}
+
+static int
+nfp6000_ila(uint32_t cpp_id)
+{
+ uint8_t island;
+
+ island = NFP_CPP_ID_ISLAND_of(cpp_id);
+ if (island != 0 && (island < 48 || island > 51))
+ return -EINVAL;
+
+ switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
+ case NFP_CPP_ID(0, 0, 1): /* read_check_error */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 2, 0): /* read_int */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 3, 0): /* write_int */
+ return PUSHPULL(P32, 0);
+ default:
+ return target_rw(cpp_id, P32, 48, 4);
+ }
+}
+
+static int
+nfp6000_pci(uint32_t cpp_id)
+{
+ uint8_t island;
+
+ island = NFP_CPP_ID_ISLAND_of(cpp_id);
+ if (island != 0 && (island < 4 || island > 7))
+ return -EINVAL;
+
+ switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
+ case NFP_CPP_ID(0, 2, 0):
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 3, 0):
+ return PUSHPULL(P32, 0);
+ default:
+ return target_rw(cpp_id, P32, 4, 4);
+ }
+}
+
+static int
+nfp6000_crypto(uint32_t cpp_id)
+{
+ uint8_t island;
+
+ island = NFP_CPP_ID_ISLAND_of(cpp_id);
+ if (island != 0 && (island < 12 || island > 15))
+ return -EINVAL;
+
+ switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
+ case NFP_CPP_ID(0, 2, 0):
+ return PUSHPULL(P64, 0);
+ default:
+ return target_rw(cpp_id, P64, 12, 4);
+ }
+}
+
+static int
+nfp6000_cap_xpb(uint32_t cpp_id)
+{
+ uint8_t island;
+
+ island = NFP_CPP_ID_ISLAND_of(cpp_id);
+ if (island > 63)
+ return -EINVAL;
+
+ switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
+ case NFP_CPP_ID(0, 0, 1): /* RingGet */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 0, 2): /* Interthread Signal */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 1, 1): /* RingPut */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 1, 2): /* CTNNWr */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 2, 0): /* ReflectRd, signal none */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 2, 1): /* ReflectRd, signal self */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 2, 2): /* ReflectRd, signal remote */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 2, 3): /* ReflectRd, signal both */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 3, 0): /* ReflectWr, signal none */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 3, 1): /* ReflectWr, signal self */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 3, 2): /* ReflectWr, signal remote */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 3, 3): /* ReflectWr, signal both */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, NFP_CPP_ACTION_RW, 1):
+ return PUSHPULL(P32, P32);
+ default:
+ return target_rw(cpp_id, P32, 1, 63);
+ }
+}
+
+static int
+nfp6000_cls(uint32_t cpp_id)
+{
+ uint8_t island;
+
+ island = NFP_CPP_ID_ISLAND_of(cpp_id);
+ if (island > 63)
+ return -EINVAL;
+
+ switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
+ case NFP_CPP_ID(0, 0, 3): /* xor */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 2, 0): /* set */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 2, 1): /* clr */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 4, 0): /* add */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 4, 1): /* add64 */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 6, 0): /* sub */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 6, 1): /* sub64 */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 6, 2): /* subsat */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 8, 2): /* hash_mask */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 8, 3): /* hash_clear */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 9, 0): /* ring_get */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 9, 1): /* ring_pop */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 9, 2): /* ring_get_freely */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 9, 3): /* ring_pop_freely */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 10, 0): /* ring_put */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 10, 2): /* ring_journal */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 14, 0): /* reflect_write_sig_local */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 15, 1): /* reflect_read_sig_local */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 17, 2): /* statistic */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 24, 0): /* ring_read */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 24, 1): /* ring_write */
+ return PUSHPULL(P32, 0);
+ case NFP_CPP_ID(0, 25, 0): /* ring_workq_add_thread */
+ return PUSHPULL(0, P32);
+ case NFP_CPP_ID(0, 25, 1): /* ring_workq_add_work */
+ return PUSHPULL(P32, 0);
+ default:
+ return target_rw(cpp_id, P32, 0, 64);
+ }
+}
+
+int
+nfp_target_pushpull(uint32_t cpp_id,
+ uint64_t address)
+{
+ switch (NFP_CPP_ID_TARGET_of(cpp_id)) {
+ case NFP6000_CPPTGT_NBI:
+ return nfp6000_nbi(cpp_id, address);
+ case NFP6000_CPPTGT_VQDR:
+ return target_rw(cpp_id, P32, 24, 4);
+ case NFP6000_CPPTGT_ILA:
+ return nfp6000_ila(cpp_id);
+ case NFP6000_CPPTGT_MU:
+ return nfp6000_mu(cpp_id, address);
+ case NFP6000_CPPTGT_PCIE:
+ return nfp6000_pci(cpp_id);
+ case NFP6000_CPPTGT_ARM:
+ if (address < 0x10000)
+ return target_rw(cpp_id, P64, 1, 1);
+ else
+ return target_rw(cpp_id, P32, 1, 1);
+ case NFP6000_CPPTGT_CRYPTO:
+ return nfp6000_crypto(cpp_id);
+ case NFP6000_CPPTGT_CTXPB:
+ return nfp6000_cap_xpb(cpp_id);
+ case NFP6000_CPPTGT_CLS:
+ return nfp6000_cls(cpp_id);
+ case 0:
+ return target_rw(cpp_id, P32, 4, 4);
+ default:
+ return -EINVAL;
+ }
+}
+
+static uint64_t
+nfp_mask64(int msb,
+ int lsb)
+{
+ int width;
+
+ if (msb < 0 || lsb < 0)
+ return 0;
+
+ width = msb - lsb + 1;
+ if (width < 0)
+ return 0;
+
+ if (width == 64)
+ return ~(uint64_t)0;
+
+ if ((lsb + width) > 64)
+ return 0;
+
+ return (RTE_BIT64(width) - 1) << lsb;
+}
+
+static int
+nfp_decode_basic(uint64_t addr,
+ int *dest_island,
+ int cpp_tgt,
+ int mode,
+ int addr40,
+ int isld1,
+ int isld0)
+{
+ int iid_lsb;
+ int idx_lsb;
+
+ /* This function doesn't handle MU or CTXBP */
+ if (cpp_tgt == NFP_CPP_TARGET_MU || cpp_tgt == NFP_CPP_TARGET_CT_XPB)
+ return -EINVAL;
+
+ switch (mode) {
+ case 0:
+ /*
+ * For VQDR, in this mode for 32-bit addressing it would be
+ * islands 0, 16, 32 and 48 depending on channel and upper
+ * address bits. Since those are not all valid islands, most
+ * decode cases would result in bad island IDs, but we do them
+ * anyway since this is decoding an address that is already
+ * assumed to be used as-is to get to sram.
+ */
+ iid_lsb = (addr40) ? 34 : 26;
+ *dest_island = (int)(addr >> iid_lsb) & 0x3F;
+
+ return 0;
+ case 1:
+ /*
+ * For VQDR 32-bit, this would decode as:
+ * Channel 0: island#0
+ * Channel 1: island#0
+ * Channel 2: island#1
+ * Channel 3: island#1
+ *
+ * That would be valid as long as both islands have VQDR.
+ * Let's allow this.
+ */
+ idx_lsb = (addr40) ? 39 : 31;
+ if ((addr & nfp_mask64(idx_lsb, idx_lsb)) != 0)
+ *dest_island = isld1;
+ else
+ *dest_island = isld0;
+
+ return 0;
+ case 2:
+ /*
+ * For VQDR 32-bit:
+ * Channel 0: (island#0 | 0)
+ * Channel 1: (island#0 | 1)
+ * Channel 2: (island#1 | 0)
+ * Channel 3: (island#1 | 1)
+ *
+ * Make sure we compare against isldN values by clearing the
+ * LSB. This is what the silicon does.
+ */
+ isld0 &= ~1;
+ isld1 &= ~1;
+
+ idx_lsb = (addr40) ? 39 : 31;
+ iid_lsb = idx_lsb - 1;
+
+ if ((addr & nfp_mask64(idx_lsb, idx_lsb)) != 0)
+ *dest_island = isld1 | (int)((addr >> iid_lsb) & 1);
+ else
+ *dest_island = isld0 | (int)((addr >> iid_lsb) & 1);
+
+ return 0;
+ case 3:
+ /*
+ * In this mode the data address starts to affect the island ID
+ * so rather not allow it. In some really specific case one
+ * could use this to send the upper half of the VQDR channel to
+ * another MU, but this is getting very specific. However, as
+ * above for mode 0, this is the decoder and the caller should
+ * validate the resulting IID. This blindly does what the
+ * silicon would do.
+ */
+ isld0 &= ~3;
+ isld1 &= ~3;
+
+ idx_lsb = (addr40) ? 39 : 31;
+ iid_lsb = idx_lsb - 2;
+
+ if ((addr & nfp_mask64(idx_lsb, idx_lsb)) != 0)
+ *dest_island = isld1 | (int)((addr >> iid_lsb) & 3);
+ else
+ *dest_island = isld0 | (int)((addr >> iid_lsb) & 3);
+
+ return 0;
+ default:
+ return -EINVAL;
+ }
+}
+
+static int
+nfp_encode_basic_qdr(uint64_t addr,
+ int dest_island,
+ int cpp_tgt,
+ int mode,
+ int addr40,
+ int isld1,
+ int isld0)
+{
+ int v;
+ int ret;
+
+ /* Full Island ID and channel bits overlap? */
+ ret = nfp_decode_basic(addr, &v, cpp_tgt, mode, addr40, isld1, isld0);
+ if (ret != 0)
+ return ret;
+
+ /* The current address won't go where expected? */
+ if (dest_island != -1 && dest_island != v)
+ return -EINVAL;
+
+ /* If dest_island was -1, we don't care where it goes. */
+ return 0;
+}
+
+/*
+ * Try each option, take first one that fits.
+ * Not sure if we would want to do some smarter
+ * searching and prefer 0 or non-0 island IDs.
+ */
+static int
+nfp_encode_basic_search(uint64_t *addr,
+ int dest_island,
+ int *isld,
+ int iid_lsb,
+ int idx_lsb,
+ int v_max)
+{
+ int i;
+ int v;
+
+ for (i = 0; i < 2; i++)
+ for (v = 0; v < v_max; v++) {
+ if (dest_island != (isld[i] | v))
+ continue;
+
+ *addr &= ~nfp_mask64(idx_lsb, iid_lsb);
+ *addr |= ((uint64_t)i << idx_lsb);
+ *addr |= ((uint64_t)v << iid_lsb);
+ return 0;
+ }
+
+ return -ENODEV;
+}
+
+/*
+ * For VQDR, we may not modify the Channel bits, which might overlap
+ * with the Index bit. When it does, we need to ensure that isld0 == isld1.
+ */
+static int
+nfp_encode_basic(uint64_t *addr,
+ int dest_island,
+ int cpp_tgt,
+ int mode,
+ int addr40,
+ int isld1,
+ int isld0)
+{
+ int iid_lsb;
+ int idx_lsb;
+ int isld[2];
+ uint64_t value;
+
+ isld[0] = isld0;
+ isld[1] = isld1;
+
+ /* This function doesn't handle MU or CTXBP */
+ if (cpp_tgt == NFP_CPP_TARGET_MU || cpp_tgt == NFP_CPP_TARGET_CT_XPB)
+ return -EINVAL;
+
+ switch (mode) {
+ case 0:
+ if (cpp_tgt == NFP6000_CPPTGT_VQDR && addr40 == 0) {
+ /*
+ * In this specific mode we'd rather not modify the
+ * address but we can verify if the existing contents
+ * will point to a valid island.
+ */
+ return nfp_encode_basic_qdr(*addr, cpp_tgt, dest_island,
+ mode, addr40, isld1, isld0);
+ }
+
+ iid_lsb = (addr40) ? 34 : 26;
+
+ /* <39:34> or <31:26> */
+ value = nfp_mask64((iid_lsb + 5), iid_lsb);
+ *addr &= ~value;
+ *addr |= (((uint64_t)dest_island) << iid_lsb) & value;
+ return 0;
+ case 1:
+ if (cpp_tgt == NFP6000_CPPTGT_VQDR && addr40 == 0) {
+ return nfp_encode_basic_qdr(*addr, cpp_tgt, dest_island,
+ mode, addr40, isld1, isld0);
+ }
+
+ idx_lsb = (addr40) ? 39 : 31;
+ if (dest_island == isld0) {
+ /* Only need to clear the Index bit */
+ *addr &= ~nfp_mask64(idx_lsb, idx_lsb);
+ return 0;
+ }
+
+ if (dest_island == isld1) {
+ /* Only need to set the Index bit */
+ *addr |= (UINT64_C(1) << idx_lsb);
+ return 0;
+ }
+
+ return -ENODEV;
+ case 2:
+ if (cpp_tgt == NFP6000_CPPTGT_VQDR && addr40 == 0) {
+ /* iid<0> = addr<30> = channel<0> */
+ /* channel<1> = addr<31> = Index */
+ return nfp_encode_basic_qdr(*addr, cpp_tgt, dest_island,
+ mode, addr40, isld1, isld0);
+ }
+
+ /*
+ * Make sure we compare against isldN values by clearing the
+ * LSB. This is what the silicon does.
+ **/
+ isld[0] &= ~1;
+ isld[1] &= ~1;
+
+ idx_lsb = (addr40) ? 39 : 31;
+ iid_lsb = idx_lsb - 1;
+
+ return nfp_encode_basic_search(addr, dest_island, isld,
+ iid_lsb, idx_lsb, 2);
+ case 3:
+ if (cpp_tgt == NFP6000_CPPTGT_VQDR && addr40 == 0) {
+ /*
+ * iid<0> = addr<29> = data
+ * iid<1> = addr<30> = channel<0>
+ * channel<1> = addr<31> = Index
+ */
+ return nfp_encode_basic_qdr(*addr, cpp_tgt, dest_island,
+ mode, addr40, isld1, isld0);
+ }
+
+ isld[0] &= ~3;
+ isld[1] &= ~3;
+
+ idx_lsb = (addr40) ? 39 : 31;
+ iid_lsb = idx_lsb - 2;
+
+ return nfp_encode_basic_search(addr, dest_island, isld,
+ iid_lsb, idx_lsb, 4);
+ default:
+ return -EINVAL;
+ }
+}
+
+static int
+nfp_encode_mu(uint64_t *addr,
+ int dest_island,
+ int mode,
+ int addr40,
+ int isld1,
+ int isld0)
+{
+ int da;
+ int iid_lsb;
+ int idx_lsb;
+ int isld[2];
+ uint64_t value;
+ int locality_lsb;
+
+ isld[0] = isld0;
+ isld[1] = isld1;
+
+ locality_lsb = nfp_cppat_mu_locality_lsb(mode, addr40);
+ if (locality_lsb < 0)
+ return -EINVAL;
+
+ if (((*addr >> locality_lsb) & 3) == NFP6000_MU_LOCALITY_DIRECT)
+ da = 1;
+ else
+ da = 0;
+
+ switch (mode) {
+ case 0:
+ iid_lsb = (addr40 != 0) ? 32 : 24;
+ value = nfp_mask64((iid_lsb + 5), iid_lsb);
+ *addr &= ~value;
+ *addr |= (((uint64_t)dest_island) << iid_lsb) & value;
+ return 0;
+ case 1:
+ if (da == 1) {
+ iid_lsb = (addr40 != 0) ? 32 : 24;
+ value = nfp_mask64((iid_lsb + 5), iid_lsb);
+ *addr &= ~value;
+ *addr |= (((uint64_t)dest_island) << iid_lsb) & value;
+ return 0;
+ }
+
+ idx_lsb = (addr40 != 0) ? 37 : 29;
+ if (dest_island == isld0) {
+ *addr &= ~nfp_mask64(idx_lsb, idx_lsb);
+ return 0;
+ }
+
+ if (dest_island == isld1) {
+ *addr |= (UINT64_C(1) << idx_lsb);
+ return 0;
+ }
+
+ return -ENODEV;
+ case 2:
+ if (da == 1) {
+ iid_lsb = (addr40 != 0) ? 32 : 24;
+ value = nfp_mask64((iid_lsb + 5), iid_lsb);
+ *addr &= ~value;
+ *addr |= (((uint64_t)dest_island) << iid_lsb) & value;
+ return 0;
+ }
+
+ /*
+ * Make sure we compare against isldN values by clearing the
+ * LSB. This is what the silicon does.
+ */
+ isld[0] &= ~1;
+ isld[1] &= ~1;
+
+ idx_lsb = (addr40 != 0) ? 37 : 29;
+ iid_lsb = idx_lsb - 1;
+
+ return nfp_encode_basic_search(addr, dest_island, isld,
+ iid_lsb, idx_lsb, 2);
+ case 3:
+ /*
+ * Only the EMU will use 40 bit addressing. Silently set the
+ * direct locality bit for everyone else. The SDK toolchain
+ * uses dest_island <= 0 to test for atypical address encodings
+ * to support access to local-island CTM with a 32-but address
+ * (high-locality is effectively ignored and just used for
+ * routing to island #0).
+ */
+ if (dest_island > 0 && (dest_island < 24 || dest_island > 26)) {
+ *addr |= ((uint64_t)NFP6000_MU_LOCALITY_DIRECT)
+ << locality_lsb;
+ da = 1;
+ }
+
+ if (da == 1) {
+ iid_lsb = (addr40 != 0) ? 32 : 24;
+ value = nfp_mask64((iid_lsb + 5), iid_lsb);
+ *addr &= ~value;
+ *addr |= (((uint64_t)dest_island) << iid_lsb) & value;
+ return 0;
+ }
+
+ isld[0] &= ~3;
+ isld[1] &= ~3;
+
+ idx_lsb = (addr40 != 0) ? 37 : 29;
+ iid_lsb = idx_lsb - 2;
+
+ return nfp_encode_basic_search(addr, dest_island, isld,
+ iid_lsb, idx_lsb, 4);
+ default:
+ return -EINVAL;
+ }
+}
+
+static int
+nfp_cppat_addr_encode(uint64_t *addr,
+ int dest_island,
+ int cpp_tgt,
+ int mode,
+ int addr40,
+ int isld1,
+ int isld0)
+{
+ uint64_t value;
+
+ switch (cpp_tgt) {
+ case NFP6000_CPPTGT_NBI:
+ case NFP6000_CPPTGT_VQDR:
+ case NFP6000_CPPTGT_ILA:
+ case NFP6000_CPPTGT_PCIE:
+ case NFP6000_CPPTGT_ARM:
+ case NFP6000_CPPTGT_CRYPTO:
+ case NFP6000_CPPTGT_CLS:
+ return nfp_encode_basic(addr, dest_island, cpp_tgt, mode,
+ addr40, isld1, isld0);
+ case NFP6000_CPPTGT_MU:
+ return nfp_encode_mu(addr, dest_island, mode, addr40,
+ isld1, isld0);
+ case NFP6000_CPPTGT_CTXPB:
+ if (mode != 1 || addr40 != 0)
+ return -EINVAL;
+
+ value = nfp_mask64(29, 24);
+ *addr &= ~value;
+ *addr |= (((uint64_t)dest_island) << 24) & value;
+ return 0;
+ default:
+ return -EINVAL;
+ }
+}
+
+int
+nfp_target_cpp(uint32_t cpp_island_id,
+ uint64_t cpp_island_address,
+ uint32_t *cpp_target_id,
+ uint64_t *cpp_target_address,
+ const uint32_t *imb_table)
+{
+ int err;
+ uint32_t imb;
+ uint8_t island;
+ uint8_t target;
+
+ target = NFP_CPP_ID_TARGET_of(cpp_island_id);
+ if (target >= 16)
+ return -EINVAL;
+
+ island = NFP_CPP_ID_ISLAND_of(cpp_island_id);
+ if (island == 0) {
+ /* Already translated */
+ *cpp_target_id = cpp_island_id;
+ *cpp_target_address = cpp_island_address;
+ return 0;
+ }
+
+ /* CPP + Island only allowed on systems with IMB tables */
+ if (imb_table == NULL)
+ return -EINVAL;
+
+ imb = imb_table[target];
+
+ *cpp_target_address = cpp_island_address;
+ err = nfp_cppat_addr_encode(cpp_target_address, island, target,
+ ((imb >> 13) & 7), ((imb >> 12) & 1),
+ ((imb >> 6) & 0x3f), ((imb >> 0) & 0x3f));
+ if (err != 0)
+ return err;
+
+ *cpp_target_id = NFP_CPP_ID(target,
+ NFP_CPP_ID_ACTION_of(cpp_island_id),
+ NFP_CPP_ID_TOKEN_of(cpp_island_id));
+
+ return 0;
+}
diff --git a/drivers/net/nfp/nfpcore/nfp_target.h b/drivers/net/nfp/nfpcore/nfp_target.h
index d1e5a50b14..24417fb315 100644
--- a/drivers/net/nfp/nfpcore/nfp_target.h
+++ b/drivers/net/nfp/nfpcore/nfp_target.h
@@ -7,7 +7,6 @@
#define NFP_TARGET_H
#include "nfp-common/nfp_resid.h"
-#include "nfp-common/nfp_cppat.h"
#include "nfp-common/nfp_platform.h"
#include "nfp_cpp.h"
--
2.39.1
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 03/13] net/nfp: remove the redundant macro about CPP target
2023-04-10 11:00 [PATCH 00/13] Sync the kernel driver logic Chaoyong He
2023-04-10 11:00 ` [PATCH 01/13] net/nfp: define correct size for configuration BAR Chaoyong He
2023-04-10 11:00 ` [PATCH 02/13] net/nfp: move shared target logic to own source file Chaoyong He
@ 2023-04-10 11:00 ` Chaoyong He
2023-04-10 11:00 ` [PATCH 04/13] net/nfp: drop usage of return error helpers Chaoyong He
` (11 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Chaoyong He @ 2023-04-10 11:00 UTC (permalink / raw)
To: dev; +Cc: oss-drivers, niklas.soderlund, Chaoyong He
Remove the redundancy define NFP6000_CPPTGT_ in nfp_resid.h,
the same define NFP_CPP_TARGET_ are exist in nfp6000.h, we
choose to keep them to sync with the kernel driver.
Signed-off-by: Chaoyong He <chaoyong.he@corigine.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund@corigine.com>
---
.../net/nfp/nfpcore/nfp-common/nfp_resid.h | 11 -----
drivers/net/nfp/nfpcore/nfp_target.c | 44 +++++++++----------
2 files changed, 22 insertions(+), 33 deletions(-)
diff --git a/drivers/net/nfp/nfpcore/nfp-common/nfp_resid.h b/drivers/net/nfp/nfpcore/nfp-common/nfp_resid.h
index 394a7628e0..ac2bf0335d 100644
--- a/drivers/net/nfp/nfpcore/nfp-common/nfp_resid.h
+++ b/drivers/net/nfp/nfpcore/nfp-common/nfp_resid.h
@@ -48,17 +48,6 @@
#define NFP_CHIP_REVISION_C0 0x20
#define NFP_CHIP_REVISION_PF 0xff /* Maximum possible revision */
-/* CPP Targets for each chip architecture */
-#define NFP6000_CPPTGT_NBI 1
-#define NFP6000_CPPTGT_VQDR 2
-#define NFP6000_CPPTGT_ILA 6
-#define NFP6000_CPPTGT_MU 7
-#define NFP6000_CPPTGT_PCIE 9
-#define NFP6000_CPPTGT_ARM 10
-#define NFP6000_CPPTGT_CRYPTO 12
-#define NFP6000_CPPTGT_CTXPB 14
-#define NFP6000_CPPTGT_CLS 15
-
/*
* Wildcard indicating a CPP read or write action
*
diff --git a/drivers/net/nfp/nfpcore/nfp_target.c b/drivers/net/nfp/nfpcore/nfp_target.c
index 3f7ddfb5e9..611848e233 100644
--- a/drivers/net/nfp/nfpcore/nfp_target.c
+++ b/drivers/net/nfp/nfpcore/nfp_target.c
@@ -489,26 +489,26 @@ nfp_target_pushpull(uint32_t cpp_id,
uint64_t address)
{
switch (NFP_CPP_ID_TARGET_of(cpp_id)) {
- case NFP6000_CPPTGT_NBI:
+ case NFP_CPP_TARGET_NBI:
return nfp6000_nbi(cpp_id, address);
- case NFP6000_CPPTGT_VQDR:
+ case NFP_CPP_TARGET_QDR:
return target_rw(cpp_id, P32, 24, 4);
- case NFP6000_CPPTGT_ILA:
+ case NFP_CPP_TARGET_ILA:
return nfp6000_ila(cpp_id);
- case NFP6000_CPPTGT_MU:
+ case NFP_CPP_TARGET_MU:
return nfp6000_mu(cpp_id, address);
- case NFP6000_CPPTGT_PCIE:
+ case NFP_CPP_TARGET_PCIE:
return nfp6000_pci(cpp_id);
- case NFP6000_CPPTGT_ARM:
+ case NFP_CPP_TARGET_ARM:
if (address < 0x10000)
return target_rw(cpp_id, P64, 1, 1);
else
return target_rw(cpp_id, P32, 1, 1);
- case NFP6000_CPPTGT_CRYPTO:
+ case NFP_CPP_TARGET_CRYPTO:
return nfp6000_crypto(cpp_id);
- case NFP6000_CPPTGT_CTXPB:
+ case NFP_CPP_TARGET_CT_XPB:
return nfp6000_cap_xpb(cpp_id);
- case NFP6000_CPPTGT_CLS:
+ case NFP_CPP_TARGET_CLS:
return nfp6000_cls(cpp_id);
case 0:
return target_rw(cpp_id, P32, 4, 4);
@@ -719,7 +719,7 @@ nfp_encode_basic(uint64_t *addr,
switch (mode) {
case 0:
- if (cpp_tgt == NFP6000_CPPTGT_VQDR && addr40 == 0) {
+ if (cpp_tgt == NFP_CPP_TARGET_QDR && addr40 == 0) {
/*
* In this specific mode we'd rather not modify the
* address but we can verify if the existing contents
@@ -737,7 +737,7 @@ nfp_encode_basic(uint64_t *addr,
*addr |= (((uint64_t)dest_island) << iid_lsb) & value;
return 0;
case 1:
- if (cpp_tgt == NFP6000_CPPTGT_VQDR && addr40 == 0) {
+ if (cpp_tgt == NFP_CPP_TARGET_QDR && addr40 == 0) {
return nfp_encode_basic_qdr(*addr, cpp_tgt, dest_island,
mode, addr40, isld1, isld0);
}
@@ -757,7 +757,7 @@ nfp_encode_basic(uint64_t *addr,
return -ENODEV;
case 2:
- if (cpp_tgt == NFP6000_CPPTGT_VQDR && addr40 == 0) {
+ if (cpp_tgt == NFP_CPP_TARGET_QDR && addr40 == 0) {
/* iid<0> = addr<30> = channel<0> */
/* channel<1> = addr<31> = Index */
return nfp_encode_basic_qdr(*addr, cpp_tgt, dest_island,
@@ -777,7 +777,7 @@ nfp_encode_basic(uint64_t *addr,
return nfp_encode_basic_search(addr, dest_island, isld,
iid_lsb, idx_lsb, 2);
case 3:
- if (cpp_tgt == NFP6000_CPPTGT_VQDR && addr40 == 0) {
+ if (cpp_tgt == NFP_CPP_TARGET_QDR && addr40 == 0) {
/*
* iid<0> = addr<29> = data
* iid<1> = addr<30> = channel<0>
@@ -924,19 +924,19 @@ nfp_cppat_addr_encode(uint64_t *addr,
uint64_t value;
switch (cpp_tgt) {
- case NFP6000_CPPTGT_NBI:
- case NFP6000_CPPTGT_VQDR:
- case NFP6000_CPPTGT_ILA:
- case NFP6000_CPPTGT_PCIE:
- case NFP6000_CPPTGT_ARM:
- case NFP6000_CPPTGT_CRYPTO:
- case NFP6000_CPPTGT_CLS:
+ case NFP_CPP_TARGET_NBI:
+ case NFP_CPP_TARGET_QDR:
+ case NFP_CPP_TARGET_ILA:
+ case NFP_CPP_TARGET_PCIE:
+ case NFP_CPP_TARGET_ARM:
+ case NFP_CPP_TARGET_CRYPTO:
+ case NFP_CPP_TARGET_CLS:
return nfp_encode_basic(addr, dest_island, cpp_tgt, mode,
addr40, isld1, isld0);
- case NFP6000_CPPTGT_MU:
+ case NFP_CPP_TARGET_MU:
return nfp_encode_mu(addr, dest_island, mode, addr40,
isld1, isld0);
- case NFP6000_CPPTGT_CTXPB:
+ case NFP_CPP_TARGET_CT_XPB:
if (mode != 1 || addr40 != 0)
return -EINVAL;
--
2.39.1
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 04/13] net/nfp: drop usage of return error helpers
2023-04-10 11:00 [PATCH 00/13] Sync the kernel driver logic Chaoyong He
` (2 preceding siblings ...)
2023-04-10 11:00 ` [PATCH 03/13] net/nfp: remove the redundant macro about CPP target Chaoyong He
@ 2023-04-10 11:00 ` Chaoyong He
2023-04-10 11:00 ` [PATCH 05/13] net/nfp: use generic macros for array size and to set bits Chaoyong He
` (10 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Chaoyong He @ 2023-04-10 11:00 UTC (permalink / raw)
To: dev; +Cc: oss-drivers, niklas.soderlund, Chaoyong He
Drop the usage of complex return error helpers. These helpers was used
to return either NULL or -1 from a function while communicating the
error using errno. However erron was seldom checked and the error path
was taken only depending on the functions return value.
Remove the macros and convert the few callers that did look at errno to
communicate different errors using the return value instead. Also update
all the related documentation.
Signed-off-by: Chaoyong He <chaoyong.he@corigine.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund@corigine.com>
---
drivers/net/nfp/nfp_common.c | 1 -
.../net/nfp/nfpcore/nfp-common/nfp_platform.h | 6 --
drivers/net/nfp/nfpcore/nfp_cpp.h | 57 +++++++++----------
drivers/net/nfp/nfpcore/nfp_cppcore.c | 43 ++++++--------
drivers/net/nfp/nfpcore/nfp_mutex.c | 39 ++++++-------
drivers/net/nfp/nfpcore/nfp_nffw.c | 4 +-
drivers/net/nfp/nfpcore/nfp_resource.c | 2 +-
7 files changed, 65 insertions(+), 87 deletions(-)
diff --git a/drivers/net/nfp/nfp_common.c b/drivers/net/nfp/nfp_common.c
index 2261d955c8..f300d6d892 100644
--- a/drivers/net/nfp/nfp_common.c
+++ b/drivers/net/nfp/nfp_common.c
@@ -50,7 +50,6 @@
#include <unistd.h>
#include <stdio.h>
#include <sys/ioctl.h>
-#include <errno.h>
static const uint32_t nfp_net_link_speed_nfp2rte[] = {
[NFP_NET_CFG_STS_LINK_RATE_UNSUPPORTED] = RTE_ETH_SPEED_NUM_NONE,
diff --git a/drivers/net/nfp/nfpcore/nfp-common/nfp_platform.h b/drivers/net/nfp/nfpcore/nfp-common/nfp_platform.h
index 7b64e2d32b..9fa52074f0 100644
--- a/drivers/net/nfp/nfpcore/nfp-common/nfp_platform.h
+++ b/drivers/net/nfp/nfpcore/nfp-common/nfp_platform.h
@@ -26,10 +26,4 @@
#define ARRAY_SIZE(x) RTE_DIM(x)
#endif
-#define NFP_ERRNO(err) (errno = (err), -1)
-#define NFP_ERRNO_RET(err, ret) (errno = (err), (ret))
-#define NFP_NOERR(errv) (errno)
-#define NFP_ERRPTR(err) (errno = (err), NULL)
-#define NFP_PTRERR(errv) (errno)
-
#endif /* __NFP_PLATFORM_H__ */
diff --git a/drivers/net/nfp/nfpcore/nfp_cpp.h b/drivers/net/nfp/nfpcore/nfp_cpp.h
index a04a68f546..437dcdf942 100644
--- a/drivers/net/nfp/nfpcore/nfp_cpp.h
+++ b/drivers/net/nfp/nfpcore/nfp_cpp.h
@@ -181,7 +181,7 @@ uint32_t __nfp_cpp_model_autodetect(struct nfp_cpp *cpp, uint32_t *model);
*
* @param[in] id 0-based ID for the CPP interface to use
*
- * @return NFP CPP handle, or NULL on failure (and set errno accordingly).
+ * @return NFP CPP handle, or NULL on failure.
*/
struct nfp_cpp *nfp_cpp_from_device_name(struct rte_pci_device *dev,
int driver_lock_needed);
@@ -299,7 +299,7 @@ int nfp_cpp_serial(struct nfp_cpp *cpp, const uint8_t **serial);
* @param[in] address Offset into the NFP CPP ID address space
* @param[in] size Size of the area to reserve
*
- * @return NFP CPP handle, or NULL on failure (and set errno accordingly).
+ * @return NFP CPP handle, or NULL on failure.
*/
struct nfp_cpp_area *nfp_cpp_area_alloc(struct nfp_cpp *cpp, uint32_t cpp_id,
unsigned long long address,
@@ -313,7 +313,7 @@ struct nfp_cpp_area *nfp_cpp_area_alloc(struct nfp_cpp *cpp, uint32_t cpp_id,
* @param[in] address Offset into the NFP CPP ID address space
* @param[in] size Size of the area to reserve
*
- * @return NFP CPP handle, or NULL on failure (and set errno accordingly).
+ * @return NFP CPP handle, or NULL on failure.
*/
struct nfp_cpp_area *nfp_cpp_area_alloc_with_name(struct nfp_cpp *cpp,
uint32_t cpp_id,
@@ -332,7 +332,7 @@ void nfp_cpp_area_free(struct nfp_cpp_area *area);
*
* @param[in] area NFP CPP area handle
*
- * @return 0 on success, -1 on failure (and set errno accordingly).
+ * @return 0 on success, -1 on failure.
*/
int nfp_cpp_area_acquire(struct nfp_cpp_area *area);
@@ -350,7 +350,7 @@ void nfp_cpp_area_release(struct nfp_cpp_area *area);
* @param[in] address Offset into the NFP CPP ID address space
* @param[in] size Size of the area to reserve
*
- * @return NFP CPP handle, or NULL on failure (and set errno accordingly).
+ * @return NFP CPP handle, or NULL on failure.
*/
struct nfp_cpp_area *nfp_cpp_area_alloc_acquire(struct nfp_cpp *cpp,
uint32_t cpp_id,
@@ -372,7 +372,7 @@ uint8_t *nfp_cpp_map_area(struct nfp_cpp *cpp, int domain, int target,
*
* @param[in] area NFP CPP area handle
*
- * @return Pointer to IO memory, or NULL on failure (and set errno accordingly).
+ * @return Pointer to IO memory, or NULL on failure.
*/
void *nfp_cpp_area_mapped(struct nfp_cpp_area *area);
@@ -385,7 +385,7 @@ void *nfp_cpp_area_mapped(struct nfp_cpp_area *area);
* @param[in] buffer Location of buffer to receive the data
* @param[in] length Length of the data to read
*
- * @return bytes read on success, -1 on failure (and set errno accordingly).
+ * @return bytes read on success, negative value on failure.
*
*/
int nfp_cpp_area_read(struct nfp_cpp_area *area, unsigned long offset,
@@ -400,7 +400,7 @@ int nfp_cpp_area_read(struct nfp_cpp_area *area, unsigned long offset,
* @param[in] buffer Location of buffer that holds the data
* @param[in] length Length of the data to read
*
- * @return bytes written on success, -1 on failure (and set errno accordingly).
+ * @return bytes written on success, negative value on failure.
*/
int nfp_cpp_area_write(struct nfp_cpp_area *area, unsigned long offset,
const void *buffer, size_t length);
@@ -424,7 +424,7 @@ void *nfp_cpp_area_iomem(struct nfp_cpp_area *area);
* @param[in] offset Offset into the area
* @param[in] size Size of region to validate
*
- * @return 0 on success, -1 on failure (and set errno accordingly).
+ * @return 0 on success, negative value on failure.
*/
int nfp_cpp_area_check_range(struct nfp_cpp_area *area,
unsigned long long offset, unsigned long size);
@@ -454,7 +454,7 @@ const char *nfp_cpp_area_name(struct nfp_cpp_area *cpp_area);
* @param[in] kernel_vaddr Buffer to copy read data to
* @param[in] length Size of the area to reserve
*
- * @return bytes read on success, -1 on failure (and set errno accordingly).
+ * @return bytes read on success, -1 on failure.
*/
int nfp_cpp_read(struct nfp_cpp *cpp, uint32_t cpp_id,
unsigned long long address, void *kernel_vaddr, size_t length);
@@ -468,7 +468,7 @@ int nfp_cpp_read(struct nfp_cpp *cpp, uint32_t cpp_id,
* @param[in] kernel_vaddr Buffer to copy write data from
* @param[in] length Size of the area to reserve
*
- * @return bytes written on success, -1 on failure (and set errno accordingly).
+ * @return bytes written on success, -1 on failure.
*/
int nfp_cpp_write(struct nfp_cpp *cpp, uint32_t cpp_id,
unsigned long long address, const void *kernel_vaddr,
@@ -484,7 +484,7 @@ int nfp_cpp_write(struct nfp_cpp *cpp, uint32_t cpp_id,
* @param[in] value 32-bit value to fill area with
* @param[in] length Size of the area to reserve
*
- * @return bytes written on success, -1 on failure (and set errno accordingly).
+ * @return bytes written on success, negative value on failure.
*/
int nfp_cpp_area_fill(struct nfp_cpp_area *area, unsigned long offset,
uint32_t value, size_t length);
@@ -501,7 +501,7 @@ int nfp_cpp_area_fill(struct nfp_cpp_area *area, unsigned long offset,
*
* NOTE: offset must be 32-bit aligned.
*
- * @return 0 on success, or -1 on error (and set errno accordingly).
+ * @return 0 on success, or -1 on error.
*/
int nfp_cpp_area_readl(struct nfp_cpp_area *area, unsigned long offset,
uint32_t *value);
@@ -518,7 +518,7 @@ int nfp_cpp_area_readl(struct nfp_cpp_area *area, unsigned long offset,
*
* NOTE: offset must be 32-bit aligned.
*
- * @return 0 on success, or -1 on error (and set errno accordingly).
+ * @return 0 on success, or -1 on error.
*/
int nfp_cpp_area_writel(struct nfp_cpp_area *area, unsigned long offset,
uint32_t value);
@@ -535,7 +535,7 @@ int nfp_cpp_area_writel(struct nfp_cpp_area *area, unsigned long offset,
*
* NOTE: offset must be 64-bit aligned.
*
- * @return 0 on success, or -1 on error (and set errno accordingly).
+ * @return 0 on success, or -1 on error.
*/
int nfp_cpp_area_readq(struct nfp_cpp_area *area, unsigned long offset,
uint64_t *value);
@@ -552,7 +552,7 @@ int nfp_cpp_area_readq(struct nfp_cpp_area *area, unsigned long offset,
*
* NOTE: offset must be 64-bit aligned.
*
- * @return 0 on success, or -1 on error (and set errno accordingly).
+ * @return 0 on success, or -1 on error.
*/
int nfp_cpp_area_writeq(struct nfp_cpp_area *area, unsigned long offset,
uint64_t value);
@@ -564,7 +564,7 @@ int nfp_cpp_area_writeq(struct nfp_cpp_area *area, unsigned long offset,
* @param xpb_tgt XPB target and address
* @param value value to write
*
- * @return 0 on success, or -1 on failure (and set errno accordingly).
+ * @return 0 on success, or -1 on failure.
*/
int nfp_xpb_writel(struct nfp_cpp *cpp, uint32_t xpb_tgt, uint32_t value);
@@ -575,7 +575,7 @@ int nfp_xpb_writel(struct nfp_cpp *cpp, uint32_t xpb_tgt, uint32_t value);
* @param xpb_tgt XPB target and address
* @param value output value
*
- * @return 0 on success, or -1 on failure (and set errno accordingly).
+ * @return 0 on success, or -1 on failure.
*/
int nfp_xpb_readl(struct nfp_cpp *cpp, uint32_t xpb_tgt, uint32_t *value);
@@ -587,7 +587,7 @@ int nfp_xpb_readl(struct nfp_cpp *cpp, uint32_t xpb_tgt, uint32_t *value);
* @param mask mask of bits to alter
* @param value value to modify
*
- * @return 0 on success, or -1 on failure (and set errno accordingly).
+ * @return 0 on success, or -1 on failure.
*/
int nfp_xpb_writelm(struct nfp_cpp *cpp, uint32_t xpb_tgt, uint32_t mask,
uint32_t value);
@@ -601,7 +601,7 @@ int nfp_xpb_writelm(struct nfp_cpp *cpp, uint32_t xpb_tgt, uint32_t mask,
* @param value value to monitor for
* @param timeout_us maximum number of us to wait (-1 for forever)
*
- * @return >= 0 on success, or -1 on failure (and set errno accordingly).
+ * @return >= 0 on success, negative value on failure.
*/
int nfp_xpb_waitlm(struct nfp_cpp *cpp, uint32_t xpb_tgt, uint32_t mask,
uint32_t value, int timeout_us);
@@ -614,7 +614,7 @@ int nfp_xpb_waitlm(struct nfp_cpp *cpp, uint32_t xpb_tgt, uint32_t mask,
* @param address offset into the NFP CPP ID address space
* @param value output value
*
- * @return 0 on success, or -1 on failure (and set errno accordingly).
+ * @return 0 on success, or -1 on failure.
*/
int nfp_cpp_readl(struct nfp_cpp *cpp, uint32_t cpp_id,
unsigned long long address, uint32_t *value);
@@ -627,7 +627,7 @@ int nfp_cpp_readl(struct nfp_cpp *cpp, uint32_t cpp_id,
* @param address offset into the NFP CPP ID address space
* @param value value to write
*
- * @return 0 on success, or -1 on failure (and set errno accordingly).
+ * @return 0 on success, or -1 on failure.
*
*/
int nfp_cpp_writel(struct nfp_cpp *cpp, uint32_t cpp_id,
@@ -641,7 +641,7 @@ int nfp_cpp_writel(struct nfp_cpp *cpp, uint32_t cpp_id,
* @param address offset into the NFP CPP ID address space
* @param value output value
*
- * @return 0 on success, or -1 on failure (and set errno accordingly).
+ * @return 0 on success, or -1 on failure.
*/
int nfp_cpp_readq(struct nfp_cpp *cpp, uint32_t cpp_id,
unsigned long long address, uint64_t *value);
@@ -654,7 +654,7 @@ int nfp_cpp_readq(struct nfp_cpp *cpp, uint32_t cpp_id,
* @param address offset into the NFP CPP ID address space
* @param value value to write
*
- * @return 0 on success, or -1 on failure (and set errno accordingly).
+ * @return 0 on success, or -1 on failure.
*/
int nfp_cpp_writeq(struct nfp_cpp *cpp, uint32_t cpp_id,
unsigned long long address, uint64_t value);
@@ -675,7 +675,7 @@ int nfp_cpp_writeq(struct nfp_cpp *cpp, uint32_t cpp_id,
* @param address Offset into the address space of the NFP CPP target ID
* @param key_id Unique 32-bit value for this mutex
*
- * @return 0 on success, or -1 on failure (and set errno accordingly).
+ * @return 0 on success, negative value on failure.
*/
int nfp_cpp_mutex_init(struct nfp_cpp *cpp, int target,
unsigned long long address, uint32_t key_id);
@@ -756,7 +756,7 @@ void nfp_cpp_mutex_free(struct nfp_cpp_mutex *mutex);
*
* @param mutex NFP CPP Mutex handle
*
- * @return 0 on success, or -1 on failure (and set errno accordingly).
+ * @return 0 on success, negative value on failure.
*/
int nfp_cpp_mutex_lock(struct nfp_cpp_mutex *mutex);
@@ -765,7 +765,7 @@ int nfp_cpp_mutex_lock(struct nfp_cpp_mutex *mutex);
*
* @param mutex NFP CPP Mutex handle
*
- * @return 0 on success, or -1 on failure (and set errno accordingly).
+ * @return 0 on success, negative value on failure.
*/
int nfp_cpp_mutex_unlock(struct nfp_cpp_mutex *mutex);
@@ -773,8 +773,7 @@ int nfp_cpp_mutex_unlock(struct nfp_cpp_mutex *mutex);
* Attempt to lock a mutex handle, using the NFP MU Atomic Engine
*
* @param mutex NFP CPP Mutex handle
- * @return 0 if the lock succeeded, -1 on failure (and errno set
- * appropriately).
+ * @return 0 if the lock succeeded, negative value on failure.
*/
int nfp_cpp_mutex_trylock(struct nfp_cpp_mutex *mutex);
diff --git a/drivers/net/nfp/nfpcore/nfp_cppcore.c b/drivers/net/nfp/nfpcore/nfp_cppcore.c
index 1d2468ad7a..97cf16c801 100644
--- a/drivers/net/nfp/nfpcore/nfp_cppcore.c
+++ b/drivers/net/nfp/nfpcore/nfp_cppcore.c
@@ -8,7 +8,6 @@
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
-#include <errno.h>
#include <sys/types.h>
#include <rte_byteorder.h>
@@ -137,14 +136,14 @@ nfp_cpp_area_alloc_with_name(struct nfp_cpp *cpp, uint32_t dest,
{
struct nfp_cpp_area *area;
uint64_t tmp64 = (uint64_t)address;
- int tmp, err;
+ int err;
if (cpp == NULL)
return NULL;
/* CPP bus uses only a 40-bit address */
if ((address + size) > (1ULL << 40))
- return NFP_ERRPTR(EFAULT);
+ return NULL;
/* Remap from cpp_island to cpp_target */
err = nfp_target_cpp(dest, tmp64, &dest, &tmp64, cpp->imb_cat_table);
@@ -165,22 +164,12 @@ nfp_cpp_area_alloc_with_name(struct nfp_cpp *cpp, uint32_t dest,
area->name = ((char *)area) + sizeof(*area) + cpp->op->area_priv_size;
memcpy(area->name, name, strlen(name) + 1);
- /*
- * Preserve errno around the call to area_init, since most
- * implementations will blindly call nfp_target_action_width()for both
- * read or write modes, and that will set errno to EINVAL.
- */
- tmp = errno;
-
err = cpp->op->area_init(area, dest, address, size);
if (err < 0) {
free(area);
return NULL;
}
- /* Restore errno */
- errno = tmp;
-
area->offset = address;
area->size = size;
@@ -328,7 +317,7 @@ nfp_cpp_area_read(struct nfp_cpp_area *area, unsigned long offset,
void *kernel_vaddr, size_t length)
{
if ((offset + length) > area->size)
- return NFP_ERRNO(EFAULT);
+ return -EFAULT;
return area->cpp->op->area_read(area, kernel_vaddr, offset, length);
}
@@ -352,7 +341,7 @@ nfp_cpp_area_write(struct nfp_cpp_area *area, unsigned long offset,
const void *kernel_vaddr, size_t length)
{
if ((offset + length) > area->size)
- return NFP_ERRNO(EFAULT);
+ return -EFAULT;
return area->cpp->op->area_write(area, kernel_vaddr, offset, length);
}
@@ -373,14 +362,14 @@ nfp_cpp_area_mapped(struct nfp_cpp_area *area)
* @length: size of address range in bytes
*
* Check if address range fits within CPP area. Return 0 if area fits
- * or -1 on error.
+ * or negative value on error.
*/
int
nfp_cpp_area_check_range(struct nfp_cpp_area *area, unsigned long long offset,
unsigned long length)
{
if (((offset + length) > area->size))
- return NFP_ERRNO(EFAULT);
+ return -EFAULT;
return 0;
}
@@ -555,7 +544,7 @@ nfp_cpp_alloc(struct rte_pci_device *dev, int driver_lock_needed)
ops = nfp_cpp_transport_operations();
if (ops == NULL || ops->init == NULL)
- return NFP_ERRPTR(EINVAL);
+ return NULL;
cpp = calloc(1, sizeof(*cpp));
if (cpp == NULL)
@@ -621,7 +610,7 @@ nfp_cpp_from_device_name(struct rte_pci_device *dev, int driver_lock_needed)
* @param mask mask of bits to alter
* @param value value to modify
*
- * @return 0 on success, or -1 on failure (and set errno accordingly).
+ * @return 0 on success, or -1 on failure.
*/
int
nfp_xpb_writelm(struct nfp_cpp *cpp, uint32_t xpb_tgt, uint32_t mask,
@@ -648,7 +637,7 @@ nfp_xpb_writelm(struct nfp_cpp *cpp, uint32_t xpb_tgt, uint32_t mask,
* @param value value to monitor for
* @param timeout_us maximum number of us to wait (-1 for forever)
*
- * @return >= 0 on success, or -1 on failure (and set errno accordingly).
+ * @return >= 0 on success, or negative value on failure.
*/
int
nfp_xpb_waitlm(struct nfp_cpp *cpp, uint32_t xpb_tgt, uint32_t mask,
@@ -676,7 +665,7 @@ nfp_xpb_waitlm(struct nfp_cpp *cpp, uint32_t xpb_tgt, uint32_t mask,
} while (timeout_us >= 0);
if (timeout_us < 0)
- err = NFP_ERRNO(ETIMEDOUT);
+ err = -ETIMEDOUT;
else
err = timeout_us;
@@ -756,17 +745,17 @@ nfp_cpp_area_fill(struct nfp_cpp_area *area, unsigned long offset,
value64 = ((uint64_t)value << 32) | value;
if ((offset + length) > area->size)
- return NFP_ERRNO(EINVAL);
+ return -EINVAL;
if ((area->offset + offset) & 3)
- return NFP_ERRNO(EINVAL);
+ return -EINVAL;
if (((area->offset + offset) & 7) == 4 && length >= 4) {
err = nfp_cpp_area_write(area, offset, &value, sizeof(value));
if (err < 0)
return err;
if (err != sizeof(value))
- return NFP_ERRNO(ENOSPC);
+ return -ENOSPC;
offset += sizeof(value);
length -= sizeof(value);
}
@@ -778,7 +767,7 @@ nfp_cpp_area_fill(struct nfp_cpp_area *area, unsigned long offset,
if (err < 0)
return err;
if (err != sizeof(value64))
- return NFP_ERRNO(ENOSPC);
+ return -ENOSPC;
}
if ((i + sizeof(value)) <= length) {
@@ -787,7 +776,7 @@ nfp_cpp_area_fill(struct nfp_cpp_area *area, unsigned long offset,
if (err < 0)
return err;
if (err != sizeof(value))
- return NFP_ERRNO(ENOSPC);
+ return -ENOSPC;
i += sizeof(value);
}
@@ -828,7 +817,7 @@ __nfp_cpp_model_autodetect(struct nfp_cpp *cpp, uint32_t *model)
* Map an area of IOMEM access. To undo the effect of this function call
* @nfp_cpp_area_release_free(*area).
*
- * Return: Pointer to memory mapped area or ERR_PTR
+ * Return: Pointer to memory mapped area or NULL
*/
uint8_t *
nfp_cpp_map_area(struct nfp_cpp *cpp, int domain, int target, uint64_t addr,
diff --git a/drivers/net/nfp/nfpcore/nfp_mutex.c b/drivers/net/nfp/nfpcore/nfp_mutex.c
index 8a4e6a462a..f967a29351 100644
--- a/drivers/net/nfp/nfpcore/nfp_mutex.c
+++ b/drivers/net/nfp/nfpcore/nfp_mutex.c
@@ -3,8 +3,6 @@
* All rights reserved.
*/
-#include <errno.h>
-
#include <malloc.h>
#include <time.h>
#include <sched.h>
@@ -41,13 +39,13 @@ _nfp_cpp_mutex_validate(uint32_t model, int *target, unsigned long long address)
{
/* Address must be 64-bit aligned */
if (address & 7)
- return NFP_ERRNO(EINVAL);
+ return -EINVAL;
if (NFP_CPP_MODEL_IS_6000(model)) {
if (*target != NFP_CPP_TARGET_MU)
- return NFP_ERRNO(EINVAL);
+ return -EINVAL;
} else {
- return NFP_ERRNO(EINVAL);
+ return -EINVAL;
}
return 0;
@@ -71,7 +69,7 @@ _nfp_cpp_mutex_validate(uint32_t model, int *target, unsigned long long address)
* @param address Offset into the address space of the NFP CPP target ID
* @param key Unique 32-bit value for this mutex
*
- * @return 0 on success, or -1 on failure (and set errno accordingly).
+ * @return 0 on success, or negative value on failure.
*/
int
nfp_cpp_mutex_init(struct nfp_cpp *cpp, int target, unsigned long long address,
@@ -138,7 +136,7 @@ nfp_cpp_mutex_alloc(struct nfp_cpp *cpp, int target,
}
/* If the key doesn't match... */
- return NFP_ERRPTR(EEXIST);
+ return NULL;
}
err = _nfp_cpp_mutex_validate(model, &target, address);
@@ -150,11 +148,11 @@ nfp_cpp_mutex_alloc(struct nfp_cpp *cpp, int target,
return NULL;
if (tmp != key)
- return NFP_ERRPTR(EEXIST);
+ return NULL;
mutex = calloc(sizeof(*mutex), 1);
if (mutex == NULL)
- return NFP_ERRPTR(ENOMEM);
+ return NULL;
mutex->cpp = cpp;
mutex->target = target;
@@ -203,7 +201,7 @@ nfp_cpp_mutex_owner(struct nfp_cpp_mutex *mutex)
return err;
if (key != mutex->key)
- return NFP_ERRNO(EPERM);
+ return -EPERM;
if (MUTEX_IS_LOCKED(value) == 0)
return 0;
@@ -253,7 +251,7 @@ nfp_cpp_mutex_free(struct nfp_cpp_mutex *mutex)
*
* @param mutex NFP CPP Mutex handle
*
- * @return 0 on success, or -1 on failure (and set errno accordingly).
+ * @return 0 on success, or negative value on failure.
*/
int
nfp_cpp_mutex_lock(struct nfp_cpp_mutex *mutex)
@@ -262,8 +260,8 @@ nfp_cpp_mutex_lock(struct nfp_cpp_mutex *mutex)
time_t warn_at = time(NULL) + 15;
while ((err = nfp_cpp_mutex_trylock(mutex)) != 0) {
- /* If errno != EBUSY, then the lock was damaged */
- if (err < 0 && errno != EBUSY)
+ /* If err != -EBUSY, then the lock was damaged */
+ if (err < 0 && err != -EBUSY)
return err;
if (time(NULL) >= warn_at) {
PMD_DRV_LOG(ERR, "Warning: waiting for NFP mutex usage:%u depth:%hd] target:%d addr:%llx key:%08x]",
@@ -281,7 +279,7 @@ nfp_cpp_mutex_lock(struct nfp_cpp_mutex *mutex)
*
* @param mutex NFP CPP Mutex handle
*
- * @return 0 on success, or -1 on failure (and set errno accordingly).
+ * @return 0 on success, or negative value on failure.
*/
int
nfp_cpp_mutex_unlock(struct nfp_cpp_mutex *mutex)
@@ -307,12 +305,12 @@ nfp_cpp_mutex_unlock(struct nfp_cpp_mutex *mutex)
goto exit;
if (key != mutex->key) {
- err = NFP_ERRNO(EPERM);
+ err = -EPERM;
goto exit;
}
if (value != MUTEX_LOCKED(interface)) {
- err = NFP_ERRNO(EACCES);
+ err = -EACCES;
goto exit;
}
@@ -335,8 +333,7 @@ nfp_cpp_mutex_unlock(struct nfp_cpp_mutex *mutex)
* 0x....000f - Locked
*
* @param mutex NFP CPP Mutex handle
- * @return 0 if the lock succeeded, -1 on failure (and errno set
- * appropriately).
+ * @return 0 if the lock succeeded, negative value on failure.
*/
int
nfp_cpp_mutex_trylock(struct nfp_cpp_mutex *mutex)
@@ -350,7 +347,7 @@ nfp_cpp_mutex_trylock(struct nfp_cpp_mutex *mutex)
if (mutex->depth > 0) {
if (mutex->depth == MUTEX_DEPTH_MAX)
- return NFP_ERRNO(E2BIG);
+ return -E2BIG;
mutex->depth++;
return 0;
@@ -362,7 +359,7 @@ nfp_cpp_mutex_trylock(struct nfp_cpp_mutex *mutex)
goto exit;
if (key != mutex->key) {
- err = NFP_ERRNO(EPERM);
+ err = -EPERM;
goto exit;
}
@@ -415,7 +412,7 @@ nfp_cpp_mutex_trylock(struct nfp_cpp_mutex *mutex)
goto exit;
}
- err = NFP_ERRNO(MUTEX_IS_LOCKED(tmp) ? EBUSY : EINVAL);
+ err = MUTEX_IS_LOCKED(tmp) ? -EBUSY : -EINVAL;
exit:
return err;
diff --git a/drivers/net/nfp/nfpcore/nfp_nffw.c b/drivers/net/nfp/nfpcore/nfp_nffw.c
index ccc5227d4d..bead4f3341 100644
--- a/drivers/net/nfp/nfpcore/nfp_nffw.c
+++ b/drivers/net/nfp/nfpcore/nfp_nffw.c
@@ -112,7 +112,7 @@ nffw_res_fwinfos(struct nfp_nffw_info_data *fwinf, struct nffw_fwinfo **arr)
* nfp_nffw_info_open() - Acquire the lock on the NFFW table
* @cpp: NFP CPP handle
*
- * Return: 0, or -ERRNO
+ * Return: nffw info pointer, or NULL on failure
*/
struct nfp_nffw_info *
nfp_nffw_info_open(struct nfp_cpp *cpp)
@@ -164,7 +164,7 @@ nfp_nffw_info_open(struct nfp_cpp *cpp)
* nfp_nffw_info_close() - Release the lock on the NFFW table
* @state: NFP FW info state
*
- * Return: 0, or -ERRNO
+ * Return: void
*/
void
nfp_nffw_info_close(struct nfp_nffw_info *state)
diff --git a/drivers/net/nfp/nfpcore/nfp_resource.c b/drivers/net/nfp/nfpcore/nfp_resource.c
index 892ccf73c4..351bc623ed 100644
--- a/drivers/net/nfp/nfpcore/nfp_resource.c
+++ b/drivers/net/nfp/nfpcore/nfp_resource.c
@@ -145,7 +145,7 @@ nfp_resource_try_acquire(struct nfp_cpp *cpp, struct nfp_resource *res,
*
* NOTE: This function locks the acquired resource
*
- * Return: NFP Resource handle, or ERR_PTR()
+ * Return: NFP Resource handle, or NULL
*/
struct nfp_resource *
nfp_resource_acquire(struct nfp_cpp *cpp, const char *name)
--
2.39.1
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 05/13] net/nfp: use generic macros for array size and to set bits
2023-04-10 11:00 [PATCH 00/13] Sync the kernel driver logic Chaoyong He
` (3 preceding siblings ...)
2023-04-10 11:00 ` [PATCH 04/13] net/nfp: drop usage of return error helpers Chaoyong He
@ 2023-04-10 11:00 ` Chaoyong He
2023-04-10 11:00 ` [PATCH 06/13] net/nfp: remove dead code related to CPP Chaoyong He
` (9 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Chaoyong He @ 2023-04-10 11:00 UTC (permalink / raw)
To: dev; +Cc: oss-drivers, niklas.soderlund, Chaoyong He
Instead of using NFP specific macros for array size and to set bits use
the generic ones provided by DPDK.
By moving some include directives for system header files directly to
the source files that depend on them, the header file nfp_platform.h
defining the NFP specific macros can be removed.
Signed-off-by: Chaoyong He <chaoyong.he@corigine.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund@corigine.com>
---
drivers/net/nfp/nfp_cpp_bridge.c | 5 +--
drivers/net/nfp/nfp_rxtx.c | 1 -
drivers/net/nfp/nfp_rxtx.h | 10 +++---
.../net/nfp/nfpcore/nfp-common/nfp_platform.h | 29 ----------------
.../net/nfp/nfpcore/nfp-common/nfp_resid.h | 4 ---
drivers/net/nfp/nfpcore/nfp_cpp.h | 1 -
drivers/net/nfp/nfpcore/nfp_cppcore.c | 3 +-
drivers/net/nfp/nfpcore/nfp_hwinfo.h | 2 +-
drivers/net/nfp/nfpcore/nfp_nffw.c | 4 +--
drivers/net/nfp/nfpcore/nfp_nffw.h | 1 -
drivers/net/nfp/nfpcore/nfp_nsp.c | 2 +-
drivers/net/nfp/nfpcore/nfp_nsp.h | 12 +++----
drivers/net/nfp/nfpcore/nfp_nsp_cmds.c | 2 +-
drivers/net/nfp/nfpcore/nfp_nsp_eth.c | 34 +++++++++----------
drivers/net/nfp/nfpcore/nfp_target.h | 1 -
15 files changed, 38 insertions(+), 73 deletions(-)
delete mode 100644 drivers/net/nfp/nfpcore/nfp-common/nfp_platform.h
diff --git a/drivers/net/nfp/nfp_cpp_bridge.c b/drivers/net/nfp/nfp_cpp_bridge.c
index 8e29cfb6d3..78a680453b 100644
--- a/drivers/net/nfp/nfp_cpp_bridge.c
+++ b/drivers/net/nfp/nfp_cpp_bridge.c
@@ -13,6 +13,9 @@
* Netronome vNIC DPDK Poll-Mode Driver: CPP Bridge
*/
+#include <unistd.h>
+#include <sys/ioctl.h>
+
#include <rte_service_component.h>
#include "nfpcore/nfp_cpp.h"
@@ -22,8 +25,6 @@
#include "nfp_logs.h"
#include "nfp_cpp_bridge.h"
-#include <sys/ioctl.h>
-
/* Prototypes */
static int nfp_cpp_bridge_serve_write(int sockfd, struct nfp_cpp *cpp);
static int nfp_cpp_bridge_serve_read(int sockfd, struct nfp_cpp *cpp);
diff --git a/drivers/net/nfp/nfp_rxtx.c b/drivers/net/nfp/nfp_rxtx.c
index bc73026825..16a124fd7d 100644
--- a/drivers/net/nfp/nfp_rxtx.c
+++ b/drivers/net/nfp/nfp_rxtx.c
@@ -22,7 +22,6 @@
#include "nfp_logs.h"
#include "nfpcore/nfp_mip.h"
#include "nfpcore/nfp_rtsym.h"
-#include "nfpcore/nfp-common/nfp_platform.h"
static int
nfp_net_rx_fill_freelist(struct nfp_net_rxq *rxq)
diff --git a/drivers/net/nfp/nfp_rxtx.h b/drivers/net/nfp/nfp_rxtx.h
index 5e651518ed..f016bf732c 100644
--- a/drivers/net/nfp/nfp_rxtx.h
+++ b/drivers/net/nfp/nfp_rxtx.h
@@ -120,11 +120,11 @@ struct nfp_meta_parsed {
#define NFDK_DESC_TX_TYPE_TSO 2
#define NFDK_DESC_TX_TYPE_SIMPLE 8
#define NFDK_DESC_TX_TYPE_GATHER 1
-#define NFDK_DESC_TX_EOP BIT(14)
-#define NFDK_DESC_TX_CHAIN_META BIT(3)
-#define NFDK_DESC_TX_ENCAP BIT(2)
-#define NFDK_DESC_TX_L4_CSUM BIT(1)
-#define NFDK_DESC_TX_L3_CSUM BIT(0)
+#define NFDK_DESC_TX_EOP RTE_BIT32(14)
+#define NFDK_DESC_TX_CHAIN_META RTE_BIT32(3)
+#define NFDK_DESC_TX_ENCAP RTE_BIT32(2)
+#define NFDK_DESC_TX_L4_CSUM RTE_BIT32(1)
+#define NFDK_DESC_TX_L3_CSUM RTE_BIT32(0)
#define NFDK_TX_MAX_DATA_PER_DESC 0x00004000
#define NFDK_TX_DESC_GATHER_MAX 17
diff --git a/drivers/net/nfp/nfpcore/nfp-common/nfp_platform.h b/drivers/net/nfp/nfpcore/nfp-common/nfp_platform.h
deleted file mode 100644
index 9fa52074f0..0000000000
--- a/drivers/net/nfp/nfpcore/nfp-common/nfp_platform.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018 Netronome Systems, Inc.
- * All rights reserved.
- */
-
-#ifndef __NFP_PLATFORM_H__
-#define __NFP_PLATFORM_H__
-
-#include <fcntl.h>
-#include <unistd.h>
-#include <stdint.h>
-#include <string.h>
-#include <stdlib.h>
-#include <ctype.h>
-#include <inttypes.h>
-#include <sys/stat.h>
-#include <limits.h>
-#include <errno.h>
-
-#ifndef BIT_ULL
-#define BIT(x) (1 << (x))
-#define BIT_ULL(x) (1ULL << (x))
-#endif
-
-#ifndef ARRAY_SIZE
-#define ARRAY_SIZE(x) RTE_DIM(x)
-#endif
-
-#endif /* __NFP_PLATFORM_H__ */
diff --git a/drivers/net/nfp/nfpcore/nfp-common/nfp_resid.h b/drivers/net/nfp/nfpcore/nfp-common/nfp_resid.h
index ac2bf0335d..5445d4dac8 100644
--- a/drivers/net/nfp/nfpcore/nfp-common/nfp_resid.h
+++ b/drivers/net/nfp/nfpcore/nfp-common/nfp_resid.h
@@ -11,10 +11,6 @@
#define _NFP_RESID_NO_C_FUNC
#endif
-#ifndef _NFP_RESID_NO_C_FUNC
-#include "nfp_platform.h"
-#endif
-
/*
* NFP Chip Architectures
*
diff --git a/drivers/net/nfp/nfpcore/nfp_cpp.h b/drivers/net/nfp/nfpcore/nfp_cpp.h
index 437dcdf942..d657a7c164 100644
--- a/drivers/net/nfp/nfpcore/nfp_cpp.h
+++ b/drivers/net/nfp/nfpcore/nfp_cpp.h
@@ -8,7 +8,6 @@
#include <ethdev_pci.h>
-#include "nfp-common/nfp_platform.h"
#include "nfp-common/nfp_resid.h"
struct nfp_cpp_mutex;
diff --git a/drivers/net/nfp/nfpcore/nfp_cppcore.c b/drivers/net/nfp/nfpcore/nfp_cppcore.c
index 97cf16c801..681ec93b96 100644
--- a/drivers/net/nfp/nfpcore/nfp_cppcore.c
+++ b/drivers/net/nfp/nfpcore/nfp_cppcore.c
@@ -8,6 +8,7 @@
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
+#include <unistd.h>
#include <sys/types.h>
#include <rte_byteorder.h>
@@ -565,7 +566,7 @@ nfp_cpp_alloc(struct rte_pci_device *dev, int driver_lock_needed)
uint32_t xpbaddr;
size_t tgt;
- for (tgt = 0; tgt < ARRAY_SIZE(cpp->imb_cat_table); tgt++) {
+ for (tgt = 0; tgt < RTE_DIM(cpp->imb_cat_table); tgt++) {
/* Hardcoded XPB IMB Base, island 0 */
xpbaddr = 0x000a0000 + (tgt * 4);
err = nfp_xpb_readl(cpp, xpbaddr,
diff --git a/drivers/net/nfp/nfpcore/nfp_hwinfo.h b/drivers/net/nfp/nfpcore/nfp_hwinfo.h
index ccc616321f..a3da7512db 100644
--- a/drivers/net/nfp/nfpcore/nfp_hwinfo.h
+++ b/drivers/net/nfp/nfpcore/nfp_hwinfo.h
@@ -63,7 +63,7 @@
#define NFP_HWINFO_VERSION_1 ('H' << 24 | 'I' << 16 | 1 << 8 | 0 << 1 | 0)
#define NFP_HWINFO_VERSION_2 ('H' << 24 | 'I' << 16 | 2 << 8 | 0 << 1 | 0)
-#define NFP_HWINFO_VERSION_UPDATING BIT(0)
+#define NFP_HWINFO_VERSION_UPDATING RTE_BIT32(0)
struct nfp_hwinfo {
uint8_t start[0];
diff --git a/drivers/net/nfp/nfpcore/nfp_nffw.c b/drivers/net/nfp/nfpcore/nfp_nffw.c
index bead4f3341..07d63900dc 100644
--- a/drivers/net/nfp/nfpcore/nfp_nffw.c
+++ b/drivers/net/nfp/nfpcore/nfp_nffw.c
@@ -61,9 +61,9 @@ nffw_fwinfo_mip_offset_get(const struct nffw_fwinfo *fi)
}
#define NFP_IMB_TGTADDRESSMODECFG_MODE_of(_x) (((_x) >> 13) & 0x7)
-#define NFP_IMB_TGTADDRESSMODECFG_ADDRMODE BIT(12)
+#define NFP_IMB_TGTADDRESSMODECFG_ADDRMODE RTE_BIT32(12)
#define NFP_IMB_TGTADDRESSMODECFG_ADDRMODE_32_BIT 0
-#define NFP_IMB_TGTADDRESSMODECFG_ADDRMODE_40_BIT BIT(12)
+#define NFP_IMB_TGTADDRESSMODECFG_ADDRMODE_40_BIT RTE_BIT32(12)
static int
nfp_mip_mu_locality_lsb(struct nfp_cpp *cpp)
diff --git a/drivers/net/nfp/nfpcore/nfp_nffw.h b/drivers/net/nfp/nfpcore/nfp_nffw.h
index 3bbdf1c138..9f24bd2269 100644
--- a/drivers/net/nfp/nfpcore/nfp_nffw.h
+++ b/drivers/net/nfp/nfpcore/nfp_nffw.h
@@ -6,7 +6,6 @@
#ifndef __NFP_NFFW_H__
#define __NFP_NFFW_H__
-#include "nfp-common/nfp_platform.h"
#include "nfp_cpp.h"
/*
diff --git a/drivers/net/nfp/nfpcore/nfp_nsp.c b/drivers/net/nfp/nfpcore/nfp_nsp.c
index d8abaf1d52..1f6b7bd85c 100644
--- a/drivers/net/nfp/nfpcore/nfp_nsp.c
+++ b/drivers/net/nfp/nfpcore/nfp_nsp.c
@@ -61,7 +61,7 @@ nfp_nsp_print_extended_error(uint32_t ret_val)
if (ret_val == 0)
return;
- for (i = 0; i < (int)ARRAY_SIZE(nsp_errors); i++)
+ for (i = 0; i < (int)RTE_DIM(nsp_errors); i++)
if (ret_val == (uint32_t)nsp_errors[i].code)
PMD_DRV_LOG(ERR, "err msg: %s", nsp_errors[i].msg);
}
diff --git a/drivers/net/nfp/nfpcore/nfp_nsp.h b/drivers/net/nfp/nfpcore/nfp_nsp.h
index 2184c15b4c..50cdec3a58 100644
--- a/drivers/net/nfp/nfpcore/nfp_nsp.h
+++ b/drivers/net/nfp/nfpcore/nfp_nsp.h
@@ -40,12 +40,12 @@
#define NSP_STATUS_MINOR GENMASK_ULL(43, 32)
#define NSP_STATUS_CODE GENMASK_ULL(31, 16)
#define NSP_STATUS_RESULT GENMASK_ULL(15, 8)
-#define NSP_STATUS_BUSY BIT_ULL(0)
+#define NSP_STATUS_BUSY RTE_BIT64(0)
#define NSP_COMMAND 0x08
#define NSP_COMMAND_OPTION GENMASK_ULL(63, 32)
#define NSP_COMMAND_CODE GENMASK_ULL(31, 16)
-#define NSP_COMMAND_START BIT_ULL(0)
+#define NSP_COMMAND_START RTE_BIT64(0)
/* CPP address to retrieve the data from */
#define NSP_BUFFER 0x10
@@ -152,10 +152,10 @@ enum nfp_eth_fec {
NFP_FEC_DISABLED_BIT,
};
-#define NFP_FEC_AUTO BIT(NFP_FEC_AUTO_BIT)
-#define NFP_FEC_BASER BIT(NFP_FEC_BASER_BIT)
-#define NFP_FEC_REED_SOLOMON BIT(NFP_FEC_REED_SOLOMON_BIT)
-#define NFP_FEC_DISABLED BIT(NFP_FEC_DISABLED_BIT)
+#define NFP_FEC_AUTO RTE_BIT32(NFP_FEC_AUTO_BIT)
+#define NFP_FEC_BASER RTE_BIT32(NFP_FEC_BASER_BIT)
+#define NFP_FEC_REED_SOLOMON RTE_BIT32(NFP_FEC_REED_SOLOMON_BIT)
+#define NFP_FEC_DISABLED RTE_BIT32(NFP_FEC_DISABLED_BIT)
#define ETH_ALEN 6
diff --git a/drivers/net/nfp/nfpcore/nfp_nsp_cmds.c b/drivers/net/nfp/nfpcore/nfp_nsp_cmds.c
index 15f6f7002d..21b338461e 100644
--- a/drivers/net/nfp/nfpcore/nfp_nsp_cmds.c
+++ b/drivers/net/nfp/nfpcore/nfp_nsp_cmds.c
@@ -83,7 +83,7 @@ nfp_hwmon_read_sensor(struct nfp_cpp *cpp, enum nfp_nsp_sensor_id id, long *val)
if (nsp == NULL)
return -EIO;
- ret = nfp_nsp_read_sensors(nsp, BIT(id), &s, sizeof(s));
+ ret = nfp_nsp_read_sensors(nsp, RTE_BIT32(id), &s, sizeof(s));
nfp_nsp_close(nsp);
if (ret < 0)
diff --git a/drivers/net/nfp/nfpcore/nfp_nsp_eth.c b/drivers/net/nfp/nfpcore/nfp_nsp_eth.c
index 578120636d..f8d1416d4b 100644
--- a/drivers/net/nfp/nfpcore/nfp_nsp_eth.c
+++ b/drivers/net/nfp/nfpcore/nfp_nsp_eth.c
@@ -44,30 +44,30 @@
#define NSP_ETH_PORT_INDEX GENMASK_ULL(15, 8)
#define NSP_ETH_PORT_LABEL GENMASK_ULL(53, 48)
#define NSP_ETH_PORT_PHYLABEL GENMASK_ULL(59, 54)
-#define NSP_ETH_PORT_FEC_SUPP_BASER BIT_ULL(60)
-#define NSP_ETH_PORT_FEC_SUPP_RS BIT_ULL(61)
+#define NSP_ETH_PORT_FEC_SUPP_BASER RTE_BIT64(60)
+#define NSP_ETH_PORT_FEC_SUPP_RS RTE_BIT64(61)
#define NSP_ETH_PORT_LANES_MASK rte_cpu_to_le_64(NSP_ETH_PORT_LANES)
-#define NSP_ETH_STATE_CONFIGURED BIT_ULL(0)
-#define NSP_ETH_STATE_ENABLED BIT_ULL(1)
-#define NSP_ETH_STATE_TX_ENABLED BIT_ULL(2)
-#define NSP_ETH_STATE_RX_ENABLED BIT_ULL(3)
+#define NSP_ETH_STATE_CONFIGURED RTE_BIT64(0)
+#define NSP_ETH_STATE_ENABLED RTE_BIT64(1)
+#define NSP_ETH_STATE_TX_ENABLED RTE_BIT64(2)
+#define NSP_ETH_STATE_RX_ENABLED RTE_BIT64(3)
#define NSP_ETH_STATE_RATE GENMASK_ULL(11, 8)
#define NSP_ETH_STATE_INTERFACE GENMASK_ULL(19, 12)
#define NSP_ETH_STATE_MEDIA GENMASK_ULL(21, 20)
-#define NSP_ETH_STATE_OVRD_CHNG BIT_ULL(22)
+#define NSP_ETH_STATE_OVRD_CHNG RTE_BIT64(22)
#define NSP_ETH_STATE_ANEG GENMASK_ULL(25, 23)
#define NSP_ETH_STATE_FEC GENMASK_ULL(27, 26)
-#define NSP_ETH_CTRL_CONFIGURED BIT_ULL(0)
-#define NSP_ETH_CTRL_ENABLED BIT_ULL(1)
-#define NSP_ETH_CTRL_TX_ENABLED BIT_ULL(2)
-#define NSP_ETH_CTRL_RX_ENABLED BIT_ULL(3)
-#define NSP_ETH_CTRL_SET_RATE BIT_ULL(4)
-#define NSP_ETH_CTRL_SET_LANES BIT_ULL(5)
-#define NSP_ETH_CTRL_SET_ANEG BIT_ULL(6)
-#define NSP_ETH_CTRL_SET_FEC BIT_ULL(7)
+#define NSP_ETH_CTRL_CONFIGURED RTE_BIT64(0)
+#define NSP_ETH_CTRL_ENABLED RTE_BIT64(1)
+#define NSP_ETH_CTRL_TX_ENABLED RTE_BIT64(2)
+#define NSP_ETH_CTRL_RX_ENABLED RTE_BIT64(3)
+#define NSP_ETH_CTRL_SET_RATE RTE_BIT64(4)
+#define NSP_ETH_CTRL_SET_LANES RTE_BIT64(5)
+#define NSP_ETH_CTRL_SET_ANEG RTE_BIT64(6)
+#define NSP_ETH_CTRL_SET_FEC RTE_BIT64(7)
/* Which connector port. */
#define PORT_TP 0x00
@@ -139,7 +139,7 @@ nfp_eth_rate2speed(enum nfp_eth_rate rate)
{
int i;
- for (i = 0; i < (int)ARRAY_SIZE(nsp_eth_rate_tbl); i++)
+ for (i = 0; i < (int)RTE_DIM(nsp_eth_rate_tbl); i++)
if (nsp_eth_rate_tbl[i].rate == rate)
return nsp_eth_rate_tbl[i].speed;
@@ -151,7 +151,7 @@ nfp_eth_speed2rate(unsigned int speed)
{
int i;
- for (i = 0; i < (int)ARRAY_SIZE(nsp_eth_rate_tbl); i++)
+ for (i = 0; i < (int)RTE_DIM(nsp_eth_rate_tbl); i++)
if (nsp_eth_rate_tbl[i].speed == speed)
return nsp_eth_rate_tbl[i].rate;
diff --git a/drivers/net/nfp/nfpcore/nfp_target.h b/drivers/net/nfp/nfpcore/nfp_target.h
index 24417fb315..accedde1f7 100644
--- a/drivers/net/nfp/nfpcore/nfp_target.h
+++ b/drivers/net/nfp/nfpcore/nfp_target.h
@@ -7,7 +7,6 @@
#define NFP_TARGET_H
#include "nfp-common/nfp_resid.h"
-#include "nfp-common/nfp_platform.h"
#include "nfp_cpp.h"
#define P32 1
--
2.39.1
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 06/13] net/nfp: remove dead code related to CPP
2023-04-10 11:00 [PATCH 00/13] Sync the kernel driver logic Chaoyong He
` (4 preceding siblings ...)
2023-04-10 11:00 ` [PATCH 05/13] net/nfp: use generic macros for array size and to set bits Chaoyong He
@ 2023-04-10 11:00 ` Chaoyong He
2023-04-10 11:00 ` [PATCH 07/13] net/nfp: remove duplicated nffw defines Chaoyong He
` (8 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Chaoyong He @ 2023-04-10 11:00 UTC (permalink / raw)
To: dev; +Cc: oss-drivers, niklas.soderlund, Chaoyong He
The header file bpf_resid.h contains function prototypes that are not
implemented anywhere, as well as a few defines and macros that are not
used anywhere. Move the few inline functions, defines and macros that
are used into nfp_cpp.h and remove bpf_resid.h.
Signed-off-by: Chaoyong He <chaoyong.he@corigine.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund@corigine.com>
---
.../net/nfp/nfpcore/nfp-common/nfp_resid.h | 577 ------------------
drivers/net/nfp/nfpcore/nfp_cpp.h | 97 ++-
drivers/net/nfp/nfpcore/nfp_target.h | 1 -
3 files changed, 95 insertions(+), 580 deletions(-)
delete mode 100644 drivers/net/nfp/nfpcore/nfp-common/nfp_resid.h
diff --git a/drivers/net/nfp/nfpcore/nfp-common/nfp_resid.h b/drivers/net/nfp/nfpcore/nfp-common/nfp_resid.h
deleted file mode 100644
index 5445d4dac8..0000000000
--- a/drivers/net/nfp/nfpcore/nfp-common/nfp_resid.h
+++ /dev/null
@@ -1,577 +0,0 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018 Netronome Systems, Inc.
- * All rights reserved.
- */
-
-#ifndef __NFP_RESID_H__
-#define __NFP_RESID_H__
-
-#if (!defined(_NFP_RESID_NO_C_FUNC) && \
- (defined(__NFP_TOOL_NFCC) || defined(__NFP_TOOL_NFAS)))
-#define _NFP_RESID_NO_C_FUNC
-#endif
-
-/*
- * NFP Chip Architectures
- *
- * These are semi-arbitrary values to indicate an NFP architecture.
- * They serve as a software view of a group of chip families, not necessarily a
- * direct mapping to actual hardware design.
- */
-#define NFP_CHIP_ARCH_YD 1
-#define NFP_CHIP_ARCH_TH 2
-
-/*
- * NFP Chip Families.
- *
- * These are not enums, because they need to be microcode compatible.
- * They are also not maskable.
- *
- * Note: The NFP-4xxx family is handled as NFP-6xxx in most software
- * components.
- *
- */
-#define NFP_CHIP_FAMILY_NFP6000 0x6000 /* ARCH_TH */
-
-/* NFP Microengine/Flow Processing Core Versions */
-#define NFP_CHIP_ME_VERSION_2_7 0x0207
-#define NFP_CHIP_ME_VERSION_2_8 0x0208
-#define NFP_CHIP_ME_VERSION_2_9 0x0209
-
-/* NFP Chip Base Revisions. Minor stepping can just be added to these */
-#define NFP_CHIP_REVISION_A0 0x00
-#define NFP_CHIP_REVISION_B0 0x10
-#define NFP_CHIP_REVISION_C0 0x20
-#define NFP_CHIP_REVISION_PF 0xff /* Maximum possible revision */
-
-/*
- * Wildcard indicating a CPP read or write action
- *
- * The action used will be either read or write depending on whether a read or
- * write instruction/call is performed on the NFP_CPP_ID. It is recommended that
- * the RW action is used even if all actions to be performed on a NFP_CPP_ID are
- * known to be only reads or writes. Doing so will in many cases save NFP CPP
- * internal software resources.
- */
-#define NFP_CPP_ACTION_RW 32
-
-#define NFP_CPP_TARGET_ID_MASK 0x1f
-
-/*
- * NFP_CPP_ID - pack target, token, and action into a CPP ID.
- *
- * Create a 32-bit CPP identifier representing the access to be made.
- * These identifiers are used as parameters to other NFP CPP functions. Some
- * CPP devices may allow wildcard identifiers to be specified.
- *
- * @param[in] target NFP CPP target id
- * @param[in] action NFP CPP action id
- * @param[in] token NFP CPP token id
- * @return NFP CPP ID
- */
-#define NFP_CPP_ID(target, action, token) \
- ((((target) & 0x7f) << 24) | (((token) & 0xff) << 16) | \
- (((action) & 0xff) << 8))
-
-#define NFP_CPP_ISLAND_ID(target, action, token, island) \
- ((((target) & 0x7f) << 24) | (((token) & 0xff) << 16) | \
- (((action) & 0xff) << 8) | (((island) & 0xff) << 0))
-
-#ifndef _NFP_RESID_NO_C_FUNC
-
-/**
- * Return the NFP CPP target of a NFP CPP ID
- * @param[in] id NFP CPP ID
- * @return NFP CPP target
- */
-static inline uint8_t
-NFP_CPP_ID_TARGET_of(uint32_t id)
-{
- return (id >> 24) & NFP_CPP_TARGET_ID_MASK;
-}
-
-/*
- * Return the NFP CPP token of a NFP CPP ID
- * @param[in] id NFP CPP ID
- * @return NFP CPP token
- */
-static inline uint8_t
-NFP_CPP_ID_TOKEN_of(uint32_t id)
-{
- return (id >> 16) & 0xff;
-}
-
-/*
- * Return the NFP CPP action of a NFP CPP ID
- * @param[in] id NFP CPP ID
- * @return NFP CPP action
- */
-static inline uint8_t
-NFP_CPP_ID_ACTION_of(uint32_t id)
-{
- return (id >> 8) & 0xff;
-}
-
-/*
- * Return the NFP CPP action of a NFP CPP ID
- * @param[in] id NFP CPP ID
- * @return NFP CPP action
- */
-static inline uint8_t
-NFP_CPP_ID_ISLAND_of(uint32_t id)
-{
- return (id) & 0xff;
-}
-
-#endif /* _NFP_RESID_NO_C_FUNC */
-
-/*
- * Check if @p chip_family is an ARCH_TH chip.
- * @param chip_family One of NFP_CHIP_FAMILY_*
- */
-#define NFP_FAMILY_IS_ARCH_TH(chip_family) \
- ((int)(chip_family) == (int)NFP_CHIP_FAMILY_NFP6000)
-
-/*
- * Get the NFP_CHIP_ARCH_* of @p chip_family.
- * @param chip_family One of NFP_CHIP_FAMILY_*
- */
-#define NFP_FAMILY_ARCH(x) \
- (__extension__ ({ \
- typeof(x) _x = (x); \
- (NFP_FAMILY_IS_ARCH_TH(_x) ? NFP_CHIP_ARCH_TH : \
- NFP_FAMILY_IS_ARCH_YD(_x) ? NFP_CHIP_ARCH_YD : -1) \
- }))
-
-/*
- * Check if @p chip_family is an NFP-6xxx chip.
- * @param chip_family One of NFP_CHIP_FAMILY_*
- */
-#define NFP_FAMILY_IS_NFP6000(chip_family) \
- ((int)(chip_family) == (int)NFP_CHIP_FAMILY_NFP6000)
-
-/*
- * Make microengine ID for NFP-6xxx.
- * @param island_id Island ID.
- * @param menum ME number, 0 based, within island.
- *
- * NOTE: menum should really be unsigned - MSC compiler throws error (not
- * warning) if a clause is always true i.e. menum >= 0 if cluster_num is type
- * unsigned int hence the cast of the menum to an int in that particular clause
- */
-#define NFP6000_MEID(a, b) \
- (__extension__ ({ \
- typeof(a) _a = (a); \
- typeof(b) _b = (b); \
- (((((int)(_a) & 0x3F) == (int)(_a)) && \
- (((int)(_b) >= 0) && ((int)(_b) < 12))) ? \
- (int)(((_a) << 4) | ((_b) + 4)) : -1) \
- }))
-
-/*
- * Do a general sanity check on the ME ID.
- * The check is on the highest possible island ID for the chip family and the
- * microengine number must be a master ID.
- * @param meid ME ID as created by NFP6000_MEID
- */
-#define NFP6000_MEID_IS_VALID(meid) \
- (__extension__ ({ \
- typeof(meid) _a = (meid); \
- ((((_a) >> 4) < 64) && (((_a) >> 4) >= 0) && \
- (((_a) & 0xF) >= 4)) \
- }))
-
-/*
- * Extract island ID from ME ID.
- * @param meid ME ID as created by NFP6000_MEID
- */
-#define NFP6000_MEID_ISLAND_of(meid) (((meid) >> 4) & 0x3F)
-
-/*
- * Extract microengine number (0 based) from ME ID.
- * @param meid ME ID as created by NFP6000_MEID
- */
-#define NFP6000_MEID_MENUM_of(meid) (((meid) & 0xF) - 4)
-
-/*
- * Extract microengine group number (0 based) from ME ID.
- * The group is two code-sharing microengines, so group 0 refers to MEs 0,1,
- * group 1 refers to MEs 2,3 etc.
- * @param meid ME ID as created by NFP6000_MEID
- */
-#define NFP6000_MEID_MEGRP_of(meid) (NFP6000_MEID_MENUM_of(meid) >> 1)
-
-#ifndef _NFP_RESID_NO_C_FUNC
-
-/*
- * Convert a string to an ME ID.
- *
- * @param s A string of format iX.meY
- * @param endptr If non-NULL, *endptr will point to the trailing string
- * after the ME ID part of the string, which is either
- * an empty string or the first character after the separating
- * period.
- * @return ME ID on success, -1 on error.
- */
-int nfp6000_idstr2meid(const char *s, const char **endptr);
-
-/*
- * Extract island ID from string.
- *
- * Example:
- * char *c;
- * int val = nfp6000_idstr2island("i32.me5", &c);
- * // val == 32, c == "me5"
- * val = nfp6000_idstr2island("i32", &c);
- * // val == 32, c == ""
- *
- * @param s A string of format "iX.anything" or "iX"
- * @param endptr If non-NULL, *endptr will point to the trailing string
- * after the island part of the string, which is either
- * an empty string or the first character after the separating
- * period.
- * @return If successful, the island ID, -1 on error.
- */
-int nfp6000_idstr2island(const char *s, const char **endptr);
-
-/*
- * Extract microengine number from string.
- *
- * Example:
- * char *c;
- * int menum = nfp6000_idstr2menum("me5.anything", &c);
- * // menum == 5, c == "anything"
- * menum = nfp6000_idstr2menum("me5", &c);
- * // menum == 5, c == ""
- *
- * @param s A string of format "meX.anything" or "meX"
- * @param endptr If non-NULL, *endptr will point to the trailing string
- * after the ME number part of the string, which is either
- * an empty string or the first character after the separating
- * period.
- * @return If successful, the ME number, -1 on error.
- */
-int nfp6000_idstr2menum(const char *s, const char **endptr);
-
-/*
- * Extract context number from string.
- *
- * Example:
- * char *c;
- * int val = nfp6000_idstr2ctxnum("ctx5.anything", &c);
- * // val == 5, c == "anything"
- * val = nfp6000_idstr2ctxnum("ctx5", &c);
- * // val == 5, c == ""
- *
- * @param s A string of format "ctxN.anything" or "ctxN"
- * @param endptr If non-NULL, *endptr will point to the trailing string
- * after the context number part of the string, which is either
- * an empty string or the first character after the separating
- * period.
- * @return If successful, the context number, -1 on error.
- */
-int nfp6000_idstr2ctxnum(const char *s, const char **endptr);
-
-/*
- * Extract microengine group number from string.
- *
- * Example:
- * char *c;
- * int val = nfp6000_idstr2megrp("tg2.anything", &c);
- * // val == 2, c == "anything"
- * val = nfp6000_idstr2megrp("tg5", &c);
- * // val == 2, c == ""
- *
- * @param s A string of format "tgX.anything" or "tgX"
- * @param endptr If non-NULL, *endptr will point to the trailing string
- * after the ME group part of the string, which is either
- * an empty string or the first character after the separating
- * period.
- * @return If successful, the ME group number, -1 on error.
- */
-int nfp6000_idstr2megrp(const char *s, const char **endptr);
-
-/*
- * Create ME ID string of format "iX[.meY]".
- *
- * @param s Pointer to char buffer of size NFP_MEID_STR_SZ.
- * The resulting string is output here.
- * @param meid Microengine ID.
- * @return Pointer to "s" on success, NULL on error.
- */
-const char *nfp6000_meid2str(char *s, int meid);
-
-/*
- * Create ME ID string of format "name[.meY]" or "iX[.meY]".
- *
- * @param s Pointer to char buffer of size NFP_MEID_STR_SZ.
- * The resulting string is output here.
- * @param meid Microengine ID.
- * @return Pointer to "s" on success, NULL on error.
- *
- * Similar to nfp6000_meid2str() except use an alias instead of "iX"
- * if one exists for the island.
- */
-const char *nfp6000_meid2altstr(char *s, int meid);
-
-/*
- * Create string of format "iX".
- *
- * @param s Pointer to char buffer of size NFP_MEID_STR_SZ.
- * The resulting string is output here.
- * @param island_id Island ID.
- * @return Pointer to "s" on success, NULL on error.
- */
-const char *nfp6000_island2str(char *s, int island_id);
-
-/*
- * Create string of format "name", an island alias.
- *
- * @param s Pointer to char buffer of size NFP_MEID_STR_SZ.
- * The resulting string is output here.
- * @param island_id Island ID.
- * @return Pointer to "s" on success, NULL on error.
- */
-const char *nfp6000_island2altstr(char *s, int island_id);
-
-/*
- * Create string of format "meY".
- *
- * @param s Pointer to char buffer of size NFP_MEID_STR_SZ.
- * The resulting string is output here.
- * @param menum Microengine number within island.
- * @return Pointer to "s" on success, NULL on error.
- */
-const char *nfp6000_menum2str(char *s, int menum);
-
-/*
- * Create string of format "ctxY".
- *
- * @param s Pointer to char buffer of size NFP_MEID_STR_SZ.
- * The resulting string is output here.
- * @param ctxnum Context number within microengine.
- * @return Pointer to "s" on success, NULL on error.
- */
-const char *nfp6000_ctxnum2str(char *s, int ctxnum);
-
-/*
- * Create string of format "tgY".
- *
- * @param s Pointer to char buffer of size NFP_MEID_STR_SZ.
- * The resulting string is output here.
- * @param megrp Microengine group number within cluster.
- * @return Pointer to "s" on success, NULL on error.
- */
-const char *nfp6000_megrp2str(char *s, int megrp);
-
-/*
- * Convert a string to an ME ID.
- *
- * @param chip_family Chip family ID
- * @param s A string of format iX.meY (or clX.meY)
- * @param endptr If non-NULL, *endptr will point to the trailing
- * string after the ME ID part of the string, which
- * is either an empty string or the first character
- * after the separating period.
- * @return ME ID on success, -1 on error.
- */
-int nfp_idstr2meid(int chip_family, const char *s, const char **endptr);
-
-/*
- * Extract island ID from string.
- *
- * Example:
- * char *c;
- * int val = nfp_idstr2island(chip, "i32.me5", &c);
- * // val == 32, c == "me5"
- * val = nfp_idstr2island(chip, "i32", &c);
- * // val == 32, c == ""
- *
- * @param chip_family Chip family ID
- * @param s A string of format "iX.anything" or "iX"
- * @param endptr If non-NULL, *endptr will point to the trailing
- * string after the ME ID part of the string, which
- * is either an empty string or the first character
- * after the separating period.
- * @return The island ID on succes, -1 on error.
- */
-int nfp_idstr2island(int chip_family, const char *s, const char **endptr);
-
-/*
- * Extract microengine number from string.
- *
- * Example:
- * char *c;
- * int menum = nfp_idstr2menum("me5.anything", &c);
- * // menum == 5, c == "anything"
- * menum = nfp_idstr2menum("me5", &c);
- * // menum == 5, c == ""
- *
- * @param chip_family Chip family ID
- * @param s A string of format "meX.anything" or "meX"
- * @param endptr If non-NULL, *endptr will point to the trailing
- * string after the ME ID part of the string, which
- * is either an empty string or the first character
- * after the separating period.
- * @return The ME number on succes, -1 on error.
- */
-int nfp_idstr2menum(int chip_family, const char *s, const char **endptr);
-
-/*
- * Extract context number from string.
- *
- * Example:
- * char *c;
- * int val = nfp_idstr2ctxnum("ctx5.anything", &c);
- * // val == 5, c == "anything"
- * val = nfp_idstr2ctxnum("ctx5", &c);
- * // val == 5, c == ""
- *
- * @param s A string of format "ctxN.anything" or "ctxN"
- * @param endptr If non-NULL, *endptr will point to the trailing string
- * after the context number part of the string, which is either
- * an empty string or the first character after the separating
- * period.
- * @return If successful, the context number, -1 on error.
- */
-int nfp_idstr2ctxnum(int chip_family, const char *s, const char **endptr);
-
-/*
- * Extract microengine group number from string.
- *
- * Example:
- * char *c;
- * int val = nfp_idstr2megrp("tg2.anything", &c);
- * // val == 2, c == "anything"
- * val = nfp_idstr2megrp("tg5", &c);
- * // val == 5, c == ""
- *
- * @param s A string of format "tgX.anything" or "tgX"
- * @param endptr If non-NULL, *endptr will point to the trailing string
- * after the ME group part of the string, which is either
- * an empty string or the first character after the separating
- * period.
- * @return If successful, the ME group number, -1 on error.
- */
-int nfp_idstr2megrp(int chip_family, const char *s, const char **endptr);
-
-/*
- * Create ME ID string of format "iX[.meY]".
- *
- * @param chip_family Chip family ID
- * @param s Pointer to char buffer of size NFP_MEID_STR_SZ.
- * The resulting string is output here.
- * @param meid Microengine ID.
- * @return Pointer to "s" on success, NULL on error.
- */
-const char *nfp_meid2str(int chip_family, char *s, int meid);
-
-/*
- * Create ME ID string of format "name[.meY]" or "iX[.meY]".
- *
- * @param chip_family Chip family ID
- * @param s Pointer to char buffer of size NFP_MEID_STR_SZ.
- * The resulting string is output here.
- * @param meid Microengine ID.
- * @return Pointer to "s" on success, NULL on error.
- *
- * Similar to nfp_meid2str() except use an alias instead of "iX"
- * if one exists for the island.
- */
-const char *nfp_meid2altstr(int chip_family, char *s, int meid);
-
-/*
- * Create string of format "iX".
- *
- * @param chip_family Chip family ID
- * @param s Pointer to char buffer of size NFP_MEID_STR_SZ.
- * The resulting string is output here.
- * @param island_id Island ID.
- * @return Pointer to "s" on success, NULL on error.
- */
-const char *nfp_island2str(int chip_family, char *s, int island_id);
-
-/*
- * Create string of format "name", an island alias.
- *
- * @param chip_family Chip family ID
- * @param s Pointer to char buffer of size NFP_MEID_STR_SZ.
- * The resulting string is output here.
- * @param island_id Island ID.
- * @return Pointer to "s" on success, NULL on error.
- */
-const char *nfp_island2altstr(int chip_family, char *s, int island_id);
-
-/*
- * Create string of format "meY".
- *
- * @param chip_family Chip family ID
- * @param s Pointer to char buffer of size NFP_MEID_STR_SZ.
- * The resulting string is output here.
- * @param menum Microengine number within island.
- * @return Pointer to "s" on success, NULL on error.
- */
-const char *nfp_menum2str(int chip_family, char *s, int menum);
-
-/*
- * Create string of format "ctxY".
- *
- * @param s Pointer to char buffer of size NFP_MEID_STR_SZ.
- * The resulting string is output here.
- * @param ctxnum Context number within microengine.
- * @return Pointer to "s" on success, NULL on error.
- */
-const char *nfp_ctxnum2str(int chip_family, char *s, int ctxnum);
-
-/*
- * Create string of format "tgY".
- *
- * @param s Pointer to char buffer of size NFP_MEID_STR_SZ.
- * The resulting string is output here.
- * @param megrp Microengine group number within cluster.
- * @return Pointer to "s" on success, NULL on error.
- */
-const char *nfp_megrp2str(int chip_family, char *s, int megrp);
-
-/*
- * Convert a two character string to revision number.
- *
- * Revision integer is 0x00 for A0, 0x11 for B1 etc.
- *
- * @param s Two character string.
- * @return Revision number, -1 on error
- */
-int nfp_idstr2rev(const char *s);
-
-/*
- * Create string from revision number.
- *
- * String will be upper case.
- *
- * @param s Pointer to char buffer with size of at least 3
- * for 2 characters and string terminator.
- * @param rev Revision number.
- * @return Pointer to "s" on success, NULL on error.
- */
-const char *nfp_rev2str(char *s, int rev);
-
-/*
- * Get the NFP CPP address from a string
- *
- * String is in the format [island@]target[:[action:[token:]]address]
- *
- * @param chip_family Chip family ID
- * @param tid Pointer to string to parse
- * @param cpp_idp Pointer to CPP ID
- * @param cpp_addrp Pointer to CPP address
- * @return 0 on success, or -1 and errno
- */
-int nfp_str2cpp(int chip_family,
- const char *tid,
- uint32_t *cpp_idp,
- uint64_t *cpp_addrp);
-
-
-#endif /* _NFP_RESID_NO_C_FUNC */
-
-#endif /* __NFP_RESID_H__ */
diff --git a/drivers/net/nfp/nfpcore/nfp_cpp.h b/drivers/net/nfp/nfpcore/nfp_cpp.h
index d657a7c164..2441012b95 100644
--- a/drivers/net/nfp/nfpcore/nfp_cpp.h
+++ b/drivers/net/nfp/nfpcore/nfp_cpp.h
@@ -8,8 +8,6 @@
#include <ethdev_pci.h>
-#include "nfp-common/nfp_resid.h"
-
struct nfp_cpp_mutex;
/*
@@ -113,6 +111,101 @@ struct nfp_cpp_operations {
unsigned int length);
};
+/*
+ * Wildcard indicating a CPP read or write action
+ *
+ * The action used will be either read or write depending on whether a read or
+ * write instruction/call is performed on the NFP_CPP_ID. It is recommended that
+ * the RW action is used even if all actions to be performed on a NFP_CPP_ID are
+ * known to be only reads or writes. Doing so will in many cases save NFP CPP
+ * internal software resources.
+ */
+#define NFP_CPP_ACTION_RW 32
+
+#define NFP_CPP_TARGET_ID_MASK 0x1f
+
+/*
+ * Pack target, token, and action into a CPP ID.
+ *
+ * Create a 32-bit CPP identifier representing the access to be made.
+ * These identifiers are used as parameters to other NFP CPP functions.
+ * Some CPP devices may allow wildcard identifiers to be specified.
+ *
+ * @target NFP CPP target id
+ * @action NFP CPP action id
+ * @token NFP CPP token id
+ *
+ * @return NFP CPP ID
+ */
+#define NFP_CPP_ID(target, action, token) \
+ ((((target) & 0x7f) << 24) | (((token) & 0xff) << 16) | \
+ (((action) & 0xff) << 8))
+
+/*
+ * Pack target, token, action, and island into a CPP ID.
+ * @target NFP CPP target id
+ * @action NFP CPP action id
+ * @token NFP CPP token id
+ * @island NFP CPP island id
+ *
+ * Create a 32-bit CPP identifier representing the access to be made.
+ * These identifiers are used as parameters to other NFP CPP functions.
+ * Some CPP devices may allow wildcard identifiers to be specified.
+ *
+ * @return NFP CPP ID
+ */
+#define NFP_CPP_ISLAND_ID(target, action, token, island) \
+ ((((target) & 0x7f) << 24) | (((token) & 0xff) << 16) | \
+ (((action) & 0xff) << 8) | (((island) & 0xff) << 0))
+
+/**
+ * Return the NFP CPP target of a NFP CPP ID
+ * @id NFP CPP ID
+ *
+ * @return NFP CPP target
+ */
+static inline uint8_t
+NFP_CPP_ID_TARGET_of(uint32_t id)
+{
+ return (id >> 24) & NFP_CPP_TARGET_ID_MASK;
+}
+
+/*
+ * Return the NFP CPP token of a NFP CPP ID
+ * @id NFP CPP ID
+ *
+ * @return NFP CPP token
+ */
+static inline uint8_t
+NFP_CPP_ID_TOKEN_of(uint32_t id)
+{
+ return (id >> 16) & 0xff;
+}
+
+/*
+ * Return the NFP CPP action of a NFP CPP ID
+ * @id NFP CPP ID
+ *
+ * @return NFP CPP action
+ */
+static inline uint8_t
+NFP_CPP_ID_ACTION_of(uint32_t id)
+{
+ return (id >> 8) & 0xff;
+}
+
+/*
+ * Return the NFP CPP island of a NFP CPP ID
+ * @id NFP CPP ID
+ *
+ * @return NFP CPP island
+ */
+static inline uint8_t
+NFP_CPP_ID_ISLAND_of(uint32_t id)
+{
+ return id & 0xff;
+}
+
/*
* This should be the only external function the transport
* module supplies
diff --git a/drivers/net/nfp/nfpcore/nfp_target.h b/drivers/net/nfp/nfpcore/nfp_target.h
index accedde1f7..03908a894f 100644
--- a/drivers/net/nfp/nfpcore/nfp_target.h
+++ b/drivers/net/nfp/nfpcore/nfp_target.h
@@ -6,7 +6,6 @@
#ifndef NFP_TARGET_H
#define NFP_TARGET_H
-#include "nfp-common/nfp_resid.h"
#include "nfp_cpp.h"
#define P32 1
--
2.39.1
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 07/13] net/nfp: remove duplicated nffw defines
2023-04-10 11:00 [PATCH 00/13] Sync the kernel driver logic Chaoyong He
` (5 preceding siblings ...)
2023-04-10 11:00 ` [PATCH 06/13] net/nfp: remove dead code related to CPP Chaoyong He
@ 2023-04-10 11:00 ` Chaoyong He
2023-04-10 11:00 ` [PATCH 08/13] net/nfp: move NFD3 logic to own source file Chaoyong He
` (7 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Chaoyong He @ 2023-04-10 11:00 UTC (permalink / raw)
To: dev; +Cc: oss-drivers, niklas.soderlund, Chaoyong He
The defines NFFW_FWID_EXT, NFFW_FWID_BASE and NFFW_FWID_ALL are defined
two times, with the same values, in nfp_nffw.h. Drop one instance of the
definitions.
Signed-off-by: Chaoyong He <chaoyong.he@corigine.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund@corigine.com>
---
drivers/net/nfp/nfpcore/nfp_nffw.h | 9 ---------
1 file changed, 9 deletions(-)
diff --git a/drivers/net/nfp/nfpcore/nfp_nffw.h b/drivers/net/nfp/nfpcore/nfp_nffw.h
index 9f24bd2269..46ac8a8d07 100644
--- a/drivers/net/nfp/nfpcore/nfp_nffw.h
+++ b/drivers/net/nfp/nfpcore/nfp_nffw.h
@@ -8,15 +8,6 @@
#include "nfp_cpp.h"
-/*
- * Init-CSR owner IDs for firmware map to firmware IDs which start at 4.
- * Lower IDs are reserved for target and loader IDs.
- */
-#define NFFW_FWID_EXT 3 /* For active MEs that we didn't load. */
-#define NFFW_FWID_BASE 4
-
-#define NFFW_FWID_ALL 255
-
/* Init-CSR owner IDs for firmware map to firmware IDs which start at 4.
* Lower IDs are reserved for target and loader IDs.
*/
--
2.39.1
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 08/13] net/nfp: move NFD3 logic to own source file
2023-04-10 11:00 [PATCH 00/13] Sync the kernel driver logic Chaoyong He
` (6 preceding siblings ...)
2023-04-10 11:00 ` [PATCH 07/13] net/nfp: remove duplicated nffw defines Chaoyong He
@ 2023-04-10 11:00 ` Chaoyong He
2023-04-10 11:00 ` [PATCH 09/13] net/nfp: adjust the coding style for NFD3 Chaoyong He
` (6 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Chaoyong He @ 2023-04-10 11:00 UTC (permalink / raw)
To: dev; +Cc: oss-drivers, niklas.soderlund, Chaoyong He
Split out the data struct and logics of NFD3 into new file. The code is
moved verbatim, no functional change.
Signed-off-by: Chaoyong He <chaoyong.he@corigine.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund@corigine.com>
---
drivers/net/nfp/flower/nfp_flower.c | 1 +
drivers/net/nfp/flower/nfp_flower_ctrl.c | 1 +
.../net/nfp/flower/nfp_flower_representor.c | 1 +
drivers/net/nfp/meson.build | 1 +
drivers/net/nfp/nfd3/nfp_nfd3.h | 166 +++++++++
drivers/net/nfp/nfd3/nfp_nfd3_dp.c | 346 ++++++++++++++++++
drivers/net/nfp/nfp_common.c | 2 +
drivers/net/nfp/nfp_ethdev.c | 1 +
drivers/net/nfp/nfp_ethdev_vf.c | 1 +
drivers/net/nfp/nfp_rxtx.c | 336 +----------------
drivers/net/nfp/nfp_rxtx.h | 153 +-------
11 files changed, 526 insertions(+), 483 deletions(-)
create mode 100644 drivers/net/nfp/nfd3/nfp_nfd3.h
create mode 100644 drivers/net/nfp/nfd3/nfp_nfd3_dp.c
diff --git a/drivers/net/nfp/flower/nfp_flower.c b/drivers/net/nfp/flower/nfp_flower.c
index 4af1900bde..9212e6606b 100644
--- a/drivers/net/nfp/flower/nfp_flower.c
+++ b/drivers/net/nfp/flower/nfp_flower.c
@@ -15,6 +15,7 @@
#include "../nfp_ctrl.h"
#include "../nfp_cpp_bridge.h"
#include "../nfp_rxtx.h"
+#include "../nfd3/nfp_nfd3.h"
#include "../nfpcore/nfp_mip.h"
#include "../nfpcore/nfp_rtsym.h"
#include "../nfpcore/nfp_nsp.h"
diff --git a/drivers/net/nfp/flower/nfp_flower_ctrl.c b/drivers/net/nfp/flower/nfp_flower_ctrl.c
index 3e083d948e..7f9dc5683b 100644
--- a/drivers/net/nfp/flower/nfp_flower_ctrl.c
+++ b/drivers/net/nfp/flower/nfp_flower_ctrl.c
@@ -11,6 +11,7 @@
#include "../nfp_logs.h"
#include "../nfp_ctrl.h"
#include "../nfp_rxtx.h"
+#include "../nfd3/nfp_nfd3.h"
#include "nfp_flower.h"
#include "nfp_flower_ctrl.h"
#include "nfp_flower_cmsg.h"
diff --git a/drivers/net/nfp/flower/nfp_flower_representor.c b/drivers/net/nfp/flower/nfp_flower_representor.c
index 362c67f7b5..3eb76cb489 100644
--- a/drivers/net/nfp/flower/nfp_flower_representor.c
+++ b/drivers/net/nfp/flower/nfp_flower_representor.c
@@ -10,6 +10,7 @@
#include "../nfp_logs.h"
#include "../nfp_ctrl.h"
#include "../nfp_rxtx.h"
+#include "../nfd3/nfp_nfd3.h"
#include "../nfpcore/nfp_mip.h"
#include "../nfpcore/nfp_rtsym.h"
#include "../nfpcore/nfp_nsp.h"
diff --git a/drivers/net/nfp/meson.build b/drivers/net/nfp/meson.build
index 6d122f5ce9..697a1479c8 100644
--- a/drivers/net/nfp/meson.build
+++ b/drivers/net/nfp/meson.build
@@ -10,6 +10,7 @@ sources = files(
'flower/nfp_flower_cmsg.c',
'flower/nfp_flower_ctrl.c',
'flower/nfp_flower_representor.c',
+ 'nfd3/nfp_nfd3_dp.c',
'nfpcore/nfp_cpp_pcie_ops.c',
'nfpcore/nfp_nsp.c',
'nfpcore/nfp_cppcore.c',
diff --git a/drivers/net/nfp/nfd3/nfp_nfd3.h b/drivers/net/nfp/nfd3/nfp_nfd3.h
new file mode 100644
index 0000000000..5c6162aada
--- /dev/null
+++ b/drivers/net/nfp/nfd3/nfp_nfd3.h
@@ -0,0 +1,166 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (c) 2023 Corigine, Inc.
+ * All rights reserved.
+ */
+
+#ifndef _NFP_NFD3_H_
+#define _NFP_NFD3_H_
+
+/* TX descriptor format */
+#define PCIE_DESC_TX_EOP (1 << 7)
+#define PCIE_DESC_TX_OFFSET_MASK (0x7f)
+
+/* Flags in the host TX descriptor */
+#define PCIE_DESC_TX_CSUM (1 << 7)
+#define PCIE_DESC_TX_IP4_CSUM (1 << 6)
+#define PCIE_DESC_TX_TCP_CSUM (1 << 5)
+#define PCIE_DESC_TX_UDP_CSUM (1 << 4)
+#define PCIE_DESC_TX_VLAN (1 << 3)
+#define PCIE_DESC_TX_LSO (1 << 2)
+#define PCIE_DESC_TX_ENCAP_NONE (0)
+#define PCIE_DESC_TX_ENCAP (1 << 1)
+#define PCIE_DESC_TX_O_IP4_CSUM (1 << 0)
+
+#define NFD3_TX_DESC_PER_SIMPLE_PKT 1
+
+struct nfp_net_nfd3_tx_desc {
+ union {
+ struct {
+ uint8_t dma_addr_hi; /* High bits of host buf address */
+ __le16 dma_len; /* Length to DMA for this desc */
+ uint8_t offset_eop; /* Offset in buf where pkt starts +
+ * highest bit is eop flag, low 7bit is meta_len.
+ */
+ __le32 dma_addr_lo; /* Low 32bit of host buf addr */
+
+ __le16 mss; /* MSS to be used for LSO */
+ uint8_t lso_hdrlen; /* LSO, where the data starts */
+ uint8_t flags; /* TX Flags, see @PCIE_DESC_TX_* */
+
+ union {
+ struct {
+ /*
+ * L3 and L4 header offsets required
+ * for TSOv2
+ */
+ uint8_t l3_offset;
+ uint8_t l4_offset;
+ };
+ __le16 vlan; /* VLAN tag to add if indicated */
+ };
+ __le16 data_len; /* Length of frame + meta data */
+ } __rte_packed;
+ __le32 vals[4];
+ };
+};
+
+/* Leaving always free descriptors for avoiding wrapping confusion */
+static inline uint32_t
+nfp_net_nfd3_free_tx_desc(struct nfp_net_txq *txq)
+{
+ if (txq->wr_p >= txq->rd_p)
+ return txq->tx_count - (txq->wr_p - txq->rd_p) - 8;
+ else
+ return txq->rd_p - txq->wr_p - 8;
+}
+
+/*
+ * nfp_net_nfd3_txq_full() - Check if the TX queue free descriptors
+ * is below tx_free_threshold for firmware of nfd3
+ *
+ * @txq: TX queue to check
+ *
+ * This function uses the host copy* of read/write pointers.
+ */
+static inline uint32_t
+nfp_net_nfd3_txq_full(struct nfp_net_txq *txq)
+{
+ return (nfp_net_nfd3_free_tx_desc(txq) < txq->tx_free_thresh);
+}
+
+/* nfp_net_nfd3_tx_tso() - Set NFD3 TX descriptor for TSO */
+static inline void
+nfp_net_nfd3_tx_tso(struct nfp_net_txq *txq,
+ struct nfp_net_nfd3_tx_desc *txd,
+ struct rte_mbuf *mb)
+{
+ uint64_t ol_flags;
+ struct nfp_net_hw *hw = txq->hw;
+
+ if (!(hw->cap & NFP_NET_CFG_CTRL_LSO_ANY))
+ goto clean_txd;
+
+ ol_flags = mb->ol_flags;
+
+ if (!(ol_flags & RTE_MBUF_F_TX_TCP_SEG))
+ goto clean_txd;
+
+ txd->l3_offset = mb->l2_len;
+ txd->l4_offset = mb->l2_len + mb->l3_len;
+ txd->lso_hdrlen = mb->l2_len + mb->l3_len + mb->l4_len;
+
+ if (ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) {
+ txd->l3_offset += mb->outer_l2_len + mb->outer_l3_len;
+ txd->l4_offset += mb->outer_l2_len + mb->outer_l3_len;
+ txd->lso_hdrlen += mb->outer_l2_len + mb->outer_l3_len;
+ }
+
+ txd->mss = rte_cpu_to_le_16(mb->tso_segsz);
+ txd->flags = PCIE_DESC_TX_LSO;
+ return;
+
+clean_txd:
+ txd->flags = 0;
+ txd->l3_offset = 0;
+ txd->l4_offset = 0;
+ txd->lso_hdrlen = 0;
+ txd->mss = 0;
+}
+
+/* nfp_net_nfd3_tx_cksum() - Set TX CSUM offload flags in NFD3 TX descriptor */
+static inline void
+nfp_net_nfd3_tx_cksum(struct nfp_net_txq *txq, struct nfp_net_nfd3_tx_desc *txd,
+ struct rte_mbuf *mb)
+{
+ uint64_t ol_flags;
+ struct nfp_net_hw *hw = txq->hw;
+
+ if (!(hw->cap & NFP_NET_CFG_CTRL_TXCSUM))
+ return;
+
+ ol_flags = mb->ol_flags;
+
+ /* Set TCP csum offload if TSO enabled. */
+ if (ol_flags & RTE_MBUF_F_TX_TCP_SEG)
+ txd->flags |= PCIE_DESC_TX_TCP_CSUM;
+
+ /* IPv6 does not need checksum */
+ if (ol_flags & RTE_MBUF_F_TX_IP_CKSUM)
+ txd->flags |= PCIE_DESC_TX_IP4_CSUM;
+
+ if (ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK)
+ txd->flags |= PCIE_DESC_TX_ENCAP;
+
+ switch (ol_flags & RTE_MBUF_F_TX_L4_MASK) {
+ case RTE_MBUF_F_TX_UDP_CKSUM:
+ txd->flags |= PCIE_DESC_TX_UDP_CSUM;
+ break;
+ case RTE_MBUF_F_TX_TCP_CKSUM:
+ txd->flags |= PCIE_DESC_TX_TCP_CSUM;
+ break;
+ }
+
+ if (ol_flags & (RTE_MBUF_F_TX_IP_CKSUM | RTE_MBUF_F_TX_L4_MASK))
+ txd->flags |= PCIE_DESC_TX_CSUM;
+}
+
+uint16_t nfp_net_nfd3_xmit_pkts(void *tx_queue,
+ struct rte_mbuf **tx_pkts,
+ uint16_t nb_pkts);
+int nfp_net_nfd3_tx_queue_setup(struct rte_eth_dev *dev,
+ uint16_t queue_idx,
+ uint16_t nb_desc,
+ unsigned int socket_id,
+ const struct rte_eth_txconf *tx_conf);
+
+#endif /* _NFP_NFD3_H_ */
diff --git a/drivers/net/nfp/nfd3/nfp_nfd3_dp.c b/drivers/net/nfp/nfd3/nfp_nfd3_dp.c
new file mode 100644
index 0000000000..88bcd26ad8
--- /dev/null
+++ b/drivers/net/nfp/nfd3/nfp_nfd3_dp.c
@@ -0,0 +1,346 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (c) 2023 Corigine, Inc.
+ * All rights reserved.
+ */
+
+#include <ethdev_driver.h>
+#include <bus_pci_driver.h>
+#include <rte_malloc.h>
+
+#include "../nfp_logs.h"
+#include "../nfp_common.h"
+#include "../nfp_rxtx.h"
+#include "nfp_nfd3.h"
+
+/*
+ * nfp_net_nfd3_tx_vlan() - Set vlan info in the nfd3 tx desc
+ *
+ * If enable NFP_NET_CFG_CTRL_TXVLAN_V2
+ * Vlan_info is stored in the meta and
+ * is handled in the nfp_net_nfd3_set_meta_vlan
+ * else if enable NFP_NET_CFG_CTRL_TXVLAN
+ * Vlan_info is stored in the tx_desc and
+ * is handled in the nfp_net_nfd3_tx_vlan
+ */
+static void
+nfp_net_nfd3_tx_vlan(struct nfp_net_txq *txq,
+ struct nfp_net_nfd3_tx_desc *txd,
+ struct rte_mbuf *mb)
+{
+ struct nfp_net_hw *hw = txq->hw;
+
+ if ((hw->cap & NFP_NET_CFG_CTRL_TXVLAN_V2) != 0 ||
+ (hw->cap & NFP_NET_CFG_CTRL_TXVLAN) == 0)
+ return;
+
+ if ((mb->ol_flags & RTE_MBUF_F_TX_VLAN) != 0) {
+ txd->flags |= PCIE_DESC_TX_VLAN;
+ txd->vlan = mb->vlan_tci;
+ }
+}
+
+static void
+nfp_net_nfd3_set_meta_data(struct nfp_net_meta_raw *meta_data,
+ struct nfp_net_txq *txq,
+ struct rte_mbuf *pkt)
+{
+ uint8_t vlan_layer = 0;
+ struct nfp_net_hw *hw;
+ uint32_t meta_info;
+ uint8_t layer = 0;
+ char *meta;
+
+ hw = txq->hw;
+
+ if ((pkt->ol_flags & RTE_MBUF_F_TX_VLAN) != 0 &&
+ (hw->ctrl & NFP_NET_CFG_CTRL_TXVLAN_V2) != 0) {
+ if (meta_data->length == 0)
+ meta_data->length = NFP_NET_META_HEADER_SIZE;
+ meta_data->length += NFP_NET_META_FIELD_SIZE;
+ meta_data->header |= NFP_NET_META_VLAN;
+ }
+
+ if (meta_data->length == 0)
+ return;
+
+ meta_info = meta_data->header;
+ meta_data->header = rte_cpu_to_be_32(meta_data->header);
+ meta = rte_pktmbuf_prepend(pkt, meta_data->length);
+ memcpy(meta, &meta_data->header, sizeof(meta_data->header));
+ meta += NFP_NET_META_HEADER_SIZE;
+
+ for (; meta_info != 0; meta_info >>= NFP_NET_META_FIELD_SIZE, layer++,
+ meta += NFP_NET_META_FIELD_SIZE) {
+ switch (meta_info & NFP_NET_META_FIELD_MASK) {
+ case NFP_NET_META_VLAN:
+ if (vlan_layer > 0) {
+ PMD_DRV_LOG(ERR, "At most 1 layers of vlan is supported");
+ return;
+ }
+ nfp_net_set_meta_vlan(meta_data, pkt, layer);
+ vlan_layer++;
+ break;
+ default:
+ PMD_DRV_LOG(ERR, "The metadata type not supported");
+ return;
+ }
+
+ memcpy(meta, &meta_data->data[layer], sizeof(meta_data->data[layer]));
+ }
+}
+
+uint16_t
+nfp_net_nfd3_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
+{
+ struct nfp_net_txq *txq;
+ struct nfp_net_hw *hw;
+ struct nfp_net_nfd3_tx_desc *txds, txd;
+ struct nfp_net_meta_raw meta_data;
+ struct rte_mbuf *pkt;
+ uint64_t dma_addr;
+ int pkt_size, dma_size;
+ uint16_t free_descs, issued_descs;
+ struct rte_mbuf **lmbuf;
+ int i;
+
+ txq = tx_queue;
+ hw = txq->hw;
+ txds = &txq->txds[txq->wr_p];
+
+ PMD_TX_LOG(DEBUG, "working for queue %u at pos %d and %u packets",
+ txq->qidx, txq->wr_p, nb_pkts);
+
+ if (nfp_net_nfd3_free_tx_desc(txq) < NFD3_TX_DESC_PER_SIMPLE_PKT * nb_pkts ||
+ nfp_net_nfd3_txq_full(txq))
+ nfp_net_tx_free_bufs(txq);
+
+ free_descs = (uint16_t)nfp_net_nfd3_free_tx_desc(txq);
+ if (unlikely(free_descs == 0))
+ return 0;
+
+ pkt = *tx_pkts;
+
+ issued_descs = 0;
+ PMD_TX_LOG(DEBUG, "queue: %u. Sending %u packets",
+ txq->qidx, nb_pkts);
+ /* Sending packets */
+ for (i = 0; i < nb_pkts && free_descs > 0; i++) {
+ memset(&meta_data, 0, sizeof(meta_data));
+ /* Grabbing the mbuf linked to the current descriptor */
+ lmbuf = &txq->txbufs[txq->wr_p].mbuf;
+ /* Warming the cache for releasing the mbuf later on */
+ RTE_MBUF_PREFETCH_TO_FREE(*lmbuf);
+
+ pkt = *(tx_pkts + i);
+
+ nfp_net_nfd3_set_meta_data(&meta_data, txq, pkt);
+
+ if (unlikely(pkt->nb_segs > 1 &&
+ !(hw->cap & NFP_NET_CFG_CTRL_GATHER))) {
+ PMD_INIT_LOG(ERR, "Multisegment packet not supported");
+ goto xmit_end;
+ }
+
+ /* Checking if we have enough descriptors */
+ if (unlikely(pkt->nb_segs > free_descs))
+ goto xmit_end;
+
+ /*
+ * Checksum and VLAN flags just in the first descriptor for a
+ * multisegment packet, but TSO info needs to be in all of them.
+ */
+ txd.data_len = pkt->pkt_len;
+ nfp_net_nfd3_tx_tso(txq, &txd, pkt);
+ nfp_net_nfd3_tx_cksum(txq, &txd, pkt);
+ nfp_net_nfd3_tx_vlan(txq, &txd, pkt);
+
+ /*
+ * mbuf data_len is the data in one segment and pkt_len data
+ * in the whole packet. When the packet is just one segment,
+ * then data_len = pkt_len
+ */
+ pkt_size = pkt->pkt_len;
+
+ while (pkt != NULL && free_descs > 0) {
+ /* Copying TSO, VLAN and cksum info */
+ *txds = txd;
+
+ /* Releasing mbuf used by this descriptor previously*/
+ if (*lmbuf)
+ rte_pktmbuf_free_seg(*lmbuf);
+
+ /*
+ * Linking mbuf with descriptor for being released
+ * next time descriptor is used
+ */
+ *lmbuf = pkt;
+
+ dma_size = pkt->data_len;
+ dma_addr = rte_mbuf_data_iova(pkt);
+ PMD_TX_LOG(DEBUG, "Working with mbuf at dma address:"
+ "%" PRIx64 "", dma_addr);
+
+ /* Filling descriptors fields */
+ txds->dma_len = dma_size;
+ txds->data_len = txd.data_len;
+ txds->dma_addr_hi = (dma_addr >> 32) & 0xff;
+ txds->dma_addr_lo = (dma_addr & 0xffffffff);
+ free_descs--;
+
+ txq->wr_p++;
+ if (unlikely(txq->wr_p == txq->tx_count)) /* wrapping?*/
+ txq->wr_p = 0;
+
+ pkt_size -= dma_size;
+
+ /*
+ * Making the EOP, packets with just one segment
+ * the priority
+ */
+ if (likely(pkt_size == 0))
+ txds->offset_eop = PCIE_DESC_TX_EOP;
+ else
+ txds->offset_eop = 0;
+
+ /* Set the meta_len */
+ txds->offset_eop |= meta_data.length;
+
+ pkt = pkt->next;
+ /* Referencing next free TX descriptor */
+ txds = &txq->txds[txq->wr_p];
+ lmbuf = &txq->txbufs[txq->wr_p].mbuf;
+ issued_descs++;
+ }
+ }
+
+xmit_end:
+ /* Increment write pointers. Force memory write before we let HW know */
+ rte_wmb();
+ nfp_qcp_ptr_add(txq->qcp_q, NFP_QCP_WRITE_PTR, issued_descs);
+
+ return i;
+}
+
+int
+nfp_net_nfd3_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
+ uint16_t nb_desc, unsigned int socket_id,
+ const struct rte_eth_txconf *tx_conf)
+{
+ int ret;
+ uint16_t min_tx_desc;
+ uint16_t max_tx_desc;
+ const struct rte_memzone *tz;
+ struct nfp_net_txq *txq;
+ uint16_t tx_free_thresh;
+ struct nfp_net_hw *hw;
+ uint32_t tx_desc_sz;
+
+ hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+
+ PMD_INIT_FUNC_TRACE();
+
+ ret = nfp_net_tx_desc_limits(hw, &min_tx_desc, &max_tx_desc);
+ if (ret != 0)
+ return ret;
+
+ /* Validating number of descriptors */
+ tx_desc_sz = nb_desc * sizeof(struct nfp_net_nfd3_tx_desc);
+ if ((NFD3_TX_DESC_PER_SIMPLE_PKT * tx_desc_sz) % NFP_ALIGN_RING_DESC != 0 ||
+ nb_desc > max_tx_desc || nb_desc < min_tx_desc) {
+ PMD_DRV_LOG(ERR, "Wrong nb_desc value");
+ return -EINVAL;
+ }
+
+ tx_free_thresh = (uint16_t)((tx_conf->tx_free_thresh) ?
+ tx_conf->tx_free_thresh :
+ DEFAULT_TX_FREE_THRESH);
+
+ if (tx_free_thresh > (nb_desc)) {
+ PMD_DRV_LOG(ERR,
+ "tx_free_thresh must be less than the number of TX "
+ "descriptors. (tx_free_thresh=%u port=%d "
+ "queue=%d)", (unsigned int)tx_free_thresh,
+ dev->data->port_id, (int)queue_idx);
+ return -(EINVAL);
+ }
+
+ /*
+ * Free memory prior to re-allocation if needed. This is the case after
+ * calling nfp_net_stop
+ */
+ if (dev->data->tx_queues[queue_idx]) {
+ PMD_TX_LOG(DEBUG, "Freeing memory prior to re-allocation %d",
+ queue_idx);
+ nfp_net_tx_queue_release(dev, queue_idx);
+ dev->data->tx_queues[queue_idx] = NULL;
+ }
+
+ /* Allocating tx queue data structure */
+ txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct nfp_net_txq),
+ RTE_CACHE_LINE_SIZE, socket_id);
+ if (txq == NULL) {
+ PMD_DRV_LOG(ERR, "Error allocating tx dma");
+ return -ENOMEM;
+ }
+
+ dev->data->tx_queues[queue_idx] = txq;
+
+ /*
+ * Allocate TX ring hardware descriptors. A memzone large enough to
+ * handle the maximum ring size is allocated in order to allow for
+ * resizing in later calls to the queue setup function.
+ */
+ tz = rte_eth_dma_zone_reserve(dev, "tx_ring", queue_idx,
+ sizeof(struct nfp_net_nfd3_tx_desc) *
+ NFD3_TX_DESC_PER_SIMPLE_PKT *
+ max_tx_desc, NFP_MEMZONE_ALIGN,
+ socket_id);
+ if (tz == NULL) {
+ PMD_DRV_LOG(ERR, "Error allocating tx dma");
+ nfp_net_tx_queue_release(dev, queue_idx);
+ dev->data->tx_queues[queue_idx] = NULL;
+ return -ENOMEM;
+ }
+
+ txq->tx_count = nb_desc * NFD3_TX_DESC_PER_SIMPLE_PKT;
+ txq->tx_free_thresh = tx_free_thresh;
+ txq->tx_pthresh = tx_conf->tx_thresh.pthresh;
+ txq->tx_hthresh = tx_conf->tx_thresh.hthresh;
+ txq->tx_wthresh = tx_conf->tx_thresh.wthresh;
+
+ /* queue mapping based on firmware configuration */
+ txq->qidx = queue_idx;
+ txq->tx_qcidx = queue_idx * hw->stride_tx;
+ txq->qcp_q = hw->tx_bar + NFP_QCP_QUEUE_OFF(txq->tx_qcidx);
+
+ txq->port_id = dev->data->port_id;
+
+ /* Saving physical and virtual addresses for the TX ring */
+ txq->dma = (uint64_t)tz->iova;
+ txq->txds = (struct nfp_net_nfd3_tx_desc *)tz->addr;
+
+ /* mbuf pointers array for referencing mbufs linked to TX descriptors */
+ txq->txbufs = rte_zmalloc_socket("txq->txbufs",
+ sizeof(*txq->txbufs) * txq->tx_count,
+ RTE_CACHE_LINE_SIZE, socket_id);
+ if (txq->txbufs == NULL) {
+ nfp_net_tx_queue_release(dev, queue_idx);
+ dev->data->tx_queues[queue_idx] = NULL;
+ return -ENOMEM;
+ }
+ PMD_TX_LOG(DEBUG, "txbufs=%p hw_ring=%p dma_addr=0x%" PRIx64,
+ txq->txbufs, txq->txds, (unsigned long)txq->dma);
+
+ nfp_net_reset_tx_queue(txq);
+
+ txq->hw = hw;
+
+ /*
+ * Telling the HW about the physical address of the TX ring and number
+ * of descriptors in log2 format
+ */
+ nn_cfg_writeq(hw, NFP_NET_CFG_TXR_ADDR(queue_idx), txq->dma);
+ nn_cfg_writeb(hw, NFP_NET_CFG_TXR_SZ(queue_idx), rte_log2_u32(txq->tx_count));
+
+ return 0;
+}
diff --git a/drivers/net/nfp/nfp_common.c b/drivers/net/nfp/nfp_common.c
index f300d6d892..d1b6ef3bc9 100644
--- a/drivers/net/nfp/nfp_common.c
+++ b/drivers/net/nfp/nfp_common.c
@@ -44,6 +44,8 @@
#include "nfp_logs.h"
#include "nfp_cpp_bridge.h"
+#include "nfd3/nfp_nfd3.h"
+
#include <sys/types.h>
#include <sys/socket.h>
#include <sys/un.h>
diff --git a/drivers/net/nfp/nfp_ethdev.c b/drivers/net/nfp/nfp_ethdev.c
index 26cf9cd01c..f212a4a10e 100644
--- a/drivers/net/nfp/nfp_ethdev.c
+++ b/drivers/net/nfp/nfp_ethdev.c
@@ -38,6 +38,7 @@
#include "nfp_logs.h"
#include "nfp_cpp_bridge.h"
+#include "nfd3/nfp_nfd3.h"
#include "flower/nfp_flower.h"
static int
diff --git a/drivers/net/nfp/nfp_ethdev_vf.c b/drivers/net/nfp/nfp_ethdev_vf.c
index d69ac8cd37..80a8983deb 100644
--- a/drivers/net/nfp/nfp_ethdev_vf.c
+++ b/drivers/net/nfp/nfp_ethdev_vf.c
@@ -22,6 +22,7 @@
#include "nfp_ctrl.h"
#include "nfp_rxtx.h"
#include "nfp_logs.h"
+#include "nfd3/nfp_nfd3.h"
static void
nfp_netvf_read_mac(struct nfp_net_hw *hw)
diff --git a/drivers/net/nfp/nfp_rxtx.c b/drivers/net/nfp/nfp_rxtx.c
index 16a124fd7d..76021b64ee 100644
--- a/drivers/net/nfp/nfp_rxtx.c
+++ b/drivers/net/nfp/nfp_rxtx.c
@@ -20,6 +20,7 @@
#include "nfp_ctrl.h"
#include "nfp_rxtx.h"
#include "nfp_logs.h"
+#include "nfd3/nfp_nfd3.h"
#include "nfpcore/nfp_mip.h"
#include "nfpcore/nfp_rtsym.h"
@@ -749,158 +750,7 @@ nfp_net_reset_tx_queue(struct nfp_net_txq *txq)
txq->rd_p = 0;
}
-static int
-nfp_net_nfd3_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
- uint16_t nb_desc, unsigned int socket_id,
- const struct rte_eth_txconf *tx_conf)
-{
- int ret;
- uint16_t min_tx_desc;
- uint16_t max_tx_desc;
- const struct rte_memzone *tz;
- struct nfp_net_txq *txq;
- uint16_t tx_free_thresh;
- struct nfp_net_hw *hw;
- uint32_t tx_desc_sz;
-
- hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
-
- PMD_INIT_FUNC_TRACE();
-
- ret = nfp_net_tx_desc_limits(hw, &min_tx_desc, &max_tx_desc);
- if (ret != 0)
- return ret;
-
- /* Validating number of descriptors */
- tx_desc_sz = nb_desc * sizeof(struct nfp_net_nfd3_tx_desc);
- if ((NFD3_TX_DESC_PER_SIMPLE_PKT * tx_desc_sz) % NFP_ALIGN_RING_DESC != 0 ||
- nb_desc > max_tx_desc || nb_desc < min_tx_desc) {
- PMD_DRV_LOG(ERR, "Wrong nb_desc value");
- return -EINVAL;
- }
-
- tx_free_thresh = (uint16_t)((tx_conf->tx_free_thresh) ?
- tx_conf->tx_free_thresh :
- DEFAULT_TX_FREE_THRESH);
-
- if (tx_free_thresh > (nb_desc)) {
- PMD_DRV_LOG(ERR,
- "tx_free_thresh must be less than the number of TX "
- "descriptors. (tx_free_thresh=%u port=%d "
- "queue=%d)", (unsigned int)tx_free_thresh,
- dev->data->port_id, (int)queue_idx);
- return -(EINVAL);
- }
-
- /*
- * Free memory prior to re-allocation if needed. This is the case after
- * calling nfp_net_stop
- */
- if (dev->data->tx_queues[queue_idx]) {
- PMD_TX_LOG(DEBUG, "Freeing memory prior to re-allocation %d",
- queue_idx);
- nfp_net_tx_queue_release(dev, queue_idx);
- dev->data->tx_queues[queue_idx] = NULL;
- }
-
- /* Allocating tx queue data structure */
- txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct nfp_net_txq),
- RTE_CACHE_LINE_SIZE, socket_id);
- if (txq == NULL) {
- PMD_DRV_LOG(ERR, "Error allocating tx dma");
- return -ENOMEM;
- }
-
- dev->data->tx_queues[queue_idx] = txq;
-
- /*
- * Allocate TX ring hardware descriptors. A memzone large enough to
- * handle the maximum ring size is allocated in order to allow for
- * resizing in later calls to the queue setup function.
- */
- tz = rte_eth_dma_zone_reserve(dev, "tx_ring", queue_idx,
- sizeof(struct nfp_net_nfd3_tx_desc) *
- NFD3_TX_DESC_PER_SIMPLE_PKT *
- max_tx_desc, NFP_MEMZONE_ALIGN,
- socket_id);
- if (tz == NULL) {
- PMD_DRV_LOG(ERR, "Error allocating tx dma");
- nfp_net_tx_queue_release(dev, queue_idx);
- dev->data->tx_queues[queue_idx] = NULL;
- return -ENOMEM;
- }
-
- txq->tx_count = nb_desc * NFD3_TX_DESC_PER_SIMPLE_PKT;
- txq->tx_free_thresh = tx_free_thresh;
- txq->tx_pthresh = tx_conf->tx_thresh.pthresh;
- txq->tx_hthresh = tx_conf->tx_thresh.hthresh;
- txq->tx_wthresh = tx_conf->tx_thresh.wthresh;
-
- /* queue mapping based on firmware configuration */
- txq->qidx = queue_idx;
- txq->tx_qcidx = queue_idx * hw->stride_tx;
- txq->qcp_q = hw->tx_bar + NFP_QCP_QUEUE_OFF(txq->tx_qcidx);
-
- txq->port_id = dev->data->port_id;
-
- /* Saving physical and virtual addresses for the TX ring */
- txq->dma = (uint64_t)tz->iova;
- txq->txds = (struct nfp_net_nfd3_tx_desc *)tz->addr;
-
- /* mbuf pointers array for referencing mbufs linked to TX descriptors */
- txq->txbufs = rte_zmalloc_socket("txq->txbufs",
- sizeof(*txq->txbufs) * txq->tx_count,
- RTE_CACHE_LINE_SIZE, socket_id);
- if (txq->txbufs == NULL) {
- nfp_net_tx_queue_release(dev, queue_idx);
- dev->data->tx_queues[queue_idx] = NULL;
- return -ENOMEM;
- }
- PMD_TX_LOG(DEBUG, "txbufs=%p hw_ring=%p dma_addr=0x%" PRIx64,
- txq->txbufs, txq->txds, (unsigned long)txq->dma);
-
- nfp_net_reset_tx_queue(txq);
-
- txq->hw = hw;
-
- /*
- * Telling the HW about the physical address of the TX ring and number
- * of descriptors in log2 format
- */
- nn_cfg_writeq(hw, NFP_NET_CFG_TXR_ADDR(queue_idx), txq->dma);
- nn_cfg_writeb(hw, NFP_NET_CFG_TXR_SZ(queue_idx), rte_log2_u32(txq->tx_count));
-
- return 0;
-}
-
-/*
- * nfp_net_nfd3_tx_vlan() - Set vlan info in the nfd3 tx desc
- *
- * If enable NFP_NET_CFG_CTRL_TXVLAN_V2
- * Vlan_info is stored in the meta and
- * is handled in the nfp_net_nfd3_set_meta_vlan
- * else if enable NFP_NET_CFG_CTRL_TXVLAN
- * Vlan_info is stored in the tx_desc and
- * is handled in the nfp_net_nfd3_tx_vlan
- */
-static void
-nfp_net_nfd3_tx_vlan(struct nfp_net_txq *txq,
- struct nfp_net_nfd3_tx_desc *txd,
- struct rte_mbuf *mb)
-{
- struct nfp_net_hw *hw = txq->hw;
-
- if ((hw->cap & NFP_NET_CFG_CTRL_TXVLAN_V2) != 0 ||
- (hw->cap & NFP_NET_CFG_CTRL_TXVLAN) == 0)
- return;
-
- if ((mb->ol_flags & RTE_MBUF_F_TX_VLAN) != 0) {
- txd->flags |= PCIE_DESC_TX_VLAN;
- txd->vlan = mb->vlan_tci;
- }
-}
-
-static void
+void
nfp_net_set_meta_vlan(struct nfp_net_meta_raw *meta_data,
struct rte_mbuf *pkt,
uint8_t layer)
@@ -914,188 +764,6 @@ nfp_net_set_meta_vlan(struct nfp_net_meta_raw *meta_data,
meta_data->data[layer] = rte_cpu_to_be_32(tpid << 16 | vlan_tci);
}
-static void
-nfp_net_nfd3_set_meta_data(struct nfp_net_meta_raw *meta_data,
- struct nfp_net_txq *txq,
- struct rte_mbuf *pkt)
-{
- uint8_t vlan_layer = 0;
- struct nfp_net_hw *hw;
- uint32_t meta_info;
- uint8_t layer = 0;
- char *meta;
-
- hw = txq->hw;
-
- if ((pkt->ol_flags & RTE_MBUF_F_TX_VLAN) != 0 &&
- (hw->ctrl & NFP_NET_CFG_CTRL_TXVLAN_V2) != 0) {
- if (meta_data->length == 0)
- meta_data->length = NFP_NET_META_HEADER_SIZE;
- meta_data->length += NFP_NET_META_FIELD_SIZE;
- meta_data->header |= NFP_NET_META_VLAN;
- }
-
- if (meta_data->length == 0)
- return;
-
- meta_info = meta_data->header;
- meta_data->header = rte_cpu_to_be_32(meta_data->header);
- meta = rte_pktmbuf_prepend(pkt, meta_data->length);
- memcpy(meta, &meta_data->header, sizeof(meta_data->header));
- meta += NFP_NET_META_HEADER_SIZE;
-
- for (; meta_info != 0; meta_info >>= NFP_NET_META_FIELD_SIZE, layer++,
- meta += NFP_NET_META_FIELD_SIZE) {
- switch (meta_info & NFP_NET_META_FIELD_MASK) {
- case NFP_NET_META_VLAN:
- if (vlan_layer > 0) {
- PMD_DRV_LOG(ERR, "At most 1 layers of vlan is supported");
- return;
- }
- nfp_net_set_meta_vlan(meta_data, pkt, layer);
- vlan_layer++;
- break;
- default:
- PMD_DRV_LOG(ERR, "The metadata type not supported");
- return;
- }
-
- memcpy(meta, &meta_data->data[layer], sizeof(meta_data->data[layer]));
- }
-}
-
-uint16_t
-nfp_net_nfd3_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
-{
- struct nfp_net_txq *txq;
- struct nfp_net_hw *hw;
- struct nfp_net_nfd3_tx_desc *txds, txd;
- struct nfp_net_meta_raw meta_data;
- struct rte_mbuf *pkt;
- uint64_t dma_addr;
- int pkt_size, dma_size;
- uint16_t free_descs, issued_descs;
- struct rte_mbuf **lmbuf;
- int i;
-
- txq = tx_queue;
- hw = txq->hw;
- txds = &txq->txds[txq->wr_p];
-
- PMD_TX_LOG(DEBUG, "working for queue %u at pos %d and %u packets",
- txq->qidx, txq->wr_p, nb_pkts);
-
- if (nfp_net_nfd3_free_tx_desc(txq) < NFD3_TX_DESC_PER_SIMPLE_PKT * nb_pkts ||
- nfp_net_nfd3_txq_full(txq))
- nfp_net_tx_free_bufs(txq);
-
- free_descs = (uint16_t)nfp_net_nfd3_free_tx_desc(txq);
- if (unlikely(free_descs == 0))
- return 0;
-
- pkt = *tx_pkts;
-
- issued_descs = 0;
- PMD_TX_LOG(DEBUG, "queue: %u. Sending %u packets",
- txq->qidx, nb_pkts);
- /* Sending packets */
- for (i = 0; i < nb_pkts && free_descs > 0; i++) {
- memset(&meta_data, 0, sizeof(meta_data));
- /* Grabbing the mbuf linked to the current descriptor */
- lmbuf = &txq->txbufs[txq->wr_p].mbuf;
- /* Warming the cache for releasing the mbuf later on */
- RTE_MBUF_PREFETCH_TO_FREE(*lmbuf);
-
- pkt = *(tx_pkts + i);
-
- nfp_net_nfd3_set_meta_data(&meta_data, txq, pkt);
-
- if (unlikely(pkt->nb_segs > 1 &&
- !(hw->cap & NFP_NET_CFG_CTRL_GATHER))) {
- PMD_INIT_LOG(ERR, "Multisegment packet not supported");
- goto xmit_end;
- }
-
- /* Checking if we have enough descriptors */
- if (unlikely(pkt->nb_segs > free_descs))
- goto xmit_end;
-
- /*
- * Checksum and VLAN flags just in the first descriptor for a
- * multisegment packet, but TSO info needs to be in all of them.
- */
- txd.data_len = pkt->pkt_len;
- nfp_net_nfd3_tx_tso(txq, &txd, pkt);
- nfp_net_nfd3_tx_cksum(txq, &txd, pkt);
- nfp_net_nfd3_tx_vlan(txq, &txd, pkt);
-
- /*
- * mbuf data_len is the data in one segment and pkt_len data
- * in the whole packet. When the packet is just one segment,
- * then data_len = pkt_len
- */
- pkt_size = pkt->pkt_len;
-
- while (pkt != NULL && free_descs > 0) {
- /* Copying TSO, VLAN and cksum info */
- *txds = txd;
-
- /* Releasing mbuf used by this descriptor previously*/
- if (*lmbuf)
- rte_pktmbuf_free_seg(*lmbuf);
-
- /*
- * Linking mbuf with descriptor for being released
- * next time descriptor is used
- */
- *lmbuf = pkt;
-
- dma_size = pkt->data_len;
- dma_addr = rte_mbuf_data_iova(pkt);
- PMD_TX_LOG(DEBUG, "Working with mbuf at dma address:"
- "%" PRIx64 "", dma_addr);
-
- /* Filling descriptors fields */
- txds->dma_len = dma_size;
- txds->data_len = txd.data_len;
- txds->dma_addr_hi = (dma_addr >> 32) & 0xff;
- txds->dma_addr_lo = (dma_addr & 0xffffffff);
- free_descs--;
-
- txq->wr_p++;
- if (unlikely(txq->wr_p == txq->tx_count)) /* wrapping?*/
- txq->wr_p = 0;
-
- pkt_size -= dma_size;
-
- /*
- * Making the EOP, packets with just one segment
- * the priority
- */
- if (likely(pkt_size == 0))
- txds->offset_eop = PCIE_DESC_TX_EOP;
- else
- txds->offset_eop = 0;
-
- /* Set the meta_len */
- txds->offset_eop |= meta_data.length;
-
- pkt = pkt->next;
- /* Referencing next free TX descriptor */
- txds = &txq->txds[txq->wr_p];
- lmbuf = &txq->txbufs[txq->wr_p].mbuf;
- issued_descs++;
- }
- }
-
-xmit_end:
- /* Increment write pointers. Force memory write before we let HW know */
- rte_wmb();
- nfp_qcp_ptr_add(txq->qcp_q, NFP_QCP_WRITE_PTR, issued_descs);
-
- return i;
-}
-
static void
nfp_net_nfdk_set_meta_data(struct rte_mbuf *pkt,
struct nfp_net_txq *txq,
diff --git a/drivers/net/nfp/nfp_rxtx.h b/drivers/net/nfp/nfp_rxtx.h
index f016bf732c..6c81a98ae0 100644
--- a/drivers/net/nfp/nfp_rxtx.h
+++ b/drivers/net/nfp/nfp_rxtx.h
@@ -96,26 +96,10 @@ struct nfp_meta_parsed {
/* Descriptor alignment */
#define NFP_ALIGN_RING_DESC 128
-/* TX descriptor format */
-#define PCIE_DESC_TX_EOP (1 << 7)
-#define PCIE_DESC_TX_OFFSET_MASK (0x7f)
-
-/* Flags in the host TX descriptor */
-#define PCIE_DESC_TX_CSUM (1 << 7)
-#define PCIE_DESC_TX_IP4_CSUM (1 << 6)
-#define PCIE_DESC_TX_TCP_CSUM (1 << 5)
-#define PCIE_DESC_TX_UDP_CSUM (1 << 4)
-#define PCIE_DESC_TX_VLAN (1 << 3)
-#define PCIE_DESC_TX_LSO (1 << 2)
-#define PCIE_DESC_TX_ENCAP_NONE (0)
-#define PCIE_DESC_TX_ENCAP (1 << 1)
-#define PCIE_DESC_TX_O_IP4_CSUM (1 << 0)
-
#define NFDK_TX_MAX_DATA_PER_HEAD 0x00001000
#define NFDK_DESC_TX_DMA_LEN_HEAD 0x0fff
#define NFDK_DESC_TX_TYPE_HEAD 0xf000
#define NFDK_DESC_TX_DMA_LEN 0x3fff
-#define NFD3_TX_DESC_PER_SIMPLE_PKT 1
#define NFDK_TX_DESC_PER_SIMPLE_PKT 2
#define NFDK_DESC_TX_TYPE_TSO 2
#define NFDK_DESC_TX_TYPE_SIMPLE 8
@@ -139,37 +123,6 @@ struct nfp_meta_parsed {
(idx) % NFDK_TX_DESC_BLOCK_CNT)
#define D_IDX(ring, idx) ((idx) & ((ring)->tx_count - 1))
-struct nfp_net_nfd3_tx_desc {
- union {
- struct {
- uint8_t dma_addr_hi; /* High bits of host buf address */
- __le16 dma_len; /* Length to DMA for this desc */
- uint8_t offset_eop; /* Offset in buf where pkt starts +
- * highest bit is eop flag, low 7bit is meta_len.
- */
- __le32 dma_addr_lo; /* Low 32bit of host buf addr */
-
- __le16 mss; /* MSS to be used for LSO */
- uint8_t lso_hdrlen; /* LSO, where the data starts */
- uint8_t flags; /* TX Flags, see @PCIE_DESC_TX_* */
-
- union {
- struct {
- /*
- * L3 and L4 header offsets required
- * for TSOv2
- */
- uint8_t l3_offset;
- uint8_t l4_offset;
- };
- __le16 vlan; /* VLAN tag to add if indicated */
- };
- __le16 data_len; /* Length of frame + meta data */
- } __rte_packed;
- __le32 vals[4];
- };
-};
-
struct nfp_net_nfdk_tx_desc {
union {
struct {
@@ -397,30 +350,6 @@ nfp_net_mbuf_alloc_failed(struct nfp_net_rxq *rxq)
rte_eth_devices[rxq->port_id].data->rx_mbuf_alloc_failed++;
}
-/* Leaving always free descriptors for avoiding wrapping confusion */
-static inline uint32_t
-nfp_net_nfd3_free_tx_desc(struct nfp_net_txq *txq)
-{
- if (txq->wr_p >= txq->rd_p)
- return txq->tx_count - (txq->wr_p - txq->rd_p) - 8;
- else
- return txq->rd_p - txq->wr_p - 8;
-}
-
-/*
- * nfp_net_nfd3_txq_full() - Check if the TX queue free descriptors
- * is below tx_free_threshold for firmware of nfd3
- *
- * @txq: TX queue to check
- *
- * This function uses the host copy* of read/write pointers.
- */
-static inline uint32_t
-nfp_net_nfd3_txq_full(struct nfp_net_txq *txq)
-{
- return (nfp_net_nfd3_free_tx_desc(txq) < txq->tx_free_thresh);
-}
-
/* set mbuf checksum flags based on RX descriptor flags */
static inline void
nfp_net_rx_cksum(struct nfp_net_rxq *rxq, struct nfp_net_rx_desc *rxd,
@@ -449,82 +378,6 @@ nfp_net_rx_cksum(struct nfp_net_rxq *rxq, struct nfp_net_rx_desc *rxd,
mb->ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_BAD;
}
-/* nfp_net_nfd3_tx_tso() - Set NFD3 TX descriptor for TSO */
-static inline void
-nfp_net_nfd3_tx_tso(struct nfp_net_txq *txq,
- struct nfp_net_nfd3_tx_desc *txd,
- struct rte_mbuf *mb)
-{
- uint64_t ol_flags;
- struct nfp_net_hw *hw = txq->hw;
-
- if (!(hw->cap & NFP_NET_CFG_CTRL_LSO_ANY))
- goto clean_txd;
-
- ol_flags = mb->ol_flags;
-
- if (!(ol_flags & RTE_MBUF_F_TX_TCP_SEG))
- goto clean_txd;
-
- txd->l3_offset = mb->l2_len;
- txd->l4_offset = mb->l2_len + mb->l3_len;
- txd->lso_hdrlen = mb->l2_len + mb->l3_len + mb->l4_len;
-
- if (ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) {
- txd->l3_offset += mb->outer_l2_len + mb->outer_l3_len;
- txd->l4_offset += mb->outer_l2_len + mb->outer_l3_len;
- txd->lso_hdrlen += mb->outer_l2_len + mb->outer_l3_len;
- }
-
- txd->mss = rte_cpu_to_le_16(mb->tso_segsz);
- txd->flags = PCIE_DESC_TX_LSO;
- return;
-
-clean_txd:
- txd->flags = 0;
- txd->l3_offset = 0;
- txd->l4_offset = 0;
- txd->lso_hdrlen = 0;
- txd->mss = 0;
-}
-
-/* nfp_net_nfd3_tx_cksum() - Set TX CSUM offload flags in NFD3 TX descriptor */
-static inline void
-nfp_net_nfd3_tx_cksum(struct nfp_net_txq *txq, struct nfp_net_nfd3_tx_desc *txd,
- struct rte_mbuf *mb)
-{
- uint64_t ol_flags;
- struct nfp_net_hw *hw = txq->hw;
-
- if (!(hw->cap & NFP_NET_CFG_CTRL_TXCSUM))
- return;
-
- ol_flags = mb->ol_flags;
-
- /* Set TCP csum offload if TSO enabled. */
- if (ol_flags & RTE_MBUF_F_TX_TCP_SEG)
- txd->flags |= PCIE_DESC_TX_TCP_CSUM;
-
- /* IPv6 does not need checksum */
- if (ol_flags & RTE_MBUF_F_TX_IP_CKSUM)
- txd->flags |= PCIE_DESC_TX_IP4_CSUM;
-
- if (ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK)
- txd->flags |= PCIE_DESC_TX_ENCAP;
-
- switch (ol_flags & RTE_MBUF_F_TX_L4_MASK) {
- case RTE_MBUF_F_TX_UDP_CKSUM:
- txd->flags |= PCIE_DESC_TX_UDP_CSUM;
- break;
- case RTE_MBUF_F_TX_TCP_CKSUM:
- txd->flags |= PCIE_DESC_TX_TCP_CSUM;
- break;
- }
-
- if (ol_flags & (RTE_MBUF_F_TX_IP_CKSUM | RTE_MBUF_F_TX_L4_MASK))
- txd->flags |= PCIE_DESC_TX_CSUM;
-}
-
int nfp_net_rx_freelist_setup(struct rte_eth_dev *dev);
uint32_t nfp_net_rx_queue_count(void *rx_queue);
uint16_t nfp_net_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
@@ -537,8 +390,7 @@ int nfp_net_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
struct rte_mempool *mp);
void nfp_net_tx_queue_release(struct rte_eth_dev *dev, uint16_t queue_idx);
void nfp_net_reset_tx_queue(struct nfp_net_txq *txq);
-uint16_t nfp_net_nfd3_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
- uint16_t nb_pkts);
+
int nfp_net_tx_queue_setup(struct rte_eth_dev *dev,
uint16_t queue_idx,
uint16_t nb_desc,
@@ -548,6 +400,9 @@ uint16_t nfp_net_nfdk_xmit_pkts(void *tx_queue,
struct rte_mbuf **tx_pkts,
uint16_t nb_pkts);
int nfp_net_tx_free_bufs(struct nfp_net_txq *txq);
+void nfp_net_set_meta_vlan(struct nfp_net_meta_raw *meta_data,
+ struct rte_mbuf *pkt,
+ uint8_t layer);
#endif /* _NFP_RXTX_H_ */
/*
--
2.39.1
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 09/13] net/nfp: adjust the coding style for NFD3
2023-04-10 11:00 [PATCH 00/13] Sync the kernel driver logic Chaoyong He
` (7 preceding siblings ...)
2023-04-10 11:00 ` [PATCH 08/13] net/nfp: move NFD3 logic to own source file Chaoyong He
@ 2023-04-10 11:00 ` Chaoyong He
2023-04-10 11:00 ` [PATCH 10/13] net/nfp: rename macro name of NFD3 Tx descriptor Chaoyong He
` (5 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Chaoyong He @ 2023-04-10 11:00 UTC (permalink / raw)
To: dev; +Cc: oss-drivers, niklas.soderlund, Chaoyong He
Adjust the coding style for NDF3 struct and logics.
Sync the macro name for the NFD3 descriptor.
Remove the ASSERT macro and delete some unneeded comment messages.
Signed-off-by: Chaoyong He <chaoyong.he@corigine.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund@corigine.com>
---
drivers/net/nfp/nfd3/nfp_nfd3.h | 79 ++++++++---------
drivers/net/nfp/nfd3/nfp_nfd3_dp.c | 131 ++++++++++++++---------------
drivers/net/nfp/nfp_common.c | 2 +-
3 files changed, 102 insertions(+), 110 deletions(-)
diff --git a/drivers/net/nfp/nfd3/nfp_nfd3.h b/drivers/net/nfp/nfd3/nfp_nfd3.h
index 5c6162aada..90dd376f9a 100644
--- a/drivers/net/nfp/nfd3/nfp_nfd3.h
+++ b/drivers/net/nfp/nfd3/nfp_nfd3.h
@@ -7,50 +7,44 @@
#define _NFP_NFD3_H_
/* TX descriptor format */
-#define PCIE_DESC_TX_EOP (1 << 7)
-#define PCIE_DESC_TX_OFFSET_MASK (0x7f)
+#define PCIE_DESC_TX_EOP RTE_BIT32(7)
+#define PCIE_DESC_TX_OFFSET_MASK (0x7F) /* [0,6] */
/* Flags in the host TX descriptor */
-#define PCIE_DESC_TX_CSUM (1 << 7)
-#define PCIE_DESC_TX_IP4_CSUM (1 << 6)
-#define PCIE_DESC_TX_TCP_CSUM (1 << 5)
-#define PCIE_DESC_TX_UDP_CSUM (1 << 4)
-#define PCIE_DESC_TX_VLAN (1 << 3)
-#define PCIE_DESC_TX_LSO (1 << 2)
-#define PCIE_DESC_TX_ENCAP_NONE (0)
-#define PCIE_DESC_TX_ENCAP (1 << 1)
-#define PCIE_DESC_TX_O_IP4_CSUM (1 << 0)
-
-#define NFD3_TX_DESC_PER_SIMPLE_PKT 1
+#define PCIE_DESC_TX_CSUM RTE_BIT32(7)
+#define PCIE_DESC_TX_IP4_CSUM RTE_BIT32(6)
+#define PCIE_DESC_TX_TCP_CSUM RTE_BIT32(5)
+#define PCIE_DESC_TX_UDP_CSUM RTE_BIT32(4)
+#define PCIE_DESC_TX_VLAN RTE_BIT32(3)
+#define PCIE_DESC_TX_LSO RTE_BIT32(2)
+#define PCIE_DESC_TX_ENCAP RTE_BIT32(1)
+#define PCIE_DESC_TX_O_IP4_CSUM RTE_BIT32(0)
+
+#define NFD3_TX_DESC_PER_PKT 1
struct nfp_net_nfd3_tx_desc {
union {
struct {
uint8_t dma_addr_hi; /* High bits of host buf address */
- __le16 dma_len; /* Length to DMA for this desc */
- uint8_t offset_eop; /* Offset in buf where pkt starts +
- * highest bit is eop flag, low 7bit is meta_len.
- */
- __le32 dma_addr_lo; /* Low 32bit of host buf addr */
+ uint16_t dma_len; /* Length to DMA for this desc */
+ /* Offset in buf where pkt starts + highest bit is eop flag */
+ uint8_t offset_eop;
+ uint32_t dma_addr_lo; /* Low 32bit of host buf addr */
- __le16 mss; /* MSS to be used for LSO */
- uint8_t lso_hdrlen; /* LSO, where the data starts */
- uint8_t flags; /* TX Flags, see @PCIE_DESC_TX_* */
+ uint16_t mss; /* MSS to be used for LSO */
+ uint8_t lso_hdrlen; /* LSO, where the data starts */
+ uint8_t flags; /* TX Flags, see @PCIE_DESC_TX_* */
union {
struct {
- /*
- * L3 and L4 header offsets required
- * for TSOv2
- */
- uint8_t l3_offset;
- uint8_t l4_offset;
+ uint8_t l3_offset; /* L3 header offset */
+ uint8_t l4_offset; /* L4 header offset */
};
- __le16 vlan; /* VLAN tag to add if indicated */
+ uint16_t vlan; /* VLAN tag to add if indicated */
};
- __le16 data_len; /* Length of frame + meta data */
+ uint16_t data_len; /* Length of frame + meta data */
} __rte_packed;
- __le32 vals[4];
+ uint32_t vals[4];
};
};
@@ -72,7 +66,7 @@ nfp_net_nfd3_free_tx_desc(struct nfp_net_txq *txq)
*
* This function uses the host copy* of read/write pointers.
*/
-static inline uint32_t
+static inline bool
nfp_net_nfd3_txq_full(struct nfp_net_txq *txq)
{
return (nfp_net_nfd3_free_tx_desc(txq) < txq->tx_free_thresh);
@@ -87,19 +81,18 @@ nfp_net_nfd3_tx_tso(struct nfp_net_txq *txq,
uint64_t ol_flags;
struct nfp_net_hw *hw = txq->hw;
- if (!(hw->cap & NFP_NET_CFG_CTRL_LSO_ANY))
+ if ((hw->cap & NFP_NET_CFG_CTRL_LSO_ANY) == 0)
goto clean_txd;
ol_flags = mb->ol_flags;
-
- if (!(ol_flags & RTE_MBUF_F_TX_TCP_SEG))
+ if ((ol_flags & RTE_MBUF_F_TX_TCP_SEG) == 0)
goto clean_txd;
txd->l3_offset = mb->l2_len;
txd->l4_offset = mb->l2_len + mb->l3_len;
txd->lso_hdrlen = mb->l2_len + mb->l3_len + mb->l4_len;
- if (ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) {
+ if ((ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) != 0) {
txd->l3_offset += mb->outer_l2_len + mb->outer_l3_len;
txd->l4_offset += mb->outer_l2_len + mb->outer_l3_len;
txd->lso_hdrlen += mb->outer_l2_len + mb->outer_l3_len;
@@ -107,6 +100,7 @@ nfp_net_nfd3_tx_tso(struct nfp_net_txq *txq,
txd->mss = rte_cpu_to_le_16(mb->tso_segsz);
txd->flags = PCIE_DESC_TX_LSO;
+
return;
clean_txd:
@@ -119,26 +113,27 @@ nfp_net_nfd3_tx_tso(struct nfp_net_txq *txq,
/* nfp_net_nfd3_tx_cksum() - Set TX CSUM offload flags in NFD3 TX descriptor */
static inline void
-nfp_net_nfd3_tx_cksum(struct nfp_net_txq *txq, struct nfp_net_nfd3_tx_desc *txd,
- struct rte_mbuf *mb)
+nfp_net_nfd3_tx_cksum(struct nfp_net_txq *txq,
+ struct nfp_net_nfd3_tx_desc *txd,
+ struct rte_mbuf *mb)
{
uint64_t ol_flags;
struct nfp_net_hw *hw = txq->hw;
- if (!(hw->cap & NFP_NET_CFG_CTRL_TXCSUM))
+ if ((hw->cap & NFP_NET_CFG_CTRL_TXCSUM) == 0)
return;
ol_flags = mb->ol_flags;
/* Set TCP csum offload if TSO enabled. */
- if (ol_flags & RTE_MBUF_F_TX_TCP_SEG)
+ if ((ol_flags & RTE_MBUF_F_TX_TCP_SEG) != 0)
txd->flags |= PCIE_DESC_TX_TCP_CSUM;
/* IPv6 does not need checksum */
- if (ol_flags & RTE_MBUF_F_TX_IP_CKSUM)
+ if ((ol_flags & RTE_MBUF_F_TX_IP_CKSUM) != 0)
txd->flags |= PCIE_DESC_TX_IP4_CSUM;
- if (ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK)
+ if ((ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) != 0)
txd->flags |= PCIE_DESC_TX_ENCAP;
switch (ol_flags & RTE_MBUF_F_TX_L4_MASK) {
@@ -150,7 +145,7 @@ nfp_net_nfd3_tx_cksum(struct nfp_net_txq *txq, struct nfp_net_nfd3_tx_desc *txd,
break;
}
- if (ol_flags & (RTE_MBUF_F_TX_IP_CKSUM | RTE_MBUF_F_TX_L4_MASK))
+ if ((ol_flags & (RTE_MBUF_F_TX_IP_CKSUM | RTE_MBUF_F_TX_L4_MASK)) != 0)
txd->flags |= PCIE_DESC_TX_CSUM;
}
diff --git a/drivers/net/nfp/nfd3/nfp_nfd3_dp.c b/drivers/net/nfp/nfd3/nfp_nfd3_dp.c
index 88bcd26ad8..509d5b0c88 100644
--- a/drivers/net/nfp/nfd3/nfp_nfd3_dp.c
+++ b/drivers/net/nfp/nfd3/nfp_nfd3_dp.c
@@ -17,12 +17,12 @@
*
* If enable NFP_NET_CFG_CTRL_TXVLAN_V2
* Vlan_info is stored in the meta and
- * is handled in the nfp_net_nfd3_set_meta_vlan
+ * is handled in the nfp_net_nfd3_set_meta_vlan()
* else if enable NFP_NET_CFG_CTRL_TXVLAN
* Vlan_info is stored in the tx_desc and
- * is handled in the nfp_net_nfd3_tx_vlan
+ * is handled in the nfp_net_nfd3_tx_vlan()
*/
-static void
+static inline void
nfp_net_nfd3_tx_vlan(struct nfp_net_txq *txq,
struct nfp_net_nfd3_tx_desc *txd,
struct rte_mbuf *mb)
@@ -30,7 +30,7 @@ nfp_net_nfd3_tx_vlan(struct nfp_net_txq *txq,
struct nfp_net_hw *hw = txq->hw;
if ((hw->cap & NFP_NET_CFG_CTRL_TXVLAN_V2) != 0 ||
- (hw->cap & NFP_NET_CFG_CTRL_TXVLAN) == 0)
+ (hw->cap & NFP_NET_CFG_CTRL_TXVLAN) == 0)
return;
if ((mb->ol_flags & RTE_MBUF_F_TX_VLAN) != 0) {
@@ -39,16 +39,16 @@ nfp_net_nfd3_tx_vlan(struct nfp_net_txq *txq,
}
}
-static void
+static inline void
nfp_net_nfd3_set_meta_data(struct nfp_net_meta_raw *meta_data,
struct nfp_net_txq *txq,
struct rte_mbuf *pkt)
{
- uint8_t vlan_layer = 0;
- struct nfp_net_hw *hw;
- uint32_t meta_info;
- uint8_t layer = 0;
char *meta;
+ uint8_t layer = 0;
+ uint32_t meta_info;
+ struct nfp_net_hw *hw;
+ uint8_t vlan_layer = 0;
hw = txq->hw;
@@ -90,39 +90,44 @@ nfp_net_nfd3_set_meta_data(struct nfp_net_meta_raw *meta_data,
}
uint16_t
-nfp_net_nfd3_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
+nfp_net_nfd3_xmit_pkts(void *tx_queue,
+ struct rte_mbuf **tx_pkts,
+ uint16_t nb_pkts)
{
- struct nfp_net_txq *txq;
- struct nfp_net_hw *hw;
- struct nfp_net_nfd3_tx_desc *txds, txd;
- struct nfp_net_meta_raw meta_data;
- struct rte_mbuf *pkt;
+ int i;
+ int pkt_size;
+ int dma_size;
uint64_t dma_addr;
- int pkt_size, dma_size;
- uint16_t free_descs, issued_descs;
+ uint16_t free_descs;
+ uint16_t issued_descs;
+ struct rte_mbuf *pkt;
+ struct nfp_net_hw *hw;
struct rte_mbuf **lmbuf;
- int i;
+ struct nfp_net_txq *txq;
+ struct nfp_net_nfd3_tx_desc txd;
+ struct nfp_net_nfd3_tx_desc *txds;
+ struct nfp_net_meta_raw meta_data;
txq = tx_queue;
hw = txq->hw;
txds = &txq->txds[txq->wr_p];
PMD_TX_LOG(DEBUG, "working for queue %u at pos %d and %u packets",
- txq->qidx, txq->wr_p, nb_pkts);
+ txq->qidx, txq->wr_p, nb_pkts);
- if (nfp_net_nfd3_free_tx_desc(txq) < NFD3_TX_DESC_PER_SIMPLE_PKT * nb_pkts ||
- nfp_net_nfd3_txq_full(txq))
+ if (nfp_net_nfd3_free_tx_desc(txq) < NFD3_TX_DESC_PER_PKT * nb_pkts ||
+ nfp_net_nfd3_txq_full(txq))
nfp_net_tx_free_bufs(txq);
- free_descs = (uint16_t)nfp_net_nfd3_free_tx_desc(txq);
+ free_descs = nfp_net_nfd3_free_tx_desc(txq);
if (unlikely(free_descs == 0))
return 0;
pkt = *tx_pkts;
issued_descs = 0;
- PMD_TX_LOG(DEBUG, "queue: %u. Sending %u packets",
- txq->qidx, nb_pkts);
+ PMD_TX_LOG(DEBUG, "queue: %u. Sending %u packets", txq->qidx, nb_pkts);
+
/* Sending packets */
for (i = 0; i < nb_pkts && free_descs > 0; i++) {
memset(&meta_data, 0, sizeof(meta_data));
@@ -136,8 +141,8 @@ nfp_net_nfd3_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pk
nfp_net_nfd3_set_meta_data(&meta_data, txq, pkt);
if (unlikely(pkt->nb_segs > 1 &&
- !(hw->cap & NFP_NET_CFG_CTRL_GATHER))) {
- PMD_INIT_LOG(ERR, "Multisegment packet not supported");
+ (hw->cap & NFP_NET_CFG_CTRL_GATHER) == 0)) {
+ PMD_TX_LOG(ERR, "Multisegment packet not supported");
goto xmit_end;
}
@@ -165,8 +170,8 @@ nfp_net_nfd3_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pk
/* Copying TSO, VLAN and cksum info */
*txds = txd;
- /* Releasing mbuf used by this descriptor previously*/
- if (*lmbuf)
+ /* Releasing mbuf used by this descriptor previously */
+ if (*lmbuf != NULL)
rte_pktmbuf_free_seg(*lmbuf);
/*
@@ -177,8 +182,6 @@ nfp_net_nfd3_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pk
dma_size = pkt->data_len;
dma_addr = rte_mbuf_data_iova(pkt);
- PMD_TX_LOG(DEBUG, "Working with mbuf at dma address:"
- "%" PRIx64 "", dma_addr);
/* Filling descriptors fields */
txds->dma_len = dma_size;
@@ -188,7 +191,7 @@ nfp_net_nfd3_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pk
free_descs--;
txq->wr_p++;
- if (unlikely(txq->wr_p == txq->tx_count)) /* wrapping?*/
+ if (unlikely(txq->wr_p == txq->tx_count)) /* wrapping */
txq->wr_p = 0;
pkt_size -= dma_size;
@@ -222,18 +225,21 @@ nfp_net_nfd3_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pk
}
int
-nfp_net_nfd3_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
- uint16_t nb_desc, unsigned int socket_id,
- const struct rte_eth_txconf *tx_conf)
+nfp_net_nfd3_tx_queue_setup(struct rte_eth_dev *dev,
+ uint16_t queue_idx,
+ uint16_t nb_desc,
+ unsigned int socket_id,
+ const struct rte_eth_txconf *tx_conf)
{
int ret;
+ size_t size;
+ uint32_t tx_desc_sz;
uint16_t min_tx_desc;
uint16_t max_tx_desc;
- const struct rte_memzone *tz;
+ struct nfp_net_hw *hw;
struct nfp_net_txq *txq;
uint16_t tx_free_thresh;
- struct nfp_net_hw *hw;
- uint32_t tx_desc_sz;
+ const struct rte_memzone *tz;
hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
@@ -245,39 +251,35 @@ nfp_net_nfd3_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
/* Validating number of descriptors */
tx_desc_sz = nb_desc * sizeof(struct nfp_net_nfd3_tx_desc);
- if ((NFD3_TX_DESC_PER_SIMPLE_PKT * tx_desc_sz) % NFP_ALIGN_RING_DESC != 0 ||
- nb_desc > max_tx_desc || nb_desc < min_tx_desc) {
+ if ((NFD3_TX_DESC_PER_PKT * tx_desc_sz) % NFP_ALIGN_RING_DESC != 0 ||
+ nb_desc > max_tx_desc || nb_desc < min_tx_desc) {
PMD_DRV_LOG(ERR, "Wrong nb_desc value");
return -EINVAL;
}
- tx_free_thresh = (uint16_t)((tx_conf->tx_free_thresh) ?
- tx_conf->tx_free_thresh :
- DEFAULT_TX_FREE_THRESH);
-
- if (tx_free_thresh > (nb_desc)) {
- PMD_DRV_LOG(ERR,
- "tx_free_thresh must be less than the number of TX "
- "descriptors. (tx_free_thresh=%u port=%d "
- "queue=%d)", (unsigned int)tx_free_thresh,
- dev->data->port_id, (int)queue_idx);
- return -(EINVAL);
+ tx_free_thresh = (tx_conf->tx_free_thresh != 0) ?
+ tx_conf->tx_free_thresh : DEFAULT_TX_FREE_THRESH;
+ if (tx_free_thresh > nb_desc) {
+ PMD_DRV_LOG(ERR, "tx_free_thresh must be less than the number of TX "
+ "descriptors. (tx_free_thresh=%u port=%d queue=%d)",
+ tx_free_thresh, dev->data->port_id, queue_idx);
+ return -EINVAL;
}
/*
* Free memory prior to re-allocation if needed. This is the case after
- * calling nfp_net_stop
+ * calling nfp_net_stop().
*/
- if (dev->data->tx_queues[queue_idx]) {
+ if (dev->data->tx_queues[queue_idx] != NULL) {
PMD_TX_LOG(DEBUG, "Freeing memory prior to re-allocation %d",
- queue_idx);
+ queue_idx);
nfp_net_tx_queue_release(dev, queue_idx);
dev->data->tx_queues[queue_idx] = NULL;
}
/* Allocating tx queue data structure */
txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct nfp_net_txq),
- RTE_CACHE_LINE_SIZE, socket_id);
+ RTE_CACHE_LINE_SIZE, socket_id);
if (txq == NULL) {
PMD_DRV_LOG(ERR, "Error allocating tx dma");
return -ENOMEM;
@@ -290,11 +292,9 @@ nfp_net_nfd3_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
* handle the maximum ring size is allocated in order to allow for
* resizing in later calls to the queue setup function.
*/
- tz = rte_eth_dma_zone_reserve(dev, "tx_ring", queue_idx,
- sizeof(struct nfp_net_nfd3_tx_desc) *
- NFD3_TX_DESC_PER_SIMPLE_PKT *
- max_tx_desc, NFP_MEMZONE_ALIGN,
- socket_id);
+ size = sizeof(struct nfp_net_nfd3_tx_desc) * NFD3_TX_DESC_PER_PKT * max_tx_desc;
+ tz = rte_eth_dma_zone_reserve(dev, "tx_ring", queue_idx, size,
+ NFP_MEMZONE_ALIGN, socket_id);
if (tz == NULL) {
PMD_DRV_LOG(ERR, "Error allocating tx dma");
nfp_net_tx_queue_release(dev, queue_idx);
@@ -302,7 +302,7 @@ nfp_net_nfd3_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
return -ENOMEM;
}
- txq->tx_count = nb_desc * NFD3_TX_DESC_PER_SIMPLE_PKT;
+ txq->tx_count = nb_desc * NFD3_TX_DESC_PER_PKT;
txq->tx_free_thresh = tx_free_thresh;
txq->tx_pthresh = tx_conf->tx_thresh.pthresh;
txq->tx_hthresh = tx_conf->tx_thresh.hthresh;
@@ -312,24 +312,21 @@ nfp_net_nfd3_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->qidx = queue_idx;
txq->tx_qcidx = queue_idx * hw->stride_tx;
txq->qcp_q = hw->tx_bar + NFP_QCP_QUEUE_OFF(txq->tx_qcidx);
-
txq->port_id = dev->data->port_id;
/* Saving physical and virtual addresses for the TX ring */
- txq->dma = (uint64_t)tz->iova;
- txq->txds = (struct nfp_net_nfd3_tx_desc *)tz->addr;
+ txq->dma = tz->iova;
+ txq->txds = tz->addr;
/* mbuf pointers array for referencing mbufs linked to TX descriptors */
txq->txbufs = rte_zmalloc_socket("txq->txbufs",
- sizeof(*txq->txbufs) * txq->tx_count,
- RTE_CACHE_LINE_SIZE, socket_id);
+ sizeof(*txq->txbufs) * txq->tx_count,
+ RTE_CACHE_LINE_SIZE, socket_id);
if (txq->txbufs == NULL) {
nfp_net_tx_queue_release(dev, queue_idx);
dev->data->tx_queues[queue_idx] = NULL;
return -ENOMEM;
}
- PMD_TX_LOG(DEBUG, "txbufs=%p hw_ring=%p dma_addr=0x%" PRIx64,
- txq->txbufs, txq->txds, (unsigned long)txq->dma);
nfp_net_reset_tx_queue(txq);
diff --git a/drivers/net/nfp/nfp_common.c b/drivers/net/nfp/nfp_common.c
index d1b6ef3bc9..ca334d56ab 100644
--- a/drivers/net/nfp/nfp_common.c
+++ b/drivers/net/nfp/nfp_common.c
@@ -825,7 +825,7 @@ nfp_net_tx_desc_limits(struct nfp_net_hw *hw,
switch (NFD_CFG_CLASS_VER_of(hw->ver)) {
case NFP_NET_CFG_VERSION_DP_NFD3:
- tx_dpp = NFD3_TX_DESC_PER_SIMPLE_PKT;
+ tx_dpp = NFD3_TX_DESC_PER_PKT;
break;
case NFP_NET_CFG_VERSION_DP_NFDK:
if (NFD_CFG_MAJOR_VERSION_of(hw->ver) < 5) {
--
2.39.1
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 10/13] net/nfp: rename macro name of NFD3 Tx descriptor
2023-04-10 11:00 [PATCH 00/13] Sync the kernel driver logic Chaoyong He
` (8 preceding siblings ...)
2023-04-10 11:00 ` [PATCH 09/13] net/nfp: adjust the coding style for NFD3 Chaoyong He
@ 2023-04-10 11:00 ` Chaoyong He
2023-04-10 11:00 ` [PATCH 11/13] net/nfp: move NFDk logic to own source file Chaoyong He
` (4 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Chaoyong He @ 2023-04-10 11:00 UTC (permalink / raw)
To: dev; +Cc: oss-drivers, niklas.soderlund, Chaoyong He
Rename the name of the macro of NFD3 TX descriptor from PCIE to NFD3,
keep it same with the kernel driver.
Signed-off-by: Chaoyong He <chaoyong.he@corigine.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund@corigine.com>
---
drivers/net/nfp/flower/nfp_flower.c | 4 +--
drivers/net/nfp/flower/nfp_flower_ctrl.c | 2 +-
drivers/net/nfp/nfd3/nfp_nfd3.h | 36 ++++++++++++------------
drivers/net/nfp/nfd3/nfp_nfd3_dp.c | 4 +--
4 files changed, 23 insertions(+), 23 deletions(-)
diff --git a/drivers/net/nfp/flower/nfp_flower.c b/drivers/net/nfp/flower/nfp_flower.c
index 9212e6606b..159f88f5ae 100644
--- a/drivers/net/nfp/flower/nfp_flower.c
+++ b/drivers/net/nfp/flower/nfp_flower.c
@@ -550,7 +550,7 @@ nfp_flower_pf_xmit_pkts(void *tx_queue,
if ((pkt->ol_flags & RTE_MBUF_F_TX_VLAN) &&
(hw->cap & NFP_NET_CFG_CTRL_TXVLAN)) {
- txd.flags |= PCIE_DESC_TX_VLAN;
+ txd.flags |= NFD3_DESC_TX_VLAN;
txd.vlan = pkt->vlan_tci;
}
@@ -596,7 +596,7 @@ nfp_flower_pf_xmit_pkts(void *tx_queue,
* the priority
*/
if (likely(pkt_size == 0))
- txds->offset_eop = PCIE_DESC_TX_EOP | FLOWER_PKT_DATA_OFFSET;
+ txds->offset_eop = NFD3_DESC_TX_EOP | FLOWER_PKT_DATA_OFFSET;
else
txds->offset_eop = 0;
diff --git a/drivers/net/nfp/flower/nfp_flower_ctrl.c b/drivers/net/nfp/flower/nfp_flower_ctrl.c
index 7f9dc5683b..937829c23c 100644
--- a/drivers/net/nfp/flower/nfp_flower_ctrl.c
+++ b/drivers/net/nfp/flower/nfp_flower_ctrl.c
@@ -208,7 +208,7 @@ nfp_flower_ctrl_vnic_xmit(struct nfp_app_fw_flower *app_fw_flower,
txds->dma_len = txds->data_len;
txds->dma_addr_hi = (dma_addr >> 32) & 0xff;
txds->dma_addr_lo = (dma_addr & 0xffffffff);
- txds->offset_eop = FLOWER_PKT_DATA_OFFSET | PCIE_DESC_TX_EOP;
+ txds->offset_eop = FLOWER_PKT_DATA_OFFSET | NFD3_DESC_TX_EOP;
txq->wr_p++;
if (unlikely(txq->wr_p == txq->tx_count)) /* wrapping?*/
diff --git a/drivers/net/nfp/nfd3/nfp_nfd3.h b/drivers/net/nfp/nfd3/nfp_nfd3.h
index 90dd376f9a..7bf2349904 100644
--- a/drivers/net/nfp/nfd3/nfp_nfd3.h
+++ b/drivers/net/nfp/nfd3/nfp_nfd3.h
@@ -7,18 +7,18 @@
#define _NFP_NFD3_H_
/* TX descriptor format */
-#define PCIE_DESC_TX_EOP RTE_BIT32(7)
-#define PCIE_DESC_TX_OFFSET_MASK (0x7F) /* [0,6] */
+#define NFD3_DESC_TX_EOP RTE_BIT32(7)
+#define NFD3_DESC_TX_OFFSET_MASK (0x7F) /* [0,6] */
/* Flags in the host TX descriptor */
-#define PCIE_DESC_TX_CSUM RTE_BIT32(7)
-#define PCIE_DESC_TX_IP4_CSUM RTE_BIT32(6)
-#define PCIE_DESC_TX_TCP_CSUM RTE_BIT32(5)
-#define PCIE_DESC_TX_UDP_CSUM RTE_BIT32(4)
-#define PCIE_DESC_TX_VLAN RTE_BIT32(3)
-#define PCIE_DESC_TX_LSO RTE_BIT32(2)
-#define PCIE_DESC_TX_ENCAP RTE_BIT32(1)
-#define PCIE_DESC_TX_O_IP4_CSUM RTE_BIT32(0)
+#define NFD3_DESC_TX_CSUM RTE_BIT32(7)
+#define NFD3_DESC_TX_IP4_CSUM RTE_BIT32(6)
+#define NFD3_DESC_TX_TCP_CSUM RTE_BIT32(5)
+#define NFD3_DESC_TX_UDP_CSUM RTE_BIT32(4)
+#define NFD3_DESC_TX_VLAN RTE_BIT32(3)
+#define NFD3_DESC_TX_LSO RTE_BIT32(2)
+#define NFD3_DESC_TX_ENCAP RTE_BIT32(1)
+#define NFD3_DESC_TX_O_IP4_CSUM RTE_BIT32(0)
#define NFD3_TX_DESC_PER_PKT 1
@@ -33,7 +33,7 @@ struct nfp_net_nfd3_tx_desc {
uint16_t mss; /* MSS to be used for LSO */
uint8_t lso_hdrlen; /* LSO, where the data starts */
- uint8_t flags; /* TX Flags, see @PCIE_DESC_TX_* */
+ uint8_t flags; /* TX Flags, see @NFD3_DESC_TX_* */
union {
struct {
@@ -99,7 +99,7 @@ nfp_net_nfd3_tx_tso(struct nfp_net_txq *txq,
}
txd->mss = rte_cpu_to_le_16(mb->tso_segsz);
- txd->flags = PCIE_DESC_TX_LSO;
+ txd->flags = NFD3_DESC_TX_LSO;
return;
@@ -127,26 +127,26 @@ nfp_net_nfd3_tx_cksum(struct nfp_net_txq *txq,
/* Set TCP csum offload if TSO enabled. */
if ((ol_flags & RTE_MBUF_F_TX_TCP_SEG) != 0)
- txd->flags |= PCIE_DESC_TX_TCP_CSUM;
+ txd->flags |= NFD3_DESC_TX_TCP_CSUM;
/* IPv6 does not need checksum */
if ((ol_flags & RTE_MBUF_F_TX_IP_CKSUM) != 0)
- txd->flags |= PCIE_DESC_TX_IP4_CSUM;
+ txd->flags |= NFD3_DESC_TX_IP4_CSUM;
if ((ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) != 0)
- txd->flags |= PCIE_DESC_TX_ENCAP;
+ txd->flags |= NFD3_DESC_TX_ENCAP;
switch (ol_flags & RTE_MBUF_F_TX_L4_MASK) {
case RTE_MBUF_F_TX_UDP_CKSUM:
- txd->flags |= PCIE_DESC_TX_UDP_CSUM;
+ txd->flags |= NFD3_DESC_TX_UDP_CSUM;
break;
case RTE_MBUF_F_TX_TCP_CKSUM:
- txd->flags |= PCIE_DESC_TX_TCP_CSUM;
+ txd->flags |= NFD3_DESC_TX_TCP_CSUM;
break;
}
if ((ol_flags & (RTE_MBUF_F_TX_IP_CKSUM | RTE_MBUF_F_TX_L4_MASK)) != 0)
- txd->flags |= PCIE_DESC_TX_CSUM;
+ txd->flags |= NFD3_DESC_TX_CSUM;
}
uint16_t nfp_net_nfd3_xmit_pkts(void *tx_queue,
diff --git a/drivers/net/nfp/nfd3/nfp_nfd3_dp.c b/drivers/net/nfp/nfd3/nfp_nfd3_dp.c
index 509d5b0c88..909156d69c 100644
--- a/drivers/net/nfp/nfd3/nfp_nfd3_dp.c
+++ b/drivers/net/nfp/nfd3/nfp_nfd3_dp.c
@@ -34,7 +34,7 @@ nfp_net_nfd3_tx_vlan(struct nfp_net_txq *txq,
return;
if ((mb->ol_flags & RTE_MBUF_F_TX_VLAN) != 0) {
- txd->flags |= PCIE_DESC_TX_VLAN;
+ txd->flags |= NFD3_DESC_TX_VLAN;
txd->vlan = mb->vlan_tci;
}
}
@@ -201,7 +201,7 @@ nfp_net_nfd3_xmit_pkts(void *tx_queue,
* the priority
*/
if (likely(pkt_size == 0))
- txds->offset_eop = PCIE_DESC_TX_EOP;
+ txds->offset_eop = NFD3_DESC_TX_EOP;
else
txds->offset_eop = 0;
--
2.39.1
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 11/13] net/nfp: move NFDk logic to own source file
2023-04-10 11:00 [PATCH 00/13] Sync the kernel driver logic Chaoyong He
` (9 preceding siblings ...)
2023-04-10 11:00 ` [PATCH 10/13] net/nfp: rename macro name of NFD3 Tx descriptor Chaoyong He
@ 2023-04-10 11:00 ` Chaoyong He
2023-04-10 11:00 ` [PATCH 12/13] net/nfp: adjust the coding style for NFDk Chaoyong He
` (3 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Chaoyong He @ 2023-04-10 11:00 UTC (permalink / raw)
To: dev; +Cc: oss-drivers, niklas.soderlund, Chaoyong He
Split out the data structure and logics of NFDk into new file. The code
is moved verbatim, no functional change.
Signed-off-by: Chaoyong He <chaoyong.he@corigine.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund@corigine.com>
---
drivers/net/nfp/meson.build | 1 +
drivers/net/nfp/nfdk/nfp_nfdk.h | 179 ++++++++++
drivers/net/nfp/nfdk/nfp_nfdk_dp.c | 421 ++++++++++++++++++++++++
drivers/net/nfp/nfp_common.c | 1 +
drivers/net/nfp/nfp_ethdev.c | 1 +
drivers/net/nfp/nfp_ethdev_vf.c | 1 +
drivers/net/nfp/nfp_rxtx.c | 507 +----------------------------
drivers/net/nfp/nfp_rxtx.h | 55 ----
8 files changed, 605 insertions(+), 561 deletions(-)
create mode 100644 drivers/net/nfp/nfdk/nfp_nfdk.h
create mode 100644 drivers/net/nfp/nfdk/nfp_nfdk_dp.c
diff --git a/drivers/net/nfp/meson.build b/drivers/net/nfp/meson.build
index 697a1479c8..93c708959c 100644
--- a/drivers/net/nfp/meson.build
+++ b/drivers/net/nfp/meson.build
@@ -11,6 +11,7 @@ sources = files(
'flower/nfp_flower_ctrl.c',
'flower/nfp_flower_representor.c',
'nfd3/nfp_nfd3_dp.c',
+ 'nfdk/nfp_nfdk_dp.c',
'nfpcore/nfp_cpp_pcie_ops.c',
'nfpcore/nfp_nsp.c',
'nfpcore/nfp_cppcore.c',
diff --git a/drivers/net/nfp/nfdk/nfp_nfdk.h b/drivers/net/nfp/nfdk/nfp_nfdk.h
new file mode 100644
index 0000000000..43e4d75432
--- /dev/null
+++ b/drivers/net/nfp/nfdk/nfp_nfdk.h
@@ -0,0 +1,179 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (c) 2023 Corigine, Inc.
+ * All rights reserved.
+ */
+
+#ifndef _NFP_NFDK_H_
+#define _NFP_NFDK_H_
+
+#define NFDK_TX_DESC_PER_SIMPLE_PKT 2
+#define NFDK_TX_DESC_GATHER_MAX 17
+
+#define NFDK_TX_MAX_DATA_PER_HEAD 0x00001000
+#define NFDK_TX_MAX_DATA_PER_DESC 0x00004000
+#define NFDK_TX_MAX_DATA_PER_BLOCK 0x00010000
+
+#define NFDK_DESC_TX_DMA_LEN_HEAD 0x0FFF /* [0,11] */
+#define NFDK_DESC_TX_DMA_LEN 0x3FFF /* [0,13] */
+#define NFDK_DESC_TX_TYPE_HEAD 0xF000 /* [12,15] */
+
+#define NFDK_DESC_TX_TYPE_GATHER 1
+#define NFDK_DESC_TX_TYPE_TSO 2
+#define NFDK_DESC_TX_TYPE_SIMPLE 8
+
+/* TX descriptor format */
+#define NFDK_DESC_TX_EOP RTE_BIT32(14)
+
+/* Flags in the host TX descriptor */
+#define NFDK_DESC_TX_CHAIN_META RTE_BIT32(3)
+#define NFDK_DESC_TX_ENCAP RTE_BIT32(2)
+#define NFDK_DESC_TX_L4_CSUM RTE_BIT32(1)
+#define NFDK_DESC_TX_L3_CSUM RTE_BIT32(0)
+
+#define NFDK_TX_DESC_BLOCK_SZ 256
+#define NFDK_TX_DESC_BLOCK_CNT (NFDK_TX_DESC_BLOCK_SZ / \
+ sizeof(struct nfp_net_nfdk_tx_desc))
+#define NFDK_TX_DESC_STOP_CNT (NFDK_TX_DESC_BLOCK_CNT * \
+ NFDK_TX_DESC_PER_SIMPLE_PKT)
+#define D_BLOCK_CPL(idx) (NFDK_TX_DESC_BLOCK_CNT - \
+ (idx) % NFDK_TX_DESC_BLOCK_CNT)
+/* Convenience macro for wrapping descriptor index on ring size */
+#define D_IDX(ring, idx) ((idx) & ((ring)->tx_count - 1))
+
+struct nfp_net_nfdk_tx_desc {
+ union {
+ struct {
+ __le16 dma_addr_hi; /* High bits of host buf address */
+ __le16 dma_len_type; /* Length to DMA for this desc */
+ __le32 dma_addr_lo; /* Low 32bit of host buf addr */
+ };
+
+ struct {
+ __le16 mss; /* MSS to be used for LSO */
+ uint8_t lso_hdrlen; /* LSO, TCP payload offset */
+ uint8_t lso_totsegs; /* LSO, total segments */
+ uint8_t l3_offset; /* L3 header offset */
+ uint8_t l4_offset; /* L4 header offset */
+ __le16 lso_meta_res; /* Rsvd bits in TSO metadata */
+ };
+
+ struct {
+ uint8_t flags; /* TX Flags, see @NFDK_DESC_TX_* */
+ uint8_t reserved[7]; /* meta byte placeholder */
+ };
+
+ __le32 vals[2];
+ __le64 raw;
+ };
+};
+
+static inline uint32_t
+nfp_net_nfdk_free_tx_desc(struct nfp_net_txq *txq)
+{
+ uint32_t free_desc;
+
+ if (txq->wr_p >= txq->rd_p)
+ free_desc = txq->tx_count - (txq->wr_p - txq->rd_p);
+ else
+ free_desc = txq->rd_p - txq->wr_p;
+
+ return (free_desc > NFDK_TX_DESC_STOP_CNT) ?
+ (free_desc - NFDK_TX_DESC_STOP_CNT) : 0;
+}
+
+/*
+ * nfp_net_nfdk_txq_full() - Check if the TX queue free descriptors
+ * is below tx_free_threshold for firmware of nfdk
+ *
+ * @txq: TX queue to check
+ *
+ * This function uses the host copy* of read/write pointers.
+ */
+static inline uint32_t
+nfp_net_nfdk_txq_full(struct nfp_net_txq *txq)
+{
+ return (nfp_net_nfdk_free_tx_desc(txq) < txq->tx_free_thresh);
+}
+
+/* nfp_net_nfdk_tx_cksum() - Set TX CSUM offload flags in TX descriptor of nfdk */
+static inline uint64_t
+nfp_net_nfdk_tx_cksum(struct nfp_net_txq *txq, struct rte_mbuf *mb,
+ uint64_t flags)
+{
+ uint64_t ol_flags;
+ struct nfp_net_hw *hw = txq->hw;
+
+ if ((hw->cap & NFP_NET_CFG_CTRL_TXCSUM) == 0)
+ return flags;
+
+ ol_flags = mb->ol_flags;
+
+ /* Set TCP csum offload if TSO enabled. */
+ if (ol_flags & RTE_MBUF_F_TX_TCP_SEG)
+ flags |= NFDK_DESC_TX_L4_CSUM;
+
+ if (ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK)
+ flags |= NFDK_DESC_TX_ENCAP;
+
+ /* IPv6 does not need checksum */
+ if (ol_flags & RTE_MBUF_F_TX_IP_CKSUM)
+ flags |= NFDK_DESC_TX_L3_CSUM;
+
+ if (ol_flags & RTE_MBUF_F_TX_L4_MASK)
+ flags |= NFDK_DESC_TX_L4_CSUM;
+
+ return flags;
+}
+
+/* nfp_net_nfdk_tx_tso() - Set TX descriptor for TSO of nfdk */
+static inline uint64_t
+nfp_net_nfdk_tx_tso(struct nfp_net_txq *txq, struct rte_mbuf *mb)
+{
+ uint64_t ol_flags;
+ struct nfp_net_nfdk_tx_desc txd;
+ struct nfp_net_hw *hw = txq->hw;
+
+ if ((hw->cap & NFP_NET_CFG_CTRL_LSO_ANY) == 0)
+ goto clean_txd;
+
+ ol_flags = mb->ol_flags;
+
+ if ((ol_flags & RTE_MBUF_F_TX_TCP_SEG) == 0)
+ goto clean_txd;
+
+ txd.l3_offset = mb->l2_len;
+ txd.l4_offset = mb->l2_len + mb->l3_len;
+ txd.lso_meta_res = 0;
+ txd.mss = rte_cpu_to_le_16(mb->tso_segsz);
+ txd.lso_hdrlen = mb->l2_len + mb->l3_len + mb->l4_len;
+ txd.lso_totsegs = (mb->pkt_len + mb->tso_segsz) / mb->tso_segsz;
+
+ if (ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) {
+ txd.l3_offset += mb->outer_l2_len + mb->outer_l3_len;
+ txd.l4_offset += mb->outer_l2_len + mb->outer_l3_len;
+ txd.lso_hdrlen += mb->outer_l2_len + mb->outer_l3_len;
+ }
+
+ return txd.raw;
+
+clean_txd:
+ txd.l3_offset = 0;
+ txd.l4_offset = 0;
+ txd.lso_hdrlen = 0;
+ txd.mss = 0;
+ txd.lso_totsegs = 0;
+ txd.lso_meta_res = 0;
+
+ return txd.raw;
+}
+
+uint16_t nfp_net_nfdk_xmit_pkts(void *tx_queue,
+ struct rte_mbuf **tx_pkts,
+ uint16_t nb_pkts);
+int nfp_net_nfdk_tx_queue_setup(struct rte_eth_dev *dev,
+ uint16_t queue_idx,
+ uint16_t nb_desc,
+ unsigned int socket_id,
+ const struct rte_eth_txconf *tx_conf);
+
+#endif /* _NFP_NFDK_H_ */
diff --git a/drivers/net/nfp/nfdk/nfp_nfdk_dp.c b/drivers/net/nfp/nfdk/nfp_nfdk_dp.c
new file mode 100644
index 0000000000..ec937c1f50
--- /dev/null
+++ b/drivers/net/nfp/nfdk/nfp_nfdk_dp.c
@@ -0,0 +1,421 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (c) 2023 Corigine, Inc.
+ * All rights reserved.
+ */
+
+#include <ethdev_driver.h>
+#include <bus_pci_driver.h>
+#include <rte_malloc.h>
+
+#include "../nfp_logs.h"
+#include "../nfp_common.h"
+#include "../nfp_rxtx.h"
+#include "../nfpcore/nfp_mip.h"
+#include "../nfpcore/nfp_rtsym.h"
+#include "nfp_nfdk.h"
+
+static inline int
+nfp_net_nfdk_headlen_to_segs(unsigned int headlen)
+{
+ return DIV_ROUND_UP(headlen +
+ NFDK_TX_MAX_DATA_PER_DESC -
+ NFDK_TX_MAX_DATA_PER_HEAD,
+ NFDK_TX_MAX_DATA_PER_DESC);
+}
+
+static int
+nfp_net_nfdk_tx_maybe_close_block(struct nfp_net_txq *txq, struct rte_mbuf *pkt)
+{
+ unsigned int n_descs, wr_p, i, nop_slots;
+ struct rte_mbuf *pkt_temp;
+
+ pkt_temp = pkt;
+ n_descs = nfp_net_nfdk_headlen_to_segs(pkt_temp->data_len);
+ while (pkt_temp->next) {
+ pkt_temp = pkt_temp->next;
+ n_descs += DIV_ROUND_UP(pkt_temp->data_len, NFDK_TX_MAX_DATA_PER_DESC);
+ }
+
+ if (unlikely(n_descs > NFDK_TX_DESC_GATHER_MAX))
+ return -EINVAL;
+
+ /* Under count by 1 (don't count meta) for the round down to work out */
+ n_descs += !!(pkt->ol_flags & RTE_MBUF_F_TX_TCP_SEG);
+
+ if (round_down(txq->wr_p, NFDK_TX_DESC_BLOCK_CNT) !=
+ round_down(txq->wr_p + n_descs, NFDK_TX_DESC_BLOCK_CNT))
+ goto close_block;
+
+ if ((uint32_t)txq->data_pending + pkt->pkt_len > NFDK_TX_MAX_DATA_PER_BLOCK)
+ goto close_block;
+
+ return 0;
+
+close_block:
+ wr_p = txq->wr_p;
+ nop_slots = D_BLOCK_CPL(wr_p);
+
+ memset(&txq->ktxds[wr_p], 0, nop_slots * sizeof(struct nfp_net_nfdk_tx_desc));
+ for (i = wr_p; i < nop_slots + wr_p; i++) {
+ if (txq->txbufs[i].mbuf) {
+ rte_pktmbuf_free_seg(txq->txbufs[i].mbuf);
+ txq->txbufs[i].mbuf = NULL;
+ }
+ }
+ txq->data_pending = 0;
+ txq->wr_p = D_IDX(txq, txq->wr_p + nop_slots);
+
+ return nop_slots;
+}
+
+static void
+nfp_net_nfdk_set_meta_data(struct rte_mbuf *pkt,
+ struct nfp_net_txq *txq,
+ uint64_t *metadata)
+{
+ char *meta;
+ uint8_t layer = 0;
+ uint32_t meta_type;
+ struct nfp_net_hw *hw;
+ uint32_t header_offset;
+ uint8_t vlan_layer = 0;
+ struct nfp_net_meta_raw meta_data;
+
+ memset(&meta_data, 0, sizeof(meta_data));
+ hw = txq->hw;
+
+ if ((pkt->ol_flags & RTE_MBUF_F_TX_VLAN) != 0 &&
+ (hw->ctrl & NFP_NET_CFG_CTRL_TXVLAN_V2) != 0) {
+ if (meta_data.length == 0)
+ meta_data.length = NFP_NET_META_HEADER_SIZE;
+ meta_data.length += NFP_NET_META_FIELD_SIZE;
+ meta_data.header |= NFP_NET_META_VLAN;
+ }
+
+ if (meta_data.length == 0)
+ return;
+
+ meta_type = meta_data.header;
+ header_offset = meta_type << NFP_NET_META_NFDK_LENGTH;
+ meta_data.header = header_offset | meta_data.length;
+ meta_data.header = rte_cpu_to_be_32(meta_data.header);
+ meta = rte_pktmbuf_prepend(pkt, meta_data.length);
+ memcpy(meta, &meta_data.header, sizeof(meta_data.header));
+ meta += NFP_NET_META_HEADER_SIZE;
+
+ for (; meta_type != 0; meta_type >>= NFP_NET_META_FIELD_SIZE, layer++,
+ meta += NFP_NET_META_FIELD_SIZE) {
+ switch (meta_type & NFP_NET_META_FIELD_MASK) {
+ case NFP_NET_META_VLAN:
+ if (vlan_layer > 0) {
+ PMD_DRV_LOG(ERR, "At most 1 layers of vlan is supported");
+ return;
+ }
+ nfp_net_set_meta_vlan(&meta_data, pkt, layer);
+ vlan_layer++;
+ break;
+ default:
+ PMD_DRV_LOG(ERR, "The metadata type not supported");
+ return;
+ }
+
+ memcpy(meta, &meta_data.data[layer], sizeof(meta_data.data[layer]));
+ }
+
+ *metadata = NFDK_DESC_TX_CHAIN_META;
+}
+
+uint16_t
+nfp_net_nfdk_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
+{
+ uint32_t buf_idx;
+ uint64_t dma_addr;
+ uint16_t free_descs;
+ uint32_t npkts = 0;
+ uint64_t metadata = 0;
+ uint16_t issued_descs = 0;
+ struct nfp_net_txq *txq;
+ struct nfp_net_hw *hw;
+ struct nfp_net_nfdk_tx_desc *ktxds;
+ struct rte_mbuf *pkt, *temp_pkt;
+ struct rte_mbuf **lmbuf;
+
+ txq = tx_queue;
+ hw = txq->hw;
+
+ PMD_TX_LOG(DEBUG, "working for queue %u at pos %d and %u packets",
+ txq->qidx, txq->wr_p, nb_pkts);
+
+ if ((nfp_net_nfdk_free_tx_desc(txq) < NFDK_TX_DESC_PER_SIMPLE_PKT *
+ nb_pkts) || (nfp_net_nfdk_txq_full(txq)))
+ nfp_net_tx_free_bufs(txq);
+
+ free_descs = (uint16_t)nfp_net_nfdk_free_tx_desc(txq);
+ if (unlikely(free_descs == 0))
+ return 0;
+
+ PMD_TX_LOG(DEBUG, "queue: %u. Sending %u packets", txq->qidx, nb_pkts);
+ /* Sending packets */
+ while ((npkts < nb_pkts) && free_descs) {
+ uint32_t type, dma_len, dlen_type, tmp_dlen;
+ int nop_descs, used_descs;
+
+ pkt = *(tx_pkts + npkts);
+ nop_descs = nfp_net_nfdk_tx_maybe_close_block(txq, pkt);
+ if (nop_descs < 0)
+ goto xmit_end;
+
+ issued_descs += nop_descs;
+ ktxds = &txq->ktxds[txq->wr_p];
+ /* Grabbing the mbuf linked to the current descriptor */
+ buf_idx = txq->wr_p;
+ lmbuf = &txq->txbufs[buf_idx++].mbuf;
+ /* Warming the cache for releasing the mbuf later on */
+ RTE_MBUF_PREFETCH_TO_FREE(*lmbuf);
+
+ temp_pkt = pkt;
+ nfp_net_nfdk_set_meta_data(pkt, txq, &metadata);
+
+ if (unlikely(pkt->nb_segs > 1 &&
+ !(hw->cap & NFP_NET_CFG_CTRL_GATHER))) {
+ PMD_INIT_LOG(ERR, "Multisegment packet not supported");
+ goto xmit_end;
+ }
+
+ /*
+ * Checksum and VLAN flags just in the first descriptor for a
+ * multisegment packet, but TSO info needs to be in all of them.
+ */
+
+ dma_len = pkt->data_len;
+ if ((hw->cap & NFP_NET_CFG_CTRL_LSO_ANY) &&
+ (pkt->ol_flags & RTE_MBUF_F_TX_TCP_SEG)) {
+ type = NFDK_DESC_TX_TYPE_TSO;
+ } else if (pkt->next == NULL && dma_len <= NFDK_TX_MAX_DATA_PER_HEAD) {
+ type = NFDK_DESC_TX_TYPE_SIMPLE;
+ } else {
+ type = NFDK_DESC_TX_TYPE_GATHER;
+ }
+
+ /* Implicitly truncates to chunk in below logic */
+ dma_len -= 1;
+
+ /*
+ * We will do our best to pass as much data as we can in descriptor
+ * and we need to make sure the first descriptor includes whole
+ * head since there is limitation in firmware side. Sometimes the
+ * value of 'dma_len & NFDK_DESC_TX_DMA_LEN_HEAD' will be less
+ * than packet head len.
+ */
+ dlen_type = (dma_len > NFDK_DESC_TX_DMA_LEN_HEAD ?
+ NFDK_DESC_TX_DMA_LEN_HEAD : dma_len) |
+ (NFDK_DESC_TX_TYPE_HEAD & (type << 12));
+ ktxds->dma_len_type = rte_cpu_to_le_16(dlen_type);
+ dma_addr = rte_mbuf_data_iova(pkt);
+ PMD_TX_LOG(DEBUG, "Working with mbuf at dma address:"
+ "%" PRIx64 "", dma_addr);
+ ktxds->dma_addr_hi = rte_cpu_to_le_16(dma_addr >> 32);
+ ktxds->dma_addr_lo = rte_cpu_to_le_32(dma_addr & 0xffffffff);
+ ktxds++;
+
+ /*
+ * Preserve the original dlen_type, this way below the EOP logic
+ * can use dlen_type.
+ */
+ tmp_dlen = dlen_type & NFDK_DESC_TX_DMA_LEN_HEAD;
+ dma_len -= tmp_dlen;
+ dma_addr += tmp_dlen + 1;
+
+ /*
+ * The rest of the data (if any) will be in larger DMA descriptors
+ * and is handled with the dma_len loop.
+ */
+ while (pkt) {
+ if (*lmbuf)
+ rte_pktmbuf_free_seg(*lmbuf);
+ *lmbuf = pkt;
+ while (dma_len > 0) {
+ dma_len -= 1;
+ dlen_type = NFDK_DESC_TX_DMA_LEN & dma_len;
+
+ ktxds->dma_len_type = rte_cpu_to_le_16(dlen_type);
+ ktxds->dma_addr_hi = rte_cpu_to_le_16(dma_addr >> 32);
+ ktxds->dma_addr_lo = rte_cpu_to_le_32(dma_addr & 0xffffffff);
+ ktxds++;
+
+ dma_len -= dlen_type;
+ dma_addr += dlen_type + 1;
+ }
+
+ if (pkt->next == NULL)
+ break;
+
+ pkt = pkt->next;
+ dma_len = pkt->data_len;
+ dma_addr = rte_mbuf_data_iova(pkt);
+ PMD_TX_LOG(DEBUG, "Working with mbuf at dma address:"
+ "%" PRIx64 "", dma_addr);
+
+ lmbuf = &txq->txbufs[buf_idx++].mbuf;
+ }
+
+ (ktxds - 1)->dma_len_type = rte_cpu_to_le_16(dlen_type | NFDK_DESC_TX_EOP);
+
+ ktxds->raw = rte_cpu_to_le_64(nfp_net_nfdk_tx_cksum(txq, temp_pkt, metadata));
+ ktxds++;
+
+ if ((hw->cap & NFP_NET_CFG_CTRL_LSO_ANY) &&
+ (temp_pkt->ol_flags & RTE_MBUF_F_TX_TCP_SEG)) {
+ ktxds->raw = rte_cpu_to_le_64(nfp_net_nfdk_tx_tso(txq, temp_pkt));
+ ktxds++;
+ }
+
+ used_descs = ktxds - txq->ktxds - txq->wr_p;
+ if (round_down(txq->wr_p, NFDK_TX_DESC_BLOCK_CNT) !=
+ round_down(txq->wr_p + used_descs - 1, NFDK_TX_DESC_BLOCK_CNT)) {
+ PMD_INIT_LOG(INFO, "Used descs cross block boundary");
+ goto xmit_end;
+ }
+
+ txq->wr_p = D_IDX(txq, txq->wr_p + used_descs);
+ if (txq->wr_p % NFDK_TX_DESC_BLOCK_CNT)
+ txq->data_pending += temp_pkt->pkt_len;
+ else
+ txq->data_pending = 0;
+
+ issued_descs += used_descs;
+ npkts++;
+ free_descs = (uint16_t)nfp_net_nfdk_free_tx_desc(txq);
+ }
+
+xmit_end:
+ /* Increment write pointers. Force memory write before we let HW know */
+ rte_wmb();
+ nfp_qcp_ptr_add(txq->qcp_q, NFP_QCP_WRITE_PTR, issued_descs);
+
+ return npkts;
+}
+
+int
+nfp_net_nfdk_tx_queue_setup(struct rte_eth_dev *dev,
+ uint16_t queue_idx,
+ uint16_t nb_desc,
+ unsigned int socket_id,
+ const struct rte_eth_txconf *tx_conf)
+{
+ int ret;
+ uint16_t min_tx_desc;
+ uint16_t max_tx_desc;
+ const struct rte_memzone *tz;
+ struct nfp_net_txq *txq;
+ uint16_t tx_free_thresh;
+ struct nfp_net_hw *hw;
+ uint32_t tx_desc_sz;
+
+ hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+
+ PMD_INIT_FUNC_TRACE();
+
+ ret = nfp_net_tx_desc_limits(hw, &min_tx_desc, &max_tx_desc);
+ if (ret != 0)
+ return ret;
+
+ /* Validating number of descriptors */
+ tx_desc_sz = nb_desc * sizeof(struct nfp_net_nfdk_tx_desc);
+ if ((NFDK_TX_DESC_PER_SIMPLE_PKT * tx_desc_sz) % NFP_ALIGN_RING_DESC != 0 ||
+ (NFDK_TX_DESC_PER_SIMPLE_PKT * nb_desc) % NFDK_TX_DESC_BLOCK_CNT != 0 ||
+ nb_desc > max_tx_desc || nb_desc < min_tx_desc) {
+ PMD_DRV_LOG(ERR, "Wrong nb_desc value");
+ return -EINVAL;
+ }
+
+ tx_free_thresh = (uint16_t)((tx_conf->tx_free_thresh) ?
+ tx_conf->tx_free_thresh :
+ DEFAULT_TX_FREE_THRESH);
+
+ if (tx_free_thresh > (nb_desc)) {
+ PMD_DRV_LOG(ERR,
+ "tx_free_thresh must be less than the number of TX "
+ "descriptors. (tx_free_thresh=%u port=%d "
+ "queue=%d)", (unsigned int)tx_free_thresh,
+ dev->data->port_id, (int)queue_idx);
+ return -(EINVAL);
+ }
+
+ /*
+ * Free memory prior to re-allocation if needed. This is the case after
+ * calling nfp_net_stop
+ */
+ if (dev->data->tx_queues[queue_idx]) {
+ PMD_TX_LOG(DEBUG, "Freeing memory prior to re-allocation %d",
+ queue_idx);
+ nfp_net_tx_queue_release(dev, queue_idx);
+ dev->data->tx_queues[queue_idx] = NULL;
+ }
+
+ /* Allocating tx queue data structure */
+ txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct nfp_net_txq),
+ RTE_CACHE_LINE_SIZE, socket_id);
+ if (txq == NULL) {
+ PMD_DRV_LOG(ERR, "Error allocating tx dma");
+ return -ENOMEM;
+ }
+
+ /*
+ * Allocate TX ring hardware descriptors. A memzone large enough to
+ * handle the maximum ring size is allocated in order to allow for
+ * resizing in later calls to the queue setup function.
+ */
+ tz = rte_eth_dma_zone_reserve(dev, "tx_ring", queue_idx,
+ sizeof(struct nfp_net_nfdk_tx_desc) *
+ NFDK_TX_DESC_PER_SIMPLE_PKT *
+ max_tx_desc, NFP_MEMZONE_ALIGN,
+ socket_id);
+ if (tz == NULL) {
+ PMD_DRV_LOG(ERR, "Error allocating tx dma");
+ nfp_net_tx_queue_release(dev, queue_idx);
+ return -ENOMEM;
+ }
+
+ txq->tx_count = nb_desc * NFDK_TX_DESC_PER_SIMPLE_PKT;
+ txq->tx_free_thresh = tx_free_thresh;
+ txq->tx_pthresh = tx_conf->tx_thresh.pthresh;
+ txq->tx_hthresh = tx_conf->tx_thresh.hthresh;
+ txq->tx_wthresh = tx_conf->tx_thresh.wthresh;
+
+ /* queue mapping based on firmware configuration */
+ txq->qidx = queue_idx;
+ txq->tx_qcidx = queue_idx * hw->stride_tx;
+ txq->qcp_q = hw->tx_bar + NFP_QCP_QUEUE_OFF(txq->tx_qcidx);
+
+ txq->port_id = dev->data->port_id;
+
+ /* Saving physical and virtual addresses for the TX ring */
+ txq->dma = (uint64_t)tz->iova;
+ txq->ktxds = (struct nfp_net_nfdk_tx_desc *)tz->addr;
+
+ /* mbuf pointers array for referencing mbufs linked to TX descriptors */
+ txq->txbufs = rte_zmalloc_socket("txq->txbufs",
+ sizeof(*txq->txbufs) * txq->tx_count,
+ RTE_CACHE_LINE_SIZE, socket_id);
+
+ if (txq->txbufs == NULL) {
+ nfp_net_tx_queue_release(dev, queue_idx);
+ return -ENOMEM;
+ }
+ PMD_TX_LOG(DEBUG, "txbufs=%p hw_ring=%p dma_addr=0x%" PRIx64,
+ txq->txbufs, txq->ktxds, (unsigned long)txq->dma);
+
+ nfp_net_reset_tx_queue(txq);
+
+ dev->data->tx_queues[queue_idx] = txq;
+ txq->hw = hw;
+ /*
+ * Telling the HW about the physical address of the TX ring and number
+ * of descriptors in log2 format
+ */
+ nn_cfg_writeq(hw, NFP_NET_CFG_TXR_ADDR(queue_idx), txq->dma);
+ nn_cfg_writeb(hw, NFP_NET_CFG_TXR_SZ(queue_idx), rte_log2_u32(txq->tx_count));
+
+ return 0;
+}
diff --git a/drivers/net/nfp/nfp_common.c b/drivers/net/nfp/nfp_common.c
index ca334d56ab..f17632a364 100644
--- a/drivers/net/nfp/nfp_common.c
+++ b/drivers/net/nfp/nfp_common.c
@@ -45,6 +45,7 @@
#include "nfp_cpp_bridge.h"
#include "nfd3/nfp_nfd3.h"
+#include "nfdk/nfp_nfdk.h"
#include <sys/types.h>
#include <sys/socket.h>
diff --git a/drivers/net/nfp/nfp_ethdev.c b/drivers/net/nfp/nfp_ethdev.c
index f212a4a10e..c2684ec268 100644
--- a/drivers/net/nfp/nfp_ethdev.c
+++ b/drivers/net/nfp/nfp_ethdev.c
@@ -39,6 +39,7 @@
#include "nfp_cpp_bridge.h"
#include "nfd3/nfp_nfd3.h"
+#include "nfdk/nfp_nfdk.h"
#include "flower/nfp_flower.h"
static int
diff --git a/drivers/net/nfp/nfp_ethdev_vf.c b/drivers/net/nfp/nfp_ethdev_vf.c
index 80a8983deb..5fd2dc11a3 100644
--- a/drivers/net/nfp/nfp_ethdev_vf.c
+++ b/drivers/net/nfp/nfp_ethdev_vf.c
@@ -23,6 +23,7 @@
#include "nfp_rxtx.h"
#include "nfp_logs.h"
#include "nfd3/nfp_nfd3.h"
+#include "nfdk/nfp_nfdk.h"
static void
nfp_netvf_read_mac(struct nfp_net_hw *hw)
diff --git a/drivers/net/nfp/nfp_rxtx.c b/drivers/net/nfp/nfp_rxtx.c
index 76021b64ee..9eaa0b89c1 100644
--- a/drivers/net/nfp/nfp_rxtx.c
+++ b/drivers/net/nfp/nfp_rxtx.c
@@ -21,6 +21,7 @@
#include "nfp_rxtx.h"
#include "nfp_logs.h"
#include "nfd3/nfp_nfd3.h"
+#include "nfdk/nfp_nfdk.h"
#include "nfpcore/nfp_mip.h"
#include "nfpcore/nfp_rtsym.h"
@@ -764,187 +765,6 @@ nfp_net_set_meta_vlan(struct nfp_net_meta_raw *meta_data,
meta_data->data[layer] = rte_cpu_to_be_32(tpid << 16 | vlan_tci);
}
-static void
-nfp_net_nfdk_set_meta_data(struct rte_mbuf *pkt,
- struct nfp_net_txq *txq,
- uint64_t *metadata)
-{
- char *meta;
- uint8_t layer = 0;
- uint32_t meta_type;
- struct nfp_net_hw *hw;
- uint32_t header_offset;
- uint8_t vlan_layer = 0;
- struct nfp_net_meta_raw meta_data;
-
- memset(&meta_data, 0, sizeof(meta_data));
- hw = txq->hw;
-
- if ((pkt->ol_flags & RTE_MBUF_F_TX_VLAN) != 0 &&
- (hw->ctrl & NFP_NET_CFG_CTRL_TXVLAN_V2) != 0) {
- if (meta_data.length == 0)
- meta_data.length = NFP_NET_META_HEADER_SIZE;
- meta_data.length += NFP_NET_META_FIELD_SIZE;
- meta_data.header |= NFP_NET_META_VLAN;
- }
-
- if (meta_data.length == 0)
- return;
-
- meta_type = meta_data.header;
- header_offset = meta_type << NFP_NET_META_NFDK_LENGTH;
- meta_data.header = header_offset | meta_data.length;
- meta_data.header = rte_cpu_to_be_32(meta_data.header);
- meta = rte_pktmbuf_prepend(pkt, meta_data.length);
- memcpy(meta, &meta_data.header, sizeof(meta_data.header));
- meta += NFP_NET_META_HEADER_SIZE;
-
- for (; meta_type != 0; meta_type >>= NFP_NET_META_FIELD_SIZE, layer++,
- meta += NFP_NET_META_FIELD_SIZE) {
- switch (meta_type & NFP_NET_META_FIELD_MASK) {
- case NFP_NET_META_VLAN:
- if (vlan_layer > 0) {
- PMD_DRV_LOG(ERR, "At most 1 layers of vlan is supported");
- return;
- }
- nfp_net_set_meta_vlan(&meta_data, pkt, layer);
- vlan_layer++;
- break;
- default:
- PMD_DRV_LOG(ERR, "The metadata type not supported");
- return;
- }
-
- memcpy(meta, &meta_data.data[layer], sizeof(meta_data.data[layer]));
- }
-
- *metadata = NFDK_DESC_TX_CHAIN_META;
-}
-
-static int
-nfp_net_nfdk_tx_queue_setup(struct rte_eth_dev *dev,
- uint16_t queue_idx,
- uint16_t nb_desc,
- unsigned int socket_id,
- const struct rte_eth_txconf *tx_conf)
-{
- int ret;
- uint16_t min_tx_desc;
- uint16_t max_tx_desc;
- const struct rte_memzone *tz;
- struct nfp_net_txq *txq;
- uint16_t tx_free_thresh;
- struct nfp_net_hw *hw;
- uint32_t tx_desc_sz;
-
- hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
-
- PMD_INIT_FUNC_TRACE();
-
- ret = nfp_net_tx_desc_limits(hw, &min_tx_desc, &max_tx_desc);
- if (ret != 0)
- return ret;
-
- /* Validating number of descriptors */
- tx_desc_sz = nb_desc * sizeof(struct nfp_net_nfdk_tx_desc);
- if ((NFDK_TX_DESC_PER_SIMPLE_PKT * tx_desc_sz) % NFP_ALIGN_RING_DESC != 0 ||
- (NFDK_TX_DESC_PER_SIMPLE_PKT * nb_desc) % NFDK_TX_DESC_BLOCK_CNT != 0 ||
- nb_desc > max_tx_desc || nb_desc < min_tx_desc) {
- PMD_DRV_LOG(ERR, "Wrong nb_desc value");
- return -EINVAL;
- }
-
- tx_free_thresh = (uint16_t)((tx_conf->tx_free_thresh) ?
- tx_conf->tx_free_thresh :
- DEFAULT_TX_FREE_THRESH);
-
- if (tx_free_thresh > (nb_desc)) {
- PMD_DRV_LOG(ERR,
- "tx_free_thresh must be less than the number of TX "
- "descriptors. (tx_free_thresh=%u port=%d "
- "queue=%d)", (unsigned int)tx_free_thresh,
- dev->data->port_id, (int)queue_idx);
- return -(EINVAL);
- }
-
- /*
- * Free memory prior to re-allocation if needed. This is the case after
- * calling nfp_net_stop
- */
- if (dev->data->tx_queues[queue_idx]) {
- PMD_TX_LOG(DEBUG, "Freeing memory prior to re-allocation %d",
- queue_idx);
- nfp_net_tx_queue_release(dev, queue_idx);
- dev->data->tx_queues[queue_idx] = NULL;
- }
-
- /* Allocating tx queue data structure */
- txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct nfp_net_txq),
- RTE_CACHE_LINE_SIZE, socket_id);
- if (txq == NULL) {
- PMD_DRV_LOG(ERR, "Error allocating tx dma");
- return -ENOMEM;
- }
-
- /*
- * Allocate TX ring hardware descriptors. A memzone large enough to
- * handle the maximum ring size is allocated in order to allow for
- * resizing in later calls to the queue setup function.
- */
- tz = rte_eth_dma_zone_reserve(dev, "tx_ring", queue_idx,
- sizeof(struct nfp_net_nfdk_tx_desc) *
- NFDK_TX_DESC_PER_SIMPLE_PKT *
- max_tx_desc, NFP_MEMZONE_ALIGN,
- socket_id);
- if (tz == NULL) {
- PMD_DRV_LOG(ERR, "Error allocating tx dma");
- nfp_net_tx_queue_release(dev, queue_idx);
- return -ENOMEM;
- }
-
- txq->tx_count = nb_desc * NFDK_TX_DESC_PER_SIMPLE_PKT;
- txq->tx_free_thresh = tx_free_thresh;
- txq->tx_pthresh = tx_conf->tx_thresh.pthresh;
- txq->tx_hthresh = tx_conf->tx_thresh.hthresh;
- txq->tx_wthresh = tx_conf->tx_thresh.wthresh;
-
- /* queue mapping based on firmware configuration */
- txq->qidx = queue_idx;
- txq->tx_qcidx = queue_idx * hw->stride_tx;
- txq->qcp_q = hw->tx_bar + NFP_QCP_QUEUE_OFF(txq->tx_qcidx);
-
- txq->port_id = dev->data->port_id;
-
- /* Saving physical and virtual addresses for the TX ring */
- txq->dma = (uint64_t)tz->iova;
- txq->ktxds = (struct nfp_net_nfdk_tx_desc *)tz->addr;
-
- /* mbuf pointers array for referencing mbufs linked to TX descriptors */
- txq->txbufs = rte_zmalloc_socket("txq->txbufs",
- sizeof(*txq->txbufs) * txq->tx_count,
- RTE_CACHE_LINE_SIZE, socket_id);
-
- if (txq->txbufs == NULL) {
- nfp_net_tx_queue_release(dev, queue_idx);
- return -ENOMEM;
- }
- PMD_TX_LOG(DEBUG, "txbufs=%p hw_ring=%p dma_addr=0x%" PRIx64,
- txq->txbufs, txq->ktxds, (unsigned long)txq->dma);
-
- nfp_net_reset_tx_queue(txq);
-
- dev->data->tx_queues[queue_idx] = txq;
- txq->hw = hw;
- /*
- * Telling the HW about the physical address of the TX ring and number
- * of descriptors in log2 format
- */
- nn_cfg_writeq(hw, NFP_NET_CFG_TXR_ADDR(queue_idx), txq->dma);
- nn_cfg_writeb(hw, NFP_NET_CFG_TXR_SZ(queue_idx), rte_log2_u32(txq->tx_count));
-
- return 0;
-}
-
int
nfp_net_tx_queue_setup(struct rte_eth_dev *dev,
uint16_t queue_idx,
@@ -973,328 +793,3 @@ nfp_net_tx_queue_setup(struct rte_eth_dev *dev,
return -EINVAL;
}
}
-
-static inline uint32_t
-nfp_net_nfdk_free_tx_desc(struct nfp_net_txq *txq)
-{
- uint32_t free_desc;
-
- if (txq->wr_p >= txq->rd_p)
- free_desc = txq->tx_count - (txq->wr_p - txq->rd_p);
- else
- free_desc = txq->rd_p - txq->wr_p;
-
- return (free_desc > NFDK_TX_DESC_STOP_CNT) ?
- (free_desc - NFDK_TX_DESC_STOP_CNT) : 0;
-}
-
-/*
- * nfp_net_nfdk_txq_full() - Check if the TX queue free descriptors
- * is below tx_free_threshold for firmware of nfdk
- *
- * @txq: TX queue to check
- *
- * This function uses the host copy* of read/write pointers.
- */
-static inline uint32_t
-nfp_net_nfdk_txq_full(struct nfp_net_txq *txq)
-{
- return (nfp_net_nfdk_free_tx_desc(txq) < txq->tx_free_thresh);
-}
-
-static inline int
-nfp_net_nfdk_headlen_to_segs(unsigned int headlen)
-{
- return DIV_ROUND_UP(headlen +
- NFDK_TX_MAX_DATA_PER_DESC -
- NFDK_TX_MAX_DATA_PER_HEAD,
- NFDK_TX_MAX_DATA_PER_DESC);
-}
-
-static int
-nfp_net_nfdk_tx_maybe_close_block(struct nfp_net_txq *txq, struct rte_mbuf *pkt)
-{
- unsigned int n_descs, wr_p, i, nop_slots;
- struct rte_mbuf *pkt_temp;
-
- pkt_temp = pkt;
- n_descs = nfp_net_nfdk_headlen_to_segs(pkt_temp->data_len);
- while (pkt_temp->next) {
- pkt_temp = pkt_temp->next;
- n_descs += DIV_ROUND_UP(pkt_temp->data_len, NFDK_TX_MAX_DATA_PER_DESC);
- }
-
- if (unlikely(n_descs > NFDK_TX_DESC_GATHER_MAX))
- return -EINVAL;
-
- /* Under count by 1 (don't count meta) for the round down to work out */
- n_descs += !!(pkt->ol_flags & RTE_MBUF_F_TX_TCP_SEG);
-
- if (round_down(txq->wr_p, NFDK_TX_DESC_BLOCK_CNT) !=
- round_down(txq->wr_p + n_descs, NFDK_TX_DESC_BLOCK_CNT))
- goto close_block;
-
- if ((uint32_t)txq->data_pending + pkt->pkt_len > NFDK_TX_MAX_DATA_PER_BLOCK)
- goto close_block;
-
- return 0;
-
-close_block:
- wr_p = txq->wr_p;
- nop_slots = D_BLOCK_CPL(wr_p);
-
- memset(&txq->ktxds[wr_p], 0, nop_slots * sizeof(struct nfp_net_nfdk_tx_desc));
- for (i = wr_p; i < nop_slots + wr_p; i++) {
- if (txq->txbufs[i].mbuf) {
- rte_pktmbuf_free_seg(txq->txbufs[i].mbuf);
- txq->txbufs[i].mbuf = NULL;
- }
- }
- txq->data_pending = 0;
- txq->wr_p = D_IDX(txq, txq->wr_p + nop_slots);
-
- return nop_slots;
-}
-
-/* nfp_net_nfdk_tx_cksum() - Set TX CSUM offload flags in TX descriptor of nfdk */
-static inline uint64_t
-nfp_net_nfdk_tx_cksum(struct nfp_net_txq *txq, struct rte_mbuf *mb,
- uint64_t flags)
-{
- uint64_t ol_flags;
- struct nfp_net_hw *hw = txq->hw;
-
- if ((hw->cap & NFP_NET_CFG_CTRL_TXCSUM) == 0)
- return flags;
-
- ol_flags = mb->ol_flags;
-
- /* Set TCP csum offload if TSO enabled. */
- if (ol_flags & RTE_MBUF_F_TX_TCP_SEG)
- flags |= NFDK_DESC_TX_L4_CSUM;
-
- if (ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK)
- flags |= NFDK_DESC_TX_ENCAP;
-
- /* IPv6 does not need checksum */
- if (ol_flags & RTE_MBUF_F_TX_IP_CKSUM)
- flags |= NFDK_DESC_TX_L3_CSUM;
-
- if (ol_flags & RTE_MBUF_F_TX_L4_MASK)
- flags |= NFDK_DESC_TX_L4_CSUM;
-
- return flags;
-}
-
-/* nfp_net_nfdk_tx_tso() - Set TX descriptor for TSO of nfdk */
-static inline uint64_t
-nfp_net_nfdk_tx_tso(struct nfp_net_txq *txq, struct rte_mbuf *mb)
-{
- uint64_t ol_flags;
- struct nfp_net_nfdk_tx_desc txd;
- struct nfp_net_hw *hw = txq->hw;
-
- if ((hw->cap & NFP_NET_CFG_CTRL_LSO_ANY) == 0)
- goto clean_txd;
-
- ol_flags = mb->ol_flags;
-
- if ((ol_flags & RTE_MBUF_F_TX_TCP_SEG) == 0)
- goto clean_txd;
-
- txd.l3_offset = mb->l2_len;
- txd.l4_offset = mb->l2_len + mb->l3_len;
- txd.lso_meta_res = 0;
- txd.mss = rte_cpu_to_le_16(mb->tso_segsz);
- txd.lso_hdrlen = mb->l2_len + mb->l3_len + mb->l4_len;
- txd.lso_totsegs = (mb->pkt_len + mb->tso_segsz) / mb->tso_segsz;
-
- if (ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) {
- txd.l3_offset += mb->outer_l2_len + mb->outer_l3_len;
- txd.l4_offset += mb->outer_l2_len + mb->outer_l3_len;
- txd.lso_hdrlen += mb->outer_l2_len + mb->outer_l3_len;
- }
-
- return txd.raw;
-
-clean_txd:
- txd.l3_offset = 0;
- txd.l4_offset = 0;
- txd.lso_hdrlen = 0;
- txd.mss = 0;
- txd.lso_totsegs = 0;
- txd.lso_meta_res = 0;
-
- return txd.raw;
-}
-
-uint16_t
-nfp_net_nfdk_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
-{
- uint32_t buf_idx;
- uint64_t dma_addr;
- uint16_t free_descs;
- uint32_t npkts = 0;
- uint64_t metadata = 0;
- uint16_t issued_descs = 0;
- struct nfp_net_txq *txq;
- struct nfp_net_hw *hw;
- struct nfp_net_nfdk_tx_desc *ktxds;
- struct rte_mbuf *pkt, *temp_pkt;
- struct rte_mbuf **lmbuf;
-
- txq = tx_queue;
- hw = txq->hw;
-
- PMD_TX_LOG(DEBUG, "working for queue %u at pos %d and %u packets",
- txq->qidx, txq->wr_p, nb_pkts);
-
- if ((nfp_net_nfdk_free_tx_desc(txq) < NFDK_TX_DESC_PER_SIMPLE_PKT *
- nb_pkts) || (nfp_net_nfdk_txq_full(txq)))
- nfp_net_tx_free_bufs(txq);
-
- free_descs = (uint16_t)nfp_net_nfdk_free_tx_desc(txq);
- if (unlikely(free_descs == 0))
- return 0;
-
- PMD_TX_LOG(DEBUG, "queue: %u. Sending %u packets", txq->qidx, nb_pkts);
- /* Sending packets */
- while ((npkts < nb_pkts) && free_descs) {
- uint32_t type, dma_len, dlen_type, tmp_dlen;
- int nop_descs, used_descs;
-
- pkt = *(tx_pkts + npkts);
- nop_descs = nfp_net_nfdk_tx_maybe_close_block(txq, pkt);
- if (nop_descs < 0)
- goto xmit_end;
-
- issued_descs += nop_descs;
- ktxds = &txq->ktxds[txq->wr_p];
- /* Grabbing the mbuf linked to the current descriptor */
- buf_idx = txq->wr_p;
- lmbuf = &txq->txbufs[buf_idx++].mbuf;
- /* Warming the cache for releasing the mbuf later on */
- RTE_MBUF_PREFETCH_TO_FREE(*lmbuf);
-
- temp_pkt = pkt;
- nfp_net_nfdk_set_meta_data(pkt, txq, &metadata);
-
- if (unlikely(pkt->nb_segs > 1 &&
- !(hw->cap & NFP_NET_CFG_CTRL_GATHER))) {
- PMD_INIT_LOG(ERR, "Multisegment packet not supported");
- goto xmit_end;
- }
-
- /*
- * Checksum and VLAN flags just in the first descriptor for a
- * multisegment packet, but TSO info needs to be in all of them.
- */
-
- dma_len = pkt->data_len;
- if ((hw->cap & NFP_NET_CFG_CTRL_LSO_ANY) &&
- (pkt->ol_flags & RTE_MBUF_F_TX_TCP_SEG)) {
- type = NFDK_DESC_TX_TYPE_TSO;
- } else if (pkt->next == NULL && dma_len <= NFDK_TX_MAX_DATA_PER_HEAD) {
- type = NFDK_DESC_TX_TYPE_SIMPLE;
- } else {
- type = NFDK_DESC_TX_TYPE_GATHER;
- }
-
- /* Implicitly truncates to chunk in below logic */
- dma_len -= 1;
-
- /*
- * We will do our best to pass as much data as we can in descriptor
- * and we need to make sure the first descriptor includes whole
- * head since there is limitation in firmware side. Sometimes the
- * value of 'dma_len & NFDK_DESC_TX_DMA_LEN_HEAD' will be less
- * than packet head len.
- */
- dlen_type = (dma_len > NFDK_DESC_TX_DMA_LEN_HEAD ?
- NFDK_DESC_TX_DMA_LEN_HEAD : dma_len) |
- (NFDK_DESC_TX_TYPE_HEAD & (type << 12));
- ktxds->dma_len_type = rte_cpu_to_le_16(dlen_type);
- dma_addr = rte_mbuf_data_iova(pkt);
- PMD_TX_LOG(DEBUG, "Working with mbuf at dma address:"
- "%" PRIx64 "", dma_addr);
- ktxds->dma_addr_hi = rte_cpu_to_le_16(dma_addr >> 32);
- ktxds->dma_addr_lo = rte_cpu_to_le_32(dma_addr & 0xffffffff);
- ktxds++;
-
- /*
- * Preserve the original dlen_type, this way below the EOP logic
- * can use dlen_type.
- */
- tmp_dlen = dlen_type & NFDK_DESC_TX_DMA_LEN_HEAD;
- dma_len -= tmp_dlen;
- dma_addr += tmp_dlen + 1;
-
- /*
- * The rest of the data (if any) will be in larger DMA descriptors
- * and is handled with the dma_len loop.
- */
- while (pkt) {
- if (*lmbuf)
- rte_pktmbuf_free_seg(*lmbuf);
- *lmbuf = pkt;
- while (dma_len > 0) {
- dma_len -= 1;
- dlen_type = NFDK_DESC_TX_DMA_LEN & dma_len;
-
- ktxds->dma_len_type = rte_cpu_to_le_16(dlen_type);
- ktxds->dma_addr_hi = rte_cpu_to_le_16(dma_addr >> 32);
- ktxds->dma_addr_lo = rte_cpu_to_le_32(dma_addr & 0xffffffff);
- ktxds++;
-
- dma_len -= dlen_type;
- dma_addr += dlen_type + 1;
- }
-
- if (pkt->next == NULL)
- break;
-
- pkt = pkt->next;
- dma_len = pkt->data_len;
- dma_addr = rte_mbuf_data_iova(pkt);
- PMD_TX_LOG(DEBUG, "Working with mbuf at dma address:"
- "%" PRIx64 "", dma_addr);
-
- lmbuf = &txq->txbufs[buf_idx++].mbuf;
- }
-
- (ktxds - 1)->dma_len_type = rte_cpu_to_le_16(dlen_type | NFDK_DESC_TX_EOP);
-
- ktxds->raw = rte_cpu_to_le_64(nfp_net_nfdk_tx_cksum(txq, temp_pkt, metadata));
- ktxds++;
-
- if ((hw->cap & NFP_NET_CFG_CTRL_LSO_ANY) &&
- (temp_pkt->ol_flags & RTE_MBUF_F_TX_TCP_SEG)) {
- ktxds->raw = rte_cpu_to_le_64(nfp_net_nfdk_tx_tso(txq, temp_pkt));
- ktxds++;
- }
-
- used_descs = ktxds - txq->ktxds - txq->wr_p;
- if (round_down(txq->wr_p, NFDK_TX_DESC_BLOCK_CNT) !=
- round_down(txq->wr_p + used_descs - 1, NFDK_TX_DESC_BLOCK_CNT)) {
- PMD_INIT_LOG(INFO, "Used descs cross block boundary");
- goto xmit_end;
- }
-
- txq->wr_p = D_IDX(txq, txq->wr_p + used_descs);
- if (txq->wr_p % NFDK_TX_DESC_BLOCK_CNT)
- txq->data_pending += temp_pkt->pkt_len;
- else
- txq->data_pending = 0;
-
- issued_descs += used_descs;
- npkts++;
- free_descs = (uint16_t)nfp_net_nfdk_free_tx_desc(txq);
- }
-
-xmit_end:
- /* Increment write pointers. Force memory write before we let HW know */
- rte_wmb();
- nfp_qcp_ptr_add(txq->qcp_q, NFP_QCP_WRITE_PTR, issued_descs);
-
- return npkts;
-}
diff --git a/drivers/net/nfp/nfp_rxtx.h b/drivers/net/nfp/nfp_rxtx.h
index 6c81a98ae0..4d0c88529b 100644
--- a/drivers/net/nfp/nfp_rxtx.h
+++ b/drivers/net/nfp/nfp_rxtx.h
@@ -96,59 +96,7 @@ struct nfp_meta_parsed {
/* Descriptor alignment */
#define NFP_ALIGN_RING_DESC 128
-#define NFDK_TX_MAX_DATA_PER_HEAD 0x00001000
-#define NFDK_DESC_TX_DMA_LEN_HEAD 0x0fff
-#define NFDK_DESC_TX_TYPE_HEAD 0xf000
-#define NFDK_DESC_TX_DMA_LEN 0x3fff
-#define NFDK_TX_DESC_PER_SIMPLE_PKT 2
-#define NFDK_DESC_TX_TYPE_TSO 2
-#define NFDK_DESC_TX_TYPE_SIMPLE 8
-#define NFDK_DESC_TX_TYPE_GATHER 1
-#define NFDK_DESC_TX_EOP RTE_BIT32(14)
-#define NFDK_DESC_TX_CHAIN_META RTE_BIT32(3)
-#define NFDK_DESC_TX_ENCAP RTE_BIT32(2)
-#define NFDK_DESC_TX_L4_CSUM RTE_BIT32(1)
-#define NFDK_DESC_TX_L3_CSUM RTE_BIT32(0)
-
-#define NFDK_TX_MAX_DATA_PER_DESC 0x00004000
-#define NFDK_TX_DESC_GATHER_MAX 17
#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
-#define NFDK_TX_DESC_BLOCK_SZ 256
-#define NFDK_TX_DESC_BLOCK_CNT (NFDK_TX_DESC_BLOCK_SZ / \
- sizeof(struct nfp_net_nfdk_tx_desc))
-#define NFDK_TX_DESC_STOP_CNT (NFDK_TX_DESC_BLOCK_CNT * \
- NFDK_TX_DESC_PER_SIMPLE_PKT)
-#define NFDK_TX_MAX_DATA_PER_BLOCK 0x00010000
-#define D_BLOCK_CPL(idx) (NFDK_TX_DESC_BLOCK_CNT - \
- (idx) % NFDK_TX_DESC_BLOCK_CNT)
-#define D_IDX(ring, idx) ((idx) & ((ring)->tx_count - 1))
-
-struct nfp_net_nfdk_tx_desc {
- union {
- struct {
- __le16 dma_addr_hi; /* High bits of host buf address */
- __le16 dma_len_type; /* Length to DMA for this desc */
- __le32 dma_addr_lo; /* Low 32bit of host buf addr */
- };
-
- struct {
- __le16 mss; /* MSS to be used for LSO */
- uint8_t lso_hdrlen; /* LSO, TCP payload offset */
- uint8_t lso_totsegs; /* LSO, total segments */
- uint8_t l3_offset; /* L3 header offset */
- uint8_t l4_offset; /* L4 header offset */
- __le16 lso_meta_res; /* Rsvd bits in TSO metadata */
- };
-
- struct {
- uint8_t flags; /* TX Flags, see @NFDK_DESC_TX_* */
- uint8_t reserved[7]; /* meta byte placeholder */
- };
-
- __le32 vals[2];
- __le64 raw;
- };
-};
struct nfp_net_txq {
struct nfp_net_hw *hw; /* Backpointer to nfp_net structure */
@@ -396,9 +344,6 @@ int nfp_net_tx_queue_setup(struct rte_eth_dev *dev,
uint16_t nb_desc,
unsigned int socket_id,
const struct rte_eth_txconf *tx_conf);
-uint16_t nfp_net_nfdk_xmit_pkts(void *tx_queue,
- struct rte_mbuf **tx_pkts,
- uint16_t nb_pkts);
int nfp_net_tx_free_bufs(struct nfp_net_txq *txq);
void nfp_net_set_meta_vlan(struct nfp_net_meta_raw *meta_data,
struct rte_mbuf *pkt,
--
2.39.1
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 12/13] net/nfp: adjust the coding style for NFDk
2023-04-10 11:00 [PATCH 00/13] Sync the kernel driver logic Chaoyong He
` (10 preceding siblings ...)
2023-04-10 11:00 ` [PATCH 11/13] net/nfp: move NFDk logic to own source file Chaoyong He
@ 2023-04-10 11:00 ` Chaoyong He
2023-04-10 11:00 ` [PATCH 13/13] net/nfp: modify the logic of some NFDk function Chaoyong He
` (2 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Chaoyong He @ 2023-04-10 11:00 UTC (permalink / raw)
To: dev; +Cc: oss-drivers, niklas.soderlund, Chaoyong He
Adjust the coding style for NFDk struct and logics.
Delete some unneeded comment messages.
Signed-off-by: Chaoyong He <chaoyong.he@corigine.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund@corigine.com>
---
drivers/net/nfp/nfdk/nfp_nfdk.h | 69 +++++++-------
drivers/net/nfp/nfdk/nfp_nfdk_dp.c | 140 +++++++++++++++--------------
2 files changed, 103 insertions(+), 106 deletions(-)
diff --git a/drivers/net/nfp/nfdk/nfp_nfdk.h b/drivers/net/nfp/nfdk/nfp_nfdk.h
index 43e4d75432..9af9176eb7 100644
--- a/drivers/net/nfp/nfdk/nfp_nfdk.h
+++ b/drivers/net/nfp/nfdk/nfp_nfdk.h
@@ -43,27 +43,27 @@
struct nfp_net_nfdk_tx_desc {
union {
struct {
- __le16 dma_addr_hi; /* High bits of host buf address */
- __le16 dma_len_type; /* Length to DMA for this desc */
- __le32 dma_addr_lo; /* Low 32bit of host buf addr */
+ uint16_t dma_addr_hi; /* High bits of host buf address */
+ uint16_t dma_len_type; /* Length to DMA for this desc */
+ uint32_t dma_addr_lo; /* Low 32bit of host buf addr */
};
struct {
- __le16 mss; /* MSS to be used for LSO */
- uint8_t lso_hdrlen; /* LSO, TCP payload offset */
- uint8_t lso_totsegs; /* LSO, total segments */
- uint8_t l3_offset; /* L3 header offset */
- uint8_t l4_offset; /* L4 header offset */
- __le16 lso_meta_res; /* Rsvd bits in TSO metadata */
+ uint16_t mss; /* MSS to be used for LSO */
+ uint8_t lso_hdrlen; /* LSO, TCP payload offset */
+ uint8_t lso_totsegs; /* LSO, total segments */
+ uint8_t l3_offset; /* L3 header offset */
+ uint8_t l4_offset; /* L4 header offset */
+ uint16_t lso_meta_res; /* Rsvd bits in TSO metadata */
};
struct {
- uint8_t flags; /* TX Flags, see @NFDK_DESC_TX_* */
- uint8_t reserved[7]; /* meta byte placeholder */
+ uint8_t flags; /* TX Flags, see @NFDK_DESC_TX_* */
+ uint8_t reserved[7]; /* meta byte placeholder */
};
- __le32 vals[2];
- __le64 raw;
+ uint32_t vals[2];
+ uint64_t raw;
};
};
@@ -89,7 +89,7 @@ nfp_net_nfdk_free_tx_desc(struct nfp_net_txq *txq)
*
* This function uses the host copy* of read/write pointers.
*/
-static inline uint32_t
+static inline bool
nfp_net_nfdk_txq_full(struct nfp_net_txq *txq)
{
return (nfp_net_nfdk_free_tx_desc(txq) < txq->tx_free_thresh);
@@ -97,7 +97,8 @@ nfp_net_nfdk_txq_full(struct nfp_net_txq *txq)
/* nfp_net_nfdk_tx_cksum() - Set TX CSUM offload flags in TX descriptor of nfdk */
static inline uint64_t
-nfp_net_nfdk_tx_cksum(struct nfp_net_txq *txq, struct rte_mbuf *mb,
+nfp_net_nfdk_tx_cksum(struct nfp_net_txq *txq,
+ struct rte_mbuf *mb,
uint64_t flags)
{
uint64_t ol_flags;
@@ -109,17 +110,17 @@ nfp_net_nfdk_tx_cksum(struct nfp_net_txq *txq, struct rte_mbuf *mb,
ol_flags = mb->ol_flags;
/* Set TCP csum offload if TSO enabled. */
- if (ol_flags & RTE_MBUF_F_TX_TCP_SEG)
+ if ((ol_flags & RTE_MBUF_F_TX_TCP_SEG) != 0)
flags |= NFDK_DESC_TX_L4_CSUM;
- if (ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK)
+ if ((ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) != 0)
flags |= NFDK_DESC_TX_ENCAP;
/* IPv6 does not need checksum */
- if (ol_flags & RTE_MBUF_F_TX_IP_CKSUM)
+ if ((ol_flags & RTE_MBUF_F_TX_IP_CKSUM) != 0)
flags |= NFDK_DESC_TX_L3_CSUM;
- if (ol_flags & RTE_MBUF_F_TX_L4_MASK)
+ if ((ol_flags & RTE_MBUF_F_TX_L4_MASK) != 0)
flags |= NFDK_DESC_TX_L4_CSUM;
return flags;
@@ -127,19 +128,22 @@ nfp_net_nfdk_tx_cksum(struct nfp_net_txq *txq, struct rte_mbuf *mb,
/* nfp_net_nfdk_tx_tso() - Set TX descriptor for TSO of nfdk */
static inline uint64_t
-nfp_net_nfdk_tx_tso(struct nfp_net_txq *txq, struct rte_mbuf *mb)
+nfp_net_nfdk_tx_tso(struct nfp_net_txq *txq,
+ struct rte_mbuf *mb)
{
+ uint8_t outer_len;
uint64_t ol_flags;
struct nfp_net_nfdk_tx_desc txd;
struct nfp_net_hw *hw = txq->hw;
+ txd.raw = 0;
+
if ((hw->cap & NFP_NET_CFG_CTRL_LSO_ANY) == 0)
- goto clean_txd;
+ return txd.raw;
ol_flags = mb->ol_flags;
-
if ((ol_flags & RTE_MBUF_F_TX_TCP_SEG) == 0)
- goto clean_txd;
+ return txd.raw;
txd.l3_offset = mb->l2_len;
txd.l4_offset = mb->l2_len + mb->l3_len;
@@ -148,22 +152,13 @@ nfp_net_nfdk_tx_tso(struct nfp_net_txq *txq, struct rte_mbuf *mb)
txd.lso_hdrlen = mb->l2_len + mb->l3_len + mb->l4_len;
txd.lso_totsegs = (mb->pkt_len + mb->tso_segsz) / mb->tso_segsz;
- if (ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) {
- txd.l3_offset += mb->outer_l2_len + mb->outer_l3_len;
- txd.l4_offset += mb->outer_l2_len + mb->outer_l3_len;
- txd.lso_hdrlen += mb->outer_l2_len + mb->outer_l3_len;
+ if ((ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) != 0) {
+ outer_len = mb->outer_l2_len + mb->outer_l3_len;
+ txd.l3_offset += outer_len;
+ txd.l4_offset += outer_len;
+ txd.lso_hdrlen += outer_len;
}
- return txd.raw;
-
-clean_txd:
- txd.l3_offset = 0;
- txd.l4_offset = 0;
- txd.lso_hdrlen = 0;
- txd.mss = 0;
- txd.lso_totsegs = 0;
- txd.lso_meta_res = 0;
-
return txd.raw;
}
diff --git a/drivers/net/nfp/nfdk/nfp_nfdk_dp.c b/drivers/net/nfp/nfdk/nfp_nfdk_dp.c
index ec937c1f50..013f369b55 100644
--- a/drivers/net/nfp/nfdk/nfp_nfdk_dp.c
+++ b/drivers/net/nfp/nfdk/nfp_nfdk_dp.c
@@ -24,14 +24,18 @@ nfp_net_nfdk_headlen_to_segs(unsigned int headlen)
}
static int
-nfp_net_nfdk_tx_maybe_close_block(struct nfp_net_txq *txq, struct rte_mbuf *pkt)
+nfp_net_nfdk_tx_maybe_close_block(struct nfp_net_txq *txq,
+ struct rte_mbuf *pkt)
{
- unsigned int n_descs, wr_p, i, nop_slots;
+ uint32_t i;
+ uint32_t wr_p;
+ uint16_t n_descs;
+ uint32_t nop_slots;
struct rte_mbuf *pkt_temp;
pkt_temp = pkt;
n_descs = nfp_net_nfdk_headlen_to_segs(pkt_temp->data_len);
- while (pkt_temp->next) {
+ while (pkt_temp->next != NULL) {
pkt_temp = pkt_temp->next;
n_descs += DIV_ROUND_UP(pkt_temp->data_len, NFDK_TX_MAX_DATA_PER_DESC);
}
@@ -39,14 +43,14 @@ nfp_net_nfdk_tx_maybe_close_block(struct nfp_net_txq *txq, struct rte_mbuf *pkt)
if (unlikely(n_descs > NFDK_TX_DESC_GATHER_MAX))
return -EINVAL;
- /* Under count by 1 (don't count meta) for the round down to work out */
- n_descs += !!(pkt->ol_flags & RTE_MBUF_F_TX_TCP_SEG);
+ if ((pkt->ol_flags & RTE_MBUF_F_TX_TCP_SEG) != 0)
+ n_descs++;
if (round_down(txq->wr_p, NFDK_TX_DESC_BLOCK_CNT) !=
round_down(txq->wr_p + n_descs, NFDK_TX_DESC_BLOCK_CNT))
goto close_block;
- if ((uint32_t)txq->data_pending + pkt->pkt_len > NFDK_TX_MAX_DATA_PER_BLOCK)
+ if (txq->data_pending + pkt->pkt_len > NFDK_TX_MAX_DATA_PER_BLOCK)
goto close_block;
return 0;
@@ -126,39 +130,47 @@ nfp_net_nfdk_set_meta_data(struct rte_mbuf *pkt,
}
uint16_t
-nfp_net_nfdk_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
+nfp_net_nfdk_xmit_pkts(void *tx_queue,
+ struct rte_mbuf **tx_pkts,
+ uint16_t nb_pkts)
{
uint32_t buf_idx;
uint64_t dma_addr;
- uint16_t free_descs;
+ uint32_t free_descs;
uint32_t npkts = 0;
uint64_t metadata = 0;
- uint16_t issued_descs = 0;
- struct nfp_net_txq *txq;
+ struct rte_mbuf *pkt;
struct nfp_net_hw *hw;
- struct nfp_net_nfdk_tx_desc *ktxds;
- struct rte_mbuf *pkt, *temp_pkt;
struct rte_mbuf **lmbuf;
+ struct nfp_net_txq *txq;
+ uint32_t issued_descs = 0;
+ struct rte_mbuf *temp_pkt;
+ struct nfp_net_nfdk_tx_desc *ktxds;
txq = tx_queue;
hw = txq->hw;
PMD_TX_LOG(DEBUG, "working for queue %u at pos %d and %u packets",
- txq->qidx, txq->wr_p, nb_pkts);
+ txq->qidx, txq->wr_p, nb_pkts);
- if ((nfp_net_nfdk_free_tx_desc(txq) < NFDK_TX_DESC_PER_SIMPLE_PKT *
- nb_pkts) || (nfp_net_nfdk_txq_full(txq)))
+ if (nfp_net_nfdk_free_tx_desc(txq) < NFDK_TX_DESC_PER_SIMPLE_PKT * nb_pkts ||
+ nfp_net_nfdk_txq_full(txq))
nfp_net_tx_free_bufs(txq);
- free_descs = (uint16_t)nfp_net_nfdk_free_tx_desc(txq);
+ free_descs = nfp_net_nfdk_free_tx_desc(txq);
if (unlikely(free_descs == 0))
return 0;
PMD_TX_LOG(DEBUG, "queue: %u. Sending %u packets", txq->qidx, nb_pkts);
+
/* Sending packets */
- while ((npkts < nb_pkts) && free_descs) {
- uint32_t type, dma_len, dlen_type, tmp_dlen;
- int nop_descs, used_descs;
+ while (npkts < nb_pkts && free_descs > 0) {
+ int nop_descs;
+ uint32_t type;
+ uint32_t dma_len;
+ uint32_t tmp_dlen;
+ uint32_t dlen_type;
+ uint32_t used_descs;
pkt = *(tx_pkts + npkts);
nop_descs = nfp_net_nfdk_tx_maybe_close_block(txq, pkt);
@@ -167,6 +179,7 @@ nfp_net_nfdk_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pk
issued_descs += nop_descs;
ktxds = &txq->ktxds[txq->wr_p];
+
/* Grabbing the mbuf linked to the current descriptor */
buf_idx = txq->wr_p;
lmbuf = &txq->txbufs[buf_idx++].mbuf;
@@ -177,8 +190,8 @@ nfp_net_nfdk_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pk
nfp_net_nfdk_set_meta_data(pkt, txq, &metadata);
if (unlikely(pkt->nb_segs > 1 &&
- !(hw->cap & NFP_NET_CFG_CTRL_GATHER))) {
- PMD_INIT_LOG(ERR, "Multisegment packet not supported");
+ (hw->cap & NFP_NET_CFG_CTRL_GATHER) == 0)) {
+ PMD_TX_LOG(ERR, "Multisegment packet not supported");
goto xmit_end;
}
@@ -186,10 +199,9 @@ nfp_net_nfdk_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pk
* Checksum and VLAN flags just in the first descriptor for a
* multisegment packet, but TSO info needs to be in all of them.
*/
-
dma_len = pkt->data_len;
- if ((hw->cap & NFP_NET_CFG_CTRL_LSO_ANY) &&
- (pkt->ol_flags & RTE_MBUF_F_TX_TCP_SEG)) {
+ if ((hw->cap & NFP_NET_CFG_CTRL_LSO_ANY) != 0 &&
+ (pkt->ol_flags & RTE_MBUF_F_TX_TCP_SEG) != 0) {
type = NFDK_DESC_TX_TYPE_TSO;
} else if (pkt->next == NULL && dma_len <= NFDK_TX_MAX_DATA_PER_HEAD) {
type = NFDK_DESC_TX_TYPE_SIMPLE;
@@ -207,13 +219,11 @@ nfp_net_nfdk_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pk
* value of 'dma_len & NFDK_DESC_TX_DMA_LEN_HEAD' will be less
* than packet head len.
*/
- dlen_type = (dma_len > NFDK_DESC_TX_DMA_LEN_HEAD ?
- NFDK_DESC_TX_DMA_LEN_HEAD : dma_len) |
- (NFDK_DESC_TX_TYPE_HEAD & (type << 12));
+ if (dma_len > NFDK_DESC_TX_DMA_LEN_HEAD)
+ dma_len = NFDK_DESC_TX_DMA_LEN_HEAD;
+ dlen_type = dma_len | (NFDK_DESC_TX_TYPE_HEAD & (type << 12));
ktxds->dma_len_type = rte_cpu_to_le_16(dlen_type);
dma_addr = rte_mbuf_data_iova(pkt);
- PMD_TX_LOG(DEBUG, "Working with mbuf at dma address:"
- "%" PRIx64 "", dma_addr);
ktxds->dma_addr_hi = rte_cpu_to_le_16(dma_addr >> 32);
ktxds->dma_addr_lo = rte_cpu_to_le_32(dma_addr & 0xffffffff);
ktxds++;
@@ -230,8 +240,8 @@ nfp_net_nfdk_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pk
* The rest of the data (if any) will be in larger DMA descriptors
* and is handled with the dma_len loop.
*/
- while (pkt) {
- if (*lmbuf)
+ while (pkt != NULL) {
+ if (*lmbuf != NULL)
rte_pktmbuf_free_seg(*lmbuf);
*lmbuf = pkt;
while (dma_len > 0) {
@@ -253,8 +263,6 @@ nfp_net_nfdk_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pk
pkt = pkt->next;
dma_len = pkt->data_len;
dma_addr = rte_mbuf_data_iova(pkt);
- PMD_TX_LOG(DEBUG, "Working with mbuf at dma address:"
- "%" PRIx64 "", dma_addr);
lmbuf = &txq->txbufs[buf_idx++].mbuf;
}
@@ -264,16 +272,16 @@ nfp_net_nfdk_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pk
ktxds->raw = rte_cpu_to_le_64(nfp_net_nfdk_tx_cksum(txq, temp_pkt, metadata));
ktxds++;
- if ((hw->cap & NFP_NET_CFG_CTRL_LSO_ANY) &&
- (temp_pkt->ol_flags & RTE_MBUF_F_TX_TCP_SEG)) {
+ if ((hw->cap & NFP_NET_CFG_CTRL_LSO_ANY) != 0 &&
+ (temp_pkt->ol_flags & RTE_MBUF_F_TX_TCP_SEG) != 0) {
ktxds->raw = rte_cpu_to_le_64(nfp_net_nfdk_tx_tso(txq, temp_pkt));
ktxds++;
}
used_descs = ktxds - txq->ktxds - txq->wr_p;
if (round_down(txq->wr_p, NFDK_TX_DESC_BLOCK_CNT) !=
- round_down(txq->wr_p + used_descs - 1, NFDK_TX_DESC_BLOCK_CNT)) {
- PMD_INIT_LOG(INFO, "Used descs cross block boundary");
+ round_down(txq->wr_p + used_descs - 1, NFDK_TX_DESC_BLOCK_CNT)) {
+ PMD_TX_LOG(INFO, "Used descs cross block boundary");
goto xmit_end;
}
@@ -285,7 +293,7 @@ nfp_net_nfdk_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pk
issued_descs += used_descs;
npkts++;
- free_descs = (uint16_t)nfp_net_nfdk_free_tx_desc(txq);
+ free_descs = nfp_net_nfdk_free_tx_desc(txq);
}
xmit_end:
@@ -304,13 +312,14 @@ nfp_net_nfdk_tx_queue_setup(struct rte_eth_dev *dev,
const struct rte_eth_txconf *tx_conf)
{
int ret;
+ size_t size;
+ uint32_t tx_desc_sz;
uint16_t min_tx_desc;
uint16_t max_tx_desc;
- const struct rte_memzone *tz;
- struct nfp_net_txq *txq;
- uint16_t tx_free_thresh;
struct nfp_net_hw *hw;
- uint32_t tx_desc_sz;
+ uint16_t tx_free_thresh;
+ struct nfp_net_txq *txq;
+ const struct rte_memzone *tz;
hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
@@ -323,30 +332,27 @@ nfp_net_nfdk_tx_queue_setup(struct rte_eth_dev *dev,
/* Validating number of descriptors */
tx_desc_sz = nb_desc * sizeof(struct nfp_net_nfdk_tx_desc);
if ((NFDK_TX_DESC_PER_SIMPLE_PKT * tx_desc_sz) % NFP_ALIGN_RING_DESC != 0 ||
- (NFDK_TX_DESC_PER_SIMPLE_PKT * nb_desc) % NFDK_TX_DESC_BLOCK_CNT != 0 ||
- nb_desc > max_tx_desc || nb_desc < min_tx_desc) {
+ (NFDK_TX_DESC_PER_SIMPLE_PKT * nb_desc) % NFDK_TX_DESC_BLOCK_CNT != 0 ||
+ nb_desc > max_tx_desc || nb_desc < min_tx_desc) {
PMD_DRV_LOG(ERR, "Wrong nb_desc value");
return -EINVAL;
}
- tx_free_thresh = (uint16_t)((tx_conf->tx_free_thresh) ?
- tx_conf->tx_free_thresh :
- DEFAULT_TX_FREE_THRESH);
-
- if (tx_free_thresh > (nb_desc)) {
- PMD_DRV_LOG(ERR,
- "tx_free_thresh must be less than the number of TX "
- "descriptors. (tx_free_thresh=%u port=%d "
- "queue=%d)", (unsigned int)tx_free_thresh,
- dev->data->port_id, (int)queue_idx);
- return -(EINVAL);
+ tx_free_thresh = tx_conf->tx_free_thresh;
+ if (tx_free_thresh == 0)
+ tx_free_thresh = DEFAULT_TX_FREE_THRESH;
+ if (tx_free_thresh > nb_desc) {
+ PMD_DRV_LOG(ERR, "tx_free_thresh must be less than the number of TX "
+ "descriptors. (tx_free_thresh=%u port=%d queue=%d)",
+ tx_free_thresh, dev->data->port_id, queue_idx);
+ return -EINVAL;
}
/*
* Free memory prior to re-allocation if needed. This is the case after
* calling nfp_net_stop
*/
- if (dev->data->tx_queues[queue_idx]) {
+ if (dev->data->tx_queues[queue_idx] != NULL) {
PMD_TX_LOG(DEBUG, "Freeing memory prior to re-allocation %d",
queue_idx);
nfp_net_tx_queue_release(dev, queue_idx);
@@ -366,11 +372,10 @@ nfp_net_nfdk_tx_queue_setup(struct rte_eth_dev *dev,
* handle the maximum ring size is allocated in order to allow for
* resizing in later calls to the queue setup function.
*/
- tz = rte_eth_dma_zone_reserve(dev, "tx_ring", queue_idx,
- sizeof(struct nfp_net_nfdk_tx_desc) *
- NFDK_TX_DESC_PER_SIMPLE_PKT *
- max_tx_desc, NFP_MEMZONE_ALIGN,
- socket_id);
+ size = sizeof(struct nfp_net_nfdk_tx_desc) * max_tx_desc *
+ NFDK_TX_DESC_PER_SIMPLE_PKT;
+ tz = rte_eth_dma_zone_reserve(dev, "tx_ring", queue_idx, size,
+ NFP_MEMZONE_ALIGN, socket_id);
if (tz == NULL) {
PMD_DRV_LOG(ERR, "Error allocating tx dma");
nfp_net_tx_queue_release(dev, queue_idx);
@@ -387,29 +392,26 @@ nfp_net_nfdk_tx_queue_setup(struct rte_eth_dev *dev,
txq->qidx = queue_idx;
txq->tx_qcidx = queue_idx * hw->stride_tx;
txq->qcp_q = hw->tx_bar + NFP_QCP_QUEUE_OFF(txq->tx_qcidx);
-
txq->port_id = dev->data->port_id;
/* Saving physical and virtual addresses for the TX ring */
- txq->dma = (uint64_t)tz->iova;
- txq->ktxds = (struct nfp_net_nfdk_tx_desc *)tz->addr;
+ txq->dma = tz->iova;
+ txq->ktxds = tz->addr;
/* mbuf pointers array for referencing mbufs linked to TX descriptors */
txq->txbufs = rte_zmalloc_socket("txq->txbufs",
- sizeof(*txq->txbufs) * txq->tx_count,
- RTE_CACHE_LINE_SIZE, socket_id);
-
+ sizeof(*txq->txbufs) * txq->tx_count,
+ RTE_CACHE_LINE_SIZE, socket_id);
if (txq->txbufs == NULL) {
nfp_net_tx_queue_release(dev, queue_idx);
return -ENOMEM;
}
- PMD_TX_LOG(DEBUG, "txbufs=%p hw_ring=%p dma_addr=0x%" PRIx64,
- txq->txbufs, txq->ktxds, (unsigned long)txq->dma);
nfp_net_reset_tx_queue(txq);
dev->data->tx_queues[queue_idx] = txq;
txq->hw = hw;
+
/*
* Telling the HW about the physical address of the TX ring and number
* of descriptors in log2 format
--
2.39.1
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 13/13] net/nfp: modify the logic of some NFDk function
2023-04-10 11:00 [PATCH 00/13] Sync the kernel driver logic Chaoyong He
` (11 preceding siblings ...)
2023-04-10 11:00 ` [PATCH 12/13] net/nfp: adjust the coding style for NFDk Chaoyong He
@ 2023-04-10 11:00 ` Chaoyong He
2023-05-11 14:47 ` [PATCH 00/13] Sync the kernel driver logic Niklas Söderlund
2023-05-12 14:37 ` Ferruh Yigit
14 siblings, 0 replies; 16+ messages in thread
From: Chaoyong He @ 2023-04-10 11:00 UTC (permalink / raw)
To: dev; +Cc: oss-drivers, niklas.soderlund, Chaoyong He
Split one function into two functions and change the data type of
parameter and return value.
Also add some comment message to help understand.
Signed-off-by: Chaoyong He <chaoyong.he@corigine.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund@corigine.com>
---
drivers/net/nfp/nfdk/nfp_nfdk.h | 75 ++++++++++++++++++++++++++++--
drivers/net/nfp/nfdk/nfp_nfdk_dp.c | 48 ++++++++++++-------
2 files changed, 101 insertions(+), 22 deletions(-)
diff --git a/drivers/net/nfp/nfdk/nfp_nfdk.h b/drivers/net/nfp/nfdk/nfp_nfdk.h
index 9af9176eb7..c39501990a 100644
--- a/drivers/net/nfp/nfdk/nfp_nfdk.h
+++ b/drivers/net/nfp/nfdk/nfp_nfdk.h
@@ -9,22 +9,27 @@
#define NFDK_TX_DESC_PER_SIMPLE_PKT 2
#define NFDK_TX_DESC_GATHER_MAX 17
-#define NFDK_TX_MAX_DATA_PER_HEAD 0x00001000
-#define NFDK_TX_MAX_DATA_PER_DESC 0x00004000
-#define NFDK_TX_MAX_DATA_PER_BLOCK 0x00010000
+#define NFDK_TX_MAX_DATA_PER_HEAD 0x00001000 /* 4K */
+#define NFDK_TX_MAX_DATA_PER_DESC 0x00004000 /* 16K */
+#define NFDK_TX_MAX_DATA_PER_BLOCK 0x00010000 /* 64K */
+/* The mask of 'dma_len_xx' of address descriptor */
#define NFDK_DESC_TX_DMA_LEN_HEAD 0x0FFF /* [0,11] */
#define NFDK_DESC_TX_DMA_LEN 0x3FFF /* [0,13] */
#define NFDK_DESC_TX_TYPE_HEAD 0xF000 /* [12,15] */
+/* The mask of upper 4 bit of first address descriptor */
+#define NFDK_DESC_TX_TYPE_HEAD 0xF000 /* [12,15] */
+
+/* The value of upper 4 bit of first address descriptor */
#define NFDK_DESC_TX_TYPE_GATHER 1
#define NFDK_DESC_TX_TYPE_TSO 2
#define NFDK_DESC_TX_TYPE_SIMPLE 8
-/* TX descriptor format */
+/* The 'end of chain' flag of address descriptor */
#define NFDK_DESC_TX_EOP RTE_BIT32(14)
-/* Flags in the host TX descriptor */
+/* Flags in the host metadata descriptor */
#define NFDK_DESC_TX_CHAIN_META RTE_BIT32(3)
#define NFDK_DESC_TX_ENCAP RTE_BIT32(2)
#define NFDK_DESC_TX_L4_CSUM RTE_BIT32(1)
@@ -40,14 +45,73 @@
/* Convenience macro for wrapping descriptor index on ring size */
#define D_IDX(ring, idx) ((idx) & ((ring)->tx_count - 1))
+/*
+ * A full TX descriptor consists of one or more address descriptors,
+ * followed by a TX metadata descriptor, and finally a TSO descriptor for
+ * TSO packets.
+ *
+ * --> Header address descriptor:
+ * Bit 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
+ * -----\ 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * Word +-+-+---+-----------------------+-------------------------------+
+ * 0 |S|E| TP| dma_len_12 | dma_addr_hi |
+ * +-+-+---+-----------------------+-------------------------------+
+ * 1 | dma_addr_lo |
+ * +---------------------------------------------------------------+
+ *
+ * --> Subsequent address descriptor(s):
+ * Bit 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
+ * -----\ 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * Word +-+-+---------------------------+-------------------------------+
+ * 0 |S|E| dma_len_14 | dma_addr_hi |
+ * +-+-+---------------------------+-------------------------------+
+ * 1 | dma_addr_lo |
+ * +---------------------------------------------------------------+
+ *
+ * S - Simple Packet descriptor
+ * TP - Type of descriptor
+ * E - End of chain
+ * dma_len - length of the host memory in bytes -1
+ * dma_addr_hi - bits [47:32] of host memory address
+ * dma_addr_lo - bits [31:0] of host memory address
+ *
+ * --> metadata descriptor
+ * Bit 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
+ * -----\ 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * Word +-------+-----------------------+---------------------+---+-----+
+ * 0 | ZERO | Rsvd (64b support) | TBD meta | MT| CSUM|
+ * +-------+-----------------------+---------------------+---+-----+
+ * 1 | TBD meta |
+ * +---------------------------------------------------------------+
+ *
+ * --> TSO descriptor
+ * The following is only present if TP above indicates LSO:
+ * Bit 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
+ * -----\ 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * Word +---------------+---------------+---+---------------------------+
+ * 0 | total_segments| header_len |sp0| mss |
+ * +---------------+---------------+---+---------------------------+
+ * 1 | sp1 | L4 | L3 |
+ * +---------------------------------------------------------------+
+ *
+ * total_segments - LSO: Total number of segments
+ * header_len - LSO: length of the LSO header in bytes
+ * sp0 - Spare Bits (ZERO)
+ * mss - LSO: TCP MSS, maximum segment size of TCP payload
+ * sp1 - Spare Bits (ZERO)
+ * L4 - Layer 4 data
+ * L3 - Layer 3 data
+ */
struct nfp_net_nfdk_tx_desc {
union {
+ /* Address descriptor */
struct {
uint16_t dma_addr_hi; /* High bits of host buf address */
uint16_t dma_len_type; /* Length to DMA for this desc */
uint32_t dma_addr_lo; /* Low 32bit of host buf addr */
};
+ /* TSO descriptor */
struct {
uint16_t mss; /* MSS to be used for LSO */
uint8_t lso_hdrlen; /* LSO, TCP payload offset */
@@ -57,6 +121,7 @@ struct nfp_net_nfdk_tx_desc {
uint16_t lso_meta_res; /* Rsvd bits in TSO metadata */
};
+ /* Metadata descriptor */
struct {
uint8_t flags; /* TX Flags, see @NFDK_DESC_TX_* */
uint8_t reserved[7]; /* meta byte placeholder */
diff --git a/drivers/net/nfp/nfdk/nfp_nfdk_dp.c b/drivers/net/nfp/nfdk/nfp_nfdk_dp.c
index 013f369b55..12233393fc 100644
--- a/drivers/net/nfp/nfdk/nfp_nfdk_dp.c
+++ b/drivers/net/nfp/nfdk/nfp_nfdk_dp.c
@@ -14,25 +14,46 @@
#include "../nfpcore/nfp_rtsym.h"
#include "nfp_nfdk.h"
-static inline int
-nfp_net_nfdk_headlen_to_segs(unsigned int headlen)
+static inline uint16_t
+nfp_net_nfdk_headlen_to_segs(uint16_t headlen)
{
+ /* First descriptor fits less data, so adjust for that */
return DIV_ROUND_UP(headlen +
NFDK_TX_MAX_DATA_PER_DESC -
NFDK_TX_MAX_DATA_PER_HEAD,
NFDK_TX_MAX_DATA_PER_DESC);
}
+static inline void
+nfp_net_nfdk_tx_close_block(struct nfp_net_txq *txq,
+ uint32_t nop_slots)
+{
+ uint32_t i;
+ uint32_t wr_p;
+
+ wr_p = txq->wr_p;
+ memset(&txq->ktxds[wr_p], 0, nop_slots * sizeof(struct nfp_net_nfdk_tx_desc));
+
+ for (i = wr_p; i < nop_slots + wr_p; i++) {
+ if (txq->txbufs[i].mbuf != NULL) {
+ rte_pktmbuf_free_seg(txq->txbufs[i].mbuf);
+ txq->txbufs[i].mbuf = NULL;
+ }
+ }
+
+ txq->data_pending = 0;
+ txq->wr_p = D_IDX(txq, wr_p + nop_slots);
+}
+
static int
nfp_net_nfdk_tx_maybe_close_block(struct nfp_net_txq *txq,
struct rte_mbuf *pkt)
{
- uint32_t i;
- uint32_t wr_p;
uint16_t n_descs;
uint32_t nop_slots;
struct rte_mbuf *pkt_temp;
+ /* Count address descriptor */
pkt_temp = pkt;
n_descs = nfp_net_nfdk_headlen_to_segs(pkt_temp->data_len);
while (pkt_temp->next != NULL) {
@@ -43,9 +64,12 @@ nfp_net_nfdk_tx_maybe_close_block(struct nfp_net_txq *txq,
if (unlikely(n_descs > NFDK_TX_DESC_GATHER_MAX))
return -EINVAL;
- if ((pkt->ol_flags & RTE_MBUF_F_TX_TCP_SEG) != 0)
+ /* Count TSO descriptor */
+ if ((txq->hw->cap & NFP_NET_CFG_CTRL_LSO_ANY) != 0 &&
+ (pkt->ol_flags & RTE_MBUF_F_TX_TCP_SEG) != 0)
n_descs++;
+ /* Don't count metadata descriptor, for the round down to work out */
if (round_down(txq->wr_p, NFDK_TX_DESC_BLOCK_CNT) !=
round_down(txq->wr_p + n_descs, NFDK_TX_DESC_BLOCK_CNT))
goto close_block;
@@ -56,18 +80,8 @@ nfp_net_nfdk_tx_maybe_close_block(struct nfp_net_txq *txq,
return 0;
close_block:
- wr_p = txq->wr_p;
- nop_slots = D_BLOCK_CPL(wr_p);
-
- memset(&txq->ktxds[wr_p], 0, nop_slots * sizeof(struct nfp_net_nfdk_tx_desc));
- for (i = wr_p; i < nop_slots + wr_p; i++) {
- if (txq->txbufs[i].mbuf) {
- rte_pktmbuf_free_seg(txq->txbufs[i].mbuf);
- txq->txbufs[i].mbuf = NULL;
- }
- }
- txq->data_pending = 0;
- txq->wr_p = D_IDX(txq, txq->wr_p + nop_slots);
+ nop_slots = D_BLOCK_CPL(txq->wr_p);
+ nfp_net_nfdk_tx_close_block(txq, nop_slots);
return nop_slots;
}
--
2.39.1
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 00/13] Sync the kernel driver logic
2023-04-10 11:00 [PATCH 00/13] Sync the kernel driver logic Chaoyong He
` (12 preceding siblings ...)
2023-04-10 11:00 ` [PATCH 13/13] net/nfp: modify the logic of some NFDk function Chaoyong He
@ 2023-05-11 14:47 ` Niklas Söderlund
2023-05-12 14:37 ` Ferruh Yigit
14 siblings, 0 replies; 16+ messages in thread
From: Niklas Söderlund @ 2023-05-11 14:47 UTC (permalink / raw)
To: Chaoyong He; +Cc: dev, oss-drivers
Hi all,
A gentle ping on this series.
It touches a lot of files when syncing the PMD with the kernel driver,
and to avoid conflicts with future work, it would be kind if this could
be looked at early in the release cycle.
On 2023-04-10 19:00:02 +0800, Chaoyong He wrote:
> The DPDK NFP PMD share the same underlying data structure and API with
> the NFP kernel driver, because they use the same firmware.
>
> The DPDK NFP PMD only has a very initial version and not changed for a
> long time, but the NFP kernel driver keeps evolve at the same time, so
> the differece between them are keeping expand.
>
> This patch series try to sync the needed logics to narrow the gap.
>
> Chaoyong He (13):
> net/nfp: define correct size for configuration BAR
> net/nfp: move shared target logic to own source file
> net/nfp: remove the redundant macro about CPP target
> net/nfp: drop usage of return error helpers
> net/nfp: use generic macros for array size and to set bits
> net/nfp: remove dead code related to CPP
> net/nfp: remove duplicated nffw defines
> net/nfp: move NFD3 logic to own source file
> net/nfp: adjust the coding style for NFD3
> net/nfp: rename macro name of NFD3 Tx descriptor
> net/nfp: move NFDk logic to own source file
> net/nfp: adjust the coding style for NFDk
> net/nfp: modify the logic of some NFDk function
>
> drivers/net/nfp/flower/nfp_flower.c | 9 +-
> drivers/net/nfp/flower/nfp_flower_ctrl.c | 3 +-
> .../net/nfp/flower/nfp_flower_representor.c | 1 +
> drivers/net/nfp/meson.build | 3 +
> drivers/net/nfp/nfd3/nfp_nfd3.h | 161 +++
> drivers/net/nfp/nfd3/nfp_nfd3_dp.c | 343 ++++++
> drivers/net/nfp/nfdk/nfp_nfdk.h | 239 +++++
> drivers/net/nfp/nfdk/nfp_nfdk_dp.c | 437 ++++++++
> drivers/net/nfp/nfp_common.c | 6 +-
> drivers/net/nfp/nfp_cpp_bridge.c | 5 +-
> drivers/net/nfp/nfp_ctrl.h | 7 +-
> drivers/net/nfp/nfp_ethdev.c | 5 +-
> drivers/net/nfp/nfp_ethdev_vf.c | 2 +
> drivers/net/nfp/nfp_rxtx.c | 844 +--------------
> drivers/net/nfp/nfp_rxtx.h | 208 +---
> .../net/nfp/nfpcore/nfp-common/nfp_cppat.h | 725 -------------
> .../net/nfp/nfpcore/nfp-common/nfp_platform.h | 35 -
> .../net/nfp/nfpcore/nfp-common/nfp_resid.h | 592 -----------
> drivers/net/nfp/nfpcore/nfp6000/nfp6000.h | 20 +
> drivers/net/nfp/nfpcore/nfp_cpp.h | 155 ++-
> drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c | 3 +-
> drivers/net/nfp/nfpcore/nfp_cppcore.c | 47 +-
> drivers/net/nfp/nfpcore/nfp_hwinfo.h | 2 +-
> drivers/net/nfp/nfpcore/nfp_mutex.c | 39 +-
> drivers/net/nfp/nfpcore/nfp_nffw.c | 8 +-
> drivers/net/nfp/nfpcore/nfp_nffw.h | 10 -
> drivers/net/nfp/nfpcore/nfp_nsp.c | 2 +-
> drivers/net/nfp/nfpcore/nfp_nsp.h | 12 +-
> drivers/net/nfp/nfpcore/nfp_nsp_cmds.c | 2 +-
> drivers/net/nfp/nfpcore/nfp_nsp_eth.c | 34 +-
> drivers/net/nfp/nfpcore/nfp_resource.c | 2 +-
> drivers/net/nfp/nfpcore/nfp_target.c | 994 ++++++++++++++++++
> drivers/net/nfp/nfpcore/nfp_target.h | 3 -
> 33 files changed, 2417 insertions(+), 2541 deletions(-)
> create mode 100644 drivers/net/nfp/nfd3/nfp_nfd3.h
> create mode 100644 drivers/net/nfp/nfd3/nfp_nfd3_dp.c
> create mode 100644 drivers/net/nfp/nfdk/nfp_nfdk.h
> create mode 100644 drivers/net/nfp/nfdk/nfp_nfdk_dp.c
> delete mode 100644 drivers/net/nfp/nfpcore/nfp-common/nfp_cppat.h
> delete mode 100644 drivers/net/nfp/nfpcore/nfp-common/nfp_platform.h
> delete mode 100644 drivers/net/nfp/nfpcore/nfp-common/nfp_resid.h
> create mode 100644 drivers/net/nfp/nfpcore/nfp_target.c
>
> --
> 2.39.1
>
--
Kind Regards,
Niklas Söderlund
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 00/13] Sync the kernel driver logic
2023-04-10 11:00 [PATCH 00/13] Sync the kernel driver logic Chaoyong He
` (13 preceding siblings ...)
2023-05-11 14:47 ` [PATCH 00/13] Sync the kernel driver logic Niklas Söderlund
@ 2023-05-12 14:37 ` Ferruh Yigit
14 siblings, 0 replies; 16+ messages in thread
From: Ferruh Yigit @ 2023-05-12 14:37 UTC (permalink / raw)
To: Chaoyong He, dev; +Cc: oss-drivers, niklas.soderlund
On 4/10/2023 12:00 PM, Chaoyong He wrote:
> The DPDK NFP PMD share the same underlying data structure and API with
> the NFP kernel driver, because they use the same firmware.
>
> The DPDK NFP PMD only has a very initial version and not changed for a
> long time, but the NFP kernel driver keeps evolve at the same time, so
> the differece between them are keeping expand.
>
> This patch series try to sync the needed logics to narrow the gap.
>
> Chaoyong He (13):
> net/nfp: define correct size for configuration BAR
> net/nfp: move shared target logic to own source file
> net/nfp: remove the redundant macro about CPP target
> net/nfp: drop usage of return error helpers
> net/nfp: use generic macros for array size and to set bits
> net/nfp: remove dead code related to CPP
> net/nfp: remove duplicated nffw defines
> net/nfp: move NFD3 logic to own source file
> net/nfp: adjust the coding style for NFD3
> net/nfp: rename macro name of NFD3 Tx descriptor
> net/nfp: move NFDk logic to own source file
> net/nfp: adjust the coding style for NFDk
> net/nfp: modify the logic of some NFDk function
Series applied to dpdk-next-net/main, thanks.
^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2023-05-12 14:37 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-04-10 11:00 [PATCH 00/13] Sync the kernel driver logic Chaoyong He
2023-04-10 11:00 ` [PATCH 01/13] net/nfp: define correct size for configuration BAR Chaoyong He
2023-04-10 11:00 ` [PATCH 02/13] net/nfp: move shared target logic to own source file Chaoyong He
2023-04-10 11:00 ` [PATCH 03/13] net/nfp: remove the redundant macro about CPP target Chaoyong He
2023-04-10 11:00 ` [PATCH 04/13] net/nfp: drop usage of return error helpers Chaoyong He
2023-04-10 11:00 ` [PATCH 05/13] net/nfp: use generic macros for array size and to set bits Chaoyong He
2023-04-10 11:00 ` [PATCH 06/13] net/nfp: remove dead code related to CPP Chaoyong He
2023-04-10 11:00 ` [PATCH 07/13] net/nfp: remove duplicated nffw defines Chaoyong He
2023-04-10 11:00 ` [PATCH 08/13] net/nfp: move NFD3 logic to own source file Chaoyong He
2023-04-10 11:00 ` [PATCH 09/13] net/nfp: adjust the coding style for NFD3 Chaoyong He
2023-04-10 11:00 ` [PATCH 10/13] net/nfp: rename macro name of NFD3 Tx descriptor Chaoyong He
2023-04-10 11:00 ` [PATCH 11/13] net/nfp: move NFDk logic to own source file Chaoyong He
2023-04-10 11:00 ` [PATCH 12/13] net/nfp: adjust the coding style for NFDk Chaoyong He
2023-04-10 11:00 ` [PATCH 13/13] net/nfp: modify the logic of some NFDk function Chaoyong He
2023-05-11 14:47 ` [PATCH 00/13] Sync the kernel driver logic Niklas Söderlund
2023-05-12 14:37 ` Ferruh Yigit
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