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From: <pbhagavatula@marvell.com>
To: <jerinj@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>,
	"Shijith Thotton" <sthotton@marvell.com>
Cc: <dev@dpdk.org>
Subject: [PATCH 2/2] event/cnxk: restrict stashing to multi-core
Date: Tue, 11 Apr 2023 12:31:29 +0530	[thread overview]
Message-ID: <20230411070129.870-2-pbhagavatula@marvell.com> (raw)
In-Reply-To: <20230411070129.870-1-pbhagavatula@marvell.com>

From: Pavan Nikhilesh <pbhagavatula@marvell.com>

Enable WQE stashing by default only when multiple event ports are
enabled.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
---
 drivers/event/cnxk/cn10k_eventdev.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c
index 071ea5a212..49d205af39 100644
--- a/drivers/event/cnxk/cn10k_eventdev.c
+++ b/drivers/event/cnxk/cn10k_eventdev.c
@@ -902,7 +902,7 @@ cn10k_sso_rx_adapter_queue_add(
 	lookup_mem = rxq->lookup_mem;
 	cn10k_sso_set_priv_mem(event_dev, lookup_mem);
 	cn10k_sso_fp_fns_set((struct rte_eventdev *)(uintptr_t)event_dev);
-	if (roc_feature_sso_has_stash()) {
+	if (roc_feature_sso_has_stash() && dev->nb_event_ports > 1) {
 		stash.hwgrp = queue_conf->ev.queue_id;
 		stash.stash_offset = CN10K_SSO_DEFAULT_STASH_OFFSET;
 		stash.stash_count = CN10K_SSO_DEFAULT_STASH_LENGTH;
-- 
2.25.1


  reply	other threads:[~2023-04-11  7:01 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-11  7:01 [PATCH 1/2] net/cnxk: optimize flow control hysteresis pbhagavatula
2023-04-11  7:01 ` pbhagavatula [this message]
2023-05-03  9:53 ` Jerin Jacob

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