From: Junfeng Guo <junfeng.guo@intel.com>
To: qi.z.zhang@intel.com, jingjing.wu@intel.com,
ferruh.yigit@amd.com, beilei.xing@intel.com
Cc: dev@dpdk.org, Junfeng Guo <junfeng.guo@intel.com>,
Rushil Gupta <rushilg@google.com>,
Joshua Washington <joshwash@google.com>,
Jeroen de Borst <jeroendb@google.com>
Subject: [PATCH 03/10] net/gve: support device start and close for DQO
Date: Thu, 13 Apr 2023 14:16:43 +0800 [thread overview]
Message-ID: <20230413061650.796940-4-junfeng.guo@intel.com> (raw)
In-Reply-To: <20230413061650.796940-1-junfeng.guo@intel.com>
Add device start and close support for DQO.
Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Rushil Gupta <rushilg@google.com>
Signed-off-by: Joshua Washington <joshwash@google.com>
Signed-off-by: Jeroen de Borst <jeroendb@google.com>
---
drivers/net/gve/gve_ethdev.c | 43 +++++++++++++++++++++++++++++++++++-
1 file changed, 42 insertions(+), 1 deletion(-)
diff --git a/drivers/net/gve/gve_ethdev.c b/drivers/net/gve/gve_ethdev.c
index d387d7154b..fc60db63c5 100644
--- a/drivers/net/gve/gve_ethdev.c
+++ b/drivers/net/gve/gve_ethdev.c
@@ -78,6 +78,9 @@ gve_free_qpls(struct gve_priv *priv)
uint16_t nb_rxqs = priv->max_nb_rxq;
uint32_t i;
+ if (priv->queue_format != GVE_GQI_QPL_FORMAT)
+ return;
+
for (i = 0; i < nb_txqs + nb_rxqs; i++) {
if (priv->qpl[i].mz != NULL)
rte_memzone_free(priv->qpl[i].mz);
@@ -138,6 +141,41 @@ gve_refill_pages(struct gve_rx_queue *rxq)
return 0;
}
+static int
+gve_refill_dqo(struct gve_rx_queue *rxq)
+{
+ struct rte_mbuf *nmb;
+ uint16_t i;
+ int diag;
+
+ diag = rte_pktmbuf_alloc_bulk(rxq->mpool, &rxq->sw_ring[0], rxq->nb_rx_desc);
+ if (diag < 0) {
+ for (i = 0; i < rxq->nb_rx_desc - 1; i++) {
+ nmb = rte_pktmbuf_alloc(rxq->mpool);
+ if (!nmb)
+ break;
+ rxq->sw_ring[i] = nmb;
+ }
+ if (i < rxq->nb_rx_desc - 1)
+ return -ENOMEM;
+ }
+
+ for (i = 0; i < rxq->nb_rx_desc; i++) {
+ if (i == rxq->nb_rx_desc - 1)
+ break;
+ nmb = rxq->sw_ring[i];
+ rxq->rx_ring[i].buf_addr = rte_cpu_to_le_64(rte_mbuf_data_iova_default(nmb));
+ rxq->rx_ring[i].buf_id = rte_cpu_to_le_16(i);
+ }
+
+ rxq->nb_rx_hold = 0;
+ rxq->bufq_tail = rxq->nb_rx_desc - 1;
+
+ rte_write32(rxq->bufq_tail, rxq->qrx_tail);
+
+ return 0;
+}
+
static int
gve_link_update(struct rte_eth_dev *dev, __rte_unused int wait_to_complete)
{
@@ -206,7 +244,10 @@ gve_dev_start(struct rte_eth_dev *dev)
rte_write32(rte_cpu_to_be_32(GVE_IRQ_MASK), rxq->ntfy_addr);
- err = gve_refill_pages(rxq);
+ if (gve_is_gqi(priv))
+ err = gve_refill_pages(rxq);
+ else
+ err = gve_refill_dqo(rxq);
if (err) {
PMD_DRV_LOG(ERR, "Failed to refill for RX");
goto err_rx;
--
2.34.1
next prev parent reply other threads:[~2023-04-13 6:17 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-13 6:16 [PATCH 00/10] gve PMD enhancement Junfeng Guo
2023-04-13 6:16 ` [PATCH 01/10] net/gve: add Tx queue setup for DQO Junfeng Guo
2023-04-13 6:16 ` [PATCH 02/10] net/gve: add Rx " Junfeng Guo
2023-04-13 6:16 ` Junfeng Guo [this message]
2023-04-13 6:16 ` [PATCH 04/10] net/gve: support queue release and stop " Junfeng Guo
2023-04-13 6:16 ` [PATCH 05/10] net/gve: support basic Tx data path " Junfeng Guo
2023-04-13 6:16 ` [PATCH 06/10] net/gve: support basic Rx " Junfeng Guo
2023-04-13 6:16 ` [PATCH 07/10] net/gve: support basic stats " Junfeng Guo
2023-04-13 6:16 ` [PATCH 08/10] net/gve: enable Tx checksum offload " Junfeng Guo
2023-04-13 6:16 ` [PATCH 09/10] net/gve: add maintainers for GVE Junfeng Guo
2023-05-04 11:01 ` Ferruh Yigit
2023-05-05 2:16 ` Guo, Junfeng
2023-04-13 6:16 ` [PATCH 10/10] net/gve: support jumbo frame for GQI Junfeng Guo
2023-05-04 10:52 ` [PATCH 00/10] gve PMD enhancement Ferruh Yigit
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