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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CO1NAM11FT025.mail.protection.outlook.com (10.13.175.232) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6298.30 via Frontend Transport; Tue, 18 Apr 2023 08:14:44 +0000 Received: from telco-siena.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Tue, 18 Apr 2023 03:14:41 -0500 From: Sivaprasad Tummala To: CC: , , Subject: [PATCH v4 0/4] power: monitor support for AMD EPYC processors Date: Tue, 18 Apr 2023 01:14:19 -0700 Message-ID: <20230418081423.544642-1-sivaprasad.tummala@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230417043136.470110-1-sivaprasad.tummala@amd.com> References: <20230417043136.470110-1-sivaprasad.tummala@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT025:EE_|SA0PR12MB4592:EE_ X-MS-Office365-Filtering-Correlation-Id: ef3bece9-7360-4c1e-8471-08db3fe4f7d0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Apr 2023 08:14:44.4069 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ef3bece9-7360-4c1e-8471-08db3fe4f7d0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT025.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4592 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org mwaitx allows EPYC processors to enter a implementation dependent power/performance optimized state (C1 state) for a specific period or until a store to the monitored address range. Sivaprasad Tummala (4): doc: announce new cpu flag added to rte_cpu_flag_t eal: add x86 cpuid support for monitorx eal: removed unnecessary checks in x86 power monitor APIs power: amd power monitor support doc/guides/rel_notes/deprecation.rst | 3 + lib/eal/x86/include/rte_cpuflags.h | 1 + lib/eal/x86/rte_cpuflags.c | 3 + lib/eal/x86/rte_power_intrinsics.c | 84 +++++++++++++++++++++++----- 4 files changed, 78 insertions(+), 13 deletions(-) -- 2.34.1 Cc: dev@dpdk.org Cc: david.marchand@redhat.com Cc: ferruh.yigit@amd.com v3: * patch rework based on review comments v4: * no code changes