From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 71041429DB; Mon, 24 Apr 2023 14:29:32 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 6108D42D40; Mon, 24 Apr 2023 14:29:08 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id DD25042D0E for ; Mon, 24 Apr 2023 14:29:03 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 33O7W4Ea027062; Mon, 24 Apr 2023 05:29:03 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=FuTR8O5NHVEWIzuM2Ipjgl2T6vwAj28D6KH7d4u4Gnw=; b=U5c3g2IUlroUdyNTVUn5jJjvfT4KBt35XnmBqegIEc9hc3R/FcxlB61+m2HSWBuM85mO 4eor6fOP7suKHXTenQ/ZWw543By6EdavnBTnlWNifWW6Df3vVcKc8Jb094T2P4GrXUUz 6YRrI57QzcuvE9R/jPY9B9GMYQfCxBvnVT/43q+AKtKnOKdfyJmhcaxp8RROV/VCuNqh wN5L13mUdmkX5wbkqdAFAf6FmoGTTJFmZjdwTFaKgGRAjdprixdq4OS95hsrl+j+6XzX BY3pREogLO3VrvYvaoHVD2dcWImj/Oaux7Os9RCtJ8IpJm4LlizzwZwUZerunm6UBmyp Fw== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3q5nfb0xqv-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 24 Apr 2023 05:29:02 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Mon, 24 Apr 2023 05:29:01 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Mon, 24 Apr 2023 05:29:01 -0700 Received: from localhost.marvell.com (unknown [10.106.27.249]) by maili.marvell.com (Postfix) with ESMTP id 1456C3F70A0; Mon, 24 Apr 2023 05:29:01 -0700 (PDT) From: Sathesh Edara To: , , , "Radha Mohan Chintakuntla" , Veerasenareddy Burru , Anatoly Burakov CC: Subject: [PATCH v3 11/11] net/octeon_ep: set secondary process dev ops Date: Mon, 24 Apr 2023 05:28:34 -0700 Message-ID: <20230424122835.39493-12-sedara@marvell.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20230424122835.39493-1-sedara@marvell.com> References: <20230405142537.1899973-2-sedara@marvell.com> <20230424122835.39493-1-sedara@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: 7xvaLGhOOgtXaJZb5Ndr6fnggzl9hTfo X-Proofpoint-GUID: 7xvaLGhOOgtXaJZb5Ndr6fnggzl9hTfo X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-24_07,2023-04-21_01,2023-02-09_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sets the dev ops and transmit/receive callbacks for secondary process. Signed-off-by: Sathesh Edara --- doc/guides/nics/features/octeon_ep.ini | 1 + drivers/net/octeon_ep/otx_ep_ethdev.c | 22 +++++++++++++++++++--- 2 files changed, 20 insertions(+), 3 deletions(-) diff --git a/doc/guides/nics/features/octeon_ep.ini b/doc/guides/nics/features/octeon_ep.ini index f3b821c89e..d52491afa3 100644 --- a/doc/guides/nics/features/octeon_ep.ini +++ b/doc/guides/nics/features/octeon_ep.ini @@ -11,4 +11,5 @@ x86-64 = Y Basic stats = Y Link status = Y MTU update = Y +Multiprocess aware = Y Usage doc = Y diff --git a/drivers/net/octeon_ep/otx_ep_ethdev.c b/drivers/net/octeon_ep/otx_ep_ethdev.c index 885fbb475f..a9868909f8 100644 --- a/drivers/net/octeon_ep/otx_ep_ethdev.c +++ b/drivers/net/octeon_ep/otx_ep_ethdev.c @@ -527,9 +527,17 @@ otx_ep_dev_stats_get(struct rte_eth_dev *eth_dev, static int otx_ep_dev_close(struct rte_eth_dev *eth_dev) { - struct otx_ep_device *otx_epvf = OTX_EP_DEV(eth_dev); + struct otx_ep_device *otx_epvf; uint32_t num_queues, q_no; + if (rte_eal_process_type() != RTE_PROC_PRIMARY) { + eth_dev->dev_ops = NULL; + eth_dev->rx_pkt_burst = NULL; + eth_dev->tx_pkt_burst = NULL; + return 0; + } + + otx_epvf = OTX_EP_DEV(eth_dev); otx_ep_mbox_send_dev_exit(eth_dev); otx_epvf->fn_list.disable_io_queues(otx_epvf); num_queues = otx_epvf->nb_rx_queues; @@ -593,8 +601,12 @@ static const struct eth_dev_ops otx_ep_eth_dev_ops = { static int otx_ep_eth_dev_uninit(struct rte_eth_dev *eth_dev) { - if (rte_eal_process_type() != RTE_PROC_PRIMARY) + if (rte_eal_process_type() != RTE_PROC_PRIMARY) { + eth_dev->dev_ops = NULL; + eth_dev->rx_pkt_burst = NULL; + eth_dev->tx_pkt_burst = NULL; return 0; + } eth_dev->dev_ops = NULL; eth_dev->rx_pkt_burst = NULL; @@ -642,8 +654,12 @@ otx_ep_eth_dev_init(struct rte_eth_dev *eth_dev) struct rte_ether_addr vf_mac_addr; /* Single process support */ - if (rte_eal_process_type() != RTE_PROC_PRIMARY) + if (rte_eal_process_type() != RTE_PROC_PRIMARY) { + eth_dev->dev_ops = &otx_ep_eth_dev_ops; + eth_dev->rx_pkt_burst = &otx_ep_recv_pkts; + eth_dev->tx_pkt_burst = &otx2_ep_xmit_pkts; return 0; + } rte_eth_copy_pci_info(eth_dev, pdev); otx_epvf->eth_dev = eth_dev; -- 2.31.1