From: Qiming Yang <qiming.yang@intel.com>
To: dev@dpdk.org
Cc: qi.z.zhang@intel.com, Qiming Yang <qiming.yang@intel.com>,
LUkasz Plachno <lukasz.plachno@intel.com>,
Marcin Szycik <marcin.szycik@intel.com>
Subject: [PATCH 10/30] net/ice/base: use coccinelle to instead macro
Date: Thu, 27 Apr 2023 06:19:41 +0000 [thread overview]
Message-ID: <20230427062001.478032-11-qiming.yang@intel.com> (raw)
In-Reply-To: <20230427062001.478032-1-qiming.yang@intel.com>
MSVC is not allowing array initialization with indexes, best way to
avoid the issue when compiling for Windows is to use macro to remove
index on Windows and use coccinelle to maintain compatibility with
linux upstream.
Signed-off-by: LUkasz Plachno <lukasz.plachno@intel.com>
Signed-off-by: Marcin Szycik <marcin.szycik@intel.com>
Signed-off-by: Qiming Yang <qiming.yang@intel.com>
---
drivers/net/ice/base/ice_common.c | 74 ++++++++++++++++++++++++++++
drivers/net/ice/base/ice_common.h | 8 +++
drivers/net/ice/base/ice_ddp.c | 3 ++
drivers/net/ice/base/ice_flow.h | 1 +
drivers/net/ice/base/ice_lan_tx_rx.h | 1 -
drivers/net/ice/base/ice_switch.c | 23 +--------
drivers/net/ice/base/ice_switch.h | 3 +-
7 files changed, 89 insertions(+), 24 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 984830ea37..cebf1504f1 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -11,6 +11,80 @@
#define ICE_PF_RESET_WAIT_COUNT 300
+static const char * const ice_link_mode_str_low[] = {
+ ice_arr_elem_idx(0, "100BASE_TX"),
+ ice_arr_elem_idx(1, "100M_SGMII"),
+ ice_arr_elem_idx(2, "1000BASE_T"),
+ ice_arr_elem_idx(3, "1000BASE_SX"),
+ ice_arr_elem_idx(4, "1000BASE_LX"),
+ ice_arr_elem_idx(5, "1000BASE_KX"),
+ ice_arr_elem_idx(6, "1G_SGMII"),
+ ice_arr_elem_idx(7, "2500BASE_T"),
+ ice_arr_elem_idx(8, "2500BASE_X"),
+ ice_arr_elem_idx(9, "2500BASE_KX"),
+ ice_arr_elem_idx(10, "5GBASE_T"),
+ ice_arr_elem_idx(11, "5GBASE_KR"),
+ ice_arr_elem_idx(12, "10GBASE_T"),
+ ice_arr_elem_idx(13, "10G_SFI_DA"),
+ ice_arr_elem_idx(14, "10GBASE_SR"),
+ ice_arr_elem_idx(15, "10GBASE_LR"),
+ ice_arr_elem_idx(16, "10GBASE_KR_CR1"),
+ ice_arr_elem_idx(17, "10G_SFI_AOC_ACC"),
+ ice_arr_elem_idx(18, "10G_SFI_C2C"),
+ ice_arr_elem_idx(19, "25GBASE_T"),
+ ice_arr_elem_idx(20, "25GBASE_CR"),
+ ice_arr_elem_idx(21, "25GBASE_CR_S"),
+ ice_arr_elem_idx(22, "25GBASE_CR1"),
+ ice_arr_elem_idx(23, "25GBASE_SR"),
+ ice_arr_elem_idx(24, "25GBASE_LR"),
+ ice_arr_elem_idx(25, "25GBASE_KR"),
+ ice_arr_elem_idx(26, "25GBASE_KR_S"),
+ ice_arr_elem_idx(27, "25GBASE_KR1"),
+ ice_arr_elem_idx(28, "25G_AUI_AOC_ACC"),
+ ice_arr_elem_idx(29, "25G_AUI_C2C"),
+ ice_arr_elem_idx(30, "40GBASE_CR4"),
+ ice_arr_elem_idx(31, "40GBASE_SR4"),
+ ice_arr_elem_idx(32, "40GBASE_LR4"),
+ ice_arr_elem_idx(33, "40GBASE_KR4"),
+ ice_arr_elem_idx(34, "40G_XLAUI_AOC_ACC"),
+ ice_arr_elem_idx(35, "40G_XLAUI"),
+ ice_arr_elem_idx(36, "50GBASE_CR2"),
+ ice_arr_elem_idx(37, "50GBASE_SR2"),
+ ice_arr_elem_idx(38, "50GBASE_LR2"),
+ ice_arr_elem_idx(39, "50GBASE_KR2"),
+ ice_arr_elem_idx(40, "50G_LAUI2_AOC_ACC"),
+ ice_arr_elem_idx(41, "50G_LAUI2"),
+ ice_arr_elem_idx(42, "50G_AUI2_AOC_ACC"),
+ ice_arr_elem_idx(43, "50G_AUI2"),
+ ice_arr_elem_idx(44, "50GBASE_CP"),
+ ice_arr_elem_idx(45, "50GBASE_SR"),
+ ice_arr_elem_idx(46, "50GBASE_FR"),
+ ice_arr_elem_idx(47, "50GBASE_LR"),
+ ice_arr_elem_idx(48, "50GBASE_KR_PAM4"),
+ ice_arr_elem_idx(49, "50G_AUI1_AOC_ACC"),
+ ice_arr_elem_idx(50, "50G_AUI1"),
+ ice_arr_elem_idx(51, "100GBASE_CR4"),
+ ice_arr_elem_idx(52, "100GBASE_SR4"),
+ ice_arr_elem_idx(53, "100GBASE_LR4"),
+ ice_arr_elem_idx(54, "100GBASE_KR4"),
+ ice_arr_elem_idx(55, "100G_CAUI4_AOC_ACC"),
+ ice_arr_elem_idx(56, "100G_CAUI4"),
+ ice_arr_elem_idx(57, "100G_AUI4_AOC_ACC"),
+ ice_arr_elem_idx(58, "100G_AUI4"),
+ ice_arr_elem_idx(59, "100GBASE_CR_PAM4"),
+ ice_arr_elem_idx(60, "100GBASE_KR_PAM4"),
+ ice_arr_elem_idx(61, "100GBASE_CP2"),
+ ice_arr_elem_idx(62, "100GBASE_SR2"),
+ ice_arr_elem_idx(63, "100GBASE_DR"),
+};
+
+static const char * const ice_link_mode_str_high[] = {
+ ice_arr_elem_idx(0, "100GBASE_KR2_PAM4"),
+ ice_arr_elem_idx(1, "100G_CAUI2_AOC_ACC"),
+ ice_arr_elem_idx(2, "100G_CAUI2"),
+ ice_arr_elem_idx(3, "100G_AUI2_AOC_ACC"),
+ ice_arr_elem_idx(4, "100G_AUI2"),
+};
/**
* dump_phy_type - helper function that prints PHY type strings
* @hw: pointer to the HW structure
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index ccefe85af7..83ef438041 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -81,6 +81,14 @@ ice_aq_get_internal_data(struct ice_hw *hw, u8 cluster_id, u16 table_id,
*/
#define ICE_ALIGN(ptr, align) (((ptr) + ((align) - 1)) & ~((align) - 1))
+/* Define a macro for initializing array using indexes. Due to limitation
+ * of MSVC compiler it is necessary to allow other projects to replace
+ * that macro and strip the index from initialization.
+ * Linux driver is using coccinelle to maintain source sync with upstream
+ * and is not requiring this macro.
+ */
+#define ice_arr_elem_idx(idx, val) [(idx)] = (val)
+
enum ice_status
ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
u32 rxq_index);
diff --git a/drivers/net/ice/base/ice_ddp.c b/drivers/net/ice/base/ice_ddp.c
index 93ff2608d4..ae0a03c8ba 100644
--- a/drivers/net/ice/base/ice_ddp.c
+++ b/drivers/net/ice/base/ice_ddp.c
@@ -1579,6 +1579,9 @@ ice_get_sw_fv_list(struct ice_hw *hw, struct ice_prot_lkup_ext *lkups,
struct ice_fv *fv;
u32 offset;
+ if (!lkups->n_val_words)
+ return ICE_SUCCESS;
+
ice_memset(&state, 0, sizeof(state), ICE_NONDMA_MEM);
if (!lkups->n_val_words || !hw->seg)
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 1415f5ba87..2e5a3b386e 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -7,6 +7,7 @@
#include "ice_flex_type.h"
#include "ice_acl.h"
+#include "ice_parser.h"
#define ICE_IPV4_MAKE_PREFIX_MASK(prefix) ((u32)(~0) << (32 - (prefix)))
#define ICE_FLOW_PROF_ID_INVAL 0xfffffffffffffffful
diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h
index d816df0ff6..229db1041c 100644
--- a/drivers/net/ice/base/ice_lan_tx_rx.h
+++ b/drivers/net/ice/base/ice_lan_tx_rx.h
@@ -162,7 +162,6 @@ struct ice_fltr_desc {
#define ICE_FXD_FLTR_QW1_FDID_PRI_S 25
#define ICE_FXD_FLTR_QW1_FDID_PRI_M (0x7ULL << ICE_FXD_FLTR_QW1_FDID_PRI_S)
-#define ICE_FXD_FLTR_QW1_FDID_PRI_ZERO 0x0ULL
#define ICE_FXD_FLTR_QW1_FDID_PRI_ONE 0x1ULL
#define ICE_FXD_FLTR_QW1_FDID_PRI_THREE 0x3ULL
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index dd4cc38114..b3d9847669 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -7500,25 +7500,6 @@ ice_create_recipe_group(struct ice_hw *hw, struct ice_sw_recipe *rm,
return status;
}
-/**
- * ice_get_fv - get field vectors/extraction sequences for spec. lookup types
- * @hw: pointer to hardware structure
- * @lkups: lookup elements or match criteria for the advanced recipe, one
- * structure per protocol header
- * @bm: bitmap of field vectors to consider
- * @fv_list: pointer to a list that holds the returned field vectors
- */
-static enum ice_status
-ice_get_fv(struct ice_hw *hw, struct ice_prot_lkup_ext *lkups,
- ice_bitmap_t *bm, struct LIST_HEAD_TYPE *fv_list)
-{
- if (!lkups->n_val_words)
- return ICE_SUCCESS;
-
- /* Find field vectors that include all specified protocol types */
- return ice_get_sw_fv_list(hw, lkups, bm, fv_list);
-}
-
/**
* ice_tun_type_match_word - determine if tun type needs a match mask
* @tun_type: tunnel type
@@ -7905,11 +7886,11 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
/* Get bitmap of field vectors (profiles) that are compatible with the
* rule request; only these will be searched in the subsequent call to
- * ice_get_fv.
+ * ice_get_sw_fv_list.
*/
ice_get_compat_fv_bitmap(hw, rinfo, fv_bitmap);
- status = ice_get_fv(hw, lkup_exts, fv_bitmap, &rm->fv_list);
+ status = ice_get_sw_fv_list(hw, lkup_exts, fv_bitmap, &rm->fv_list);
if (status)
goto err_unroll;
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 49bd535c79..adb467eb66 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -498,8 +498,7 @@ ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
bool res_shared, u16 *desc_id, struct ice_sq_cd *cd);
enum ice_status
ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
-enum ice_status
-ice_remove_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list);
+enum ice_status ice_remove_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list);
void ice_rem_all_sw_rules_info(struct ice_hw *hw);
enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
--
2.25.1
next prev parent reply other threads:[~2023-04-27 6:39 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-27 6:19 [PATCH 00/30] net/ice/base: share code update Qiming Yang
2023-04-27 6:19 ` [PATCH 01/30] net/ice/base: updated copyright Qiming Yang
2023-04-27 6:19 ` [PATCH 02/30] net/ice/base: add flex array safe allocations Qiming Yang
2023-04-27 6:19 ` [PATCH 03/30] net/ice/base: remove unnecessary control queue array Qiming Yang
2024-03-05 18:05 ` [**EXTERNAL**] " Gudimetla, Leela Sankar
2023-04-27 6:19 ` [PATCH 04/30] net/ice/base: update flow seg fields to declared bitmaps Qiming Yang
2023-04-27 6:19 ` [PATCH 05/30] net/ice/base: clean up RSS LUT and fix media type Qiming Yang
2023-04-27 6:19 ` [PATCH 06/30] net/ice/base: add ability to set markid via switch filter Qiming Yang
2023-04-27 6:19 ` [PATCH 07/30] net/ice/base: add reading cap and ropo cap Qiming Yang
2023-04-27 6:19 ` [PATCH 08/30] net/ice/base: add function to read HW sensors Qiming Yang
2023-04-27 6:19 ` [PATCH 09/30] net/ice/base: add pre-allocate memory argument Qiming Yang
2023-04-27 6:19 ` Qiming Yang [this message]
2023-04-27 6:19 ` [PATCH 11/30] net/ice/base: add new fls function Qiming Yang
2023-04-27 6:19 ` [PATCH 12/30] net/ice/base: add E830 device ids Qiming Yang
2023-04-27 6:19 ` [PATCH 13/30] net/ice/base: add function to get rxq context Qiming Yang
2023-04-27 6:19 ` [PATCH 14/30] net/ice/base: removed no need 56G releated code Qiming Yang
2023-04-27 6:19 ` [PATCH 15/30] net/ice/base: allow skip main timer Qiming Yang
2023-04-27 6:19 ` [PATCH 16/30] net/ice/base: add E830 PTP init Qiming Yang
2023-04-27 6:19 ` [PATCH 17/30] net/ice/base: add C825X device support Qiming Yang
2023-04-27 6:19 ` [PATCH 18/30] net/ice/base: add VLAN TPID in switchdev Qiming Yang
2023-04-27 6:19 ` [PATCH 19/30] net/ice/base: reduce time to read Option ROM CIVD Qiming Yang
2023-04-27 6:19 ` [PATCH 20/30] net/ice/base: add L2TPv3 support for adv rules Qiming Yang
2023-04-27 6:19 ` [PATCH 21/30] net/ice/base: add PHY OFFSET READY register clear Qiming Yang
2023-04-27 6:19 ` [PATCH 22/30] net/ice/base: return CGU PLL config function params Qiming Yang
2023-04-27 6:19 ` [PATCH 23/30] net/ice/base: change method to get pca9575 handle Qiming Yang
2023-04-27 6:19 ` [PATCH 24/30] net/ice/base: cleanup timestamp registers correct Qiming Yang
2023-04-27 6:19 ` [PATCH 25/30] net/ice/base: add PPPoE hardware offload Qiming Yang
2023-04-27 6:19 ` [PATCH 26/30] net/ice/base: remove bypass mode Qiming Yang
2023-04-27 6:19 ` [PATCH 27/30] net/ice/base: support inner etype in switchdev Qiming Yang
2023-04-27 6:19 ` [PATCH 28/30] net/ice/base: use const array to store link modes Qiming Yang
2023-04-27 6:20 ` [PATCH 29/30] net/ice/base: introduce a new ID for E810 NIC Qiming Yang
2023-04-27 6:20 ` [PATCH 30/30] net/ice/base: fix Generic Checksum acronym Qiming Yang
2023-04-27 21:18 ` Greenwalt, Paul
2023-05-18 15:16 ` [PATCH v2 00/20] net/ice/base: code update Qiming Yang
2023-05-18 15:16 ` [PATCH v2 01/20] net/ice/base: updated copyright Qiming Yang
2023-05-18 15:16 ` [PATCH v2 02/20] net/ice/base: add NAC Topology device capability parser Qiming Yang
2023-05-18 15:16 ` [PATCH v2 03/20] net/ice/base: add new device for E810 Qiming Yang
2023-05-18 15:16 ` [PATCH v2 04/20] net/ice/base: fix incorrect defines for DCBx Qiming Yang
2023-05-18 15:16 ` [PATCH v2 05/20] net/ice/base: introduce a non-atomic function Qiming Yang
2023-05-18 15:16 ` [PATCH v2 06/20] net/ice/base: add missing AQ flag to AQ command Qiming Yang
2023-05-18 15:16 ` [PATCH v2 07/20] net/ice/base: add support for inner etype in switchdev Qiming Yang
2023-05-18 15:16 ` [PATCH v2 08/20] net/ice/base: add support for PPPoE hardware offload Qiming Yang
2023-05-18 15:16 ` [PATCH v2 09/20] net/ice/base: remove direction metadata for switchdev Qiming Yang
2023-05-18 15:16 ` [PATCH v2 10/20] net/ice/base: reduce time to read Option data Qiming Yang
2023-05-18 17:08 ` Keller, Jacob E
2023-05-18 15:16 ` [PATCH v2 11/20] net/ice/base: add support for VLAN TPID filters Qiming Yang
2023-05-18 15:16 ` [PATCH v2 12/20] net/ice/base: add C825-X device ID Qiming Yang
2023-05-18 15:16 ` [PATCH v2 13/20] net/ice/base: add function to get rxq context Qiming Yang
2023-05-18 15:16 ` [PATCH v2 14/20] net/ice/base: modify tunnel match mask Qiming Yang
2023-05-18 15:16 ` [PATCH v2 15/20] net/ice/base: check VSIG before disassociating VSI Qiming Yang
2023-05-18 15:16 ` [PATCH v2 16/20] net/ice/base: delete get field vector function Qiming Yang
2023-05-18 15:16 ` [PATCH v2 17/20] net/ice/base: update 3k-sign DDP support for E825C Qiming Yang
2023-05-18 15:16 ` [PATCH v2 18/20] net/ice/base: fix static analyzer bug Qiming Yang
2023-05-18 15:16 ` [PATCH v2 19/20] net/ice/base: offer memory config for schedual node Qiming Yang
2023-05-18 15:16 ` [PATCH v2 20/20] net/ice/base: add new AQ ro read HW sensors Qiming Yang
2023-05-23 2:12 ` [PATCH v2 00/20] net/ice/base: code update Zhang, Qi Z
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