From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9EBF942A6D; Fri, 5 May 2023 11:22:39 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id F3C2E410EA; Fri, 5 May 2023 11:22:38 +0200 (CEST) Received: from mail-pg1-f172.google.com (mail-pg1-f172.google.com [209.85.215.172]) by mails.dpdk.org (Postfix) with ESMTP id 8EF6E42D47 for ; Thu, 4 May 2023 19:36:32 +0200 (CEST) Received: by mail-pg1-f172.google.com with SMTP id 41be03b00d2f7-52c62a71541so517478a12.3 for ; Thu, 04 May 2023 10:36:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1683221791; x=1685813791; h=mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:from:to:cc:subject:date:message-id:reply-to; bh=8TskgO1DeNnoR9012qg4Hx8qx+OHXUbqR6QZ6e4YrmM=; b=PstF7IOjsEyO3J1nHm/GwgZQxfh97X0TKvVIrsIn+ZrlT50ez6Ihiz78isqKUy9O9a +q8uaEB+gQ/fEfj6y8MGEafG31esU7NYbMb5/ATfrh3qQoZ6A6GTOl53y19aqTF2njU1 FeQ+O54VxT7ButpQ9xryNqv7+2WnvsNOwYzUg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683221791; x=1685813791; h=mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=8TskgO1DeNnoR9012qg4Hx8qx+OHXUbqR6QZ6e4YrmM=; b=UHN4DLtX1nkOQN9Cy7cXxPD6pqBsoIyUN7eqAnY/hXriFc9JKHFkcsntI05zAzo9nn EHQmpoM7Ct6wKV4GX42JWasCcnwcc6St9xuI/1FVqeztBSENUYG8Tg6EqgWpACCRSAnA RxxtIhtQ4gFmLANz3BHgUPfG3AU0yL4tNGiPLfSOMLF86HeBS0hD7dA6qRA2vUrYzV5i nVApjWpTT1r5rWpvV0HiR029epVAfsQlcj3GfC4zTJWIjh0wj29D7p4JLQ+W3hjdJXGq 9KAFPBXUXZ/8rk+xzza9615ncmvJr8YDHx6NVHLnLVhby6nmRgA096+ymfs9swDH7+tr yInA== X-Gm-Message-State: AC+VfDw4l5ghZWzq2OEaUR4X/IIOELaqhfCtX4W5HmV/ChlMcbFgdpEY vPpJ/d2sIrYI6bR2IljMBRpFMdBMQ1/K2apWKHzpVy5J11NQMHvQIdEyj9wGxopQErsBoEgZRPE J1+mIwzwJvO9PpFiCW3qRDRPT8BPsCFcpNjNZhV6t9L001KJnYOdGvErcWxfnF/4WZnsY X-Google-Smtp-Source: ACHHUZ5s+w/kldGGxDfwRDzDVl5oJxA0rOxZWVFdU+vq0SnhnTrsSlqiVIq7yViKTCYe/RfiCDTz7A== X-Received: by 2002:a05:6a20:8f13:b0:f5:2b11:5a0a with SMTP id b19-20020a056a208f1300b000f52b115a0amr3736184pzk.10.1683221788374; Thu, 04 May 2023 10:36:28 -0700 (PDT) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id v11-20020aa7850b000000b0062bc045bf4fsm26305230pfn.19.2023.05.04.10.36.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 May 2023 10:36:26 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Randy Schacher , Kishore Padmanabha , Shahaji Bhosle Subject: [PATCH v3 05/11] net/bnxt: update ULP shared session support Date: Thu, 4 May 2023 10:36:06 -0700 Message-Id: <20230504173612.17696-6-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.39.2 (Apple Git-143) In-Reply-To: <20230504173612.17696-1-ajit.khaparde@broadcom.com> References: <20230504173612.17696-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 Content-Type: multipart/signed; protocol="application/pkcs7-signature"; micalg=sha-256; boundary="000000000000f5e76f05fae19c44" X-Mailman-Approved-At: Fri, 05 May 2023 11:22:37 +0200 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org --000000000000f5e76f05fae19c44 Content-Transfer-Encoding: 8bit From: Randy Schacher - Update ulp generic templates - Modify code to support shared sessions This should allow more than one application to share a TruFlow session. Signed-off-by: Randy Schacher Signed-off-by: Kishore Padmanabha Reviewed-by: Shahaji Bhosle Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/bnxt.h | 16 +- drivers/net/bnxt/bnxt_ethdev.c | 8 +- drivers/net/bnxt/bnxt_reps.c | 4 +- drivers/net/bnxt/tf_core/tf_rm.c | 28 +- drivers/net/bnxt/tf_ulp/bnxt_ulp.c | 548 +- drivers/net/bnxt/tf_ulp/bnxt_ulp.h | 109 +- .../bnxt/tf_ulp/generic_templates/meson.build | 18 +- .../generic_templates/ulp_template_db_act.c | 7000 +++- .../generic_templates/ulp_template_db_class.c | 33556 +++++++++++----- .../generic_templates/ulp_template_db_enum.h | 4366 +- .../generic_templates/ulp_template_db_field.h | 689 +- .../generic_templates/ulp_template_db_tbl.c | 16055 ++++++-- .../ulp_template_db_thor_act.c | 8714 ++-- .../ulp_template_db_thor_class.c | 10746 +++-- .../ulp_template_db_wh_plus_act.c | 1157 +- .../ulp_template_db_wh_plus_class.c | 288 +- drivers/net/bnxt/tf_ulp/ulp_def_rules.c | 16 +- drivers/net/bnxt/tf_ulp/ulp_fc_mgr.c | 25 +- drivers/net/bnxt/tf_ulp/ulp_fc_mgr.h | 7 +- drivers/net/bnxt/tf_ulp/ulp_flow_db.c | 29 +- drivers/net/bnxt/tf_ulp/ulp_flow_db.h | 15 +- drivers/net/bnxt/tf_ulp/ulp_ha_mgr.c | 10 +- drivers/net/bnxt/tf_ulp/ulp_mapper.c | 281 +- drivers/net/bnxt/tf_ulp/ulp_port_db.c | 6 +- drivers/net/bnxt/tf_ulp/ulp_port_db.h | 10 +- drivers/net/bnxt/tf_ulp/ulp_rte_parser.c | 17 +- drivers/net/bnxt/tf_ulp/ulp_template_struct.h | 22 +- 27 files changed, 63079 insertions(+), 20661 deletions(-) diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h index 2bccdec7e0..bb2e7fe003 100644 --- a/drivers/net/bnxt/bnxt.h +++ b/drivers/net/bnxt/bnxt.h @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2014-2021 Broadcom + * Copyright(c) 2014-2023 Broadcom * All rights reserved. */ @@ -633,6 +633,13 @@ struct bnxt_ring_stats { uint64_t rx_agg_aborts; }; +enum bnxt_session_type { + BNXT_SESSION_TYPE_REGULAR = 0, + BNXT_SESSION_TYPE_SHARED_COMMON, + BNXT_SESSION_TYPE_SHARED_WC, + BNXT_SESSION_TYPE_LAST +}; + struct bnxt { void *bar0; @@ -690,6 +697,9 @@ struct bnxt { #define BNXT_FLAGS2_PTP_ALARM_SCHEDULED BIT(1) #define BNXT_P5_PTP_TIMESYNC_ENABLED(bp) \ ((bp)->flags2 & BNXT_FLAGS2_PTP_TIMESYNC_ENABLED) +#define BNXT_FLAGS2_TESTPMD_EN BIT(3) +#define BNXT_TESTPMD_EN(bp) \ + ((bp)->flags2 & BNXT_FLAGS2_TESTPMD_EN) uint16_t chip_num; #define CHIP_NUM_58818 0xd818 @@ -855,8 +865,7 @@ struct bnxt { uint16_t func_svif; uint16_t port_svif; - struct tf tfp; - struct tf tfp_shared; + struct tf tfp[BNXT_SESSION_TYPE_LAST]; struct bnxt_ulp_context *ulp_ctx; struct bnxt_flow_stat_info *flow_stat; uint16_t max_num_kflows; @@ -1044,4 +1053,5 @@ int bnxt_flow_ops_get_op(struct rte_eth_dev *dev, int bnxt_dev_start_op(struct rte_eth_dev *eth_dev); int bnxt_dev_stop_op(struct rte_eth_dev *eth_dev); void bnxt_handle_vf_cfg_change(void *arg); +struct tf *bnxt_get_tfp_session(struct bnxt *bp, enum bnxt_session_type type); #endif diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c index ef7b8859d9..bcde44bb14 100644 --- a/drivers/net/bnxt/bnxt_ethdev.c +++ b/drivers/net/bnxt/bnxt_ethdev.c @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2014-2021 Broadcom + * Copyright(c) 2014-2023 Broadcom * All rights reserved. */ @@ -6415,6 +6415,12 @@ bool is_bnxt_supported(struct rte_eth_dev *dev) return is_device_supported(dev, &bnxt_rte_pmd); } +struct tf *bnxt_get_tfp_session(struct bnxt *bp, enum bnxt_session_type type) +{ + return (type >= BNXT_SESSION_TYPE_LAST) ? + &bp->tfp[BNXT_SESSION_TYPE_REGULAR] : &bp->tfp[type]; +} + RTE_LOG_REGISTER_SUFFIX(bnxt_logtype_driver, driver, NOTICE); RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd); RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map); diff --git a/drivers/net/bnxt/bnxt_reps.c b/drivers/net/bnxt/bnxt_reps.c index 8a5b777793..78337431af 100644 --- a/drivers/net/bnxt/bnxt_reps.c +++ b/drivers/net/bnxt/bnxt_reps.c @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2014-2021 Broadcom + * Copyright(c) 2014-2023 Broadcom * All rights reserved. */ @@ -327,7 +327,7 @@ static int bnxt_tf_vfr_alloc(struct rte_eth_dev *vfr_ethdev) (void)bnxt_hwrm_cfa_pair_free(parent_bp, vfr); /* Update the ULP portdata base with the new VFR interface */ - rc = ulp_port_db_dev_port_intf_update(parent_bp->ulp_ctx, vfr_ethdev); + rc = ulp_port_db_port_update(parent_bp->ulp_ctx, vfr_ethdev); if (rc) { BNXT_TF_DBG(ERR, "Failed to update ulp port details vfr:%u\n", vfr->vf_id); diff --git a/drivers/net/bnxt/tf_core/tf_rm.c b/drivers/net/bnxt/tf_core/tf_rm.c index 1fccb698d0..9b85f5397d 100644 --- a/drivers/net/bnxt/tf_core/tf_rm.c +++ b/drivers/net/bnxt/tf_core/tf_rm.c @@ -364,8 +364,7 @@ tf_rm_update_parent_reservations(struct tf *tfp, struct tf_rm_element_cfg *cfg, uint16_t *alloc_cnt, uint16_t num_elements, - uint16_t *req_cnt, - bool shared_session) + uint16_t *req_cnt) { int parent, child; const char *type_str = NULL; @@ -376,11 +375,7 @@ tf_rm_update_parent_reservations(struct tf *tfp, /* If I am a parent */ if (cfg[parent].cfg_type == TF_RM_ELEM_CFG_HCAPI_BA_PARENT) { - uint8_t p_slices = 1; - - /* Shared session doesn't support slices */ - if (!shared_session) - p_slices = cfg[parent].slices; + uint8_t p_slices = cfg[parent].slices; RTE_ASSERT(p_slices); @@ -402,12 +397,9 @@ tf_rm_update_parent_reservations(struct tf *tfp, TF_RM_ELEM_CFG_HCAPI_BA_CHILD && cfg[child].parent_subtype == parent && alloc_cnt[child]) { - uint8_t c_slices = 1; + uint8_t c_slices = cfg[child].slices; uint16_t cnt = 0; - if (!shared_session) - c_slices = cfg[child].slices; - RTE_ASSERT(c_slices); dev->ops->tf_dev_get_resource_str(tfp, @@ -429,7 +421,7 @@ tf_rm_update_parent_reservations(struct tf *tfp, } } /* Save the parent count to be requested */ - req_cnt[parent] = combined_cnt; + req_cnt[parent] = combined_cnt * 2; } } return 0; @@ -452,7 +444,6 @@ tf_rm_create_db(struct tf *tfp, struct tf_rm_new_db *rm_db; struct tf_rm_element *db; uint32_t pool_size; - bool shared_session = 0; TF_CHECK_PARMS2(tfp, parms); @@ -505,15 +496,12 @@ tf_rm_create_db(struct tf *tfp, tfp_memcpy(req_cnt, parms->alloc_cnt, parms->num_elements * sizeof(uint16_t)); - shared_session = tf_session_is_shared_session(tfs); - /* Update the req_cnt based upon the element configuration */ tf_rm_update_parent_reservations(tfp, dev, parms->cfg, parms->alloc_cnt, parms->num_elements, - req_cnt, - shared_session); + req_cnt); /* Process capabilities against DB requirements. However, as a * DB can hold elements that are not HCAPI we can reduce the @@ -733,7 +721,6 @@ tf_rm_create_db_no_reservation(struct tf *tfp, struct tf_rm_new_db *rm_db; struct tf_rm_element *db; uint32_t pool_size; - bool shared_session = 0; TF_CHECK_PARMS2(tfp, parms); @@ -763,15 +750,12 @@ tf_rm_create_db_no_reservation(struct tf *tfp, tfp_memcpy(req_cnt, parms->alloc_cnt, parms->num_elements * sizeof(uint16_t)); - shared_session = tf_session_is_shared_session(tfs); - /* Update the req_cnt based upon the element configuration */ tf_rm_update_parent_reservations(tfp, dev, parms->cfg, parms->alloc_cnt, parms->num_elements, - req_cnt, - shared_session); + req_cnt); /* Process capabilities against DB requirements. However, as a * DB can hold elements that are not HCAPI we can reduce the diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp.c b/drivers/net/bnxt/tf_ulp/bnxt_ulp.c index 8513ee06a9..109bd0652a 100644 --- a/drivers/net/bnxt/tf_ulp/bnxt_ulp.c +++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp.c @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2019-2021 Broadcom + * Copyright(c) 2019-2023 Broadcom * All rights reserved. */ @@ -13,6 +13,7 @@ #include "bnxt.h" #include "bnxt_ulp.h" #include "bnxt_tf_common.h" +#include "hsi_struct_def_dpdk.h" #include "tf_core.h" #include "tf_ext_flow_handle.h" @@ -26,6 +27,7 @@ #include "ulp_tun.h" #include "ulp_ha_mgr.h" #include "bnxt_tf_pmd_shim.h" +#include "ulp_template_db_tbl.h" /* Linked list of all TF sessions. */ STAILQ_HEAD(, bnxt_ulp_session_state) bnxt_ulp_session_list = @@ -91,6 +93,17 @@ bnxt_ulp_app_cap_list_get(uint32_t *num_entries) return ulp_app_cap_info_list; } +struct bnxt_ulp_shared_act_info * +bnxt_ulp_shared_act_info_get(uint32_t *num_entries) +{ + if (!num_entries) + return NULL; + + *num_entries = BNXT_ULP_GEN_TBL_MAX_SZ; + + return ulp_shared_act_info; +} + static struct bnxt_ulp_resource_resv_info * bnxt_ulp_app_resource_resv_list_get(uint32_t *num_entries) { @@ -122,6 +135,7 @@ static int32_t bnxt_ulp_named_resources_calc(struct bnxt_ulp_context *ulp_ctx, struct bnxt_ulp_glb_resource_info *info, uint32_t num, + enum bnxt_ulp_session_type stype, struct tf_session_resources *res) { uint32_t dev_id = BNXT_ULP_DEVICE_ID_LAST, res_type, i; @@ -149,6 +163,11 @@ bnxt_ulp_named_resources_calc(struct bnxt_ulp_context *ulp_ctx, for (i = 0; i < num; i++) { if (dev_id != info[i].device_id || app_id != info[i].app_id) continue; + /* check to see if the session type matches only then include */ + if ((stype || info[i].session_type) && + !(info[i].session_type & stype)) + continue; + dir = info[i].direction; res_type = info[i].resource_type; @@ -179,6 +198,7 @@ static int32_t bnxt_ulp_unnamed_resources_calc(struct bnxt_ulp_context *ulp_ctx, struct bnxt_ulp_resource_resv_info *info, uint32_t num, + enum bnxt_ulp_session_type stype, struct tf_session_resources *res) { uint32_t dev_id, res_type, i; @@ -206,6 +226,12 @@ bnxt_ulp_unnamed_resources_calc(struct bnxt_ulp_context *ulp_ctx, for (i = 0; i < num; i++) { if (app_id != info[i].app_id || dev_id != info[i].device_id) continue; + + /* check to see if the session type matches only then include */ + if ((stype || info[i].session_type) && + !(info[i].session_type & stype)) + continue; + dir = info[i].direction; res_type = info[i].resource_type; @@ -231,6 +257,7 @@ bnxt_ulp_unnamed_resources_calc(struct bnxt_ulp_context *ulp_ctx, static int32_t bnxt_ulp_tf_resources_get(struct bnxt_ulp_context *ulp_ctx, + enum bnxt_ulp_session_type stype, struct tf_session_resources *res) { struct bnxt_ulp_resource_resv_info *unnamed = NULL; @@ -242,13 +269,18 @@ bnxt_ulp_tf_resources_get(struct bnxt_ulp_context *ulp_ctx, return -EINVAL; } + /* use DEFAULT_NON_HA instead of DEFAULT resources if HA is disabled */ + if (ULP_APP_HA_IS_DYNAMIC(ulp_ctx)) + stype = ulp_ctx->cfg_data->def_session_type; + unnamed = bnxt_ulp_resource_resv_list_get(&unum); if (unnamed == NULL) { BNXT_TF_DBG(ERR, "Unable to get resource resv list.\n"); return -EINVAL; } - rc = bnxt_ulp_unnamed_resources_calc(ulp_ctx, unnamed, unum, res); + rc = bnxt_ulp_unnamed_resources_calc(ulp_ctx, unnamed, unum, stype, + res); if (rc) BNXT_TF_DBG(ERR, "Unable to calc resources for session.\n"); @@ -257,6 +289,7 @@ bnxt_ulp_tf_resources_get(struct bnxt_ulp_context *ulp_ctx, static int32_t bnxt_ulp_tf_shared_session_resources_get(struct bnxt_ulp_context *ulp_ctx, + enum bnxt_ulp_session_type stype, struct tf_session_resources *res) { struct bnxt_ulp_resource_resv_info *unnamed; @@ -272,6 +305,10 @@ bnxt_ulp_tf_shared_session_resources_get(struct bnxt_ulp_context *ulp_ctx, /* Make sure the resources are zero before accumulating. */ memset(res, 0, sizeof(struct tf_session_resources)); + if (bnxt_ulp_cntxt_ha_enabled(ulp_ctx) && + stype == BNXT_ULP_SESSION_TYPE_SHARED) + stype = ulp_ctx->cfg_data->hu_session_type; + /* * Shared resources are comprised of both named and unnamed resources. * First get the unnamed counts, and then add the named to the result. @@ -282,9 +319,11 @@ bnxt_ulp_tf_shared_session_resources_get(struct bnxt_ulp_context *ulp_ctx, BNXT_TF_DBG(ERR, "Unable to get shared resource resv list.\n"); return -EINVAL; } - rc = bnxt_ulp_unnamed_resources_calc(ulp_ctx, unnamed, unum, res); + rc = bnxt_ulp_unnamed_resources_calc(ulp_ctx, unnamed, unum, stype, + res); if (rc) { - BNXT_TF_DBG(ERR, "Unable to calc resources for shared session.\n"); + BNXT_TF_DBG(ERR, + "Unable to calc resources for shared session.\n"); return -EINVAL; } @@ -294,7 +333,7 @@ bnxt_ulp_tf_shared_session_resources_get(struct bnxt_ulp_context *ulp_ctx, BNXT_TF_DBG(ERR, "Unable to get app global resource list\n"); return -EINVAL; } - rc = bnxt_ulp_named_resources_calc(ulp_ctx, named, nnum, res); + rc = bnxt_ulp_named_resources_calc(ulp_ctx, named, nnum, stype, res); if (rc) BNXT_TF_DBG(ERR, "Unable to calc named resources\n"); @@ -356,17 +395,127 @@ bnxt_ulp_cntxt_app_caps_init(struct bnxt *bp, return 0; } +/* Function to set the number for vxlan_ip (custom vxlan) port into the context */ +int +bnxt_ulp_vxlan_ip_port_set(struct bnxt_ulp_context *ulp_ctx, + uint32_t vxlan_ip_port) +{ + if (!ulp_ctx || !ulp_ctx->cfg_data) + return -EINVAL; + + ulp_ctx->cfg_data->vxlan_ip_port = vxlan_ip_port; + + return 0; +} + +/* Function to retrieve the vxlan_ip (custom vxlan) port from the context. */ +unsigned int +bnxt_ulp_vxlan_ip_port_get(struct bnxt_ulp_context *ulp_ctx) +{ + if (!ulp_ctx || !ulp_ctx->cfg_data) + return 0; + + return (unsigned int)ulp_ctx->cfg_data->vxlan_ip_port; +} + +/* Function to set the number for vxlan port into the context */ +int +bnxt_ulp_vxlan_port_set(struct bnxt_ulp_context *ulp_ctx, + uint32_t vxlan_port) +{ + if (!ulp_ctx || !ulp_ctx->cfg_data) + return -EINVAL; + + ulp_ctx->cfg_data->vxlan_port = vxlan_port; + + return 0; +} + +/* Function to retrieve the vxlan port from the context. */ +unsigned int +bnxt_ulp_vxlan_port_get(struct bnxt_ulp_context *ulp_ctx) +{ + if (!ulp_ctx || !ulp_ctx->cfg_data) + return 0; + + return (unsigned int)ulp_ctx->cfg_data->vxlan_port; +} + +static inline uint32_t +bnxt_ulp_session_idx_get(enum bnxt_ulp_session_type session_type) { + if (session_type & BNXT_ULP_SESSION_TYPE_SHARED) + return 1; + else if (session_type & BNXT_ULP_SESSION_TYPE_SHARED_WC) + return 2; + return 0; +} + +/* Function to set the tfp session details in session */ +static int32_t +bnxt_ulp_session_tfp_set(struct bnxt_ulp_session_state *session, + enum bnxt_ulp_session_type session_type, + struct tf *tfp) +{ + uint32_t idx = bnxt_ulp_session_idx_get(session_type); + int32_t rc = 0; + + if (!session->session_opened[idx]) { + session->g_tfp[idx] = rte_zmalloc("bnxt_ulp_session_tfp", + sizeof(struct tf), 0); + if (!session->g_tfp[idx]) { + BNXT_TF_DBG(DEBUG, "Failed to alloc session tfp\n"); + return -ENOMEM; + } + session->g_tfp[idx]->session = tfp->session; + session->session_opened[idx] = 1; + } + return rc; +} + +/* Function to get the tfp session details in session */ +static struct tf_session_info * +bnxt_ulp_session_tfp_get(struct bnxt_ulp_session_state *session, + enum bnxt_ulp_session_type session_type) +{ + uint32_t idx = bnxt_ulp_session_idx_get(session_type); + + if (session->session_opened[idx]) + return session->g_tfp[idx]->session; + return NULL; +} + +static uint32_t +bnxt_ulp_session_is_open(struct bnxt_ulp_session_state *session, + enum bnxt_ulp_session_type session_type) +{ + uint32_t idx = bnxt_ulp_session_idx_get(session_type); + + return session->session_opened[idx]; +} + +/* Function to reset the tfp session details in session */ +static void +bnxt_ulp_session_tfp_reset(struct bnxt_ulp_session_state *session, + enum bnxt_ulp_session_type session_type) +{ + uint32_t idx = bnxt_ulp_session_idx_get(session_type); + + if (session->session_opened[idx]) { + session->session_opened[idx] = 0; + rte_free(session->g_tfp[idx]); + session->g_tfp[idx] = NULL; + } +} + static void ulp_ctx_shared_session_close(struct bnxt *bp, + enum bnxt_ulp_session_type session_type, struct bnxt_ulp_session_state *session) { struct tf *tfp; int32_t rc; - if (!bnxt_ulp_cntxt_shared_session_enabled(bp->ulp_ctx)) - return; - - tfp = bnxt_ulp_cntxt_shared_tfp_get(bp->ulp_ctx); + tfp = bnxt_ulp_cntxt_tfp_get(bp->ulp_ctx, session_type); if (!tfp) { /* * Log it under debug since this is likely a case of the @@ -380,29 +529,26 @@ ulp_ctx_shared_session_close(struct bnxt *bp, if (rc) BNXT_TF_DBG(ERR, "Failed to close the shared session rc=%d.\n", rc); - (void)bnxt_ulp_cntxt_shared_tfp_set(bp->ulp_ctx, NULL); - - session->g_shared_tfp.session = NULL; + (void)bnxt_ulp_cntxt_tfp_set(bp->ulp_ctx, session_type, NULL); + bnxt_ulp_session_tfp_reset(session, session_type); } static int32_t ulp_ctx_shared_session_open(struct bnxt *bp, + enum bnxt_ulp_session_type session_type, struct bnxt_ulp_session_state *session) { struct rte_eth_dev *ethdev = bp->eth_dev; struct tf_session_resources *resources; struct tf_open_session_parms parms; - size_t copy_nbytes; + size_t nb; uint32_t ulp_dev_id = BNXT_ULP_DEVICE_ID_LAST; int32_t rc = 0; uint8_t app_id; - - /* only perform this if shared session is enabled. */ - if (!bnxt_ulp_cntxt_shared_session_enabled(bp->ulp_ctx)) - return 0; + struct tf *tfp; + uint8_t pool_id; memset(&parms, 0, sizeof(parms)); - rc = rte_eth_dev_get_name_by_port(ethdev->data->port_id, parms.ctrl_chan_name); if (rc) { @@ -416,21 +562,39 @@ ulp_ctx_shared_session_open(struct bnxt *bp, * Need to account for size of ctrl_chan_name and 1 extra for Null * terminator */ - copy_nbytes = sizeof(parms.ctrl_chan_name) - - strlen(parms.ctrl_chan_name) - 1; + nb = sizeof(parms.ctrl_chan_name) - strlen(parms.ctrl_chan_name) - 1; /* * Build the ctrl_chan_name with shared token. * When HA is enabled, the WC TCAM needs extra management by the core, * so add the wc_tcam string to the control channel. */ - if (bnxt_ulp_cntxt_ha_enabled(bp->ulp_ctx)) - strncat(parms.ctrl_chan_name, "-tf_shared-wc_tcam", - copy_nbytes); - else - strncat(parms.ctrl_chan_name, "-tf_shared", copy_nbytes); + pool_id = bp->ulp_ctx->cfg_data->ha_pool_id; + if (!bnxt_ulp_cntxt_multi_shared_session_enabled(bp->ulp_ctx)) { + if (bnxt_ulp_cntxt_ha_enabled(bp->ulp_ctx)) + strncat(parms.ctrl_chan_name, "-tf_shared-wc_tcam", nb); + else + strncat(parms.ctrl_chan_name, "-tf_shared", nb); + } else if (bnxt_ulp_cntxt_multi_shared_session_enabled(bp->ulp_ctx)) { + if (session_type == BNXT_ULP_SESSION_TYPE_SHARED) { + strncat(parms.ctrl_chan_name, "-tf_shared", nb); + } else if (session_type == BNXT_ULP_SESSION_TYPE_SHARED_WC) { + char session_pool_name[64]; + + sprintf(session_pool_name, "-tf_shared-pool%d", + pool_id); + + if (nb >= strlen(session_pool_name)) { + strncat(parms.ctrl_chan_name, session_pool_name, nb); + } else { + BNXT_TF_DBG(ERR, "No space left for session_name\n"); + return -EINVAL; + } + } + } - rc = bnxt_ulp_tf_shared_session_resources_get(bp->ulp_ctx, resources); + rc = bnxt_ulp_tf_shared_session_resources_get(bp->ulp_ctx, session_type, + resources); if (rc) return rc; @@ -446,32 +610,15 @@ ulp_ctx_shared_session_open(struct bnxt *bp, return rc; } - switch (ulp_dev_id) { - case BNXT_ULP_DEVICE_ID_WH_PLUS: - parms.device_type = TF_DEVICE_TYPE_P5; - break; - case BNXT_ULP_DEVICE_ID_STINGRAY: - parms.device_type = TF_DEVICE_TYPE_SR; - break; - case BNXT_ULP_DEVICE_ID_THOR: - parms.device_type = TF_DEVICE_TYPE_P4; - break; - default: - BNXT_TF_DBG(ERR, "Unable to determine dev for opening session.\n"); - return rc; - } - + tfp = bnxt_ulp_bp_tfp_get(bp, session_type); + parms.device_type = bnxt_ulp_cntxt_convert_dev_id(ulp_dev_id); parms.bp = bp; - if (app_id == 0) - parms.wc_num_slices = TF_WC_TCAM_2_SLICE_PER_ROW; - else - parms.wc_num_slices = TF_WC_TCAM_1_SLICE_PER_ROW; /* * Open the session here, but the collect the resources during the * mapper initialization. */ - rc = tf_open_session(&bp->tfp_shared, &parms); + rc = tf_open_session(tfp, &parms); if (rc) return rc; @@ -481,40 +628,70 @@ ulp_ctx_shared_session_open(struct bnxt *bp, BNXT_TF_DBG(DEBUG, "Shared session attached.\n"); /* Save the shared session in global data */ - if (!session->g_shared_tfp.session) - session->g_shared_tfp.session = bp->tfp_shared.session; + rc = bnxt_ulp_session_tfp_set(session, session_type, tfp); + if (rc) { + BNXT_TF_DBG(ERR, "Failed to add shared tfp to session\n"); + return rc; + } - rc = bnxt_ulp_cntxt_shared_tfp_set(bp->ulp_ctx, &bp->tfp_shared); - if (rc) + rc = bnxt_ulp_cntxt_tfp_set(bp->ulp_ctx, session_type, tfp); + if (rc) { BNXT_TF_DBG(ERR, "Failed to add shared tfp to ulp (%d)\n", rc); + return rc; + } return rc; } static int32_t ulp_ctx_shared_session_attach(struct bnxt *bp, - struct bnxt_ulp_session_state *session) + struct bnxt_ulp_session_state *ses) { + enum bnxt_ulp_session_type type; + struct tf *tfp; int32_t rc = 0; /* Simply return success if shared session not enabled */ if (bnxt_ulp_cntxt_shared_session_enabled(bp->ulp_ctx)) { - bp->tfp_shared.session = session->g_shared_tfp.session; - rc = ulp_ctx_shared_session_open(bp, session); + type = BNXT_ULP_SESSION_TYPE_SHARED; + tfp = bnxt_ulp_bp_tfp_get(bp, type); + tfp->session = bnxt_ulp_session_tfp_get(ses, type); + rc = ulp_ctx_shared_session_open(bp, type, ses); + } + + if (bnxt_ulp_cntxt_multi_shared_session_enabled(bp->ulp_ctx)) { + type = BNXT_ULP_SESSION_TYPE_SHARED_WC; + tfp = bnxt_ulp_bp_tfp_get(bp, type); + tfp->session = bnxt_ulp_session_tfp_get(ses, type); + rc = ulp_ctx_shared_session_open(bp, type, ses); } + if (!rc) + bnxt_ulp_cntxt_num_shared_clients_set(bp->ulp_ctx, true); + return rc; } static void ulp_ctx_shared_session_detach(struct bnxt *bp) { + struct tf *tfp; + if (bnxt_ulp_cntxt_shared_session_enabled(bp->ulp_ctx)) { - if (bp->tfp_shared.session) { - tf_close_session(&bp->tfp_shared); - bp->tfp_shared.session = NULL; + tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_SHARED); + if (tfp->session) { + tf_close_session(tfp); + tfp->session = NULL; } } + if (bnxt_ulp_cntxt_multi_shared_session_enabled(bp->ulp_ctx)) { + tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_SHARED_WC); + if (tfp->session) { + tf_close_session(tfp); + tfp->session = NULL; + } + } + bnxt_ulp_cntxt_num_shared_clients_set(bp->ulp_ctx, false); } /* @@ -538,6 +715,7 @@ ulp_ctx_session_open(struct bnxt *bp, struct tf_session_resources *resources; uint32_t ulp_dev_id = BNXT_ULP_DEVICE_ID_LAST; uint8_t app_id; + struct tf *tfp; memset(¶ms, 0, sizeof(params)); @@ -561,43 +739,29 @@ ulp_ctx_session_open(struct bnxt *bp, return rc; } - switch (ulp_dev_id) { - case BNXT_ULP_DEVICE_ID_WH_PLUS: - params.device_type = TF_DEVICE_TYPE_P5; - break; - case BNXT_ULP_DEVICE_ID_STINGRAY: - params.device_type = TF_DEVICE_TYPE_SR; - break; - case BNXT_ULP_DEVICE_ID_THOR: - params.device_type = TF_DEVICE_TYPE_P4; - break; - default: - BNXT_TF_DBG(ERR, "Unable to determine device for opening session.\n"); - return rc; - } - + params.device_type = bnxt_ulp_cntxt_convert_dev_id(ulp_dev_id); resources = ¶ms.resources; - rc = bnxt_ulp_tf_resources_get(bp->ulp_ctx, resources); + rc = bnxt_ulp_tf_resources_get(bp->ulp_ctx, + BNXT_ULP_SESSION_TYPE_DEFAULT, + resources); if (rc) return rc; params.bp = bp; - if (app_id == 0) - params.wc_num_slices = TF_WC_TCAM_2_SLICE_PER_ROW; - else - params.wc_num_slices = TF_WC_TCAM_1_SLICE_PER_ROW; - rc = tf_open_session(&bp->tfp, ¶ms); + tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT); + rc = tf_open_session(tfp, ¶ms); if (rc) { BNXT_TF_DBG(ERR, "Failed to open TF session - %s, rc = %d\n", params.ctrl_chan_name, rc); return -EINVAL; } - if (!session->session_opened) { - session->session_opened = 1; - session->g_tfp = rte_zmalloc("bnxt_ulp_session_tfp", - sizeof(struct tf), 0); - session->g_tfp->session = bp->tfp.session; + rc = bnxt_ulp_session_tfp_set(session, + BNXT_ULP_SESSION_TYPE_DEFAULT, tfp); + if (rc) { + BNXT_TF_DBG(ERR, "Failed to set TF session - %s, rc = %d\n", + params.ctrl_chan_name, rc); + return -EINVAL; } return rc; } @@ -610,12 +774,14 @@ static void ulp_ctx_session_close(struct bnxt *bp, struct bnxt_ulp_session_state *session) { + struct tf *tfp; + /* close the session in the hardware */ - if (session->session_opened) - tf_close_session(&bp->tfp); - session->session_opened = 0; - rte_free(session->g_tfp); - session->g_tfp = NULL; + if (bnxt_ulp_session_is_open(session, BNXT_ULP_SESSION_TYPE_DEFAULT)) { + tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT); + tf_close_session(tfp); + } + bnxt_ulp_session_tfp_reset(session, BNXT_ULP_SESSION_TYPE_DEFAULT); } static void @@ -678,6 +844,7 @@ ulp_eem_tbl_scope_init(struct bnxt *bp) struct bnxt_ulp_device_params *dparms; enum bnxt_ulp_flow_mem_type mtype; uint32_t dev_id; + struct tf *tfp; int rc; /* Get the dev specific number of flows that needed to be supported. */ @@ -700,12 +867,14 @@ ulp_eem_tbl_scope_init(struct bnxt *bp) } bnxt_init_tbl_scope_parms(bp, ¶ms); - rc = tf_alloc_tbl_scope(&bp->tfp, ¶ms); + tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT); + rc = tf_alloc_tbl_scope(tfp, ¶ms); if (rc) { BNXT_TF_DBG(ERR, "Unable to allocate eem table scope rc = %d\n", rc); return rc; } + rc = bnxt_ulp_cntxt_tbl_scope_id_set(bp->ulp_ctx, params.tbl_scope_id); if (rc) { BNXT_TF_DBG(ERR, "Unable to set table scope id\n"); @@ -729,7 +898,7 @@ ulp_eem_tbl_scope_deinit(struct bnxt *bp, struct bnxt_ulp_context *ulp_ctx) if (!ulp_ctx || !ulp_ctx->cfg_data) return -EINVAL; - tfp = bnxt_ulp_cntxt_tfp_get(ulp_ctx, BNXT_ULP_SHARED_SESSION_NO); + tfp = bnxt_ulp_cntxt_tfp_get(ulp_ctx, BNXT_ULP_SESSION_TYPE_DEFAULT); if (!tfp) { BNXT_TF_DBG(ERR, "Failed to get the truflow pointer\n"); return -EINVAL; @@ -777,7 +946,16 @@ ulp_ctx_deinit(struct bnxt *bp, ulp_ctx_session_close(bp, session); /* The shared session must be closed last. */ - ulp_ctx_shared_session_close(bp, session); + if (bnxt_ulp_cntxt_shared_session_enabled(bp->ulp_ctx)) + ulp_ctx_shared_session_close(bp, BNXT_ULP_SESSION_TYPE_SHARED, + session); + + if (bnxt_ulp_cntxt_multi_shared_session_enabled(bp->ulp_ctx)) + ulp_ctx_shared_session_close(bp, + BNXT_ULP_SESSION_TYPE_SHARED_WC, + session); + + bnxt_ulp_cntxt_num_shared_clients_set(bp->ulp_ctx, false); /* Free the contents */ if (session->cfg_data) { @@ -796,6 +974,8 @@ ulp_ctx_init(struct bnxt *bp, struct bnxt_ulp_data *ulp_data; int32_t rc = 0; enum bnxt_ulp_device_id devid; + enum bnxt_ulp_session_type stype; + struct tf *tfp; /* Initialize the context entries list */ bnxt_ulp_cntxt_list_init(); @@ -851,22 +1031,42 @@ ulp_ctx_init(struct bnxt *bp, * Shared session must be created before first regular session but after * the ulp_ctx is valid. */ - rc = ulp_ctx_shared_session_open(bp, session); - if (rc) { - BNXT_TF_DBG(ERR, "Unable to open shared session (%d)\n", rc); - goto error_deinit; + if (bnxt_ulp_cntxt_shared_session_enabled(bp->ulp_ctx)) { + rc = ulp_ctx_shared_session_open(bp, + BNXT_ULP_SESSION_TYPE_SHARED, + session); + if (rc) { + BNXT_TF_DBG(ERR, "Unable to open shared session (%d)\n", + rc); + goto error_deinit; + } } + /* Multiple session support */ + if (bnxt_ulp_cntxt_multi_shared_session_enabled(bp->ulp_ctx)) { + stype = BNXT_ULP_SESSION_TYPE_SHARED_WC; + rc = ulp_ctx_shared_session_open(bp, stype, session); + if (rc) { + BNXT_TF_DBG(ERR, + "Unable to open shared wc session (%d)\n", + rc); + goto error_deinit; + } + } + bnxt_ulp_cntxt_num_shared_clients_set(bp->ulp_ctx, true); + + /* Open the ulp session. */ rc = ulp_ctx_session_open(bp, session); if (rc) goto error_deinit; - bnxt_ulp_cntxt_tfp_set(bp->ulp_ctx, &bp->tfp); + tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT); + bnxt_ulp_cntxt_tfp_set(bp->ulp_ctx, BNXT_ULP_SESSION_TYPE_DEFAULT, tfp); return rc; error_deinit: - session->session_opened = 1; + session->session_opened[BNXT_ULP_SESSION_TYPE_DEFAULT] = 1; (void)ulp_ctx_deinit(bp, session); return rc; } @@ -932,6 +1132,7 @@ ulp_ctx_attach(struct bnxt *bp, { int32_t rc = 0; uint32_t flags, dev_id = BNXT_ULP_DEVICE_ID_LAST; + struct tf *tfp; uint8_t app_id; /* Increment the ulp context data reference count usage. */ @@ -939,7 +1140,9 @@ ulp_ctx_attach(struct bnxt *bp, bp->ulp_ctx->cfg_data->ref_cnt++; /* update the session details in bnxt tfp */ - bp->tfp.session = session->g_tfp->session; + tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT); + tfp->session = bnxt_ulp_session_tfp_get(session, + BNXT_ULP_SESSION_TYPE_DEFAULT); /* Add the context to the context entries list */ rc = bnxt_ulp_cntxt_list_add(bp->ulp_ctx); @@ -975,20 +1178,23 @@ ulp_ctx_attach(struct bnxt *bp, rc = ulp_ctx_session_open(bp, session); if (rc) { PMD_DRV_LOG(ERR, "Failed to open ctxt session, rc:%d\n", rc); - bp->tfp.session = NULL; + tfp->session = NULL; return rc; } - bnxt_ulp_cntxt_tfp_set(bp->ulp_ctx, &bp->tfp); + bnxt_ulp_cntxt_tfp_set(bp->ulp_ctx, BNXT_ULP_SESSION_TYPE_DEFAULT, tfp); return rc; } static void ulp_ctx_detach(struct bnxt *bp) { - if (bp->tfp.session) { - tf_close_session(&bp->tfp); - bp->tfp.session = NULL; + struct tf *tfp; + + tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT); + if (tfp->session) { + tf_close_session(tfp); + tfp->session = NULL; } } @@ -1121,6 +1327,7 @@ bnxt_ulp_global_cfg_update(struct bnxt *bp, uint32_t global_cfg = 0; int rc; struct tf_global_cfg_parms parms = { 0 }; + struct tf *tfp; /* Initialize the params */ parms.dir = dir, @@ -1129,7 +1336,8 @@ bnxt_ulp_global_cfg_update(struct bnxt *bp, parms.config = (uint8_t *)&global_cfg, parms.config_sz_in_bytes = sizeof(global_cfg); - rc = tf_get_global_cfg(&bp->tfp, &parms); + tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT); + rc = tf_get_global_cfg(tfp, &parms); if (rc) { BNXT_TF_DBG(ERR, "Failed to get global cfg 0x%x rc:%d\n", type, rc); @@ -1142,7 +1350,7 @@ bnxt_ulp_global_cfg_update(struct bnxt *bp, global_cfg &= ~value; /* SET the register RE_CFA_REG_ACT_TECT */ - rc = tf_set_global_cfg(&bp->tfp, &parms); + rc = tf_set_global_cfg(tfp, &parms); if (rc) { BNXT_TF_DBG(ERR, "Failed to set global cfg 0x%x rc:%d\n", type, rc); @@ -1473,7 +1681,7 @@ bnxt_ulp_port_init(struct bnxt *bp) } /* update the port database for the given interface */ - rc = ulp_port_db_dev_port_intf_update(bp->ulp_ctx, bp->eth_dev); + rc = ulp_port_db_port_update(bp->ulp_ctx, bp->eth_dev); if (rc) { BNXT_TF_DBG(ERR, "Failed to update port database\n"); goto jump_to_error; @@ -1624,6 +1832,12 @@ bnxt_ulp_cntxt_shared_session_enabled(struct bnxt_ulp_context *ulp_ctx) return ULP_SHARED_SESSION_IS_ENABLED(ulp_ctx->cfg_data->ulp_flags); } +bool +bnxt_ulp_cntxt_multi_shared_session_enabled(struct bnxt_ulp_context *ulp_ctx) +{ + return ULP_MULTI_SHARED_IS_SUPPORTED(ulp_ctx); +} + int32_t bnxt_ulp_cntxt_app_id_set(struct bnxt_ulp_context *ulp_ctx, uint8_t app_id) { @@ -1721,74 +1935,86 @@ bnxt_ulp_cntxt_tbl_scope_id_set(struct bnxt_ulp_context *ulp_ctx, return -EINVAL; } -/* Function to set the shared tfp session details from the ulp context. */ -int32_t -bnxt_ulp_cntxt_shared_tfp_set(struct bnxt_ulp_context *ulp, struct tf *tfp) -{ - if (!ulp) { - BNXT_TF_DBG(ERR, "Invalid arguments\n"); - return -EINVAL; - } - - if (tfp == NULL) { - if (ulp->cfg_data->num_shared_clients > 0) - ulp->cfg_data->num_shared_clients--; - } else { - ulp->cfg_data->num_shared_clients++; - } - - ulp->g_shared_tfp = tfp; - return 0; -} - -/* Function to get the shared tfp session details from the ulp context. */ -struct tf * -bnxt_ulp_cntxt_shared_tfp_get(struct bnxt_ulp_context *ulp) +/* Function to get the number of shared clients attached */ +uint8_t +bnxt_ulp_cntxt_num_shared_clients_get(struct bnxt_ulp_context *ulp) { - if (!ulp) { + if (ulp == NULL || ulp->cfg_data == NULL) { BNXT_TF_DBG(ERR, "Invalid arguments\n"); - return NULL; + return 0; } - return ulp->g_shared_tfp; + return ulp->cfg_data->num_shared_clients; } -/* Function to get the number of shared clients attached */ -uint8_t -bnxt_ulp_cntxt_num_shared_clients_get(struct bnxt_ulp_context *ulp) +/* Function to set the number of shared clients */ +int +bnxt_ulp_cntxt_num_shared_clients_set(struct bnxt_ulp_context *ulp, bool incr) { if (ulp == NULL || ulp->cfg_data == NULL) { BNXT_TF_DBG(ERR, "Invalid arguments\n"); return 0; } - return ulp->cfg_data->num_shared_clients; + if (incr) + ulp->cfg_data->num_shared_clients++; + else if (ulp->cfg_data->num_shared_clients) + ulp->cfg_data->num_shared_clients--; + + BNXT_TF_DBG(DEBUG, "%d:clients(%d)\n", incr, + ulp->cfg_data->num_shared_clients); + + return 0; } /* Function to set the tfp session details from the ulp context. */ int32_t -bnxt_ulp_cntxt_tfp_set(struct bnxt_ulp_context *ulp, struct tf *tfp) +bnxt_ulp_cntxt_tfp_set(struct bnxt_ulp_context *ulp, + enum bnxt_ulp_session_type s_type, + struct tf *tfp) { + uint32_t idx = 0; + if (!ulp) { BNXT_TF_DBG(ERR, "Invalid arguments\n"); return -EINVAL; } + if (ULP_MULTI_SHARED_IS_SUPPORTED(ulp)) { + if (s_type & BNXT_ULP_SESSION_TYPE_SHARED) + idx = 1; + else if (s_type & BNXT_ULP_SESSION_TYPE_SHARED_WC) + idx = 2; + + } else { + if ((s_type & BNXT_ULP_SESSION_TYPE_SHARED) || + (s_type & BNXT_ULP_SESSION_TYPE_SHARED_WC)) + idx = 1; + } - ulp->g_tfp = tfp; + ulp->g_tfp[idx] = tfp; return 0; } /* Function to get the tfp session details from the ulp context. */ struct tf * bnxt_ulp_cntxt_tfp_get(struct bnxt_ulp_context *ulp, - enum bnxt_ulp_shared_session shared) + enum bnxt_ulp_session_type s_type) { + uint32_t idx = 0; + if (!ulp) { BNXT_TF_DBG(ERR, "Invalid arguments\n"); return NULL; } - if (shared) - return ulp->g_shared_tfp; - else - return ulp->g_tfp; + if (ULP_MULTI_SHARED_IS_SUPPORTED(ulp)) { + if (s_type & BNXT_ULP_SESSION_TYPE_SHARED) + idx = 1; + else if (s_type & BNXT_ULP_SESSION_TYPE_SHARED_WC) + idx = 2; + } else { + if ((s_type & BNXT_ULP_SESSION_TYPE_SHARED) || + (s_type & BNXT_ULP_SESSION_TYPE_SHARED_WC)) + idx = 1; + } + return ulp->g_tfp[idx]; } /* @@ -2079,3 +2305,41 @@ bnxt_ulp_cntxt_ptr2_app_tun_list_get(struct bnxt_ulp_context *ulp) return ulp->cfg_data->app_tun; } + +/* Function to convert ulp dev id to regular dev id. */ +uint32_t +bnxt_ulp_cntxt_convert_dev_id(uint32_t ulp_dev_id) +{ + enum tf_device_type type = 0; + + switch (ulp_dev_id) { + case BNXT_ULP_DEVICE_ID_WH_PLUS: + type = TF_DEVICE_TYPE_P4; + break; + case BNXT_ULP_DEVICE_ID_STINGRAY: + type = TF_DEVICE_TYPE_SR; + break; + case BNXT_ULP_DEVICE_ID_THOR: + type = TF_DEVICE_TYPE_P5; + break; + default: + BNXT_TF_DBG(ERR, "Invalid device id\n"); + break; + } + return type; +} + +struct tf* +bnxt_ulp_bp_tfp_get(struct bnxt *bp, enum bnxt_ulp_session_type type) +{ + enum bnxt_session_type btype; + + if (type & BNXT_ULP_SESSION_TYPE_SHARED) + btype = BNXT_SESSION_TYPE_SHARED_COMMON; + else if (type & BNXT_ULP_SESSION_TYPE_SHARED_WC) + btype = BNXT_SESSION_TYPE_SHARED_WC; + else + btype = BNXT_SESSION_TYPE_REGULAR; + + return bnxt_get_tfp_session(bp, btype); +} diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp.h b/drivers/net/bnxt/tf_ulp/bnxt_ulp.h index 906d933af5..9b30851b13 100644 --- a/drivers/net/bnxt/tf_ulp/bnxt_ulp.h +++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp.h @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2019-2021 Broadcom + * Copyright(c) 2019-2023 Broadcom * All rights reserved. */ @@ -35,6 +35,11 @@ #define BNXT_ULP_HIGH_AVAIL_ENABLED 0x8 #define BNXT_ULP_APP_UNICAST_ONLY 0x10 #define BNXT_ULP_APP_SOCKET_DIRECT 0x20 +#define BNXT_ULP_APP_TOS_PROTO_SUPPORT 0x40 +#define BNXT_ULP_APP_BC_MC_SUPPORT 0x80 +#define BNXT_ULP_CUST_VXLAN_SUPPORT 0x100 +#define BNXT_ULP_MULTI_SHARED_SUPPORT 0x200 +#define BNXT_ULP_APP_HA_DYNAMIC 0x400 #define ULP_VF_REP_IS_ENABLED(flag) ((flag) & BNXT_ULP_VF_REP_ENABLED) #define ULP_SHARED_SESSION_IS_ENABLED(flag) ((flag) &\ @@ -43,6 +48,17 @@ BNXT_ULP_APP_DEV_UNSUPPORTED) #define ULP_HIGH_AVAIL_IS_ENABLED(flag) ((flag) & BNXT_ULP_HIGH_AVAIL_ENABLED) #define ULP_SOCKET_DIRECT_IS_ENABLED(flag) ((flag) & BNXT_ULP_APP_SOCKET_DIRECT) +#define ULP_APP_TOS_PROTO_SUPPORT(ctx) ((ctx)->cfg_data->ulp_flags &\ + BNXT_ULP_APP_TOS_PROTO_SUPPORT) +#define ULP_APP_BC_MC_SUPPORT(ctx) ((ctx)->cfg_data->ulp_flags &\ + BNXT_ULP_APP_BC_MC_SUPPORT) +#define ULP_MULTI_SHARED_IS_SUPPORTED(ctx) ((ctx)->cfg_data->ulp_flags &\ + BNXT_ULP_MULTI_SHARED_SUPPORT) +#define ULP_APP_HA_IS_DYNAMIC(ctx) ((ctx)->cfg_data->ulp_flags &\ + BNXT_ULP_APP_HA_DYNAMIC) + +#define ULP_APP_CUST_VXLAN_SUPPORT(ctx) ((ctx)->cfg_data->vxlan_port != 0) +#define ULP_APP_CUST_VXLAN_IP_SUPPORT(ctx) ((ctx)->cfg_data->vxlan_ip_port != 0) enum bnxt_ulp_flow_mem_type { BNXT_ULP_FLOW_MEM_TYPE_INT = 0, @@ -95,12 +111,19 @@ struct bnxt_ulp_data { uint8_t app_id; uint8_t num_shared_clients; struct bnxt_flow_app_tun_ent app_tun[BNXT_ULP_MAX_TUN_CACHE_ENTRIES]; + uint32_t vxlan_port; + uint32_t vxlan_ip_port; + uint8_t hu_reg_state; + uint8_t hu_reg_cnt; + uint32_t hu_session_type; + uint8_t ha_pool_id; + enum bnxt_ulp_session_type def_session_type; }; +#define BNXT_ULP_SESSION_MAX 3 struct bnxt_ulp_context { struct bnxt_ulp_data *cfg_data; - struct tf *g_tfp; - struct tf *g_shared_tfp; + struct tf *g_tfp[BNXT_ULP_SESSION_MAX]; }; struct bnxt_ulp_pci_info { @@ -110,13 +133,12 @@ struct bnxt_ulp_pci_info { struct bnxt_ulp_session_state { STAILQ_ENTRY(bnxt_ulp_session_state) next; - bool bnxt_ulp_init; - pthread_mutex_t bnxt_ulp_mutex; - struct bnxt_ulp_pci_info pci_info; - struct bnxt_ulp_data *cfg_data; - struct tf *g_tfp; - struct tf g_shared_tfp; - uint32_t session_opened; + bool bnxt_ulp_init; + pthread_mutex_t bnxt_ulp_mutex; + struct bnxt_ulp_pci_info pci_info; + struct bnxt_ulp_data *cfg_data; + struct tf *g_tfp[BNXT_ULP_SESSION_MAX]; + uint32_t session_opened[BNXT_ULP_SESSION_MAX]; }; /* ULP flow id structure */ @@ -172,20 +194,14 @@ bnxt_ulp_cntxt_tbl_scope_id_get(struct bnxt_ulp_context *ulp_ctx, /* Function to set the tfp session details in the ulp context. */ int32_t -bnxt_ulp_cntxt_shared_tfp_set(struct bnxt_ulp_context *ulp, struct tf *tfp); - -/* Function to get the tfp session details from ulp context. */ -struct tf * -bnxt_ulp_cntxt_shared_tfp_get(struct bnxt_ulp_context *ulp); - -/* Function to set the tfp session details in the ulp context. */ -int32_t -bnxt_ulp_cntxt_tfp_set(struct bnxt_ulp_context *ulp, struct tf *tfp); +bnxt_ulp_cntxt_tfp_set(struct bnxt_ulp_context *ulp, + enum bnxt_ulp_session_type s_type, + struct tf *tfp); /* Function to get the tfp session details from ulp context. */ struct tf * bnxt_ulp_cntxt_tfp_get(struct bnxt_ulp_context *ulp, - enum bnxt_ulp_shared_session shared); + enum bnxt_ulp_session_type s_type); /* Get the device table entry based on the device id. */ struct bnxt_ulp_device_params * @@ -238,6 +254,7 @@ int32_t ulp_default_flow_create(struct rte_eth_dev *eth_dev, struct ulp_tlv_param *param_list, uint32_t ulp_class_tid, + uint16_t port_id, uint32_t *flow_id); /* Function to destroy default flows. */ @@ -274,6 +291,20 @@ bnxt_ulp_cntxt_acquire_fdb_lock(struct bnxt_ulp_context *ulp_ctx); void bnxt_ulp_cntxt_release_fdb_lock(struct bnxt_ulp_context *ulp_ctx); +int32_t +bnxt_get_action_handle_type(const struct rte_flow_action_handle *handle, + uint32_t *action_handle_type); + +struct bnxt_ulp_shared_act_info * +bnxt_ulp_shared_act_info_get(uint32_t *num_entries); + +int32_t +bnxt_get_action_handle_direction(const struct rte_flow_action_handle *handle, + uint32_t *dir); + +uint32_t +bnxt_get_action_handle_index(const struct rte_flow_action_handle *handle); + struct bnxt_ulp_glb_resource_info * bnxt_ulp_app_glb_resource_info_list_get(uint32_t *num_entries); @@ -286,6 +317,9 @@ bnxt_ulp_cntxt_app_id_get(struct bnxt_ulp_context *ulp_ctx, uint8_t *app_id); bool bnxt_ulp_cntxt_shared_session_enabled(struct bnxt_ulp_context *ulp_ctx); +bool +bnxt_ulp_cntxt_multi_shared_session_enabled(struct bnxt_ulp_context *ulp_ctx); + struct bnxt_ulp_app_capabilities_info * bnxt_ulp_app_cap_list_get(uint32_t *num_entries); @@ -315,6 +349,41 @@ bnxt_ulp_cntxt_entry_release(void); uint8_t bnxt_ulp_cntxt_num_shared_clients_get(struct bnxt_ulp_context *ulp_ctx); +int +bnxt_ulp_cntxt_num_shared_clients_set(struct bnxt_ulp_context *ulp_ctx, + bool incr); + struct bnxt_flow_app_tun_ent * bnxt_ulp_cntxt_ptr2_app_tun_list_get(struct bnxt_ulp_context *ulp); + +/* Function to get the truflow app id. This defined in the build file */ +uint32_t +bnxt_ulp_default_app_id_get(void); + +int +bnxt_ulp_vxlan_port_set(struct bnxt_ulp_context *ulp_ctx, + uint32_t vxlan_port); +unsigned int +bnxt_ulp_vxlan_port_get(struct bnxt_ulp_context *ulp_ctx); +int +bnxt_ulp_vxlan_ip_port_set(struct bnxt_ulp_context *ulp_ctx, + uint32_t vxlan_ip_port); +unsigned int +bnxt_ulp_vxlan_ip_port_get(struct bnxt_ulp_context *ulp_ctx); + +uint32_t +bnxt_ulp_cntxt_convert_dev_id(uint32_t ulp_dev_id); + +int32_t +bnxt_ulp_ha_reg_set(struct bnxt_ulp_context *ulp_ctx, + uint8_t state, uint8_t cnt); + +uint32_t +bnxt_ulp_ha_reg_state_get(struct bnxt_ulp_context *ulp_ctx); + +uint32_t +bnxt_ulp_ha_reg_cnt_get(struct bnxt_ulp_context *ulp_ctx); + +struct tf* +bnxt_ulp_bp_tfp_get(struct bnxt *bp, enum bnxt_ulp_session_type type); #endif /* _BNXT_ULP_H_ */ diff --git a/drivers/net/bnxt/tf_ulp/generic_templates/meson.build b/drivers/net/bnxt/tf_ulp/generic_templates/meson.build index 4ace838a3c..b1b92e61ab 100644 --- a/drivers/net/bnxt/tf_ulp/generic_templates/meson.build +++ b/drivers/net/bnxt/tf_ulp/generic_templates/meson.build @@ -2,15 +2,13 @@ # Copyright(c) 2018 Intel Corporation # Copyright(c) 2020 Broadcom -#Include the folder for headers includes += include_directories('.') - -#Add the source files sources += files( - 'ulp_template_db_class.c', - 'ulp_template_db_act.c', - 'ulp_template_db_tbl.c', - 'ulp_template_db_wh_plus_act.c', - 'ulp_template_db_wh_plus_class.c', - 'ulp_template_db_thor_act.c', - 'ulp_template_db_thor_class.c') + 'ulp_template_db_class.c', + 'ulp_template_db_act.c', + 'ulp_template_db_tbl.c', + 'ulp_template_db_wh_plus_act.c', + 'ulp_template_db_wh_plus_class.c', + 'ulp_template_db_thor_act.c', + 'ulp_template_db_thor_class.c') + diff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_act.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_act.c index ce878d8e02..c626fc64f5 100644 --- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_act.c +++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_act.c @@ -1,10 +1,8 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2014-2021 Broadcom + * Copyright(c) 2014-2023 Broadcom * All rights reserved. */ -/* date: Wed Aug 25 14:37:06 2021 */ - #include "ulp_template_db_enum.h" #include "ulp_template_db_field.h" #include "ulp_template_struct.h" @@ -16,98 +14,550 @@ */ uint16_t ulp_act_sig_tbl[BNXT_ULP_ACT_SIG_TBL_MAX_SZ] = { [BNXT_ULP_ACT_HID_0000] = 1, - [BNXT_ULP_ACT_HID_0001] = 2, - [BNXT_ULP_ACT_HID_0400] = 3, - [BNXT_ULP_ACT_HID_01ab] = 4, - [BNXT_ULP_ACT_HID_0010] = 5, - [BNXT_ULP_ACT_HID_05ab] = 6, - [BNXT_ULP_ACT_HID_01bb] = 7, - [BNXT_ULP_ACT_HID_0002] = 8, - [BNXT_ULP_ACT_HID_0003] = 9, - [BNXT_ULP_ACT_HID_0402] = 10, - [BNXT_ULP_ACT_HID_01ad] = 11, - [BNXT_ULP_ACT_HID_0012] = 12, - [BNXT_ULP_ACT_HID_05ad] = 13, - [BNXT_ULP_ACT_HID_01bd] = 14, - [BNXT_ULP_ACT_HID_0613] = 15, - [BNXT_ULP_ACT_HID_02a9] = 16, - [BNXT_ULP_ACT_HID_0054] = 17, - [BNXT_ULP_ACT_HID_0622] = 18, - [BNXT_ULP_ACT_HID_0454] = 19, - [BNXT_ULP_ACT_HID_0064] = 20, - [BNXT_ULP_ACT_HID_0614] = 21, - [BNXT_ULP_ACT_HID_0615] = 22, - [BNXT_ULP_ACT_HID_02ab] = 23, - [BNXT_ULP_ACT_HID_0056] = 24, - [BNXT_ULP_ACT_HID_0624] = 25, - [BNXT_ULP_ACT_HID_0456] = 26, - [BNXT_ULP_ACT_HID_0066] = 27, - [BNXT_ULP_ACT_HID_048d] = 28, - [BNXT_ULP_ACT_HID_048f] = 29, - [BNXT_ULP_ACT_HID_04bc] = 30, - [BNXT_ULP_ACT_HID_00a9] = 31, - [BNXT_ULP_ACT_HID_020f] = 32, - [BNXT_ULP_ACT_HID_0153] = 33, - [BNXT_ULP_ACT_HID_04a9] = 34, - [BNXT_ULP_ACT_HID_01fc] = 35, - [BNXT_ULP_ACT_HID_04be] = 36, - [BNXT_ULP_ACT_HID_00ab] = 37, - [BNXT_ULP_ACT_HID_0211] = 38, - [BNXT_ULP_ACT_HID_0155] = 39, - [BNXT_ULP_ACT_HID_04ab] = 40, - [BNXT_ULP_ACT_HID_01fe] = 41, - [BNXT_ULP_ACT_HID_0667] = 42, - [BNXT_ULP_ACT_HID_0254] = 43, - [BNXT_ULP_ACT_HID_03ba] = 44, - [BNXT_ULP_ACT_HID_02fe] = 45, - [BNXT_ULP_ACT_HID_0654] = 46, - [BNXT_ULP_ACT_HID_03a7] = 47, - [BNXT_ULP_ACT_HID_0669] = 48, - [BNXT_ULP_ACT_HID_0256] = 49, - [BNXT_ULP_ACT_HID_03bc] = 50, - [BNXT_ULP_ACT_HID_0300] = 51, - [BNXT_ULP_ACT_HID_0656] = 52, - [BNXT_ULP_ACT_HID_03a9] = 53, - [BNXT_ULP_ACT_HID_021b] = 54, - [BNXT_ULP_ACT_HID_021c] = 55, - [BNXT_ULP_ACT_HID_021e] = 56, - [BNXT_ULP_ACT_HID_063f] = 57, - [BNXT_ULP_ACT_HID_0510] = 58, - [BNXT_ULP_ACT_HID_03c6] = 59, - [BNXT_ULP_ACT_HID_0082] = 60, - [BNXT_ULP_ACT_HID_06bb] = 61, - [BNXT_ULP_ACT_HID_021d] = 62, - [BNXT_ULP_ACT_HID_0641] = 63, - [BNXT_ULP_ACT_HID_0512] = 64, - [BNXT_ULP_ACT_HID_03c8] = 65, - [BNXT_ULP_ACT_HID_0084] = 66, - [BNXT_ULP_ACT_HID_06bd] = 67, - [BNXT_ULP_ACT_HID_06d7] = 68, - [BNXT_ULP_ACT_HID_02c4] = 69, - [BNXT_ULP_ACT_HID_042a] = 70, - [BNXT_ULP_ACT_HID_036e] = 71, - [BNXT_ULP_ACT_HID_06c4] = 72, - [BNXT_ULP_ACT_HID_0417] = 73, - [BNXT_ULP_ACT_HID_06d9] = 74, - [BNXT_ULP_ACT_HID_02c6] = 75, - [BNXT_ULP_ACT_HID_042c] = 76, - [BNXT_ULP_ACT_HID_0370] = 77, - [BNXT_ULP_ACT_HID_06c6] = 78, - [BNXT_ULP_ACT_HID_0419] = 79, - [BNXT_ULP_ACT_HID_0119] = 80, - [BNXT_ULP_ACT_HID_046f] = 81, - [BNXT_ULP_ACT_HID_05d5] = 82, - [BNXT_ULP_ACT_HID_0519] = 83, - [BNXT_ULP_ACT_HID_0106] = 84, - [BNXT_ULP_ACT_HID_05c2] = 85, - [BNXT_ULP_ACT_HID_011b] = 86, - [BNXT_ULP_ACT_HID_0471] = 87, - [BNXT_ULP_ACT_HID_05d7] = 88, - [BNXT_ULP_ACT_HID_051b] = 89, - [BNXT_ULP_ACT_HID_0108] = 90, - [BNXT_ULP_ACT_HID_05c4] = 91, - [BNXT_ULP_ACT_HID_00a2] = 92, - [BNXT_ULP_ACT_HID_00a4] = 93 + [BNXT_ULP_ACT_HID_0008] = 2, + [BNXT_ULP_ACT_HID_2000] = 3, + [BNXT_ULP_ACT_HID_1988] = 4, + [BNXT_ULP_ACT_HID_0080] = 5, + [BNXT_ULP_ACT_HID_3988] = 6, + [BNXT_ULP_ACT_HID_1a08] = 7, + [BNXT_ULP_ACT_HID_0010] = 8, + [BNXT_ULP_ACT_HID_0040] = 9, + [BNXT_ULP_ACT_HID_0050] = 10, + [BNXT_ULP_ACT_HID_0018] = 11, + [BNXT_ULP_ACT_HID_2010] = 12, + [BNXT_ULP_ACT_HID_1998] = 13, + [BNXT_ULP_ACT_HID_0090] = 14, + [BNXT_ULP_ACT_HID_3998] = 15, + [BNXT_ULP_ACT_HID_1a18] = 16, + [BNXT_ULP_ACT_HID_32ea] = 17, + [BNXT_ULP_ACT_HID_32f2] = 18, + [BNXT_ULP_ACT_HID_52ea] = 19, + [BNXT_ULP_ACT_HID_4c72] = 20, + [BNXT_ULP_ACT_HID_336a] = 21, + [BNXT_ULP_ACT_HID_6c72] = 22, + [BNXT_ULP_ACT_HID_4cf2] = 23, + [BNXT_ULP_ACT_HID_32fa] = 24, + [BNXT_ULP_ACT_HID_3302] = 25, + [BNXT_ULP_ACT_HID_52fa] = 26, + [BNXT_ULP_ACT_HID_4c82] = 27, + [BNXT_ULP_ACT_HID_337a] = 28, + [BNXT_ULP_ACT_HID_6c82] = 29, + [BNXT_ULP_ACT_HID_4d02] = 30, + [BNXT_ULP_ACT_HID_0808] = 31, + [BNXT_ULP_ACT_HID_1008] = 32, + [BNXT_ULP_ACT_HID_1808] = 33, + [BNXT_ULP_ACT_HID_0818] = 34, + [BNXT_ULP_ACT_HID_1018] = 35, + [BNXT_ULP_ACT_HID_1818] = 36, + [BNXT_ULP_ACT_HID_0880] = 37, + [BNXT_ULP_ACT_HID_1080] = 38, + [BNXT_ULP_ACT_HID_1880] = 39, + [BNXT_ULP_ACT_HID_0890] = 40, + [BNXT_ULP_ACT_HID_1090] = 41, + [BNXT_ULP_ACT_HID_1890] = 42, + [BNXT_ULP_ACT_HID_3af2] = 43, + [BNXT_ULP_ACT_HID_42f2] = 44, + [BNXT_ULP_ACT_HID_4af2] = 45, + [BNXT_ULP_ACT_HID_3b02] = 46, + [BNXT_ULP_ACT_HID_4302] = 47, + [BNXT_ULP_ACT_HID_4b02] = 48, + [BNXT_ULP_ACT_HID_3b6a] = 49, + [BNXT_ULP_ACT_HID_436a] = 50, + [BNXT_ULP_ACT_HID_4b6a] = 51, + [BNXT_ULP_ACT_HID_3b7a] = 52, + [BNXT_ULP_ACT_HID_437a] = 53, + [BNXT_ULP_ACT_HID_4b7a] = 54, + [BNXT_ULP_ACT_HID_640d] = 55, + [BNXT_ULP_ACT_HID_641d] = 56, + [BNXT_ULP_ACT_HID_071a] = 57, + [BNXT_ULP_ACT_HID_0800] = 58, + [BNXT_ULP_ACT_HID_1000] = 59, + [BNXT_ULP_ACT_HID_1800] = 60, + [BNXT_ULP_ACT_HID_0810] = 61, + [BNXT_ULP_ACT_HID_1010] = 62, + [BNXT_ULP_ACT_HID_1810] = 63, + [BNXT_ULP_ACT_HID_1110] = 64, + [BNXT_ULP_ACT_HID_4420] = 65, + [BNXT_ULP_ACT_HID_2220] = 66, + [BNXT_ULP_ACT_HID_0c84] = 67, + [BNXT_ULP_ACT_HID_3f94] = 68, + [BNXT_ULP_ACT_HID_3330] = 69, + [BNXT_ULP_ACT_HID_50a4] = 70, + [BNXT_ULP_ACT_HID_1910] = 71, + [BNXT_ULP_ACT_HID_4c20] = 72, + [BNXT_ULP_ACT_HID_2a20] = 73, + [BNXT_ULP_ACT_HID_1484] = 74, + [BNXT_ULP_ACT_HID_4794] = 75, + [BNXT_ULP_ACT_HID_3b30] = 76, + [BNXT_ULP_ACT_HID_58a4] = 77, + [BNXT_ULP_ACT_HID_2110] = 78, + [BNXT_ULP_ACT_HID_5420] = 79, + [BNXT_ULP_ACT_HID_3220] = 80, + [BNXT_ULP_ACT_HID_1c84] = 81, + [BNXT_ULP_ACT_HID_4f94] = 82, + [BNXT_ULP_ACT_HID_4330] = 83, + [BNXT_ULP_ACT_HID_60a4] = 84, + [BNXT_ULP_ACT_HID_2910] = 85, + [BNXT_ULP_ACT_HID_5c20] = 86, + [BNXT_ULP_ACT_HID_3a20] = 87, + [BNXT_ULP_ACT_HID_2484] = 88, + [BNXT_ULP_ACT_HID_5794] = 89, + [BNXT_ULP_ACT_HID_4b30] = 90, + [BNXT_ULP_ACT_HID_68a4] = 91, + [BNXT_ULP_ACT_HID_1120] = 92, + [BNXT_ULP_ACT_HID_4430] = 93, + [BNXT_ULP_ACT_HID_2230] = 94, + [BNXT_ULP_ACT_HID_0c94] = 95, + [BNXT_ULP_ACT_HID_3fa4] = 96, + [BNXT_ULP_ACT_HID_3340] = 97, + [BNXT_ULP_ACT_HID_50b4] = 98, + [BNXT_ULP_ACT_HID_1920] = 99, + [BNXT_ULP_ACT_HID_4c30] = 100, + [BNXT_ULP_ACT_HID_2a30] = 101, + [BNXT_ULP_ACT_HID_1494] = 102, + [BNXT_ULP_ACT_HID_47a4] = 103, + [BNXT_ULP_ACT_HID_3b40] = 104, + [BNXT_ULP_ACT_HID_58b4] = 105, + [BNXT_ULP_ACT_HID_2120] = 106, + [BNXT_ULP_ACT_HID_5430] = 107, + [BNXT_ULP_ACT_HID_3230] = 108, + [BNXT_ULP_ACT_HID_1c94] = 109, + [BNXT_ULP_ACT_HID_4fa4] = 110, + [BNXT_ULP_ACT_HID_4340] = 111, + [BNXT_ULP_ACT_HID_60b4] = 112, + [BNXT_ULP_ACT_HID_2920] = 113, + [BNXT_ULP_ACT_HID_5c30] = 114, + [BNXT_ULP_ACT_HID_3a30] = 115, + [BNXT_ULP_ACT_HID_2494] = 116, + [BNXT_ULP_ACT_HID_57a4] = 117, + [BNXT_ULP_ACT_HID_4b40] = 118, + [BNXT_ULP_ACT_HID_68b4] = 119, + [BNXT_ULP_ACT_HID_2a98] = 120, + [BNXT_ULP_ACT_HID_5da8] = 121, + [BNXT_ULP_ACT_HID_3ba8] = 122, + [BNXT_ULP_ACT_HID_260c] = 123, + [BNXT_ULP_ACT_HID_591c] = 124, + [BNXT_ULP_ACT_HID_6a2c] = 125, + [BNXT_ULP_ACT_HID_2aa8] = 126, + [BNXT_ULP_ACT_HID_5db8] = 127, + [BNXT_ULP_ACT_HID_3bb8] = 128, + [BNXT_ULP_ACT_HID_261c] = 129, + [BNXT_ULP_ACT_HID_592c] = 130, + [BNXT_ULP_ACT_HID_6a3c] = 131, + [BNXT_ULP_ACT_HID_3298] = 132, + [BNXT_ULP_ACT_HID_65a8] = 133, + [BNXT_ULP_ACT_HID_43a8] = 134, + [BNXT_ULP_ACT_HID_2e0c] = 135, + [BNXT_ULP_ACT_HID_611c] = 136, + [BNXT_ULP_ACT_HID_722c] = 137, + [BNXT_ULP_ACT_HID_32a8] = 138, + [BNXT_ULP_ACT_HID_65b8] = 139, + [BNXT_ULP_ACT_HID_43b8] = 140, + [BNXT_ULP_ACT_HID_2e1c] = 141, + [BNXT_ULP_ACT_HID_612c] = 142, + [BNXT_ULP_ACT_HID_723c] = 143, + [BNXT_ULP_ACT_HID_3a98] = 144, + [BNXT_ULP_ACT_HID_6da8] = 145, + [BNXT_ULP_ACT_HID_4ba8] = 146, + [BNXT_ULP_ACT_HID_360c] = 147, + [BNXT_ULP_ACT_HID_691c] = 148, + [BNXT_ULP_ACT_HID_7a2c] = 149, + [BNXT_ULP_ACT_HID_3aa8] = 150, + [BNXT_ULP_ACT_HID_6db8] = 151, + [BNXT_ULP_ACT_HID_4bb8] = 152, + [BNXT_ULP_ACT_HID_361c] = 153, + [BNXT_ULP_ACT_HID_692c] = 154, + [BNXT_ULP_ACT_HID_7a3c] = 155, + [BNXT_ULP_ACT_HID_4298] = 156, + [BNXT_ULP_ACT_HID_75a8] = 157, + [BNXT_ULP_ACT_HID_53a8] = 158, + [BNXT_ULP_ACT_HID_3e0c] = 159, + [BNXT_ULP_ACT_HID_711c] = 160, + [BNXT_ULP_ACT_HID_0670] = 161, + [BNXT_ULP_ACT_HID_42a8] = 162, + [BNXT_ULP_ACT_HID_75b8] = 163, + [BNXT_ULP_ACT_HID_53b8] = 164, + [BNXT_ULP_ACT_HID_3e1c] = 165, + [BNXT_ULP_ACT_HID_712c] = 166, + [BNXT_ULP_ACT_HID_0680] = 167, + [BNXT_ULP_ACT_HID_3aea] = 168, + [BNXT_ULP_ACT_HID_42ea] = 169, + [BNXT_ULP_ACT_HID_4aea] = 170, + [BNXT_ULP_ACT_HID_3afa] = 171, + [BNXT_ULP_ACT_HID_42fa] = 172, + [BNXT_ULP_ACT_HID_4afa] = 173, + [BNXT_ULP_ACT_HID_43fa] = 174, + [BNXT_ULP_ACT_HID_770a] = 175, + [BNXT_ULP_ACT_HID_550a] = 176, + [BNXT_ULP_ACT_HID_3f6e] = 177, + [BNXT_ULP_ACT_HID_727e] = 178, + [BNXT_ULP_ACT_HID_661a] = 179, + [BNXT_ULP_ACT_HID_07d2] = 180, + [BNXT_ULP_ACT_HID_4bfa] = 181, + [BNXT_ULP_ACT_HID_034e] = 182, + [BNXT_ULP_ACT_HID_5d0a] = 183, + [BNXT_ULP_ACT_HID_476e] = 184, + [BNXT_ULP_ACT_HID_7a7e] = 185, + [BNXT_ULP_ACT_HID_6e1a] = 186, + [BNXT_ULP_ACT_HID_0fd2] = 187, + [BNXT_ULP_ACT_HID_53fa] = 188, + [BNXT_ULP_ACT_HID_0b4e] = 189, + [BNXT_ULP_ACT_HID_650a] = 190, + [BNXT_ULP_ACT_HID_4f6e] = 191, + [BNXT_ULP_ACT_HID_06c2] = 192, + [BNXT_ULP_ACT_HID_761a] = 193, + [BNXT_ULP_ACT_HID_17d2] = 194, + [BNXT_ULP_ACT_HID_5bfa] = 195, + [BNXT_ULP_ACT_HID_134e] = 196, + [BNXT_ULP_ACT_HID_6d0a] = 197, + [BNXT_ULP_ACT_HID_576e] = 198, + [BNXT_ULP_ACT_HID_0ec2] = 199, + [BNXT_ULP_ACT_HID_025e] = 200, + [BNXT_ULP_ACT_HID_1fd2] = 201, + [BNXT_ULP_ACT_HID_440a] = 202, + [BNXT_ULP_ACT_HID_771a] = 203, + [BNXT_ULP_ACT_HID_551a] = 204, + [BNXT_ULP_ACT_HID_3f7e] = 205, + [BNXT_ULP_ACT_HID_728e] = 206, + [BNXT_ULP_ACT_HID_662a] = 207, + [BNXT_ULP_ACT_HID_07e2] = 208, + [BNXT_ULP_ACT_HID_4c0a] = 209, + [BNXT_ULP_ACT_HID_035e] = 210, + [BNXT_ULP_ACT_HID_5d1a] = 211, + [BNXT_ULP_ACT_HID_477e] = 212, + [BNXT_ULP_ACT_HID_7a8e] = 213, + [BNXT_ULP_ACT_HID_6e2a] = 214, + [BNXT_ULP_ACT_HID_0fe2] = 215, + [BNXT_ULP_ACT_HID_540a] = 216, + [BNXT_ULP_ACT_HID_0b5e] = 217, + [BNXT_ULP_ACT_HID_651a] = 218, + [BNXT_ULP_ACT_HID_4f7e] = 219, + [BNXT_ULP_ACT_HID_06d2] = 220, + [BNXT_ULP_ACT_HID_762a] = 221, + [BNXT_ULP_ACT_HID_17e2] = 222, + [BNXT_ULP_ACT_HID_5c0a] = 223, + [BNXT_ULP_ACT_HID_135e] = 224, + [BNXT_ULP_ACT_HID_6d1a] = 225, + [BNXT_ULP_ACT_HID_577e] = 226, + [BNXT_ULP_ACT_HID_0ed2] = 227, + [BNXT_ULP_ACT_HID_026e] = 228, + [BNXT_ULP_ACT_HID_1fe2] = 229, + [BNXT_ULP_ACT_HID_5d82] = 230, + [BNXT_ULP_ACT_HID_14d6] = 231, + [BNXT_ULP_ACT_HID_6e92] = 232, + [BNXT_ULP_ACT_HID_58f6] = 233, + [BNXT_ULP_ACT_HID_104a] = 234, + [BNXT_ULP_ACT_HID_215a] = 235, + [BNXT_ULP_ACT_HID_5d92] = 236, + [BNXT_ULP_ACT_HID_14e6] = 237, + [BNXT_ULP_ACT_HID_6ea2] = 238, + [BNXT_ULP_ACT_HID_5906] = 239, + [BNXT_ULP_ACT_HID_105a] = 240, + [BNXT_ULP_ACT_HID_216a] = 241, + [BNXT_ULP_ACT_HID_6582] = 242, + [BNXT_ULP_ACT_HID_1cd6] = 243, + [BNXT_ULP_ACT_HID_7692] = 244, + [BNXT_ULP_ACT_HID_60f6] = 245, + [BNXT_ULP_ACT_HID_184a] = 246, + [BNXT_ULP_ACT_HID_295a] = 247, + [BNXT_ULP_ACT_HID_6592] = 248, + [BNXT_ULP_ACT_HID_1ce6] = 249, + [BNXT_ULP_ACT_HID_76a2] = 250, + [BNXT_ULP_ACT_HID_6106] = 251, + [BNXT_ULP_ACT_HID_185a] = 252, + [BNXT_ULP_ACT_HID_296a] = 253, + [BNXT_ULP_ACT_HID_6d82] = 254, + [BNXT_ULP_ACT_HID_24d6] = 255, + [BNXT_ULP_ACT_HID_02d6] = 256, + [BNXT_ULP_ACT_HID_68f6] = 257, + [BNXT_ULP_ACT_HID_204a] = 258, + [BNXT_ULP_ACT_HID_315a] = 259, + [BNXT_ULP_ACT_HID_6d92] = 260, + [BNXT_ULP_ACT_HID_24e6] = 261, + [BNXT_ULP_ACT_HID_02e6] = 262, + [BNXT_ULP_ACT_HID_6906] = 263, + [BNXT_ULP_ACT_HID_205a] = 264, + [BNXT_ULP_ACT_HID_316a] = 265, + [BNXT_ULP_ACT_HID_7582] = 266, + [BNXT_ULP_ACT_HID_2cd6] = 267, + [BNXT_ULP_ACT_HID_0ad6] = 268, + [BNXT_ULP_ACT_HID_70f6] = 269, + [BNXT_ULP_ACT_HID_284a] = 270, + [BNXT_ULP_ACT_HID_395a] = 271, + [BNXT_ULP_ACT_HID_7592] = 272, + [BNXT_ULP_ACT_HID_2ce6] = 273, + [BNXT_ULP_ACT_HID_0ae6] = 274, + [BNXT_ULP_ACT_HID_7106] = 275, + [BNXT_ULP_ACT_HID_285a] = 276, + [BNXT_ULP_ACT_HID_396a] = 277, + [BNXT_ULP_ACT_HID_0020] = 278, + [BNXT_ULP_ACT_HID_0030] = 279, + [BNXT_ULP_ACT_HID_65d4] = 280, + [BNXT_ULP_ACT_HID_65e4] = 281, + [BNXT_ULP_ACT_HID_330a] = 282, + [BNXT_ULP_ACT_HID_331a] = 283, + [BNXT_ULP_ACT_HID_1cfe] = 284, + [BNXT_ULP_ACT_HID_1d0e] = 285, + [BNXT_ULP_ACT_HID_1474] = 286, + [BNXT_ULP_ACT_HID_4838] = 287, + [BNXT_ULP_ACT_HID_6458] = 288, + [BNXT_ULP_ACT_HID_1c68] = 289, + [BNXT_ULP_ACT_HID_6c34] = 290, + [BNXT_ULP_ACT_HID_5d08] = 291, + [BNXT_ULP_ACT_HID_5d10] = 292, + [BNXT_ULP_ACT_HID_5d20] = 293, + [BNXT_ULP_ACT_HID_2e18] = 294, + [BNXT_ULP_ACT_HID_29d4] = 295, + [BNXT_ULP_ACT_HID_7690] = 296, + [BNXT_ULP_ACT_HID_47a0] = 297, + [BNXT_ULP_ACT_HID_435c] = 298, + [BNXT_ULP_ACT_HID_5d18] = 299, + [BNXT_ULP_ACT_HID_2e28] = 300, + [BNXT_ULP_ACT_HID_29e4] = 301, + [BNXT_ULP_ACT_HID_76a0] = 302, + [BNXT_ULP_ACT_HID_47b0] = 303, + [BNXT_ULP_ACT_HID_436c] = 304, + [BNXT_ULP_ACT_HID_1436] = 305, + [BNXT_ULP_ACT_HID_143e] = 306, + [BNXT_ULP_ACT_HID_144e] = 307, + [BNXT_ULP_ACT_HID_6102] = 308, + [BNXT_ULP_ACT_HID_5cbe] = 309, + [BNXT_ULP_ACT_HID_2dbe] = 310, + [BNXT_ULP_ACT_HID_7a8a] = 311, + [BNXT_ULP_ACT_HID_7646] = 312, + [BNXT_ULP_ACT_HID_1446] = 313, + [BNXT_ULP_ACT_HID_6112] = 314, + [BNXT_ULP_ACT_HID_5cce] = 315, + [BNXT_ULP_ACT_HID_2dce] = 316, + [BNXT_ULP_ACT_HID_7a9a] = 317, + [BNXT_ULP_ACT_HID_7656] = 318, + [BNXT_ULP_ACT_HID_6508] = 319, + [BNXT_ULP_ACT_HID_6d08] = 320, + [BNXT_ULP_ACT_HID_7508] = 321, + [BNXT_ULP_ACT_HID_6518] = 322, + [BNXT_ULP_ACT_HID_6d18] = 323, + [BNXT_ULP_ACT_HID_7518] = 324, + [BNXT_ULP_ACT_HID_6e18] = 325, + [BNXT_ULP_ACT_HID_256c] = 326, + [BNXT_ULP_ACT_HID_036c] = 327, + [BNXT_ULP_ACT_HID_698c] = 328, + [BNXT_ULP_ACT_HID_20e0] = 329, + [BNXT_ULP_ACT_HID_31f0] = 330, + [BNXT_ULP_ACT_HID_7618] = 331, + [BNXT_ULP_ACT_HID_2d6c] = 332, + [BNXT_ULP_ACT_HID_0b6c] = 333, + [BNXT_ULP_ACT_HID_718c] = 334, + [BNXT_ULP_ACT_HID_28e0] = 335, + [BNXT_ULP_ACT_HID_39f0] = 336, + [BNXT_ULP_ACT_HID_025c] = 337, + [BNXT_ULP_ACT_HID_356c] = 338, + [BNXT_ULP_ACT_HID_136c] = 339, + [BNXT_ULP_ACT_HID_798c] = 340, + [BNXT_ULP_ACT_HID_30e0] = 341, + [BNXT_ULP_ACT_HID_41f0] = 342, + [BNXT_ULP_ACT_HID_0a5c] = 343, + [BNXT_ULP_ACT_HID_3d6c] = 344, + [BNXT_ULP_ACT_HID_1b6c] = 345, + [BNXT_ULP_ACT_HID_05d0] = 346, + [BNXT_ULP_ACT_HID_38e0] = 347, + [BNXT_ULP_ACT_HID_49f0] = 348, + [BNXT_ULP_ACT_HID_6e28] = 349, + [BNXT_ULP_ACT_HID_257c] = 350, + [BNXT_ULP_ACT_HID_037c] = 351, + [BNXT_ULP_ACT_HID_699c] = 352, + [BNXT_ULP_ACT_HID_20f0] = 353, + [BNXT_ULP_ACT_HID_3200] = 354, + [BNXT_ULP_ACT_HID_7628] = 355, + [BNXT_ULP_ACT_HID_2d7c] = 356, + [BNXT_ULP_ACT_HID_0b7c] = 357, + [BNXT_ULP_ACT_HID_719c] = 358, + [BNXT_ULP_ACT_HID_28f0] = 359, + [BNXT_ULP_ACT_HID_3a00] = 360, + [BNXT_ULP_ACT_HID_026c] = 361, + [BNXT_ULP_ACT_HID_357c] = 362, + [BNXT_ULP_ACT_HID_137c] = 363, + [BNXT_ULP_ACT_HID_799c] = 364, + [BNXT_ULP_ACT_HID_30f0] = 365, + [BNXT_ULP_ACT_HID_4200] = 366, + [BNXT_ULP_ACT_HID_0a6c] = 367, + [BNXT_ULP_ACT_HID_3d7c] = 368, + [BNXT_ULP_ACT_HID_1b7c] = 369, + [BNXT_ULP_ACT_HID_05e0] = 370, + [BNXT_ULP_ACT_HID_38f0] = 371, + [BNXT_ULP_ACT_HID_4a00] = 372, + [BNXT_ULP_ACT_HID_0be4] = 373, + [BNXT_ULP_ACT_HID_3ef4] = 374, + [BNXT_ULP_ACT_HID_1cf4] = 375, + [BNXT_ULP_ACT_HID_0758] = 376, + [BNXT_ULP_ACT_HID_3a68] = 377, + [BNXT_ULP_ACT_HID_4b78] = 378, + [BNXT_ULP_ACT_HID_0bf4] = 379, + [BNXT_ULP_ACT_HID_3f04] = 380, + [BNXT_ULP_ACT_HID_1d04] = 381, + [BNXT_ULP_ACT_HID_0768] = 382, + [BNXT_ULP_ACT_HID_3a78] = 383, + [BNXT_ULP_ACT_HID_4b88] = 384, + [BNXT_ULP_ACT_HID_46f4] = 385, + [BNXT_ULP_ACT_HID_24f4] = 386, + [BNXT_ULP_ACT_HID_0f58] = 387, + [BNXT_ULP_ACT_HID_13e4] = 388, + [BNXT_ULP_ACT_HID_4268] = 389, + [BNXT_ULP_ACT_HID_5378] = 390, + [BNXT_ULP_ACT_HID_13f4] = 391, + [BNXT_ULP_ACT_HID_4704] = 392, + [BNXT_ULP_ACT_HID_2504] = 393, + [BNXT_ULP_ACT_HID_0f68] = 394, + [BNXT_ULP_ACT_HID_4278] = 395, + [BNXT_ULP_ACT_HID_5388] = 396, + [BNXT_ULP_ACT_HID_1be4] = 397, + [BNXT_ULP_ACT_HID_4ef4] = 398, + [BNXT_ULP_ACT_HID_2cf4] = 399, + [BNXT_ULP_ACT_HID_1758] = 400, + [BNXT_ULP_ACT_HID_4a68] = 401, + [BNXT_ULP_ACT_HID_5b78] = 402, + [BNXT_ULP_ACT_HID_1bf4] = 403, + [BNXT_ULP_ACT_HID_4f04] = 404, + [BNXT_ULP_ACT_HID_2d04] = 405, + [BNXT_ULP_ACT_HID_1768] = 406, + [BNXT_ULP_ACT_HID_4a78] = 407, + [BNXT_ULP_ACT_HID_5b88] = 408, + [BNXT_ULP_ACT_HID_23e4] = 409, + [BNXT_ULP_ACT_HID_56f4] = 410, + [BNXT_ULP_ACT_HID_34f4] = 411, + [BNXT_ULP_ACT_HID_1f58] = 412, + [BNXT_ULP_ACT_HID_5268] = 413, + [BNXT_ULP_ACT_HID_6378] = 414, + [BNXT_ULP_ACT_HID_23f4] = 415, + [BNXT_ULP_ACT_HID_5704] = 416, + [BNXT_ULP_ACT_HID_3504] = 417, + [BNXT_ULP_ACT_HID_1f68] = 418, + [BNXT_ULP_ACT_HID_5278] = 419, + [BNXT_ULP_ACT_HID_6388] = 420, + [BNXT_ULP_ACT_HID_1c36] = 421, + [BNXT_ULP_ACT_HID_2436] = 422, + [BNXT_ULP_ACT_HID_2c36] = 423, + [BNXT_ULP_ACT_HID_1c46] = 424, + [BNXT_ULP_ACT_HID_2446] = 425, + [BNXT_ULP_ACT_HID_2c46] = 426, + [BNXT_ULP_ACT_HID_2546] = 427, + [BNXT_ULP_ACT_HID_5856] = 428, + [BNXT_ULP_ACT_HID_3656] = 429, + [BNXT_ULP_ACT_HID_20ba] = 430, + [BNXT_ULP_ACT_HID_53ca] = 431, + [BNXT_ULP_ACT_HID_64da] = 432, + [BNXT_ULP_ACT_HID_2d46] = 433, + [BNXT_ULP_ACT_HID_6056] = 434, + [BNXT_ULP_ACT_HID_3e56] = 435, + [BNXT_ULP_ACT_HID_28ba] = 436, + [BNXT_ULP_ACT_HID_5bca] = 437, + [BNXT_ULP_ACT_HID_6cda] = 438, + [BNXT_ULP_ACT_HID_3546] = 439, + [BNXT_ULP_ACT_HID_6856] = 440, + [BNXT_ULP_ACT_HID_4656] = 441, + [BNXT_ULP_ACT_HID_30ba] = 442, + [BNXT_ULP_ACT_HID_63ca] = 443, + [BNXT_ULP_ACT_HID_74da] = 444, + [BNXT_ULP_ACT_HID_3d46] = 445, + [BNXT_ULP_ACT_HID_7056] = 446, + [BNXT_ULP_ACT_HID_4e56] = 447, + [BNXT_ULP_ACT_HID_38ba] = 448, + [BNXT_ULP_ACT_HID_6bca] = 449, + [BNXT_ULP_ACT_HID_011e] = 450, + [BNXT_ULP_ACT_HID_2556] = 451, + [BNXT_ULP_ACT_HID_5866] = 452, + [BNXT_ULP_ACT_HID_3666] = 453, + [BNXT_ULP_ACT_HID_20ca] = 454, + [BNXT_ULP_ACT_HID_53da] = 455, + [BNXT_ULP_ACT_HID_64ea] = 456, + [BNXT_ULP_ACT_HID_2d56] = 457, + [BNXT_ULP_ACT_HID_6066] = 458, + [BNXT_ULP_ACT_HID_3e66] = 459, + [BNXT_ULP_ACT_HID_28ca] = 460, + [BNXT_ULP_ACT_HID_5bda] = 461, + [BNXT_ULP_ACT_HID_6cea] = 462, + [BNXT_ULP_ACT_HID_3556] = 463, + [BNXT_ULP_ACT_HID_6866] = 464, + [BNXT_ULP_ACT_HID_4666] = 465, + [BNXT_ULP_ACT_HID_30ca] = 466, + [BNXT_ULP_ACT_HID_63da] = 467, + [BNXT_ULP_ACT_HID_74ea] = 468, + [BNXT_ULP_ACT_HID_3d56] = 469, + [BNXT_ULP_ACT_HID_7066] = 470, + [BNXT_ULP_ACT_HID_4e66] = 471, + [BNXT_ULP_ACT_HID_38ca] = 472, + [BNXT_ULP_ACT_HID_6bda] = 473, + [BNXT_ULP_ACT_HID_012e] = 474, + [BNXT_ULP_ACT_HID_3ece] = 475, + [BNXT_ULP_ACT_HID_71de] = 476, + [BNXT_ULP_ACT_HID_4fde] = 477, + [BNXT_ULP_ACT_HID_3a42] = 478, + [BNXT_ULP_ACT_HID_6d52] = 479, + [BNXT_ULP_ACT_HID_02a6] = 480, + [BNXT_ULP_ACT_HID_3ede] = 481, + [BNXT_ULP_ACT_HID_71ee] = 482, + [BNXT_ULP_ACT_HID_4fee] = 483, + [BNXT_ULP_ACT_HID_3a52] = 484, + [BNXT_ULP_ACT_HID_6d62] = 485, + [BNXT_ULP_ACT_HID_02b6] = 486, + [BNXT_ULP_ACT_HID_79de] = 487, + [BNXT_ULP_ACT_HID_57de] = 488, + [BNXT_ULP_ACT_HID_4242] = 489, + [BNXT_ULP_ACT_HID_46ce] = 490, + [BNXT_ULP_ACT_HID_7552] = 491, + [BNXT_ULP_ACT_HID_0aa6] = 492, + [BNXT_ULP_ACT_HID_46de] = 493, + [BNXT_ULP_ACT_HID_79ee] = 494, + [BNXT_ULP_ACT_HID_57ee] = 495, + [BNXT_ULP_ACT_HID_4252] = 496, + [BNXT_ULP_ACT_HID_7562] = 497, + [BNXT_ULP_ACT_HID_0ab6] = 498, + [BNXT_ULP_ACT_HID_4ece] = 499, + [BNXT_ULP_ACT_HID_0622] = 500, + [BNXT_ULP_ACT_HID_5fde] = 501, + [BNXT_ULP_ACT_HID_4a42] = 502, + [BNXT_ULP_ACT_HID_0196] = 503, + [BNXT_ULP_ACT_HID_12a6] = 504, + [BNXT_ULP_ACT_HID_4ede] = 505, + [BNXT_ULP_ACT_HID_0632] = 506, + [BNXT_ULP_ACT_HID_5fee] = 507, + [BNXT_ULP_ACT_HID_4a52] = 508, + [BNXT_ULP_ACT_HID_01a6] = 509, + [BNXT_ULP_ACT_HID_12b6] = 510, + [BNXT_ULP_ACT_HID_56ce] = 511, + [BNXT_ULP_ACT_HID_0e22] = 512, + [BNXT_ULP_ACT_HID_67de] = 513, + [BNXT_ULP_ACT_HID_5242] = 514, + [BNXT_ULP_ACT_HID_0996] = 515, + [BNXT_ULP_ACT_HID_1aa6] = 516, + [BNXT_ULP_ACT_HID_56de] = 517, + [BNXT_ULP_ACT_HID_0e32] = 518, + [BNXT_ULP_ACT_HID_67ee] = 519, + [BNXT_ULP_ACT_HID_5252] = 520, + [BNXT_ULP_ACT_HID_09a6] = 521, + [BNXT_ULP_ACT_HID_1ab6] = 522, + [BNXT_ULP_ACT_HID_31d0] = 523, + [BNXT_ULP_ACT_HID_31e0] = 524, + [BNXT_ULP_ACT_HID_39d0] = 525, + [BNXT_ULP_ACT_HID_39e0] = 526, + [BNXT_ULP_ACT_HID_41d0] = 527, + [BNXT_ULP_ACT_HID_41e0] = 528, + [BNXT_ULP_ACT_HID_49d0] = 529, + [BNXT_ULP_ACT_HID_49e0] = 530, + [BNXT_ULP_ACT_HID_64ba] = 531, + [BNXT_ULP_ACT_HID_64ca] = 532, + [BNXT_ULP_ACT_HID_6cba] = 533, + [BNXT_ULP_ACT_HID_6cca] = 534, + [BNXT_ULP_ACT_HID_74ba] = 535, + [BNXT_ULP_ACT_HID_74ca] = 536, + [BNXT_ULP_ACT_HID_00fe] = 537, + [BNXT_ULP_ACT_HID_010e] = 538, + [BNXT_ULP_ACT_HID_331c] = 539, + [BNXT_ULP_ACT_HID_332c] = 540, + [BNXT_ULP_ACT_HID_6706] = 541, + [BNXT_ULP_ACT_HID_6716] = 542, + [BNXT_ULP_ACT_HID_1b6d] = 543, + [BNXT_ULP_ACT_HID_1b7d] = 544, + [BNXT_ULP_ACT_HID_641a] = 545 }; /* Array for the act matcher list */ @@ -121,7 +571,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { .act_tid = 1 }, [2] = { - .act_hid = BNXT_ULP_ACT_HID_0001, + .act_hid = BNXT_ULP_ACT_HID_0008, .act_pattern_id = 1, .app_sig = 0, .act_sig = { .bits = @@ -130,7 +580,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { .act_tid = 1 }, [3] = { - .act_hid = BNXT_ULP_ACT_HID_0400, + .act_hid = BNXT_ULP_ACT_HID_2000, .act_pattern_id = 2, .app_sig = 0, .act_sig = { .bits = @@ -139,7 +589,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { .act_tid = 1 }, [4] = { - .act_hid = BNXT_ULP_ACT_HID_01ab, + .act_hid = BNXT_ULP_ACT_HID_1988, .act_pattern_id = 3, .app_sig = 0, .act_sig = { .bits = @@ -148,7 +598,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { .act_tid = 1 }, [5] = { - .act_hid = BNXT_ULP_ACT_HID_0010, + .act_hid = BNXT_ULP_ACT_HID_0080, .act_pattern_id = 4, .app_sig = 0, .act_sig = { .bits = @@ -157,7 +607,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { .act_tid = 1 }, [6] = { - .act_hid = BNXT_ULP_ACT_HID_05ab, + .act_hid = BNXT_ULP_ACT_HID_3988, .act_pattern_id = 5, .app_sig = 0, .act_sig = { .bits = @@ -167,7 +617,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { .act_tid = 1 }, [7] = { - .act_hid = BNXT_ULP_ACT_HID_01bb, + .act_hid = BNXT_ULP_ACT_HID_1a08, .act_pattern_id = 6, .app_sig = 0, .act_sig = { .bits = @@ -177,7 +627,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { .act_tid = 1 }, [8] = { - .act_hid = BNXT_ULP_ACT_HID_0002, + .act_hid = BNXT_ULP_ACT_HID_0010, .act_pattern_id = 7, .app_sig = 0, .act_sig = { .bits = @@ -186,902 +636,6269 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { .act_tid = 1 }, [9] = { - .act_hid = BNXT_ULP_ACT_HID_0003, + .act_hid = BNXT_ULP_ACT_HID_0040, .act_pattern_id = 8, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_COUNT | - BNXT_ULP_ACT_BIT_DROP | + BNXT_ULP_ACT_BIT_METER | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [10] = { - .act_hid = BNXT_ULP_ACT_HID_0402, + .act_hid = BNXT_ULP_ACT_HID_0050, .act_pattern_id = 9, .app_sig = 0, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | - BNXT_ULP_ACT_BIT_POP_VLAN | + BNXT_ULP_ACT_BIT_METER | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [11] = { - .act_hid = BNXT_ULP_ACT_HID_01ad, + .act_hid = BNXT_ULP_ACT_HID_0018, .act_pattern_id = 10, .app_sig = 0, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | - BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_DROP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [12] = { - .act_hid = BNXT_ULP_ACT_HID_0012, + .act_hid = BNXT_ULP_ACT_HID_2010, .act_pattern_id = 11, .app_sig = 0, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | - BNXT_ULP_ACT_BIT_VXLAN_DECAP | + BNXT_ULP_ACT_BIT_POP_VLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [13] = { - .act_hid = BNXT_ULP_ACT_HID_05ad, + .act_hid = BNXT_ULP_ACT_HID_1998, .act_pattern_id = 12, .app_sig = 0, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_DEC_TTL | - BNXT_ULP_ACT_BIT_POP_VLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [14] = { - .act_hid = BNXT_ULP_ACT_HID_01bd, + .act_hid = BNXT_ULP_ACT_HID_0090, .act_pattern_id = 13, .app_sig = 0, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_VXLAN_DECAP | - BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [15] = { - .act_hid = BNXT_ULP_ACT_HID_0613, + .act_hid = BNXT_ULP_ACT_HID_3998, .act_pattern_id = 14, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_SHARED_SAMPLE | - BNXT_ULP_ACT_BIT_DROP | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_POP_VLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [16] = { - .act_hid = BNXT_ULP_ACT_HID_02a9, + .act_hid = BNXT_ULP_ACT_HID_1a18, .act_pattern_id = 15, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_SHARED_SAMPLE | - BNXT_ULP_ACT_BIT_POP_VLAN | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_VXLAN_DECAP | + BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [17] = { - .act_hid = BNXT_ULP_ACT_HID_0054, + .act_hid = BNXT_ULP_ACT_HID_32ea, .act_pattern_id = 16, .app_sig = 0, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED_SAMPLE | - BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [18] = { - .act_hid = BNXT_ULP_ACT_HID_0622, + .act_hid = BNXT_ULP_ACT_HID_32f2, .act_pattern_id = 17, .app_sig = 0, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED_SAMPLE | - BNXT_ULP_ACT_BIT_VXLAN_DECAP | + BNXT_ULP_ACT_BIT_DROP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [19] = { - .act_hid = BNXT_ULP_ACT_HID_0454, + .act_hid = BNXT_ULP_ACT_HID_52ea, .act_pattern_id = 18, .app_sig = 0, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED_SAMPLE | - BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_POP_VLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [20] = { - .act_hid = BNXT_ULP_ACT_HID_0064, + .act_hid = BNXT_ULP_ACT_HID_4c72, .act_pattern_id = 19, .app_sig = 0, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED_SAMPLE | - BNXT_ULP_ACT_BIT_VXLAN_DECAP | BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [21] = { - .act_hid = BNXT_ULP_ACT_HID_0614, + .act_hid = BNXT_ULP_ACT_HID_336a, .act_pattern_id = 20, .app_sig = 0, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED_SAMPLE | - BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_VXLAN_DECAP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [22] = { - .act_hid = BNXT_ULP_ACT_HID_0615, + .act_hid = BNXT_ULP_ACT_HID_6c72, .act_pattern_id = 21, .app_sig = 0, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED_SAMPLE | - BNXT_ULP_ACT_BIT_COUNT | - BNXT_ULP_ACT_BIT_DROP | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_POP_VLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [23] = { - .act_hid = BNXT_ULP_ACT_HID_02ab, + .act_hid = BNXT_ULP_ACT_HID_4cf2, .act_pattern_id = 22, .app_sig = 0, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED_SAMPLE | - BNXT_ULP_ACT_BIT_COUNT | - BNXT_ULP_ACT_BIT_POP_VLAN | + BNXT_ULP_ACT_BIT_VXLAN_DECAP | + BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [24] = { - .act_hid = BNXT_ULP_ACT_HID_0056, + .act_hid = BNXT_ULP_ACT_HID_32fa, .act_pattern_id = 23, .app_sig = 0, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED_SAMPLE | BNXT_ULP_ACT_BIT_COUNT | - BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [25] = { - .act_hid = BNXT_ULP_ACT_HID_0624, + .act_hid = BNXT_ULP_ACT_HID_3302, .act_pattern_id = 24, .app_sig = 0, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED_SAMPLE | BNXT_ULP_ACT_BIT_COUNT | - BNXT_ULP_ACT_BIT_VXLAN_DECAP | + BNXT_ULP_ACT_BIT_DROP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [26] = { - .act_hid = BNXT_ULP_ACT_HID_0456, + .act_hid = BNXT_ULP_ACT_HID_52fa, .act_pattern_id = 25, .app_sig = 0, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED_SAMPLE | BNXT_ULP_ACT_BIT_COUNT | - BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_POP_VLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [27] = { - .act_hid = BNXT_ULP_ACT_HID_0066, + .act_hid = BNXT_ULP_ACT_HID_4c82, .act_pattern_id = 26, .app_sig = 0, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED_SAMPLE | BNXT_ULP_ACT_BIT_COUNT | - BNXT_ULP_ACT_BIT_VXLAN_DECAP | BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [28] = { - .act_hid = BNXT_ULP_ACT_HID_048d, - .act_pattern_id = 0, + .act_hid = BNXT_ULP_ACT_HID_337a, + .act_pattern_id = 27, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_SHARED | - BNXT_ULP_ACT_BIT_SAMPLE | + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_VXLAN_DECAP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 2 + .act_tid = 1 }, [29] = { - .act_hid = BNXT_ULP_ACT_HID_048f, - .act_pattern_id = 1, + .act_hid = BNXT_ULP_ACT_HID_6c82, + .act_pattern_id = 28, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_SHARED | - BNXT_ULP_ACT_BIT_SAMPLE | + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_POP_VLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 2 + .act_tid = 1 }, [30] = { - .act_hid = BNXT_ULP_ACT_HID_04bc, - .act_pattern_id = 0, + .act_hid = BNXT_ULP_ACT_HID_4d02, + .act_pattern_id = 29, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_VXLAN_DECAP | + BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 + .act_tid = 1 }, [31] = { - .act_hid = BNXT_ULP_ACT_HID_00a9, - .act_pattern_id = 1, + .act_hid = BNXT_ULP_ACT_HID_0808, + .act_pattern_id = 30, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_SET_IPV4_SRC | - BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DROP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 + .act_tid = 1 }, [32] = { - .act_hid = BNXT_ULP_ACT_HID_020f, - .act_pattern_id = 2, + .act_hid = BNXT_ULP_ACT_HID_1008, + .act_pattern_id = 31, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DROP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 + .act_tid = 1 }, [33] = { - .act_hid = BNXT_ULP_ACT_HID_0153, - .act_pattern_id = 3, + .act_hid = BNXT_ULP_ACT_HID_1808, + .act_pattern_id = 32, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_SET_IPV4_DST | - BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DROP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 + .act_tid = 1 }, [34] = { - .act_hid = BNXT_ULP_ACT_HID_04a9, - .act_pattern_id = 4, + .act_hid = BNXT_ULP_ACT_HID_0818, + .act_pattern_id = 33, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_SET_IPV4_DST | - BNXT_ULP_ACT_BIT_SET_TP_SRC | - BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_DROP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 + .act_tid = 1 }, [35] = { - .act_hid = BNXT_ULP_ACT_HID_01fc, - .act_pattern_id = 5, + .act_hid = BNXT_ULP_ACT_HID_1018, + .act_pattern_id = 34, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_SET_IPV4_SRC | - BNXT_ULP_ACT_BIT_SET_IPV4_DST | - BNXT_ULP_ACT_BIT_SET_TP_SRC | - BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_DROP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 + .act_tid = 1 }, [36] = { - .act_hid = BNXT_ULP_ACT_HID_04be, - .act_pattern_id = 6, + .act_hid = BNXT_ULP_ACT_HID_1818, + .act_pattern_id = 35, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | BNXT_ULP_ACT_BIT_COUNT | - BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_DROP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 + .act_tid = 1 }, [37] = { - .act_hid = BNXT_ULP_ACT_HID_00ab, - .act_pattern_id = 7, + .act_hid = BNXT_ULP_ACT_HID_0880, + .act_pattern_id = 36, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_COUNT | - BNXT_ULP_ACT_BIT_SET_IPV4_SRC | - BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_VXLAN_DECAP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 + .act_tid = 1 }, [38] = { - .act_hid = BNXT_ULP_ACT_HID_0211, - .act_pattern_id = 8, + .act_hid = BNXT_ULP_ACT_HID_1080, + .act_pattern_id = 37, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_COUNT | - BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_VXLAN_DECAP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 + .act_tid = 1 }, [39] = { - .act_hid = BNXT_ULP_ACT_HID_0155, - .act_pattern_id = 9, + .act_hid = BNXT_ULP_ACT_HID_1880, + .act_pattern_id = 38, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_COUNT | - BNXT_ULP_ACT_BIT_SET_IPV4_DST | - BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_VXLAN_DECAP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 + .act_tid = 1 }, [40] = { - .act_hid = BNXT_ULP_ACT_HID_04ab, - .act_pattern_id = 10, + .act_hid = BNXT_ULP_ACT_HID_0890, + .act_pattern_id = 39, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | BNXT_ULP_ACT_BIT_COUNT | - BNXT_ULP_ACT_BIT_SET_IPV4_DST | - BNXT_ULP_ACT_BIT_SET_TP_SRC | - BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_ACT_BIT_VXLAN_DECAP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 + .act_tid = 1 }, [41] = { - .act_hid = BNXT_ULP_ACT_HID_01fe, - .act_pattern_id = 11, + .act_hid = BNXT_ULP_ACT_HID_1090, + .act_pattern_id = 40, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | BNXT_ULP_ACT_BIT_COUNT | - BNXT_ULP_ACT_BIT_SET_IPV4_SRC | - BNXT_ULP_ACT_BIT_SET_IPV4_DST | - BNXT_ULP_ACT_BIT_SET_TP_SRC | - BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_ACT_BIT_VXLAN_DECAP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 + .act_tid = 1 }, [42] = { - .act_hid = BNXT_ULP_ACT_HID_0667, - .act_pattern_id = 12, + .act_hid = BNXT_ULP_ACT_HID_1890, + .act_pattern_id = 41, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_DEC_TTL | - BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_VXLAN_DECAP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 + .act_tid = 1 }, [43] = { - .act_hid = BNXT_ULP_ACT_HID_0254, - .act_pattern_id = 13, + .act_hid = BNXT_ULP_ACT_HID_3af2, + .act_pattern_id = 42, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_DEC_TTL | - BNXT_ULP_ACT_BIT_SET_IPV4_SRC | - BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DROP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 + .act_tid = 1 }, [44] = { - .act_hid = BNXT_ULP_ACT_HID_03ba, - .act_pattern_id = 14, + .act_hid = BNXT_ULP_ACT_HID_42f2, + .act_pattern_id = 43, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_DEC_TTL | - BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DROP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 + .act_tid = 1 }, [45] = { - .act_hid = BNXT_ULP_ACT_HID_02fe, - .act_pattern_id = 15, + .act_hid = BNXT_ULP_ACT_HID_4af2, + .act_pattern_id = 44, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_DEC_TTL | - BNXT_ULP_ACT_BIT_SET_IPV4_DST | - BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DROP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 + .act_tid = 1 }, [46] = { - .act_hid = BNXT_ULP_ACT_HID_0654, - .act_pattern_id = 16, + .act_hid = BNXT_ULP_ACT_HID_3b02, + .act_pattern_id = 45, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_DEC_TTL | - BNXT_ULP_ACT_BIT_SET_IPV4_DST | - BNXT_ULP_ACT_BIT_SET_TP_SRC | - BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_DROP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 + .act_tid = 1 }, [47] = { - .act_hid = BNXT_ULP_ACT_HID_03a7, - .act_pattern_id = 17, + .act_hid = BNXT_ULP_ACT_HID_4302, + .act_pattern_id = 46, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_DEC_TTL | - BNXT_ULP_ACT_BIT_SET_IPV4_SRC | - BNXT_ULP_ACT_BIT_SET_IPV4_DST | - BNXT_ULP_ACT_BIT_SET_TP_SRC | - BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_DROP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 + .act_tid = 1 }, [48] = { - .act_hid = BNXT_ULP_ACT_HID_0669, - .act_pattern_id = 18, + .act_hid = BNXT_ULP_ACT_HID_4b02, + .act_pattern_id = 47, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | BNXT_ULP_ACT_BIT_COUNT | - BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_DROP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 + .act_tid = 1 }, [49] = { - .act_hid = BNXT_ULP_ACT_HID_0256, - .act_pattern_id = 19, + .act_hid = BNXT_ULP_ACT_HID_3b6a, + .act_pattern_id = 48, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_DEC_TTL | - BNXT_ULP_ACT_BIT_COUNT | - BNXT_ULP_ACT_BIT_SET_IPV4_SRC | - BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_VXLAN_DECAP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 + .act_tid = 1 }, [50] = { - .act_hid = BNXT_ULP_ACT_HID_03bc, - .act_pattern_id = 20, + .act_hid = BNXT_ULP_ACT_HID_436a, + .act_pattern_id = 49, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_DEC_TTL | - BNXT_ULP_ACT_BIT_COUNT | - BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_VXLAN_DECAP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 + .act_tid = 1 }, [51] = { - .act_hid = BNXT_ULP_ACT_HID_0300, - .act_pattern_id = 21, + .act_hid = BNXT_ULP_ACT_HID_4b6a, + .act_pattern_id = 50, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_DEC_TTL | - BNXT_ULP_ACT_BIT_COUNT | - BNXT_ULP_ACT_BIT_SET_IPV4_DST | - BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_VXLAN_DECAP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 + .act_tid = 1 }, [52] = { - .act_hid = BNXT_ULP_ACT_HID_0656, - .act_pattern_id = 22, + .act_hid = BNXT_ULP_ACT_HID_3b7a, + .act_pattern_id = 51, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | BNXT_ULP_ACT_BIT_COUNT | - BNXT_ULP_ACT_BIT_SET_IPV4_DST | - BNXT_ULP_ACT_BIT_SET_TP_SRC | - BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_ACT_BIT_VXLAN_DECAP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 + .act_tid = 1 }, [53] = { - .act_hid = BNXT_ULP_ACT_HID_03a9, - .act_pattern_id = 23, + .act_hid = BNXT_ULP_ACT_HID_437a, + .act_pattern_id = 52, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | BNXT_ULP_ACT_BIT_COUNT | - BNXT_ULP_ACT_BIT_SET_IPV4_SRC | - BNXT_ULP_ACT_BIT_SET_IPV4_DST | - BNXT_ULP_ACT_BIT_SET_TP_SRC | - BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_ACT_BIT_VXLAN_DECAP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 + .act_tid = 1 }, [54] = { - .act_hid = BNXT_ULP_ACT_HID_021b, - .act_pattern_id = 0, + .act_hid = BNXT_ULP_ACT_HID_4b7a, + .act_pattern_id = 53, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 4 + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_VXLAN_DECAP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 1 }, [55] = { - .act_hid = BNXT_ULP_ACT_HID_021c, - .act_pattern_id = 1, + .act_hid = BNXT_ULP_ACT_HID_640d, + .act_pattern_id = 0, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_DROP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + BNXT_ULP_ACT_BIT_SHARED | + BNXT_ULP_ACT_BIT_SAMPLE | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 2 + }, + [56] = { + .act_hid = BNXT_ULP_ACT_HID_641d, + .act_pattern_id = 1, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED | + BNXT_ULP_ACT_BIT_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 2 + }, + [57] = { + .act_hid = BNXT_ULP_ACT_HID_071a, + .act_pattern_id = 2, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DELETE | + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 2 + }, + [58] = { + .act_hid = BNXT_ULP_ACT_HID_0800, + .act_pattern_id = 0, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [59] = { + .act_hid = BNXT_ULP_ACT_HID_1000, + .act_pattern_id = 1, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [60] = { + .act_hid = BNXT_ULP_ACT_HID_1800, + .act_pattern_id = 2, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [61] = { + .act_hid = BNXT_ULP_ACT_HID_0810, + .act_pattern_id = 3, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [62] = { + .act_hid = BNXT_ULP_ACT_HID_1010, + .act_pattern_id = 4, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [63] = { + .act_hid = BNXT_ULP_ACT_HID_1810, + .act_pattern_id = 5, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [64] = { + .act_hid = BNXT_ULP_ACT_HID_1110, + .act_pattern_id = 6, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [65] = { + .act_hid = BNXT_ULP_ACT_HID_4420, + .act_pattern_id = 7, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [66] = { + .act_hid = BNXT_ULP_ACT_HID_2220, + .act_pattern_id = 8, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [67] = { + .act_hid = BNXT_ULP_ACT_HID_0c84, + .act_pattern_id = 9, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [68] = { + .act_hid = BNXT_ULP_ACT_HID_3f94, + .act_pattern_id = 10, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [69] = { + .act_hid = BNXT_ULP_ACT_HID_3330, + .act_pattern_id = 11, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [70] = { + .act_hid = BNXT_ULP_ACT_HID_50a4, + .act_pattern_id = 12, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [71] = { + .act_hid = BNXT_ULP_ACT_HID_1910, + .act_pattern_id = 13, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [72] = { + .act_hid = BNXT_ULP_ACT_HID_4c20, + .act_pattern_id = 14, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [73] = { + .act_hid = BNXT_ULP_ACT_HID_2a20, + .act_pattern_id = 15, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [74] = { + .act_hid = BNXT_ULP_ACT_HID_1484, + .act_pattern_id = 16, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [75] = { + .act_hid = BNXT_ULP_ACT_HID_4794, + .act_pattern_id = 17, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [76] = { + .act_hid = BNXT_ULP_ACT_HID_3b30, + .act_pattern_id = 18, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [77] = { + .act_hid = BNXT_ULP_ACT_HID_58a4, + .act_pattern_id = 19, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [78] = { + .act_hid = BNXT_ULP_ACT_HID_2110, + .act_pattern_id = 20, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [79] = { + .act_hid = BNXT_ULP_ACT_HID_5420, + .act_pattern_id = 21, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [80] = { + .act_hid = BNXT_ULP_ACT_HID_3220, + .act_pattern_id = 22, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [81] = { + .act_hid = BNXT_ULP_ACT_HID_1c84, + .act_pattern_id = 23, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [82] = { + .act_hid = BNXT_ULP_ACT_HID_4f94, + .act_pattern_id = 24, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [83] = { + .act_hid = BNXT_ULP_ACT_HID_4330, + .act_pattern_id = 25, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [84] = { + .act_hid = BNXT_ULP_ACT_HID_60a4, + .act_pattern_id = 26, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [85] = { + .act_hid = BNXT_ULP_ACT_HID_2910, + .act_pattern_id = 27, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [86] = { + .act_hid = BNXT_ULP_ACT_HID_5c20, + .act_pattern_id = 28, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [87] = { + .act_hid = BNXT_ULP_ACT_HID_3a20, + .act_pattern_id = 29, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [88] = { + .act_hid = BNXT_ULP_ACT_HID_2484, + .act_pattern_id = 30, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [89] = { + .act_hid = BNXT_ULP_ACT_HID_5794, + .act_pattern_id = 31, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [90] = { + .act_hid = BNXT_ULP_ACT_HID_4b30, + .act_pattern_id = 32, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [91] = { + .act_hid = BNXT_ULP_ACT_HID_68a4, + .act_pattern_id = 33, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [92] = { + .act_hid = BNXT_ULP_ACT_HID_1120, + .act_pattern_id = 34, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [93] = { + .act_hid = BNXT_ULP_ACT_HID_4430, + .act_pattern_id = 35, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [94] = { + .act_hid = BNXT_ULP_ACT_HID_2230, + .act_pattern_id = 36, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [95] = { + .act_hid = BNXT_ULP_ACT_HID_0c94, + .act_pattern_id = 37, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [96] = { + .act_hid = BNXT_ULP_ACT_HID_3fa4, + .act_pattern_id = 38, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [97] = { + .act_hid = BNXT_ULP_ACT_HID_3340, + .act_pattern_id = 39, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [98] = { + .act_hid = BNXT_ULP_ACT_HID_50b4, + .act_pattern_id = 40, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [99] = { + .act_hid = BNXT_ULP_ACT_HID_1920, + .act_pattern_id = 41, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [100] = { + .act_hid = BNXT_ULP_ACT_HID_4c30, + .act_pattern_id = 42, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [101] = { + .act_hid = BNXT_ULP_ACT_HID_2a30, + .act_pattern_id = 43, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [102] = { + .act_hid = BNXT_ULP_ACT_HID_1494, + .act_pattern_id = 44, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [103] = { + .act_hid = BNXT_ULP_ACT_HID_47a4, + .act_pattern_id = 45, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [104] = { + .act_hid = BNXT_ULP_ACT_HID_3b40, + .act_pattern_id = 46, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [105] = { + .act_hid = BNXT_ULP_ACT_HID_58b4, + .act_pattern_id = 47, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [106] = { + .act_hid = BNXT_ULP_ACT_HID_2120, + .act_pattern_id = 48, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [107] = { + .act_hid = BNXT_ULP_ACT_HID_5430, + .act_pattern_id = 49, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [108] = { + .act_hid = BNXT_ULP_ACT_HID_3230, + .act_pattern_id = 50, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [109] = { + .act_hid = BNXT_ULP_ACT_HID_1c94, + .act_pattern_id = 51, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [110] = { + .act_hid = BNXT_ULP_ACT_HID_4fa4, + .act_pattern_id = 52, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [111] = { + .act_hid = BNXT_ULP_ACT_HID_4340, + .act_pattern_id = 53, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [112] = { + .act_hid = BNXT_ULP_ACT_HID_60b4, + .act_pattern_id = 54, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [113] = { + .act_hid = BNXT_ULP_ACT_HID_2920, + .act_pattern_id = 55, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [114] = { + .act_hid = BNXT_ULP_ACT_HID_5c30, + .act_pattern_id = 56, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [115] = { + .act_hid = BNXT_ULP_ACT_HID_3a30, + .act_pattern_id = 57, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [116] = { + .act_hid = BNXT_ULP_ACT_HID_2494, + .act_pattern_id = 58, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [117] = { + .act_hid = BNXT_ULP_ACT_HID_57a4, + .act_pattern_id = 59, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [118] = { + .act_hid = BNXT_ULP_ACT_HID_4b40, + .act_pattern_id = 60, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [119] = { + .act_hid = BNXT_ULP_ACT_HID_68b4, + .act_pattern_id = 61, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [120] = { + .act_hid = BNXT_ULP_ACT_HID_2a98, + .act_pattern_id = 62, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [121] = { + .act_hid = BNXT_ULP_ACT_HID_5da8, + .act_pattern_id = 63, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [122] = { + .act_hid = BNXT_ULP_ACT_HID_3ba8, + .act_pattern_id = 64, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [123] = { + .act_hid = BNXT_ULP_ACT_HID_260c, + .act_pattern_id = 65, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [124] = { + .act_hid = BNXT_ULP_ACT_HID_591c, + .act_pattern_id = 66, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [125] = { + .act_hid = BNXT_ULP_ACT_HID_6a2c, + .act_pattern_id = 67, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [126] = { + .act_hid = BNXT_ULP_ACT_HID_2aa8, + .act_pattern_id = 68, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [127] = { + .act_hid = BNXT_ULP_ACT_HID_5db8, + .act_pattern_id = 69, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [128] = { + .act_hid = BNXT_ULP_ACT_HID_3bb8, + .act_pattern_id = 70, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [129] = { + .act_hid = BNXT_ULP_ACT_HID_261c, + .act_pattern_id = 71, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [130] = { + .act_hid = BNXT_ULP_ACT_HID_592c, + .act_pattern_id = 72, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [131] = { + .act_hid = BNXT_ULP_ACT_HID_6a3c, + .act_pattern_id = 73, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [132] = { + .act_hid = BNXT_ULP_ACT_HID_3298, + .act_pattern_id = 74, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [133] = { + .act_hid = BNXT_ULP_ACT_HID_65a8, + .act_pattern_id = 75, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [134] = { + .act_hid = BNXT_ULP_ACT_HID_43a8, + .act_pattern_id = 76, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [135] = { + .act_hid = BNXT_ULP_ACT_HID_2e0c, + .act_pattern_id = 77, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [136] = { + .act_hid = BNXT_ULP_ACT_HID_611c, + .act_pattern_id = 78, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [137] = { + .act_hid = BNXT_ULP_ACT_HID_722c, + .act_pattern_id = 79, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [138] = { + .act_hid = BNXT_ULP_ACT_HID_32a8, + .act_pattern_id = 80, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [139] = { + .act_hid = BNXT_ULP_ACT_HID_65b8, + .act_pattern_id = 81, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [140] = { + .act_hid = BNXT_ULP_ACT_HID_43b8, + .act_pattern_id = 82, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [141] = { + .act_hid = BNXT_ULP_ACT_HID_2e1c, + .act_pattern_id = 83, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [142] = { + .act_hid = BNXT_ULP_ACT_HID_612c, + .act_pattern_id = 84, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [143] = { + .act_hid = BNXT_ULP_ACT_HID_723c, + .act_pattern_id = 85, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [144] = { + .act_hid = BNXT_ULP_ACT_HID_3a98, + .act_pattern_id = 86, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [145] = { + .act_hid = BNXT_ULP_ACT_HID_6da8, + .act_pattern_id = 87, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [146] = { + .act_hid = BNXT_ULP_ACT_HID_4ba8, + .act_pattern_id = 88, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [147] = { + .act_hid = BNXT_ULP_ACT_HID_360c, + .act_pattern_id = 89, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [148] = { + .act_hid = BNXT_ULP_ACT_HID_691c, + .act_pattern_id = 90, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [149] = { + .act_hid = BNXT_ULP_ACT_HID_7a2c, + .act_pattern_id = 91, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [150] = { + .act_hid = BNXT_ULP_ACT_HID_3aa8, + .act_pattern_id = 92, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [151] = { + .act_hid = BNXT_ULP_ACT_HID_6db8, + .act_pattern_id = 93, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [152] = { + .act_hid = BNXT_ULP_ACT_HID_4bb8, + .act_pattern_id = 94, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [153] = { + .act_hid = BNXT_ULP_ACT_HID_361c, + .act_pattern_id = 95, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [154] = { + .act_hid = BNXT_ULP_ACT_HID_692c, + .act_pattern_id = 96, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [155] = { + .act_hid = BNXT_ULP_ACT_HID_7a3c, + .act_pattern_id = 97, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [156] = { + .act_hid = BNXT_ULP_ACT_HID_4298, + .act_pattern_id = 98, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [157] = { + .act_hid = BNXT_ULP_ACT_HID_75a8, + .act_pattern_id = 99, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [158] = { + .act_hid = BNXT_ULP_ACT_HID_53a8, + .act_pattern_id = 100, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [159] = { + .act_hid = BNXT_ULP_ACT_HID_3e0c, + .act_pattern_id = 101, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [160] = { + .act_hid = BNXT_ULP_ACT_HID_711c, + .act_pattern_id = 102, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [161] = { + .act_hid = BNXT_ULP_ACT_HID_0670, + .act_pattern_id = 103, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [162] = { + .act_hid = BNXT_ULP_ACT_HID_42a8, + .act_pattern_id = 104, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [163] = { + .act_hid = BNXT_ULP_ACT_HID_75b8, + .act_pattern_id = 105, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [164] = { + .act_hid = BNXT_ULP_ACT_HID_53b8, + .act_pattern_id = 106, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [165] = { + .act_hid = BNXT_ULP_ACT_HID_3e1c, + .act_pattern_id = 107, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [166] = { + .act_hid = BNXT_ULP_ACT_HID_712c, + .act_pattern_id = 108, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [167] = { + .act_hid = BNXT_ULP_ACT_HID_0680, + .act_pattern_id = 109, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [168] = { + .act_hid = BNXT_ULP_ACT_HID_3aea, + .act_pattern_id = 110, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [169] = { + .act_hid = BNXT_ULP_ACT_HID_42ea, + .act_pattern_id = 111, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [170] = { + .act_hid = BNXT_ULP_ACT_HID_4aea, + .act_pattern_id = 112, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [171] = { + .act_hid = BNXT_ULP_ACT_HID_3afa, + .act_pattern_id = 113, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [172] = { + .act_hid = BNXT_ULP_ACT_HID_42fa, + .act_pattern_id = 114, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [173] = { + .act_hid = BNXT_ULP_ACT_HID_4afa, + .act_pattern_id = 115, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [174] = { + .act_hid = BNXT_ULP_ACT_HID_43fa, + .act_pattern_id = 116, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [175] = { + .act_hid = BNXT_ULP_ACT_HID_770a, + .act_pattern_id = 117, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [176] = { + .act_hid = BNXT_ULP_ACT_HID_550a, + .act_pattern_id = 118, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [177] = { + .act_hid = BNXT_ULP_ACT_HID_3f6e, + .act_pattern_id = 119, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [178] = { + .act_hid = BNXT_ULP_ACT_HID_727e, + .act_pattern_id = 120, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [179] = { + .act_hid = BNXT_ULP_ACT_HID_661a, + .act_pattern_id = 121, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [180] = { + .act_hid = BNXT_ULP_ACT_HID_07d2, + .act_pattern_id = 122, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [181] = { + .act_hid = BNXT_ULP_ACT_HID_4bfa, + .act_pattern_id = 123, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [182] = { + .act_hid = BNXT_ULP_ACT_HID_034e, + .act_pattern_id = 124, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [183] = { + .act_hid = BNXT_ULP_ACT_HID_5d0a, + .act_pattern_id = 125, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [184] = { + .act_hid = BNXT_ULP_ACT_HID_476e, + .act_pattern_id = 126, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [185] = { + .act_hid = BNXT_ULP_ACT_HID_7a7e, + .act_pattern_id = 127, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [186] = { + .act_hid = BNXT_ULP_ACT_HID_6e1a, + .act_pattern_id = 128, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [187] = { + .act_hid = BNXT_ULP_ACT_HID_0fd2, + .act_pattern_id = 129, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [188] = { + .act_hid = BNXT_ULP_ACT_HID_53fa, + .act_pattern_id = 130, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [189] = { + .act_hid = BNXT_ULP_ACT_HID_0b4e, + .act_pattern_id = 131, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [190] = { + .act_hid = BNXT_ULP_ACT_HID_650a, + .act_pattern_id = 132, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [191] = { + .act_hid = BNXT_ULP_ACT_HID_4f6e, + .act_pattern_id = 133, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [192] = { + .act_hid = BNXT_ULP_ACT_HID_06c2, + .act_pattern_id = 134, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [193] = { + .act_hid = BNXT_ULP_ACT_HID_761a, + .act_pattern_id = 135, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [194] = { + .act_hid = BNXT_ULP_ACT_HID_17d2, + .act_pattern_id = 136, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [195] = { + .act_hid = BNXT_ULP_ACT_HID_5bfa, + .act_pattern_id = 137, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [196] = { + .act_hid = BNXT_ULP_ACT_HID_134e, + .act_pattern_id = 138, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [197] = { + .act_hid = BNXT_ULP_ACT_HID_6d0a, + .act_pattern_id = 139, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [198] = { + .act_hid = BNXT_ULP_ACT_HID_576e, + .act_pattern_id = 140, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [199] = { + .act_hid = BNXT_ULP_ACT_HID_0ec2, + .act_pattern_id = 141, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [200] = { + .act_hid = BNXT_ULP_ACT_HID_025e, + .act_pattern_id = 142, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [201] = { + .act_hid = BNXT_ULP_ACT_HID_1fd2, + .act_pattern_id = 143, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [202] = { + .act_hid = BNXT_ULP_ACT_HID_440a, + .act_pattern_id = 144, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [203] = { + .act_hid = BNXT_ULP_ACT_HID_771a, + .act_pattern_id = 145, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [204] = { + .act_hid = BNXT_ULP_ACT_HID_551a, + .act_pattern_id = 146, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [205] = { + .act_hid = BNXT_ULP_ACT_HID_3f7e, + .act_pattern_id = 147, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [206] = { + .act_hid = BNXT_ULP_ACT_HID_728e, + .act_pattern_id = 148, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [207] = { + .act_hid = BNXT_ULP_ACT_HID_662a, + .act_pattern_id = 149, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [208] = { + .act_hid = BNXT_ULP_ACT_HID_07e2, + .act_pattern_id = 150, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [209] = { + .act_hid = BNXT_ULP_ACT_HID_4c0a, + .act_pattern_id = 151, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [210] = { + .act_hid = BNXT_ULP_ACT_HID_035e, + .act_pattern_id = 152, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [211] = { + .act_hid = BNXT_ULP_ACT_HID_5d1a, + .act_pattern_id = 153, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [212] = { + .act_hid = BNXT_ULP_ACT_HID_477e, + .act_pattern_id = 154, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [213] = { + .act_hid = BNXT_ULP_ACT_HID_7a8e, + .act_pattern_id = 155, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [214] = { + .act_hid = BNXT_ULP_ACT_HID_6e2a, + .act_pattern_id = 156, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [215] = { + .act_hid = BNXT_ULP_ACT_HID_0fe2, + .act_pattern_id = 157, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [216] = { + .act_hid = BNXT_ULP_ACT_HID_540a, + .act_pattern_id = 158, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [217] = { + .act_hid = BNXT_ULP_ACT_HID_0b5e, + .act_pattern_id = 159, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [218] = { + .act_hid = BNXT_ULP_ACT_HID_651a, + .act_pattern_id = 160, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [219] = { + .act_hid = BNXT_ULP_ACT_HID_4f7e, + .act_pattern_id = 161, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [220] = { + .act_hid = BNXT_ULP_ACT_HID_06d2, + .act_pattern_id = 162, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [221] = { + .act_hid = BNXT_ULP_ACT_HID_762a, + .act_pattern_id = 163, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [222] = { + .act_hid = BNXT_ULP_ACT_HID_17e2, + .act_pattern_id = 164, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [223] = { + .act_hid = BNXT_ULP_ACT_HID_5c0a, + .act_pattern_id = 165, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [224] = { + .act_hid = BNXT_ULP_ACT_HID_135e, + .act_pattern_id = 166, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [225] = { + .act_hid = BNXT_ULP_ACT_HID_6d1a, + .act_pattern_id = 167, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [226] = { + .act_hid = BNXT_ULP_ACT_HID_577e, + .act_pattern_id = 168, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [227] = { + .act_hid = BNXT_ULP_ACT_HID_0ed2, + .act_pattern_id = 169, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [228] = { + .act_hid = BNXT_ULP_ACT_HID_026e, + .act_pattern_id = 170, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [229] = { + .act_hid = BNXT_ULP_ACT_HID_1fe2, + .act_pattern_id = 171, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [230] = { + .act_hid = BNXT_ULP_ACT_HID_5d82, + .act_pattern_id = 172, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [231] = { + .act_hid = BNXT_ULP_ACT_HID_14d6, + .act_pattern_id = 173, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [232] = { + .act_hid = BNXT_ULP_ACT_HID_6e92, + .act_pattern_id = 174, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [233] = { + .act_hid = BNXT_ULP_ACT_HID_58f6, + .act_pattern_id = 175, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [234] = { + .act_hid = BNXT_ULP_ACT_HID_104a, + .act_pattern_id = 176, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [235] = { + .act_hid = BNXT_ULP_ACT_HID_215a, + .act_pattern_id = 177, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [236] = { + .act_hid = BNXT_ULP_ACT_HID_5d92, + .act_pattern_id = 178, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [237] = { + .act_hid = BNXT_ULP_ACT_HID_14e6, + .act_pattern_id = 179, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [238] = { + .act_hid = BNXT_ULP_ACT_HID_6ea2, + .act_pattern_id = 180, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [239] = { + .act_hid = BNXT_ULP_ACT_HID_5906, + .act_pattern_id = 181, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [240] = { + .act_hid = BNXT_ULP_ACT_HID_105a, + .act_pattern_id = 182, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [241] = { + .act_hid = BNXT_ULP_ACT_HID_216a, + .act_pattern_id = 183, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [242] = { + .act_hid = BNXT_ULP_ACT_HID_6582, + .act_pattern_id = 184, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [243] = { + .act_hid = BNXT_ULP_ACT_HID_1cd6, + .act_pattern_id = 185, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [244] = { + .act_hid = BNXT_ULP_ACT_HID_7692, + .act_pattern_id = 186, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [245] = { + .act_hid = BNXT_ULP_ACT_HID_60f6, + .act_pattern_id = 187, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [246] = { + .act_hid = BNXT_ULP_ACT_HID_184a, + .act_pattern_id = 188, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [247] = { + .act_hid = BNXT_ULP_ACT_HID_295a, + .act_pattern_id = 189, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [248] = { + .act_hid = BNXT_ULP_ACT_HID_6592, + .act_pattern_id = 190, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [249] = { + .act_hid = BNXT_ULP_ACT_HID_1ce6, + .act_pattern_id = 191, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [250] = { + .act_hid = BNXT_ULP_ACT_HID_76a2, + .act_pattern_id = 192, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [251] = { + .act_hid = BNXT_ULP_ACT_HID_6106, + .act_pattern_id = 193, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [252] = { + .act_hid = BNXT_ULP_ACT_HID_185a, + .act_pattern_id = 194, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [253] = { + .act_hid = BNXT_ULP_ACT_HID_296a, + .act_pattern_id = 195, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [254] = { + .act_hid = BNXT_ULP_ACT_HID_6d82, + .act_pattern_id = 196, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [255] = { + .act_hid = BNXT_ULP_ACT_HID_24d6, + .act_pattern_id = 197, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [256] = { + .act_hid = BNXT_ULP_ACT_HID_02d6, + .act_pattern_id = 198, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [257] = { + .act_hid = BNXT_ULP_ACT_HID_68f6, + .act_pattern_id = 199, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [258] = { + .act_hid = BNXT_ULP_ACT_HID_204a, + .act_pattern_id = 200, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [259] = { + .act_hid = BNXT_ULP_ACT_HID_315a, + .act_pattern_id = 201, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [260] = { + .act_hid = BNXT_ULP_ACT_HID_6d92, + .act_pattern_id = 202, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [261] = { + .act_hid = BNXT_ULP_ACT_HID_24e6, + .act_pattern_id = 203, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [262] = { + .act_hid = BNXT_ULP_ACT_HID_02e6, + .act_pattern_id = 204, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [263] = { + .act_hid = BNXT_ULP_ACT_HID_6906, + .act_pattern_id = 205, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [264] = { + .act_hid = BNXT_ULP_ACT_HID_205a, + .act_pattern_id = 206, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [265] = { + .act_hid = BNXT_ULP_ACT_HID_316a, + .act_pattern_id = 207, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [266] = { + .act_hid = BNXT_ULP_ACT_HID_7582, + .act_pattern_id = 208, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [267] = { + .act_hid = BNXT_ULP_ACT_HID_2cd6, + .act_pattern_id = 209, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [268] = { + .act_hid = BNXT_ULP_ACT_HID_0ad6, + .act_pattern_id = 210, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [269] = { + .act_hid = BNXT_ULP_ACT_HID_70f6, + .act_pattern_id = 211, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [270] = { + .act_hid = BNXT_ULP_ACT_HID_284a, + .act_pattern_id = 212, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [271] = { + .act_hid = BNXT_ULP_ACT_HID_395a, + .act_pattern_id = 213, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [272] = { + .act_hid = BNXT_ULP_ACT_HID_7592, + .act_pattern_id = 214, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [273] = { + .act_hid = BNXT_ULP_ACT_HID_2ce6, + .act_pattern_id = 215, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [274] = { + .act_hid = BNXT_ULP_ACT_HID_0ae6, + .act_pattern_id = 216, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [275] = { + .act_hid = BNXT_ULP_ACT_HID_7106, + .act_pattern_id = 217, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [276] = { + .act_hid = BNXT_ULP_ACT_HID_285a, + .act_pattern_id = 218, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [277] = { + .act_hid = BNXT_ULP_ACT_HID_396a, + .act_pattern_id = 219, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 3 + }, + [278] = { + .act_hid = BNXT_ULP_ACT_HID_0020, + .act_pattern_id = 0, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_RSS | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 4 + }, + [279] = { + .act_hid = BNXT_ULP_ACT_HID_0030, + .act_pattern_id = 1, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_RSS | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 4 + }, + [280] = { + .act_hid = BNXT_ULP_ACT_HID_65d4, + .act_pattern_id = 2, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_QUEUE | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 4 + }, + [281] = { + .act_hid = BNXT_ULP_ACT_HID_65e4, + .act_pattern_id = 3, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_QUEUE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 4 + }, + [282] = { + .act_hid = BNXT_ULP_ACT_HID_330a, + .act_pattern_id = 4, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_RSS | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 4 + }, + [283] = { + .act_hid = BNXT_ULP_ACT_HID_331a, + .act_pattern_id = 5, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_RSS | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 4 + }, + [284] = { + .act_hid = BNXT_ULP_ACT_HID_1cfe, + .act_pattern_id = 6, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_QUEUE | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 4 + }, + [285] = { + .act_hid = BNXT_ULP_ACT_HID_1d0e, + .act_pattern_id = 7, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_QUEUE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 4 }, - [56] = { - .act_hid = BNXT_ULP_ACT_HID_021e, - .act_pattern_id = 2, + [286] = { + .act_hid = BNXT_ULP_ACT_HID_1474, + .act_pattern_id = 0, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_METER_PROFILE | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 5 + }, + [287] = { + .act_hid = BNXT_ULP_ACT_HID_4838, + .act_pattern_id = 1, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_METER | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 5 + }, + [288] = { + .act_hid = BNXT_ULP_ACT_HID_6458, + .act_pattern_id = 2, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DELETE | + BNXT_ULP_ACT_BIT_METER_PROFILE | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 5 + }, + [289] = { + .act_hid = BNXT_ULP_ACT_HID_1c68, + .act_pattern_id = 3, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DELETE | + BNXT_ULP_ACT_BIT_SHARED_METER | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 5 + }, + [290] = { + .act_hid = BNXT_ULP_ACT_HID_6c34, + .act_pattern_id = 4, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_UPDATE | + BNXT_ULP_ACT_BIT_SHARED_METER | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 5 + }, + [291] = { + .act_hid = BNXT_ULP_ACT_HID_5d08, + .act_pattern_id = 0, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [292] = { + .act_hid = BNXT_ULP_ACT_HID_5d10, + .act_pattern_id = 1, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DROP | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [293] = { + .act_hid = BNXT_ULP_ACT_HID_5d20, + .act_pattern_id = 2, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DROP | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [294] = { + .act_hid = BNXT_ULP_ACT_HID_2e18, + .act_pattern_id = 3, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_VLAN_PCP | + BNXT_ULP_ACT_BIT_SET_VLAN_VID | + BNXT_ULP_ACT_BIT_PUSH_VLAN | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [295] = { + .act_hid = BNXT_ULP_ACT_HID_29d4, + .act_pattern_id = 4, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_VLAN_VID | + BNXT_ULP_ACT_BIT_PUSH_VLAN | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [296] = { + .act_hid = BNXT_ULP_ACT_HID_7690, + .act_pattern_id = 5, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [297] = { + .act_hid = BNXT_ULP_ACT_HID_47a0, + .act_pattern_id = 6, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_VLAN_PCP | + BNXT_ULP_ACT_BIT_SET_VLAN_VID | + BNXT_ULP_ACT_BIT_PUSH_VLAN | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [298] = { + .act_hid = BNXT_ULP_ACT_HID_435c, + .act_pattern_id = 7, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_VLAN_VID | + BNXT_ULP_ACT_BIT_PUSH_VLAN | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [299] = { + .act_hid = BNXT_ULP_ACT_HID_5d18, + .act_pattern_id = 8, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [300] = { + .act_hid = BNXT_ULP_ACT_HID_2e28, + .act_pattern_id = 9, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_VLAN_PCP | + BNXT_ULP_ACT_BIT_SET_VLAN_VID | + BNXT_ULP_ACT_BIT_PUSH_VLAN | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [301] = { + .act_hid = BNXT_ULP_ACT_HID_29e4, + .act_pattern_id = 10, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_VLAN_VID | + BNXT_ULP_ACT_BIT_PUSH_VLAN | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [302] = { + .act_hid = BNXT_ULP_ACT_HID_76a0, + .act_pattern_id = 11, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [303] = { + .act_hid = BNXT_ULP_ACT_HID_47b0, + .act_pattern_id = 12, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_VLAN_PCP | + BNXT_ULP_ACT_BIT_SET_VLAN_VID | + BNXT_ULP_ACT_BIT_PUSH_VLAN | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [304] = { + .act_hid = BNXT_ULP_ACT_HID_436c, + .act_pattern_id = 13, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_VLAN_VID | + BNXT_ULP_ACT_BIT_PUSH_VLAN | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [305] = { + .act_hid = BNXT_ULP_ACT_HID_1436, + .act_pattern_id = 14, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [306] = { + .act_hid = BNXT_ULP_ACT_HID_143e, + .act_pattern_id = 15, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_DROP | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [307] = { + .act_hid = BNXT_ULP_ACT_HID_144e, + .act_pattern_id = 16, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_DROP | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [308] = { + .act_hid = BNXT_ULP_ACT_HID_6102, + .act_pattern_id = 17, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_VLAN_PCP | + BNXT_ULP_ACT_BIT_SET_VLAN_VID | + BNXT_ULP_ACT_BIT_PUSH_VLAN | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [309] = { + .act_hid = BNXT_ULP_ACT_HID_5cbe, + .act_pattern_id = 18, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_VLAN_VID | + BNXT_ULP_ACT_BIT_PUSH_VLAN | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [310] = { + .act_hid = BNXT_ULP_ACT_HID_2dbe, + .act_pattern_id = 19, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [311] = { + .act_hid = BNXT_ULP_ACT_HID_7a8a, + .act_pattern_id = 20, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_VLAN_PCP | + BNXT_ULP_ACT_BIT_SET_VLAN_VID | + BNXT_ULP_ACT_BIT_PUSH_VLAN | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [312] = { + .act_hid = BNXT_ULP_ACT_HID_7646, + .act_pattern_id = 21, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_VLAN_VID | + BNXT_ULP_ACT_BIT_PUSH_VLAN | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [313] = { + .act_hid = BNXT_ULP_ACT_HID_1446, + .act_pattern_id = 22, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [314] = { + .act_hid = BNXT_ULP_ACT_HID_6112, + .act_pattern_id = 23, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_VLAN_PCP | + BNXT_ULP_ACT_BIT_SET_VLAN_VID | + BNXT_ULP_ACT_BIT_PUSH_VLAN | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [315] = { + .act_hid = BNXT_ULP_ACT_HID_5cce, + .act_pattern_id = 24, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_VLAN_VID | + BNXT_ULP_ACT_BIT_PUSH_VLAN | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [316] = { + .act_hid = BNXT_ULP_ACT_HID_2dce, + .act_pattern_id = 25, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [317] = { + .act_hid = BNXT_ULP_ACT_HID_7a9a, + .act_pattern_id = 26, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_VLAN_PCP | + BNXT_ULP_ACT_BIT_SET_VLAN_VID | + BNXT_ULP_ACT_BIT_PUSH_VLAN | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [318] = { + .act_hid = BNXT_ULP_ACT_HID_7656, + .act_pattern_id = 27, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_VLAN_VID | + BNXT_ULP_ACT_BIT_PUSH_VLAN | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 6 + }, + [319] = { + .act_hid = BNXT_ULP_ACT_HID_6508, + .act_pattern_id = 0, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [320] = { + .act_hid = BNXT_ULP_ACT_HID_6d08, + .act_pattern_id = 1, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [321] = { + .act_hid = BNXT_ULP_ACT_HID_7508, + .act_pattern_id = 2, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [322] = { + .act_hid = BNXT_ULP_ACT_HID_6518, + .act_pattern_id = 3, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [323] = { + .act_hid = BNXT_ULP_ACT_HID_6d18, + .act_pattern_id = 4, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [324] = { + .act_hid = BNXT_ULP_ACT_HID_7518, + .act_pattern_id = 5, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [325] = { + .act_hid = BNXT_ULP_ACT_HID_6e18, + .act_pattern_id = 6, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [326] = { + .act_hid = BNXT_ULP_ACT_HID_256c, + .act_pattern_id = 7, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [327] = { + .act_hid = BNXT_ULP_ACT_HID_036c, + .act_pattern_id = 8, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [328] = { + .act_hid = BNXT_ULP_ACT_HID_698c, + .act_pattern_id = 9, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [329] = { + .act_hid = BNXT_ULP_ACT_HID_20e0, + .act_pattern_id = 10, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [330] = { + .act_hid = BNXT_ULP_ACT_HID_31f0, + .act_pattern_id = 11, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [331] = { + .act_hid = BNXT_ULP_ACT_HID_7618, + .act_pattern_id = 12, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [332] = { + .act_hid = BNXT_ULP_ACT_HID_2d6c, + .act_pattern_id = 13, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [333] = { + .act_hid = BNXT_ULP_ACT_HID_0b6c, + .act_pattern_id = 14, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [334] = { + .act_hid = BNXT_ULP_ACT_HID_718c, + .act_pattern_id = 15, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [335] = { + .act_hid = BNXT_ULP_ACT_HID_28e0, + .act_pattern_id = 16, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [336] = { + .act_hid = BNXT_ULP_ACT_HID_39f0, + .act_pattern_id = 17, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [337] = { + .act_hid = BNXT_ULP_ACT_HID_025c, + .act_pattern_id = 18, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [338] = { + .act_hid = BNXT_ULP_ACT_HID_356c, + .act_pattern_id = 19, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [339] = { + .act_hid = BNXT_ULP_ACT_HID_136c, + .act_pattern_id = 20, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [340] = { + .act_hid = BNXT_ULP_ACT_HID_798c, + .act_pattern_id = 21, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [341] = { + .act_hid = BNXT_ULP_ACT_HID_30e0, + .act_pattern_id = 22, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [342] = { + .act_hid = BNXT_ULP_ACT_HID_41f0, + .act_pattern_id = 23, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [343] = { + .act_hid = BNXT_ULP_ACT_HID_0a5c, + .act_pattern_id = 24, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [344] = { + .act_hid = BNXT_ULP_ACT_HID_3d6c, + .act_pattern_id = 25, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [345] = { + .act_hid = BNXT_ULP_ACT_HID_1b6c, + .act_pattern_id = 26, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [346] = { + .act_hid = BNXT_ULP_ACT_HID_05d0, + .act_pattern_id = 27, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [347] = { + .act_hid = BNXT_ULP_ACT_HID_38e0, + .act_pattern_id = 28, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [348] = { + .act_hid = BNXT_ULP_ACT_HID_49f0, + .act_pattern_id = 29, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [349] = { + .act_hid = BNXT_ULP_ACT_HID_6e28, + .act_pattern_id = 30, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [350] = { + .act_hid = BNXT_ULP_ACT_HID_257c, + .act_pattern_id = 31, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [351] = { + .act_hid = BNXT_ULP_ACT_HID_037c, + .act_pattern_id = 32, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [352] = { + .act_hid = BNXT_ULP_ACT_HID_699c, + .act_pattern_id = 33, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [353] = { + .act_hid = BNXT_ULP_ACT_HID_20f0, + .act_pattern_id = 34, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [354] = { + .act_hid = BNXT_ULP_ACT_HID_3200, + .act_pattern_id = 35, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [355] = { + .act_hid = BNXT_ULP_ACT_HID_7628, + .act_pattern_id = 36, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [356] = { + .act_hid = BNXT_ULP_ACT_HID_2d7c, + .act_pattern_id = 37, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [357] = { + .act_hid = BNXT_ULP_ACT_HID_0b7c, + .act_pattern_id = 38, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [358] = { + .act_hid = BNXT_ULP_ACT_HID_719c, + .act_pattern_id = 39, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [359] = { + .act_hid = BNXT_ULP_ACT_HID_28f0, + .act_pattern_id = 40, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [360] = { + .act_hid = BNXT_ULP_ACT_HID_3a00, + .act_pattern_id = 41, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [361] = { + .act_hid = BNXT_ULP_ACT_HID_026c, + .act_pattern_id = 42, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [362] = { + .act_hid = BNXT_ULP_ACT_HID_357c, + .act_pattern_id = 43, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [363] = { + .act_hid = BNXT_ULP_ACT_HID_137c, + .act_pattern_id = 44, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [364] = { + .act_hid = BNXT_ULP_ACT_HID_799c, + .act_pattern_id = 45, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [365] = { + .act_hid = BNXT_ULP_ACT_HID_30f0, + .act_pattern_id = 46, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [366] = { + .act_hid = BNXT_ULP_ACT_HID_4200, + .act_pattern_id = 47, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [367] = { + .act_hid = BNXT_ULP_ACT_HID_0a6c, + .act_pattern_id = 48, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [368] = { + .act_hid = BNXT_ULP_ACT_HID_3d7c, + .act_pattern_id = 49, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [369] = { + .act_hid = BNXT_ULP_ACT_HID_1b7c, + .act_pattern_id = 50, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [370] = { + .act_hid = BNXT_ULP_ACT_HID_05e0, + .act_pattern_id = 51, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [371] = { + .act_hid = BNXT_ULP_ACT_HID_38f0, + .act_pattern_id = 52, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [372] = { + .act_hid = BNXT_ULP_ACT_HID_4a00, + .act_pattern_id = 53, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [373] = { + .act_hid = BNXT_ULP_ACT_HID_0be4, + .act_pattern_id = 54, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [374] = { + .act_hid = BNXT_ULP_ACT_HID_3ef4, + .act_pattern_id = 55, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [375] = { + .act_hid = BNXT_ULP_ACT_HID_1cf4, + .act_pattern_id = 56, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [376] = { + .act_hid = BNXT_ULP_ACT_HID_0758, + .act_pattern_id = 57, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [377] = { + .act_hid = BNXT_ULP_ACT_HID_3a68, + .act_pattern_id = 58, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [378] = { + .act_hid = BNXT_ULP_ACT_HID_4b78, + .act_pattern_id = 59, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [379] = { + .act_hid = BNXT_ULP_ACT_HID_0bf4, + .act_pattern_id = 60, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [380] = { + .act_hid = BNXT_ULP_ACT_HID_3f04, + .act_pattern_id = 61, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [381] = { + .act_hid = BNXT_ULP_ACT_HID_1d04, + .act_pattern_id = 62, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [382] = { + .act_hid = BNXT_ULP_ACT_HID_0768, + .act_pattern_id = 63, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [383] = { + .act_hid = BNXT_ULP_ACT_HID_3a78, + .act_pattern_id = 64, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [384] = { + .act_hid = BNXT_ULP_ACT_HID_4b88, + .act_pattern_id = 65, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [385] = { + .act_hid = BNXT_ULP_ACT_HID_46f4, + .act_pattern_id = 66, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [386] = { + .act_hid = BNXT_ULP_ACT_HID_24f4, + .act_pattern_id = 67, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [387] = { + .act_hid = BNXT_ULP_ACT_HID_0f58, + .act_pattern_id = 68, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [388] = { + .act_hid = BNXT_ULP_ACT_HID_13e4, + .act_pattern_id = 69, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [389] = { + .act_hid = BNXT_ULP_ACT_HID_4268, + .act_pattern_id = 70, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [390] = { + .act_hid = BNXT_ULP_ACT_HID_5378, + .act_pattern_id = 71, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [391] = { + .act_hid = BNXT_ULP_ACT_HID_13f4, + .act_pattern_id = 72, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [392] = { + .act_hid = BNXT_ULP_ACT_HID_4704, + .act_pattern_id = 73, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [393] = { + .act_hid = BNXT_ULP_ACT_HID_2504, + .act_pattern_id = 74, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [394] = { + .act_hid = BNXT_ULP_ACT_HID_0f68, + .act_pattern_id = 75, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [395] = { + .act_hid = BNXT_ULP_ACT_HID_4278, + .act_pattern_id = 76, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [396] = { + .act_hid = BNXT_ULP_ACT_HID_5388, + .act_pattern_id = 77, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [397] = { + .act_hid = BNXT_ULP_ACT_HID_1be4, + .act_pattern_id = 78, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [398] = { + .act_hid = BNXT_ULP_ACT_HID_4ef4, + .act_pattern_id = 79, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [399] = { + .act_hid = BNXT_ULP_ACT_HID_2cf4, + .act_pattern_id = 80, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [400] = { + .act_hid = BNXT_ULP_ACT_HID_1758, + .act_pattern_id = 81, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [401] = { + .act_hid = BNXT_ULP_ACT_HID_4a68, + .act_pattern_id = 82, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [402] = { + .act_hid = BNXT_ULP_ACT_HID_5b78, + .act_pattern_id = 83, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [403] = { + .act_hid = BNXT_ULP_ACT_HID_1bf4, + .act_pattern_id = 84, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [404] = { + .act_hid = BNXT_ULP_ACT_HID_4f04, + .act_pattern_id = 85, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [405] = { + .act_hid = BNXT_ULP_ACT_HID_2d04, + .act_pattern_id = 86, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [406] = { + .act_hid = BNXT_ULP_ACT_HID_1768, + .act_pattern_id = 87, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [407] = { + .act_hid = BNXT_ULP_ACT_HID_4a78, + .act_pattern_id = 88, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [408] = { + .act_hid = BNXT_ULP_ACT_HID_5b88, + .act_pattern_id = 89, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [409] = { + .act_hid = BNXT_ULP_ACT_HID_23e4, + .act_pattern_id = 90, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [410] = { + .act_hid = BNXT_ULP_ACT_HID_56f4, + .act_pattern_id = 91, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [411] = { + .act_hid = BNXT_ULP_ACT_HID_34f4, + .act_pattern_id = 92, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [412] = { + .act_hid = BNXT_ULP_ACT_HID_1f58, + .act_pattern_id = 93, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [413] = { + .act_hid = BNXT_ULP_ACT_HID_5268, + .act_pattern_id = 94, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [414] = { + .act_hid = BNXT_ULP_ACT_HID_6378, + .act_pattern_id = 95, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [415] = { + .act_hid = BNXT_ULP_ACT_HID_23f4, + .act_pattern_id = 96, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [416] = { + .act_hid = BNXT_ULP_ACT_HID_5704, + .act_pattern_id = 97, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [417] = { + .act_hid = BNXT_ULP_ACT_HID_3504, + .act_pattern_id = 98, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [418] = { + .act_hid = BNXT_ULP_ACT_HID_1f68, + .act_pattern_id = 99, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [419] = { + .act_hid = BNXT_ULP_ACT_HID_5278, + .act_pattern_id = 100, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [420] = { + .act_hid = BNXT_ULP_ACT_HID_6388, + .act_pattern_id = 101, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [421] = { + .act_hid = BNXT_ULP_ACT_HID_1c36, + .act_pattern_id = 102, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [422] = { + .act_hid = BNXT_ULP_ACT_HID_2436, + .act_pattern_id = 103, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [423] = { + .act_hid = BNXT_ULP_ACT_HID_2c36, + .act_pattern_id = 104, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [424] = { + .act_hid = BNXT_ULP_ACT_HID_1c46, + .act_pattern_id = 105, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [425] = { + .act_hid = BNXT_ULP_ACT_HID_2446, + .act_pattern_id = 106, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [426] = { + .act_hid = BNXT_ULP_ACT_HID_2c46, + .act_pattern_id = 107, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [427] = { + .act_hid = BNXT_ULP_ACT_HID_2546, + .act_pattern_id = 108, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [428] = { + .act_hid = BNXT_ULP_ACT_HID_5856, + .act_pattern_id = 109, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [429] = { + .act_hid = BNXT_ULP_ACT_HID_3656, + .act_pattern_id = 110, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [430] = { + .act_hid = BNXT_ULP_ACT_HID_20ba, + .act_pattern_id = 111, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [431] = { + .act_hid = BNXT_ULP_ACT_HID_53ca, + .act_pattern_id = 112, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [432] = { + .act_hid = BNXT_ULP_ACT_HID_64da, + .act_pattern_id = 113, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [433] = { + .act_hid = BNXT_ULP_ACT_HID_2d46, + .act_pattern_id = 114, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [434] = { + .act_hid = BNXT_ULP_ACT_HID_6056, + .act_pattern_id = 115, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [435] = { + .act_hid = BNXT_ULP_ACT_HID_3e56, + .act_pattern_id = 116, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [436] = { + .act_hid = BNXT_ULP_ACT_HID_28ba, + .act_pattern_id = 117, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [437] = { + .act_hid = BNXT_ULP_ACT_HID_5bca, + .act_pattern_id = 118, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [438] = { + .act_hid = BNXT_ULP_ACT_HID_6cda, + .act_pattern_id = 119, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [439] = { + .act_hid = BNXT_ULP_ACT_HID_3546, + .act_pattern_id = 120, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [440] = { + .act_hid = BNXT_ULP_ACT_HID_6856, + .act_pattern_id = 121, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [441] = { + .act_hid = BNXT_ULP_ACT_HID_4656, + .act_pattern_id = 122, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [442] = { + .act_hid = BNXT_ULP_ACT_HID_30ba, + .act_pattern_id = 123, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [443] = { + .act_hid = BNXT_ULP_ACT_HID_63ca, + .act_pattern_id = 124, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [444] = { + .act_hid = BNXT_ULP_ACT_HID_74da, + .act_pattern_id = 125, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [445] = { + .act_hid = BNXT_ULP_ACT_HID_3d46, + .act_pattern_id = 126, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [446] = { + .act_hid = BNXT_ULP_ACT_HID_7056, + .act_pattern_id = 127, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [447] = { + .act_hid = BNXT_ULP_ACT_HID_4e56, + .act_pattern_id = 128, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [448] = { + .act_hid = BNXT_ULP_ACT_HID_38ba, + .act_pattern_id = 129, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [449] = { + .act_hid = BNXT_ULP_ACT_HID_6bca, + .act_pattern_id = 130, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [450] = { + .act_hid = BNXT_ULP_ACT_HID_011e, + .act_pattern_id = 131, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [451] = { + .act_hid = BNXT_ULP_ACT_HID_2556, + .act_pattern_id = 132, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [452] = { + .act_hid = BNXT_ULP_ACT_HID_5866, + .act_pattern_id = 133, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [453] = { + .act_hid = BNXT_ULP_ACT_HID_3666, + .act_pattern_id = 134, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [454] = { + .act_hid = BNXT_ULP_ACT_HID_20ca, + .act_pattern_id = 135, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [455] = { + .act_hid = BNXT_ULP_ACT_HID_53da, + .act_pattern_id = 136, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [456] = { + .act_hid = BNXT_ULP_ACT_HID_64ea, + .act_pattern_id = 137, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [457] = { + .act_hid = BNXT_ULP_ACT_HID_2d56, + .act_pattern_id = 138, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [458] = { + .act_hid = BNXT_ULP_ACT_HID_6066, + .act_pattern_id = 139, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [459] = { + .act_hid = BNXT_ULP_ACT_HID_3e66, + .act_pattern_id = 140, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [460] = { + .act_hid = BNXT_ULP_ACT_HID_28ca, + .act_pattern_id = 141, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [461] = { + .act_hid = BNXT_ULP_ACT_HID_5bda, + .act_pattern_id = 142, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [462] = { + .act_hid = BNXT_ULP_ACT_HID_6cea, + .act_pattern_id = 143, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [463] = { + .act_hid = BNXT_ULP_ACT_HID_3556, + .act_pattern_id = 144, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [464] = { + .act_hid = BNXT_ULP_ACT_HID_6866, + .act_pattern_id = 145, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [465] = { + .act_hid = BNXT_ULP_ACT_HID_4666, + .act_pattern_id = 146, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [466] = { + .act_hid = BNXT_ULP_ACT_HID_30ca, + .act_pattern_id = 147, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [467] = { + .act_hid = BNXT_ULP_ACT_HID_63da, + .act_pattern_id = 148, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [468] = { + .act_hid = BNXT_ULP_ACT_HID_74ea, + .act_pattern_id = 149, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [469] = { + .act_hid = BNXT_ULP_ACT_HID_3d56, + .act_pattern_id = 150, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_DROP | + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 4 + .act_tid = 7 }, - [57] = { - .act_hid = BNXT_ULP_ACT_HID_063f, - .act_pattern_id = 3, + [470] = { + .act_hid = BNXT_ULP_ACT_HID_7066, + .act_pattern_id = 151, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_SET_VLAN_PCP | - BNXT_ULP_ACT_BIT_SET_VLAN_VID | - BNXT_ULP_ACT_BIT_PUSH_VLAN | + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 4 + .act_tid = 7 }, - [58] = { - .act_hid = BNXT_ULP_ACT_HID_0510, - .act_pattern_id = 4, + [471] = { + .act_hid = BNXT_ULP_ACT_HID_4e66, + .act_pattern_id = 152, .app_sig = 0, .act_sig = { .bits = - BNXT_ULP_ACT_BIT_SET_VLAN_VID | - BNXT_ULP_ACT_BIT_PUSH_VLAN | + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 4 + .act_tid = 7 }, - [59] = { - .act_hid = BNXT_ULP_ACT_HID_03c6, - .act_pattern_id = 5, + [472] = { + .act_hid = BNXT_ULP_ACT_HID_38ca, + .act_pattern_id = 153, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [473] = { + .act_hid = BNXT_ULP_ACT_HID_6bda, + .act_pattern_id = 154, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [474] = { + .act_hid = BNXT_ULP_ACT_HID_012e, + .act_pattern_id = 155, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [475] = { + .act_hid = BNXT_ULP_ACT_HID_3ece, + .act_pattern_id = 156, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 4 + .act_tid = 7 }, - [60] = { - .act_hid = BNXT_ULP_ACT_HID_0082, - .act_pattern_id = 6, + [476] = { + .act_hid = BNXT_ULP_ACT_HID_71de, + .act_pattern_id = 157, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | BNXT_ULP_ACT_BIT_DEC_TTL | - BNXT_ULP_ACT_BIT_SET_VLAN_PCP | - BNXT_ULP_ACT_BIT_SET_VLAN_VID | - BNXT_ULP_ACT_BIT_PUSH_VLAN | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 4 + .act_tid = 7 }, - [61] = { - .act_hid = BNXT_ULP_ACT_HID_06bb, - .act_pattern_id = 7, + [477] = { + .act_hid = BNXT_ULP_ACT_HID_4fde, + .act_pattern_id = 158, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | BNXT_ULP_ACT_BIT_DEC_TTL | - BNXT_ULP_ACT_BIT_SET_VLAN_VID | - BNXT_ULP_ACT_BIT_PUSH_VLAN | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 4 + .act_tid = 7 }, - [62] = { - .act_hid = BNXT_ULP_ACT_HID_021d, - .act_pattern_id = 8, + [478] = { + .act_hid = BNXT_ULP_ACT_HID_3a42, + .act_pattern_id = 159, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [479] = { + .act_hid = BNXT_ULP_ACT_HID_6d52, + .act_pattern_id = 160, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [480] = { + .act_hid = BNXT_ULP_ACT_HID_02a6, + .act_pattern_id = 161, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [481] = { + .act_hid = BNXT_ULP_ACT_HID_3ede, + .act_pattern_id = 162, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 4 + .act_tid = 7 }, - [63] = { - .act_hid = BNXT_ULP_ACT_HID_0641, - .act_pattern_id = 9, + [482] = { + .act_hid = BNXT_ULP_ACT_HID_71ee, + .act_pattern_id = 163, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | - BNXT_ULP_ACT_BIT_SET_VLAN_PCP | - BNXT_ULP_ACT_BIT_SET_VLAN_VID | - BNXT_ULP_ACT_BIT_PUSH_VLAN | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 4 + .act_tid = 7 }, - [64] = { - .act_hid = BNXT_ULP_ACT_HID_0512, - .act_pattern_id = 10, + [483] = { + .act_hid = BNXT_ULP_ACT_HID_4fee, + .act_pattern_id = 164, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | - BNXT_ULP_ACT_BIT_SET_VLAN_VID | - BNXT_ULP_ACT_BIT_PUSH_VLAN | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 4 + .act_tid = 7 }, - [65] = { - .act_hid = BNXT_ULP_ACT_HID_03c8, - .act_pattern_id = 11, + [484] = { + .act_hid = BNXT_ULP_ACT_HID_3a52, + .act_pattern_id = 165, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [485] = { + .act_hid = BNXT_ULP_ACT_HID_6d62, + .act_pattern_id = 166, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [486] = { + .act_hid = BNXT_ULP_ACT_HID_02b6, + .act_pattern_id = 167, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 4 + .act_tid = 7 }, - [66] = { - .act_hid = BNXT_ULP_ACT_HID_0084, - .act_pattern_id = 12, + [487] = { + .act_hid = BNXT_ULP_ACT_HID_79de, + .act_pattern_id = 168, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [488] = { + .act_hid = BNXT_ULP_ACT_HID_57de, + .act_pattern_id = 169, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [489] = { + .act_hid = BNXT_ULP_ACT_HID_4242, + .act_pattern_id = 170, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [490] = { + .act_hid = BNXT_ULP_ACT_HID_46ce, + .act_pattern_id = 171, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [491] = { + .act_hid = BNXT_ULP_ACT_HID_7552, + .act_pattern_id = 172, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [492] = { + .act_hid = BNXT_ULP_ACT_HID_0aa6, + .act_pattern_id = 173, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [493] = { + .act_hid = BNXT_ULP_ACT_HID_46de, + .act_pattern_id = 174, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [494] = { + .act_hid = BNXT_ULP_ACT_HID_79ee, + .act_pattern_id = 175, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | BNXT_ULP_ACT_BIT_DEC_TTL | - BNXT_ULP_ACT_BIT_SET_VLAN_PCP | - BNXT_ULP_ACT_BIT_SET_VLAN_VID | - BNXT_ULP_ACT_BIT_PUSH_VLAN | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_TP_SRC | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 4 + .act_tid = 7 }, - [67] = { - .act_hid = BNXT_ULP_ACT_HID_06bd, - .act_pattern_id = 13, + [495] = { + .act_hid = BNXT_ULP_ACT_HID_57ee, + .act_pattern_id = 176, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [496] = { + .act_hid = BNXT_ULP_ACT_HID_4252, + .act_pattern_id = 177, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [497] = { + .act_hid = BNXT_ULP_ACT_HID_7562, + .act_pattern_id = 178, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | BNXT_ULP_ACT_BIT_DEC_TTL | - BNXT_ULP_ACT_BIT_SET_VLAN_VID | - BNXT_ULP_ACT_BIT_PUSH_VLAN | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 4 + .act_tid = 7 }, - [68] = { - .act_hid = BNXT_ULP_ACT_HID_06d7, - .act_pattern_id = 0, + [498] = { + .act_hid = BNXT_ULP_ACT_HID_0ab6, + .act_pattern_id = 179, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_DEC_TTL | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_ACT_BIT_SET_IPV4_SRC | + BNXT_ULP_ACT_BIT_SET_IPV4_DST | + BNXT_ULP_ACT_BIT_SET_TP_SRC | + BNXT_ULP_ACT_BIT_SET_TP_DST | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 7 + }, + [499] = { + .act_hid = BNXT_ULP_ACT_HID_4ece, + .act_pattern_id = 180, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_SET_IPV4_SRC | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 + .act_tid = 7 }, - [69] = { - .act_hid = BNXT_ULP_ACT_HID_02c4, - .act_pattern_id = 1, + [500] = { + .act_hid = BNXT_ULP_ACT_HID_0622, + .act_pattern_id = 181, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_SET_IPV4_SRC | BNXT_ULP_ACT_BIT_SET_TP_SRC | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 + .act_tid = 7 }, - [70] = { - .act_hid = BNXT_ULP_ACT_HID_042a, - .act_pattern_id = 2, + [501] = { + .act_hid = BNXT_ULP_ACT_HID_5fde, + .act_pattern_id = 182, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_SET_IPV4_DST | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 + .act_tid = 7 }, - [71] = { - .act_hid = BNXT_ULP_ACT_HID_036e, - .act_pattern_id = 3, + [502] = { + .act_hid = BNXT_ULP_ACT_HID_4a42, + .act_pattern_id = 183, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_SET_IPV4_DST | BNXT_ULP_ACT_BIT_SET_TP_DST | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 + .act_tid = 7 }, - [72] = { - .act_hid = BNXT_ULP_ACT_HID_06c4, - .act_pattern_id = 4, + [503] = { + .act_hid = BNXT_ULP_ACT_HID_0196, + .act_pattern_id = 184, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_SET_IPV4_DST | BNXT_ULP_ACT_BIT_SET_TP_SRC | BNXT_ULP_ACT_BIT_SET_TP_DST | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 + .act_tid = 7 }, - [73] = { - .act_hid = BNXT_ULP_ACT_HID_0417, - .act_pattern_id = 5, + [504] = { + .act_hid = BNXT_ULP_ACT_HID_12a6, + .act_pattern_id = 185, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_SET_IPV4_SRC | BNXT_ULP_ACT_BIT_SET_IPV4_DST | BNXT_ULP_ACT_BIT_SET_TP_SRC | BNXT_ULP_ACT_BIT_SET_TP_DST | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 + .act_tid = 7 }, - [74] = { - .act_hid = BNXT_ULP_ACT_HID_06d9, - .act_pattern_id = 6, + [505] = { + .act_hid = BNXT_ULP_ACT_HID_4ede, + .act_pattern_id = 186, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_SET_IPV4_SRC | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 + .act_tid = 7 }, - [75] = { - .act_hid = BNXT_ULP_ACT_HID_02c6, - .act_pattern_id = 7, + [506] = { + .act_hid = BNXT_ULP_ACT_HID_0632, + .act_pattern_id = 187, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_SET_IPV4_SRC | BNXT_ULP_ACT_BIT_SET_TP_SRC | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 + .act_tid = 7 }, - [76] = { - .act_hid = BNXT_ULP_ACT_HID_042c, - .act_pattern_id = 8, + [507] = { + .act_hid = BNXT_ULP_ACT_HID_5fee, + .act_pattern_id = 188, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_SET_IPV4_DST | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 + .act_tid = 7 }, - [77] = { - .act_hid = BNXT_ULP_ACT_HID_0370, - .act_pattern_id = 9, + [508] = { + .act_hid = BNXT_ULP_ACT_HID_4a52, + .act_pattern_id = 189, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_SET_IPV4_DST | BNXT_ULP_ACT_BIT_SET_TP_DST | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 + .act_tid = 7 }, - [78] = { - .act_hid = BNXT_ULP_ACT_HID_06c6, - .act_pattern_id = 10, + [509] = { + .act_hid = BNXT_ULP_ACT_HID_01a6, + .act_pattern_id = 190, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_SET_IPV4_DST | BNXT_ULP_ACT_BIT_SET_TP_SRC | BNXT_ULP_ACT_BIT_SET_TP_DST | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 + .act_tid = 7 }, - [79] = { - .act_hid = BNXT_ULP_ACT_HID_0419, - .act_pattern_id = 11, + [510] = { + .act_hid = BNXT_ULP_ACT_HID_12b6, + .act_pattern_id = 191, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_SET_IPV4_SRC | BNXT_ULP_ACT_BIT_SET_IPV4_DST | BNXT_ULP_ACT_BIT_SET_TP_SRC | BNXT_ULP_ACT_BIT_SET_TP_DST | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 + .act_tid = 7 }, - [80] = { - .act_hid = BNXT_ULP_ACT_HID_0119, - .act_pattern_id = 12, + [511] = { + .act_hid = BNXT_ULP_ACT_HID_56ce, + .act_pattern_id = 192, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_SET_IPV4_SRC | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 + .act_tid = 7 }, - [81] = { - .act_hid = BNXT_ULP_ACT_HID_046f, - .act_pattern_id = 13, + [512] = { + .act_hid = BNXT_ULP_ACT_HID_0e22, + .act_pattern_id = 193, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_SET_IPV4_SRC | BNXT_ULP_ACT_BIT_SET_TP_SRC | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 + .act_tid = 7 }, - [82] = { - .act_hid = BNXT_ULP_ACT_HID_05d5, - .act_pattern_id = 14, + [513] = { + .act_hid = BNXT_ULP_ACT_HID_67de, + .act_pattern_id = 194, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_SET_IPV4_DST | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 + .act_tid = 7 }, - [83] = { - .act_hid = BNXT_ULP_ACT_HID_0519, - .act_pattern_id = 15, + [514] = { + .act_hid = BNXT_ULP_ACT_HID_5242, + .act_pattern_id = 195, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_SET_IPV4_DST | BNXT_ULP_ACT_BIT_SET_TP_DST | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 + .act_tid = 7 }, - [84] = { - .act_hid = BNXT_ULP_ACT_HID_0106, - .act_pattern_id = 16, + [515] = { + .act_hid = BNXT_ULP_ACT_HID_0996, + .act_pattern_id = 196, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_SET_IPV4_DST | BNXT_ULP_ACT_BIT_SET_TP_SRC | BNXT_ULP_ACT_BIT_SET_TP_DST | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 + .act_tid = 7 }, - [85] = { - .act_hid = BNXT_ULP_ACT_HID_05c2, - .act_pattern_id = 17, + [516] = { + .act_hid = BNXT_ULP_ACT_HID_1aa6, + .act_pattern_id = 197, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_SET_IPV4_SRC | BNXT_ULP_ACT_BIT_SET_IPV4_DST | BNXT_ULP_ACT_BIT_SET_TP_SRC | BNXT_ULP_ACT_BIT_SET_TP_DST | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 + .act_tid = 7 }, - [86] = { - .act_hid = BNXT_ULP_ACT_HID_011b, - .act_pattern_id = 18, + [517] = { + .act_hid = BNXT_ULP_ACT_HID_56de, + .act_pattern_id = 198, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_SET_IPV4_SRC | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 + .act_tid = 7 }, - [87] = { - .act_hid = BNXT_ULP_ACT_HID_0471, - .act_pattern_id = 19, + [518] = { + .act_hid = BNXT_ULP_ACT_HID_0e32, + .act_pattern_id = 199, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_SET_IPV4_SRC | BNXT_ULP_ACT_BIT_SET_TP_SRC | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 + .act_tid = 7 }, - [88] = { - .act_hid = BNXT_ULP_ACT_HID_05d7, - .act_pattern_id = 20, + [519] = { + .act_hid = BNXT_ULP_ACT_HID_67ee, + .act_pattern_id = 200, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_SET_IPV4_DST | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 + .act_tid = 7 }, - [89] = { - .act_hid = BNXT_ULP_ACT_HID_051b, - .act_pattern_id = 21, + [520] = { + .act_hid = BNXT_ULP_ACT_HID_5252, + .act_pattern_id = 201, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_SET_IPV4_DST | BNXT_ULP_ACT_BIT_SET_TP_DST | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 + .act_tid = 7 }, - [90] = { - .act_hid = BNXT_ULP_ACT_HID_0108, - .act_pattern_id = 22, + [521] = { + .act_hid = BNXT_ULP_ACT_HID_09a6, + .act_pattern_id = 202, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_SET_IPV4_DST | BNXT_ULP_ACT_BIT_SET_TP_SRC | BNXT_ULP_ACT_BIT_SET_TP_DST | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 + .act_tid = 7 }, - [91] = { - .act_hid = BNXT_ULP_ACT_HID_05c4, - .act_pattern_id = 23, + [522] = { + .act_hid = BNXT_ULP_ACT_HID_1ab6, + .act_pattern_id = 203, .app_sig = 0, .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_SET_IPV4_SRC | @@ -1089,25 +6906,256 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_ACT_BIT_SET_TP_SRC | BNXT_ULP_ACT_BIT_SET_TP_DST | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 + .act_tid = 7 }, - [92] = { - .act_hid = BNXT_ULP_ACT_HID_00a2, + [523] = { + .act_hid = BNXT_ULP_ACT_HID_31d0, .act_pattern_id = 0, .app_sig = 0, .act_sig = { .bits = BNXT_ULP_ACT_BIT_VXLAN_ENCAP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 6 + .act_tid = 8 }, - [93] = { - .act_hid = BNXT_ULP_ACT_HID_00a4, + [524] = { + .act_hid = BNXT_ULP_ACT_HID_31e0, .act_pattern_id = 1, .app_sig = 0, .act_sig = { .bits = BNXT_ULP_ACT_BIT_VXLAN_ENCAP | BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 6 + .act_tid = 8 + }, + [525] = { + .act_hid = BNXT_ULP_ACT_HID_39d0, + .act_pattern_id = 2, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_VXLAN_ENCAP | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 8 + }, + [526] = { + .act_hid = BNXT_ULP_ACT_HID_39e0, + .act_pattern_id = 3, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_VXLAN_ENCAP | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 8 + }, + [527] = { + .act_hid = BNXT_ULP_ACT_HID_41d0, + .act_pattern_id = 4, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_VXLAN_ENCAP | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 8 + }, + [528] = { + .act_hid = BNXT_ULP_ACT_HID_41e0, + .act_pattern_id = 5, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_VXLAN_ENCAP | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 8 + }, + [529] = { + .act_hid = BNXT_ULP_ACT_HID_49d0, + .act_pattern_id = 6, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_VXLAN_ENCAP | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 8 + }, + [530] = { + .act_hid = BNXT_ULP_ACT_HID_49e0, + .act_pattern_id = 7, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_VXLAN_ENCAP | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 8 + }, + [531] = { + .act_hid = BNXT_ULP_ACT_HID_64ba, + .act_pattern_id = 8, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_VXLAN_ENCAP | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 8 + }, + [532] = { + .act_hid = BNXT_ULP_ACT_HID_64ca, + .act_pattern_id = 9, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_VXLAN_ENCAP | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 8 + }, + [533] = { + .act_hid = BNXT_ULP_ACT_HID_6cba, + .act_pattern_id = 10, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_VXLAN_ENCAP | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 8 + }, + [534] = { + .act_hid = BNXT_ULP_ACT_HID_6cca, + .act_pattern_id = 11, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_VXLAN_ENCAP | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 8 + }, + [535] = { + .act_hid = BNXT_ULP_ACT_HID_74ba, + .act_pattern_id = 12, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_VXLAN_ENCAP | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 8 + }, + [536] = { + .act_hid = BNXT_ULP_ACT_HID_74ca, + .act_pattern_id = 13, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_VXLAN_ENCAP | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 8 + }, + [537] = { + .act_hid = BNXT_ULP_ACT_HID_00fe, + .act_pattern_id = 14, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_VXLAN_ENCAP | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 8 + }, + [538] = { + .act_hid = BNXT_ULP_ACT_HID_010e, + .act_pattern_id = 15, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_SET_MAC_SRC | + BNXT_ULP_ACT_BIT_SET_MAC_DST | + BNXT_ULP_ACT_BIT_VXLAN_ENCAP | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 8 + }, + [539] = { + .act_hid = BNXT_ULP_ACT_HID_331c, + .act_pattern_id = 0, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_VF_TO_VF | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 9 + }, + [540] = { + .act_hid = BNXT_ULP_ACT_HID_332c, + .act_pattern_id = 1, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_VF_TO_VF | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 9 + }, + [541] = { + .act_hid = BNXT_ULP_ACT_HID_6706, + .act_pattern_id = 2, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_VF_TO_VF | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 9 + }, + [542] = { + .act_hid = BNXT_ULP_ACT_HID_6716, + .act_pattern_id = 3, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_ACT_BIT_VF_TO_VF | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 9 + }, + [543] = { + .act_hid = BNXT_ULP_ACT_HID_1b6d, + .act_pattern_id = 0, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED | + BNXT_ULP_ACT_BIT_SAMPLE | + BNXT_ULP_ACT_BIT_VF_TO_VF | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 10 + }, + [544] = { + .act_hid = BNXT_ULP_ACT_HID_1b7d, + .act_pattern_id = 1, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_SHARED | + BNXT_ULP_ACT_BIT_SAMPLE | + BNXT_ULP_ACT_BIT_VF_TO_VF | + BNXT_ULP_ACT_BIT_COUNT | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 10 + }, + [545] = { + .act_hid = BNXT_ULP_ACT_HID_641a, + .act_pattern_id = 2, + .app_sig = 0, + .act_sig = { .bits = + BNXT_ULP_ACT_BIT_DELETE | + BNXT_ULP_ACT_BIT_SHARED_SAMPLE | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 10 } }; + diff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_class.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_class.c index c127a53b32..70409edb68 100644 --- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_class.c +++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_class.c @@ -1,10 +1,8 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2014-2021 Broadcom + * Copyright(c) 2014-2023 Broadcom * All rights reserved. */ -/* date: Wed Nov 24 17:15:38 2021 */ - #include "ulp_template_db_enum.h" #include "ulp_template_db_field.h" #include "ulp_template_struct.h" @@ -16,1308 +14,1918 @@ * maps hash id to ulp_class_match_list[] index */ uint16_t ulp_class_sig_tbl[BNXT_ULP_CLASS_SIG_TBL_MAX_SZ] = { - [BNXT_ULP_CLASS_HID_55dd] = 1, - [BNXT_ULP_CLASS_HID_1df1] = 2, - [BNXT_ULP_CLASS_HID_3e55] = 3, - [BNXT_ULP_CLASS_HID_0649] = 4, - [BNXT_ULP_CLASS_HID_1011] = 5, - [BNXT_ULP_CLASS_HID_40e9] = 6, - [BNXT_ULP_CLASS_HID_3e99] = 7, - [BNXT_ULP_CLASS_HID_06ad] = 8, - [BNXT_ULP_CLASS_HID_38c7] = 9, - [BNXT_ULP_CLASS_HID_00fb] = 10, - [BNXT_ULP_CLASS_HID_24d3] = 11, - [BNXT_ULP_CLASS_HID_559b] = 12, - [BNXT_ULP_CLASS_HID_5003] = 13, - [BNXT_ULP_CLASS_HID_1837] = 14, - [BNXT_ULP_CLASS_HID_3bef] = 15, - [BNXT_ULP_CLASS_HID_0403] = 16, - [BNXT_ULP_CLASS_HID_3d3f] = 17, - [BNXT_ULP_CLASS_HID_0543] = 18, - [BNXT_ULP_CLASS_HID_292b] = 19, - [BNXT_ULP_CLASS_HID_59e3] = 20, - [BNXT_ULP_CLASS_HID_5d3b] = 21, - [BNXT_ULP_CLASS_HID_254f] = 22, - [BNXT_ULP_CLASS_HID_4917] = 23, - [BNXT_ULP_CLASS_HID_113b] = 24, - [BNXT_ULP_CLASS_HID_55fd] = 25, - [BNXT_ULP_CLASS_HID_1dd1] = 26, - [BNXT_ULP_CLASS_HID_3e75] = 27, - [BNXT_ULP_CLASS_HID_0669] = 28, - [BNXT_ULP_CLASS_HID_1ba1] = 29, - [BNXT_ULP_CLASS_HID_4c69] = 30, - [BNXT_ULP_CLASS_HID_0439] = 31, - [BNXT_ULP_CLASS_HID_34e1] = 32, - [BNXT_ULP_CLASS_HID_0465] = 33, - [BNXT_ULP_CLASS_HID_352d] = 34, - [BNXT_ULP_CLASS_HID_55b1] = 35, - [BNXT_ULP_CLASS_HID_1da5] = 36, - [BNXT_ULP_CLASS_HID_32fd] = 37, - [BNXT_ULP_CLASS_HID_63a5] = 38, - [BNXT_ULP_CLASS_HID_1b75] = 39, - [BNXT_ULP_CLASS_HID_4c3d] = 40, - [BNXT_ULP_CLASS_HID_1031] = 41, - [BNXT_ULP_CLASS_HID_40c9] = 42, - [BNXT_ULP_CLASS_HID_3eb9] = 43, - [BNXT_ULP_CLASS_HID_068d] = 44, - [BNXT_ULP_CLASS_HID_5039] = 45, - [BNXT_ULP_CLASS_HID_180d] = 46, - [BNXT_ULP_CLASS_HID_15fd] = 47, - [BNXT_ULP_CLASS_HID_46b5] = 48, - [BNXT_ULP_CLASS_HID_303d] = 49, - [BNXT_ULP_CLASS_HID_60f5] = 50, - [BNXT_ULP_CLASS_HID_5ea5] = 51, - [BNXT_ULP_CLASS_HID_2689] = 52, - [BNXT_ULP_CLASS_HID_0771] = 53, - [BNXT_ULP_CLASS_HID_3809] = 54, - [BNXT_ULP_CLASS_HID_35f9] = 55, - [BNXT_ULP_CLASS_HID_66b1] = 56, - [BNXT_ULP_CLASS_HID_559d] = 57, - [BNXT_ULP_CLASS_HID_1db1] = 58, - [BNXT_ULP_CLASS_HID_3e15] = 59, - [BNXT_ULP_CLASS_HID_0609] = 60, - [BNXT_ULP_CLASS_HID_1bc1] = 61, - [BNXT_ULP_CLASS_HID_4c09] = 62, - [BNXT_ULP_CLASS_HID_0459] = 63, - [BNXT_ULP_CLASS_HID_3481] = 64, - [BNXT_ULP_CLASS_HID_0405] = 65, - [BNXT_ULP_CLASS_HID_354d] = 66, - [BNXT_ULP_CLASS_HID_55d1] = 67, - [BNXT_ULP_CLASS_HID_1dc5] = 68, - [BNXT_ULP_CLASS_HID_329d] = 69, - [BNXT_ULP_CLASS_HID_63c5] = 70, - [BNXT_ULP_CLASS_HID_1b15] = 71, - [BNXT_ULP_CLASS_HID_4c5d] = 72, - [BNXT_ULP_CLASS_HID_1051] = 73, - [BNXT_ULP_CLASS_HID_40a9] = 74, - [BNXT_ULP_CLASS_HID_3ed9] = 75, - [BNXT_ULP_CLASS_HID_06ed] = 76, - [BNXT_ULP_CLASS_HID_5059] = 77, - [BNXT_ULP_CLASS_HID_186d] = 78, - [BNXT_ULP_CLASS_HID_159d] = 79, - [BNXT_ULP_CLASS_HID_46d5] = 80, - [BNXT_ULP_CLASS_HID_305d] = 81, - [BNXT_ULP_CLASS_HID_6095] = 82, - [BNXT_ULP_CLASS_HID_5ec5] = 83, - [BNXT_ULP_CLASS_HID_26e9] = 84, - [BNXT_ULP_CLASS_HID_0711] = 85, - [BNXT_ULP_CLASS_HID_3869] = 86, - [BNXT_ULP_CLASS_HID_3599] = 87, - [BNXT_ULP_CLASS_HID_66d1] = 88, - [BNXT_ULP_CLASS_HID_38e7] = 89, - [BNXT_ULP_CLASS_HID_00db] = 90, - [BNXT_ULP_CLASS_HID_24f3] = 91, - [BNXT_ULP_CLASS_HID_55bb] = 92, - [BNXT_ULP_CLASS_HID_5023] = 93, - [BNXT_ULP_CLASS_HID_1817] = 94, - [BNXT_ULP_CLASS_HID_3bcf] = 95, - [BNXT_ULP_CLASS_HID_0423] = 96, - [BNXT_ULP_CLASS_HID_58e3] = 97, - [BNXT_ULP_CLASS_HID_20d7] = 98, - [BNXT_ULP_CLASS_HID_448f] = 99, - [BNXT_ULP_CLASS_HID_0ce3] = 100, - [BNXT_ULP_CLASS_HID_076b] = 101, - [BNXT_ULP_CLASS_HID_3813] = 102, - [BNXT_ULP_CLASS_HID_5bcb] = 103, - [BNXT_ULP_CLASS_HID_243f] = 104, - [BNXT_ULP_CLASS_HID_144b] = 105, - [BNXT_ULP_CLASS_HID_4573] = 106, - [BNXT_ULP_CLASS_HID_0057] = 107, - [BNXT_ULP_CLASS_HID_311f] = 108, - [BNXT_ULP_CLASS_HID_2b87] = 109, - [BNXT_ULP_CLASS_HID_5c4f] = 110, - [BNXT_ULP_CLASS_HID_1793] = 111, - [BNXT_ULP_CLASS_HID_485b] = 112, - [BNXT_ULP_CLASS_HID_3447] = 113, - [BNXT_ULP_CLASS_HID_650f] = 114, - [BNXT_ULP_CLASS_HID_2053] = 115, - [BNXT_ULP_CLASS_HID_511b] = 116, - [BNXT_ULP_CLASS_HID_4b83] = 117, - [BNXT_ULP_CLASS_HID_13f7] = 118, - [BNXT_ULP_CLASS_HID_37af] = 119, - [BNXT_ULP_CLASS_HID_6857] = 120, - [BNXT_ULP_CLASS_HID_3d1f] = 121, - [BNXT_ULP_CLASS_HID_0563] = 122, - [BNXT_ULP_CLASS_HID_290b] = 123, - [BNXT_ULP_CLASS_HID_59c3] = 124, - [BNXT_ULP_CLASS_HID_5d1b] = 125, - [BNXT_ULP_CLASS_HID_256f] = 126, - [BNXT_ULP_CLASS_HID_4937] = 127, - [BNXT_ULP_CLASS_HID_111b] = 128, - [BNXT_ULP_CLASS_HID_25f4b] = 129, - [BNXT_ULP_CLASS_HID_2275f] = 130, - [BNXT_ULP_CLASS_HID_24b67] = 131, - [BNXT_ULP_CLASS_HID_2134b] = 132, - [BNXT_ULP_CLASS_HID_21683] = 133, - [BNXT_ULP_CLASS_HID_2475b] = 134, - [BNXT_ULP_CLASS_HID_202bf] = 135, - [BNXT_ULP_CLASS_HID_23377] = 136, - [BNXT_ULP_CLASS_HID_119db] = 137, - [BNXT_ULP_CLASS_HID_14a93] = 138, - [BNXT_ULP_CLASS_HID_105f7] = 139, - [BNXT_ULP_CLASS_HID_1368f] = 140, - [BNXT_ULP_CLASS_HID_139c7] = 141, - [BNXT_ULP_CLASS_HID_1022b] = 142, - [BNXT_ULP_CLASS_HID_125f3] = 143, - [BNXT_ULP_CLASS_HID_1568b] = 144, - [BNXT_ULP_CLASS_HID_33c37] = 145, - [BNXT_ULP_CLASS_HID_3041b] = 146, - [BNXT_ULP_CLASS_HID_32823] = 147, - [BNXT_ULP_CLASS_HID_358fb] = 148, - [BNXT_ULP_CLASS_HID_35c33] = 149, - [BNXT_ULP_CLASS_HID_32407] = 150, - [BNXT_ULP_CLASS_HID_3482f] = 151, - [BNXT_ULP_CLASS_HID_31033] = 152, - [BNXT_ULP_CLASS_HID_3887] = 153, - [BNXT_ULP_CLASS_HID_00bb] = 154, - [BNXT_ULP_CLASS_HID_2493] = 155, - [BNXT_ULP_CLASS_HID_55db] = 156, - [BNXT_ULP_CLASS_HID_5043] = 157, - [BNXT_ULP_CLASS_HID_1877] = 158, - [BNXT_ULP_CLASS_HID_3baf] = 159, - [BNXT_ULP_CLASS_HID_0443] = 160, - [BNXT_ULP_CLASS_HID_5883] = 161, - [BNXT_ULP_CLASS_HID_20b7] = 162, - [BNXT_ULP_CLASS_HID_44ef] = 163, - [BNXT_ULP_CLASS_HID_0c83] = 164, - [BNXT_ULP_CLASS_HID_070b] = 165, - [BNXT_ULP_CLASS_HID_3873] = 166, - [BNXT_ULP_CLASS_HID_5bab] = 167, - [BNXT_ULP_CLASS_HID_245f] = 168, - [BNXT_ULP_CLASS_HID_142b] = 169, - [BNXT_ULP_CLASS_HID_4513] = 170, - [BNXT_ULP_CLASS_HID_0037] = 171, - [BNXT_ULP_CLASS_HID_317f] = 172, - [BNXT_ULP_CLASS_HID_2be7] = 173, - [BNXT_ULP_CLASS_HID_5c2f] = 174, - [BNXT_ULP_CLASS_HID_17f3] = 175, - [BNXT_ULP_CLASS_HID_483b] = 176, - [BNXT_ULP_CLASS_HID_3427] = 177, - [BNXT_ULP_CLASS_HID_656f] = 178, - [BNXT_ULP_CLASS_HID_2033] = 179, - [BNXT_ULP_CLASS_HID_517b] = 180, - [BNXT_ULP_CLASS_HID_4be3] = 181, - [BNXT_ULP_CLASS_HID_1397] = 182, - [BNXT_ULP_CLASS_HID_37cf] = 183, - [BNXT_ULP_CLASS_HID_6837] = 184, - [BNXT_ULP_CLASS_HID_3d7f] = 185, - [BNXT_ULP_CLASS_HID_0503] = 186, - [BNXT_ULP_CLASS_HID_296b] = 187, - [BNXT_ULP_CLASS_HID_59a3] = 188, - [BNXT_ULP_CLASS_HID_5d7b] = 189, - [BNXT_ULP_CLASS_HID_250f] = 190, - [BNXT_ULP_CLASS_HID_4957] = 191, - [BNXT_ULP_CLASS_HID_117b] = 192, - [BNXT_ULP_CLASS_HID_25f2b] = 193, - [BNXT_ULP_CLASS_HID_2273f] = 194, - [BNXT_ULP_CLASS_HID_24b07] = 195, - [BNXT_ULP_CLASS_HID_2132b] = 196, - [BNXT_ULP_CLASS_HID_216e3] = 197, - [BNXT_ULP_CLASS_HID_2473b] = 198, - [BNXT_ULP_CLASS_HID_202df] = 199, - [BNXT_ULP_CLASS_HID_23317] = 200, - [BNXT_ULP_CLASS_HID_119bb] = 201, - [BNXT_ULP_CLASS_HID_14af3] = 202, - [BNXT_ULP_CLASS_HID_10597] = 203, - [BNXT_ULP_CLASS_HID_136ef] = 204, - [BNXT_ULP_CLASS_HID_139a7] = 205, - [BNXT_ULP_CLASS_HID_1024b] = 206, - [BNXT_ULP_CLASS_HID_12593] = 207, - [BNXT_ULP_CLASS_HID_156eb] = 208, - [BNXT_ULP_CLASS_HID_33c57] = 209, - [BNXT_ULP_CLASS_HID_3047b] = 210, - [BNXT_ULP_CLASS_HID_32843] = 211, - [BNXT_ULP_CLASS_HID_3589b] = 212, - [BNXT_ULP_CLASS_HID_35c53] = 213, - [BNXT_ULP_CLASS_HID_32467] = 214, - [BNXT_ULP_CLASS_HID_3484f] = 215, - [BNXT_ULP_CLASS_HID_31053] = 216, - [BNXT_ULP_CLASS_HID_5ce1] = 217, - [BNXT_ULP_CLASS_HID_4579] = 218, - [BNXT_ULP_CLASS_HID_1735] = 219, - [BNXT_ULP_CLASS_HID_45bd] = 220, - [BNXT_ULP_CLASS_HID_3feb] = 221, - [BNXT_ULP_CLASS_HID_2bf7] = 222, - [BNXT_ULP_CLASS_HID_5727] = 223, - [BNXT_ULP_CLASS_HID_4333] = 224, - [BNXT_ULP_CLASS_HID_4453] = 225, - [BNXT_ULP_CLASS_HID_304f] = 226, - [BNXT_ULP_CLASS_HID_645f] = 227, - [BNXT_ULP_CLASS_HID_504b] = 228, - [BNXT_ULP_CLASS_HID_5cc1] = 229, - [BNXT_ULP_CLASS_HID_4559] = 230, - [BNXT_ULP_CLASS_HID_2285] = 231, - [BNXT_ULP_CLASS_HID_0b1d] = 232, - [BNXT_ULP_CLASS_HID_0b49] = 233, - [BNXT_ULP_CLASS_HID_5c95] = 234, - [BNXT_ULP_CLASS_HID_39c1] = 235, - [BNXT_ULP_CLASS_HID_2259] = 236, - [BNXT_ULP_CLASS_HID_1715] = 237, - [BNXT_ULP_CLASS_HID_459d] = 238, - [BNXT_ULP_CLASS_HID_571d] = 239, - [BNXT_ULP_CLASS_HID_1cd1] = 240, - [BNXT_ULP_CLASS_HID_3711] = 241, - [BNXT_ULP_CLASS_HID_6599] = 242, - [BNXT_ULP_CLASS_HID_0e55] = 243, - [BNXT_ULP_CLASS_HID_3cdd] = 244, - [BNXT_ULP_CLASS_HID_5ca1] = 245, - [BNXT_ULP_CLASS_HID_4539] = 246, - [BNXT_ULP_CLASS_HID_22e5] = 247, - [BNXT_ULP_CLASS_HID_0b7d] = 248, - [BNXT_ULP_CLASS_HID_0b29] = 249, - [BNXT_ULP_CLASS_HID_5cf5] = 250, - [BNXT_ULP_CLASS_HID_39a1] = 251, - [BNXT_ULP_CLASS_HID_2239] = 252, - [BNXT_ULP_CLASS_HID_1775] = 253, - [BNXT_ULP_CLASS_HID_45fd] = 254, - [BNXT_ULP_CLASS_HID_577d] = 255, - [BNXT_ULP_CLASS_HID_1cb1] = 256, - [BNXT_ULP_CLASS_HID_3771] = 257, - [BNXT_ULP_CLASS_HID_65f9] = 258, - [BNXT_ULP_CLASS_HID_0e35] = 259, - [BNXT_ULP_CLASS_HID_3cbd] = 260, - [BNXT_ULP_CLASS_HID_3fcb] = 261, - [BNXT_ULP_CLASS_HID_2bd7] = 262, - [BNXT_ULP_CLASS_HID_5707] = 263, - [BNXT_ULP_CLASS_HID_4313] = 264, - [BNXT_ULP_CLASS_HID_5fc7] = 265, - [BNXT_ULP_CLASS_HID_4bd3] = 266, - [BNXT_ULP_CLASS_HID_0e4f] = 267, - [BNXT_ULP_CLASS_HID_632f] = 268, - [BNXT_ULP_CLASS_HID_1baf] = 269, - [BNXT_ULP_CLASS_HID_07bb] = 270, - [BNXT_ULP_CLASS_HID_32eb] = 271, - [BNXT_ULP_CLASS_HID_1ef7] = 272, - [BNXT_ULP_CLASS_HID_3bab] = 273, - [BNXT_ULP_CLASS_HID_27b7] = 274, - [BNXT_ULP_CLASS_HID_52e7] = 275, - [BNXT_ULP_CLASS_HID_3ef3] = 276, - [BNXT_ULP_CLASS_HID_4473] = 277, - [BNXT_ULP_CLASS_HID_306f] = 278, - [BNXT_ULP_CLASS_HID_647f] = 279, - [BNXT_ULP_CLASS_HID_506b] = 280, - [BNXT_ULP_CLASS_HID_266af] = 281, - [BNXT_ULP_CLASS_HID_2525b] = 282, - [BNXT_ULP_CLASS_HID_21de7] = 283, - [BNXT_ULP_CLASS_HID_20993] = 284, - [BNXT_ULP_CLASS_HID_1213f] = 285, - [BNXT_ULP_CLASS_HID_10d2b] = 286, - [BNXT_ULP_CLASS_HID_1413b] = 287, - [BNXT_ULP_CLASS_HID_12cd7] = 288, - [BNXT_ULP_CLASS_HID_3436b] = 289, - [BNXT_ULP_CLASS_HID_32f07] = 290, - [BNXT_ULP_CLASS_HID_36317] = 291, - [BNXT_ULP_CLASS_HID_34f03] = 292, - [BNXT_ULP_CLASS_HID_3fab] = 293, - [BNXT_ULP_CLASS_HID_2bb7] = 294, - [BNXT_ULP_CLASS_HID_5767] = 295, - [BNXT_ULP_CLASS_HID_4373] = 296, - [BNXT_ULP_CLASS_HID_5fa7] = 297, - [BNXT_ULP_CLASS_HID_4bb3] = 298, - [BNXT_ULP_CLASS_HID_0e2f] = 299, - [BNXT_ULP_CLASS_HID_634f] = 300, - [BNXT_ULP_CLASS_HID_1bcf] = 301, - [BNXT_ULP_CLASS_HID_07db] = 302, - [BNXT_ULP_CLASS_HID_328b] = 303, - [BNXT_ULP_CLASS_HID_1e97] = 304, - [BNXT_ULP_CLASS_HID_3bcb] = 305, - [BNXT_ULP_CLASS_HID_27d7] = 306, - [BNXT_ULP_CLASS_HID_5287] = 307, - [BNXT_ULP_CLASS_HID_3e93] = 308, - [BNXT_ULP_CLASS_HID_4413] = 309, - [BNXT_ULP_CLASS_HID_300f] = 310, - [BNXT_ULP_CLASS_HID_641f] = 311, - [BNXT_ULP_CLASS_HID_500b] = 312, - [BNXT_ULP_CLASS_HID_266cf] = 313, - [BNXT_ULP_CLASS_HID_2523b] = 314, - [BNXT_ULP_CLASS_HID_21d87] = 315, - [BNXT_ULP_CLASS_HID_209f3] = 316, - [BNXT_ULP_CLASS_HID_1215f] = 317, - [BNXT_ULP_CLASS_HID_10d4b] = 318, - [BNXT_ULP_CLASS_HID_1415b] = 319, - [BNXT_ULP_CLASS_HID_12cb7] = 320, - [BNXT_ULP_CLASS_HID_3430b] = 321, - [BNXT_ULP_CLASS_HID_32f67] = 322, - [BNXT_ULP_CLASS_HID_36377] = 323, - [BNXT_ULP_CLASS_HID_34f63] = 324, - [BNXT_ULP_CLASS_HID_29b5] = 325, - [BNXT_ULP_CLASS_HID_29ad] = 326, - [BNXT_ULP_CLASS_HID_29b7] = 327, - [BNXT_ULP_CLASS_HID_1583] = 328, - [BNXT_ULP_CLASS_HID_29af] = 329, - [BNXT_ULP_CLASS_HID_159b] = 330, - [BNXT_ULP_CLASS_HID_2995] = 331, - [BNXT_ULP_CLASS_HID_298d] = 332, - [BNXT_ULP_CLASS_HID_29f5] = 333, - [BNXT_ULP_CLASS_HID_29ed] = 334, - [BNXT_ULP_CLASS_HID_2997] = 335, - [BNXT_ULP_CLASS_HID_15a3] = 336, - [BNXT_ULP_CLASS_HID_298f] = 337, - [BNXT_ULP_CLASS_HID_15bb] = 338, - [BNXT_ULP_CLASS_HID_29f7] = 339, - [BNXT_ULP_CLASS_HID_15c3] = 340, - [BNXT_ULP_CLASS_HID_29ef] = 341, - [BNXT_ULP_CLASS_HID_15db] = 342, - [BNXT_ULP_CLASS_HID_1151] = 343, - [BNXT_ULP_CLASS_HID_315d] = 344, - [BNXT_ULP_CLASS_HID_3612] = 345, - [BNXT_ULP_CLASS_HID_66da] = 346, - [BNXT_ULP_CLASS_HID_243ca] = 347, - [BNXT_ULP_CLASS_HID_20d8e] = 348, - [BNXT_ULP_CLASS_HID_2e082] = 349, - [BNXT_ULP_CLASS_HID_2ab46] = 350, - [BNXT_ULP_CLASS_HID_25226] = 351, - [BNXT_ULP_CLASS_HID_25cea] = 352, - [BNXT_ULP_CLASS_HID_2c82a] = 353, - [BNXT_ULP_CLASS_HID_2f9a2] = 354, - [BNXT_ULP_CLASS_HID_23b56] = 355, - [BNXT_ULP_CLASS_HID_205da] = 356, - [BNXT_ULP_CLASS_HID_2d8ce] = 357, - [BNXT_ULP_CLASS_HID_2a2d2] = 358, - [BNXT_ULP_CLASS_HID_24a72] = 359, - [BNXT_ULP_CLASS_HID_25476] = 360, - [BNXT_ULP_CLASS_HID_2c076] = 361, - [BNXT_ULP_CLASS_HID_2f1ee] = 362, - [BNXT_ULP_CLASS_HID_20bb6] = 363, - [BNXT_ULP_CLASS_HID_23d2e] = 364, - [BNXT_ULP_CLASS_HID_2a96e] = 365, - [BNXT_ULP_CLASS_HID_2dae6] = 366, - [BNXT_ULP_CLASS_HID_25af2] = 367, - [BNXT_ULP_CLASS_HID_24c6a] = 368, - [BNXT_ULP_CLASS_HID_2c7aa] = 369, - [BNXT_ULP_CLASS_HID_2c26e] = 370, - [BNXT_ULP_CLASS_HID_203e2] = 371, - [BNXT_ULP_CLASS_HID_2357a] = 372, - [BNXT_ULP_CLASS_HID_2a0fa] = 373, - [BNXT_ULP_CLASS_HID_2d272] = 374, - [BNXT_ULP_CLASS_HID_2527e] = 375, - [BNXT_ULP_CLASS_HID_243f6] = 376, - [BNXT_ULP_CLASS_HID_2fff6] = 377, - [BNXT_ULP_CLASS_HID_2e16e] = 378, - [BNXT_ULP_CLASS_HID_2422d] = 379, - [BNXT_ULP_CLASS_HID_20c69] = 380, - [BNXT_ULP_CLASS_HID_2e165] = 381, - [BNXT_ULP_CLASS_HID_2aaa1] = 382, - [BNXT_ULP_CLASS_HID_253c1] = 383, - [BNXT_ULP_CLASS_HID_25d0d] = 384, - [BNXT_ULP_CLASS_HID_2c9cd] = 385, - [BNXT_ULP_CLASS_HID_2f845] = 386, - [BNXT_ULP_CLASS_HID_25afd] = 387, - [BNXT_ULP_CLASS_HID_22439] = 388, - [BNXT_ULP_CLASS_HID_290f9] = 389, - [BNXT_ULP_CLASS_HID_2c371] = 390, - [BNXT_ULP_CLASS_HID_24355] = 391, - [BNXT_ULP_CLASS_HID_275dd] = 392, - [BNXT_ULP_CLASS_HID_2e19d] = 393, - [BNXT_ULP_CLASS_HID_2d015] = 394, - [BNXT_ULP_CLASS_HID_2560d] = 395, - [BNXT_ULP_CLASS_HID_21049] = 396, - [BNXT_ULP_CLASS_HID_28c09] = 397, - [BNXT_ULP_CLASS_HID_2be89] = 398, - [BNXT_ULP_CLASS_HID_267a9] = 399, - [BNXT_ULP_CLASS_HID_261ed] = 400, - [BNXT_ULP_CLASS_HID_2ddad] = 401, - [BNXT_ULP_CLASS_HID_2cc2d] = 402, - [BNXT_ULP_CLASS_HID_26edd] = 403, - [BNXT_ULP_CLASS_HID_22819] = 404, - [BNXT_ULP_CLASS_HID_2a4d9] = 405, - [BNXT_ULP_CLASS_HID_2d759] = 406, - [BNXT_ULP_CLASS_HID_2573d] = 407, - [BNXT_ULP_CLASS_HID_279bd] = 408, - [BNXT_ULP_CLASS_HID_2f27d] = 409, - [BNXT_ULP_CLASS_HID_2e4fd] = 410, - [BNXT_ULP_CLASS_HID_24fbe] = 411, - [BNXT_ULP_CLASS_HID_201fa] = 412, - [BNXT_ULP_CLASS_HID_2ecf6] = 413, - [BNXT_ULP_CLASS_HID_2a732] = 414, - [BNXT_ULP_CLASS_HID_25e52] = 415, - [BNXT_ULP_CLASS_HID_2509e] = 416, - [BNXT_ULP_CLASS_HID_2c45e] = 417, - [BNXT_ULP_CLASS_HID_2f5d6] = 418, - [BNXT_ULP_CLASS_HID_23722] = 419, - [BNXT_ULP_CLASS_HID_209ae] = 420, - [BNXT_ULP_CLASS_HID_2d4ba] = 421, - [BNXT_ULP_CLASS_HID_2aea6] = 422, - [BNXT_ULP_CLASS_HID_24606] = 423, - [BNXT_ULP_CLASS_HID_25802] = 424, - [BNXT_ULP_CLASS_HID_2cc02] = 425, - [BNXT_ULP_CLASS_HID_2fd9a] = 426, - [BNXT_ULP_CLASS_HID_207c2] = 427, - [BNXT_ULP_CLASS_HID_2315a] = 428, - [BNXT_ULP_CLASS_HID_2a51a] = 429, - [BNXT_ULP_CLASS_HID_2d692] = 430, - [BNXT_ULP_CLASS_HID_25686] = 431, - [BNXT_ULP_CLASS_HID_2401e] = 432, - [BNXT_ULP_CLASS_HID_2cbde] = 433, - [BNXT_ULP_CLASS_HID_2ce1a] = 434, - [BNXT_ULP_CLASS_HID_20f96] = 435, - [BNXT_ULP_CLASS_HID_2390e] = 436, - [BNXT_ULP_CLASS_HID_2ac8e] = 437, - [BNXT_ULP_CLASS_HID_2de06] = 438, - [BNXT_ULP_CLASS_HID_25e0a] = 439, - [BNXT_ULP_CLASS_HID_24f82] = 440, - [BNXT_ULP_CLASS_HID_2f382] = 441, - [BNXT_ULP_CLASS_HID_2ed1a] = 442, - [BNXT_ULP_CLASS_HID_2576e] = 443, - [BNXT_ULP_CLASS_HID_229aa] = 444, - [BNXT_ULP_CLASS_HID_29d6a] = 445, - [BNXT_ULP_CLASS_HID_2cee2] = 446, - [BNXT_ULP_CLASS_HID_24ec6] = 447, - [BNXT_ULP_CLASS_HID_2784e] = 448, - [BNXT_ULP_CLASS_HID_2ec0e] = 449, - [BNXT_ULP_CLASS_HID_2dd86] = 450, - [BNXT_ULP_CLASS_HID_25f22] = 451, - [BNXT_ULP_CLASS_HID_2112e] = 452, - [BNXT_ULP_CLASS_HID_2852e] = 453, - [BNXT_ULP_CLASS_HID_2b6a6] = 454, - [BNXT_ULP_CLASS_HID_26d86] = 455, - [BNXT_ULP_CLASS_HID_26002] = 456, - [BNXT_ULP_CLASS_HID_2eb82] = 457, - [BNXT_ULP_CLASS_HID_2c50a] = 458, - [BNXT_ULP_CLASS_HID_22f82] = 459, - [BNXT_ULP_CLASS_HID_2590a] = 460, - [BNXT_ULP_CLASS_HID_2ccca] = 461, - [BNXT_ULP_CLASS_HID_28706] = 462, - [BNXT_ULP_CLASS_HID_27e46] = 463, - [BNXT_ULP_CLASS_HID_26fce] = 464, - [BNXT_ULP_CLASS_HID_2d38e] = 465, - [BNXT_ULP_CLASS_HID_2d5ca] = 466, - [BNXT_ULP_CLASS_HID_21706] = 467, - [BNXT_ULP_CLASS_HID_2408e] = 468, - [BNXT_ULP_CLASS_HID_2b48e] = 469, - [BNXT_ULP_CLASS_HID_28e8a] = 470, - [BNXT_ULP_CLASS_HID_2660a] = 471, - [BNXT_ULP_CLASS_HID_25782] = 472, - [BNXT_ULP_CLASS_HID_2db02] = 473, - [BNXT_ULP_CLASS_HID_2dd8e] = 474, - [BNXT_ULP_CLASS_HID_25b9e] = 475, - [BNXT_ULP_CLASS_HID_21dda] = 476, - [BNXT_ULP_CLASS_HID_2819a] = 477, - [BNXT_ULP_CLASS_HID_2b31a] = 478, - [BNXT_ULP_CLASS_HID_26a3a] = 479, - [BNXT_ULP_CLASS_HID_26c7e] = 480, - [BNXT_ULP_CLASS_HID_2d03e] = 481, - [BNXT_ULP_CLASS_HID_2c1be] = 482, - [BNXT_ULP_CLASS_HID_2430a] = 483, - [BNXT_ULP_CLASS_HID_2058e] = 484, - [BNXT_ULP_CLASS_HID_2890e] = 485, - [BNXT_ULP_CLASS_HID_2ba8e] = 486, - [BNXT_ULP_CLASS_HID_251ae] = 487, - [BNXT_ULP_CLASS_HID_2542a] = 488, - [BNXT_ULP_CLASS_HID_2dfaa] = 489, - [BNXT_ULP_CLASS_HID_2c93a] = 490, - [BNXT_ULP_CLASS_HID_213ca] = 491, - [BNXT_ULP_CLASS_HID_24d5a] = 492, - [BNXT_ULP_CLASS_HID_2b11a] = 493, - [BNXT_ULP_CLASS_HID_28b4e] = 494, - [BNXT_ULP_CLASS_HID_2624e] = 495, - [BNXT_ULP_CLASS_HID_253de] = 496, - [BNXT_ULP_CLASS_HID_2c79e] = 497, - [BNXT_ULP_CLASS_HID_2d9da] = 498, - [BNXT_ULP_CLASS_HID_21b1e] = 499, - [BNXT_ULP_CLASS_HID_2350e] = 500, - [BNXT_ULP_CLASS_HID_2b88e] = 501, - [BNXT_ULP_CLASS_HID_2ea0e] = 502, - [BNXT_ULP_CLASS_HID_26a0a] = 503, - [BNXT_ULP_CLASS_HID_25b8a] = 504, - [BNXT_ULP_CLASS_HID_2cf0a] = 505, - [BNXT_ULP_CLASS_HID_2c18e] = 506, - [BNXT_ULP_CLASS_HID_2634e] = 507, - [BNXT_ULP_CLASS_HID_2258a] = 508, - [BNXT_ULP_CLASS_HID_2a94a] = 509, - [BNXT_ULP_CLASS_HID_2daca] = 510, - [BNXT_ULP_CLASS_HID_25aae] = 511, - [BNXT_ULP_CLASS_HID_2742e] = 512, - [BNXT_ULP_CLASS_HID_2ffee] = 513, - [BNXT_ULP_CLASS_HID_2e96e] = 514, - [BNXT_ULP_CLASS_HID_26b0a] = 515, - [BNXT_ULP_CLASS_HID_22d0e] = 516, - [BNXT_ULP_CLASS_HID_2910e] = 517, - [BNXT_ULP_CLASS_HID_2c28e] = 518, - [BNXT_ULP_CLASS_HID_2422a] = 519, - [BNXT_ULP_CLASS_HID_273aa] = 520, - [BNXT_ULP_CLASS_HID_2e7aa] = 521, - [BNXT_ULP_CLASS_HID_2d12a] = 522, - [BNXT_ULP_CLASS_HID_23b8a] = 523, - [BNXT_ULP_CLASS_HID_2550a] = 524, - [BNXT_ULP_CLASS_HID_2d8ca] = 525, - [BNXT_ULP_CLASS_HID_2930e] = 526, - [BNXT_ULP_CLASS_HID_24a0e] = 527, - [BNXT_ULP_CLASS_HID_24c4a] = 528, - [BNXT_ULP_CLASS_HID_2ef4e] = 529, - [BNXT_ULP_CLASS_HID_2e18a] = 530, - [BNXT_ULP_CLASS_HID_2230e] = 531, - [BNXT_ULP_CLASS_HID_25c8e] = 532, - [BNXT_ULP_CLASS_HID_2c08e] = 533, - [BNXT_ULP_CLASS_HID_29a8a] = 534, - [BNXT_ULP_CLASS_HID_2718a] = 535, - [BNXT_ULP_CLASS_HID_2630a] = 536, - [BNXT_ULP_CLASS_HID_2d70a] = 537, - [BNXT_ULP_CLASS_HID_2e90e] = 538, - [BNXT_ULP_CLASS_HID_24e91] = 539, - [BNXT_ULP_CLASS_HID_200d5] = 540, - [BNXT_ULP_CLASS_HID_2edd9] = 541, - [BNXT_ULP_CLASS_HID_2a61d] = 542, - [BNXT_ULP_CLASS_HID_25f7d] = 543, - [BNXT_ULP_CLASS_HID_251b1] = 544, - [BNXT_ULP_CLASS_HID_2c571] = 545, - [BNXT_ULP_CLASS_HID_2f4f9] = 546, - [BNXT_ULP_CLASS_HID_25641] = 547, - [BNXT_ULP_CLASS_HID_22885] = 548, - [BNXT_ULP_CLASS_HID_29c45] = 549, - [BNXT_ULP_CLASS_HID_2cfcd] = 550, - [BNXT_ULP_CLASS_HID_24fe9] = 551, - [BNXT_ULP_CLASS_HID_27961] = 552, - [BNXT_ULP_CLASS_HID_2ed21] = 553, - [BNXT_ULP_CLASS_HID_2dca9] = 554, - [BNXT_ULP_CLASS_HID_25ab1] = 555, - [BNXT_ULP_CLASS_HID_21cf5] = 556, - [BNXT_ULP_CLASS_HID_280b5] = 557, - [BNXT_ULP_CLASS_HID_2b235] = 558, - [BNXT_ULP_CLASS_HID_26b15] = 559, - [BNXT_ULP_CLASS_HID_26d51] = 560, - [BNXT_ULP_CLASS_HID_2d111] = 561, - [BNXT_ULP_CLASS_HID_2c091] = 562, - [BNXT_ULP_CLASS_HID_26261] = 563, - [BNXT_ULP_CLASS_HID_224a5] = 564, - [BNXT_ULP_CLASS_HID_2a865] = 565, - [BNXT_ULP_CLASS_HID_2dbe5] = 566, - [BNXT_ULP_CLASS_HID_25b81] = 567, - [BNXT_ULP_CLASS_HID_27501] = 568, - [BNXT_ULP_CLASS_HID_2fec1] = 569, - [BNXT_ULP_CLASS_HID_2e841] = 570, - [BNXT_ULP_CLASS_HID_24085] = 571, - [BNXT_ULP_CLASS_HID_21ac5] = 572, - [BNXT_ULP_CLASS_HID_28e85] = 573, - [BNXT_ULP_CLASS_HID_2b80d] = 574, - [BNXT_ULP_CLASS_HID_2516d] = 575, - [BNXT_ULP_CLASS_HID_26ba5] = 576, - [BNXT_ULP_CLASS_HID_2df65] = 577, - [BNXT_ULP_CLASS_HID_2ceed] = 578, - [BNXT_ULP_CLASS_HID_26845] = 579, - [BNXT_ULP_CLASS_HID_22285] = 580, - [BNXT_ULP_CLASS_HID_29645] = 581, - [BNXT_ULP_CLASS_HID_2c1cd] = 582, - [BNXT_ULP_CLASS_HID_2418d] = 583, - [BNXT_ULP_CLASS_HID_27365] = 584, - [BNXT_ULP_CLASS_HID_2e725] = 585, - [BNXT_ULP_CLASS_HID_2d6ad] = 586, - [BNXT_ULP_CLASS_HID_25ca5] = 587, - [BNXT_ULP_CLASS_HID_216e5] = 588, - [BNXT_ULP_CLASS_HID_29aa5] = 589, - [BNXT_ULP_CLASS_HID_2b425] = 590, - [BNXT_ULP_CLASS_HID_26d05] = 591, - [BNXT_ULP_CLASS_HID_26745] = 592, - [BNXT_ULP_CLASS_HID_2eb05] = 593, - [BNXT_ULP_CLASS_HID_2da85] = 594, - [BNXT_ULP_CLASS_HID_20cc5] = 595, - [BNXT_ULP_CLASS_HID_23ea5] = 596, - [BNXT_ULP_CLASS_HID_2a265] = 597, - [BNXT_ULP_CLASS_HID_2dde5] = 598, - [BNXT_ULP_CLASS_HID_25da5] = 599, - [BNXT_ULP_CLASS_HID_24f05] = 600, - [BNXT_ULP_CLASS_HID_2f0c5] = 601, - [BNXT_ULP_CLASS_HID_2e245] = 602, - [BNXT_ULP_CLASS_HID_24d8b] = 603, - [BNXT_ULP_CLASS_HID_207cf] = 604, - [BNXT_ULP_CLASS_HID_28b8f] = 605, - [BNXT_ULP_CLASS_HID_2a517] = 606, - [BNXT_ULP_CLASS_HID_25277] = 607, - [BNXT_ULP_CLASS_HID_254ab] = 608, - [BNXT_ULP_CLASS_HID_2d86b] = 609, - [BNXT_ULP_CLASS_HID_2cbf3] = 610, - [BNXT_ULP_CLASS_HID_2554b] = 611, - [BNXT_ULP_CLASS_HID_22f8f] = 612, - [BNXT_ULP_CLASS_HID_2934f] = 613, - [BNXT_ULP_CLASS_HID_2c2c7] = 614, - [BNXT_ULP_CLASS_HID_242e3] = 615, - [BNXT_ULP_CLASS_HID_27c6b] = 616, - [BNXT_ULP_CLASS_HID_2e02b] = 617, - [BNXT_ULP_CLASS_HID_2d3a3] = 618, - [BNXT_ULP_CLASS_HID_259a3] = 619, - [BNXT_ULP_CLASS_HID_213e7] = 620, - [BNXT_ULP_CLASS_HID_287a7] = 621, - [BNXT_ULP_CLASS_HID_2b137] = 622, - [BNXT_ULP_CLASS_HID_26e17] = 623, - [BNXT_ULP_CLASS_HID_26043] = 624, - [BNXT_ULP_CLASS_HID_2d403] = 625, - [BNXT_ULP_CLASS_HID_2c793] = 626, - [BNXT_ULP_CLASS_HID_20827] = 627, - [BNXT_ULP_CLASS_HID_23ba7] = 628, - [BNXT_ULP_CLASS_HID_2af67] = 629, - [BNXT_ULP_CLASS_HID_2dee7] = 630, - [BNXT_ULP_CLASS_HID_25e83] = 631, - [BNXT_ULP_CLASS_HID_24803] = 632, - [BNXT_ULP_CLASS_HID_2fdc3] = 633, - [BNXT_ULP_CLASS_HID_2ef43] = 634, - [BNXT_ULP_CLASS_HID_247bf] = 635, - [BNXT_ULP_CLASS_HID_219ff] = 636, - [BNXT_ULP_CLASS_HID_28dbf] = 637, - [BNXT_ULP_CLASS_HID_2bf07] = 638, - [BNXT_ULP_CLASS_HID_25467] = 639, - [BNXT_ULP_CLASS_HID_26e5f] = 640, - [BNXT_ULP_CLASS_HID_2d21f] = 641, - [BNXT_ULP_CLASS_HID_2cde7] = 642, - [BNXT_ULP_CLASS_HID_26f6f] = 643, - [BNXT_ULP_CLASS_HID_221af] = 644, - [BNXT_ULP_CLASS_HID_2956f] = 645, - [BNXT_ULP_CLASS_HID_2c4c7] = 646, - [BNXT_ULP_CLASS_HID_24487] = 647, - [BNXT_ULP_CLASS_HID_2760f] = 648, - [BNXT_ULP_CLASS_HID_2fbcf] = 649, - [BNXT_ULP_CLASS_HID_2d5a7] = 650, - [BNXT_ULP_CLASS_HID_25357] = 651, - [BNXT_ULP_CLASS_HID_21597] = 652, - [BNXT_ULP_CLASS_HID_29957] = 653, - [BNXT_ULP_CLASS_HID_2cb27] = 654, - [BNXT_ULP_CLASS_HID_248f7] = 655, - [BNXT_ULP_CLASS_HID_27a77] = 656, - [BNXT_ULP_CLASS_HID_2ee37] = 657, - [BNXT_ULP_CLASS_HID_2d987] = 658, - [BNXT_ULP_CLASS_HID_203c7] = 659, - [BNXT_ULP_CLASS_HID_23d47] = 660, - [BNXT_ULP_CLASS_HID_2a107] = 661, - [BNXT_ULP_CLASS_HID_2d0e7] = 662, - [BNXT_ULP_CLASS_HID_250a7] = 663, - [BNXT_ULP_CLASS_HID_24227] = 664, - [BNXT_ULP_CLASS_HID_2f7e7] = 665, - [BNXT_ULP_CLASS_HID_2c827] = 666, - [BNXT_ULP_CLASS_HID_25422] = 667, - [BNXT_ULP_CLASS_HID_21a66] = 668, - [BNXT_ULP_CLASS_HID_2f76a] = 669, - [BNXT_ULP_CLASS_HID_2bcae] = 670, - [BNXT_ULP_CLASS_HID_245ce] = 671, - [BNXT_ULP_CLASS_HID_24b02] = 672, - [BNXT_ULP_CLASS_HID_2dfc2] = 673, - [BNXT_ULP_CLASS_HID_2ee4a] = 674, - [BNXT_ULP_CLASS_HID_22cbe] = 675, - [BNXT_ULP_CLASS_HID_21232] = 676, - [BNXT_ULP_CLASS_HID_2cf26] = 677, - [BNXT_ULP_CLASS_HID_2b53a] = 678, - [BNXT_ULP_CLASS_HID_25d9a] = 679, - [BNXT_ULP_CLASS_HID_2439e] = 680, - [BNXT_ULP_CLASS_HID_2d79e] = 681, - [BNXT_ULP_CLASS_HID_2e606] = 682, - [BNXT_ULP_CLASS_HID_21c5e] = 683, - [BNXT_ULP_CLASS_HID_22ac6] = 684, - [BNXT_ULP_CLASS_HID_2be86] = 685, - [BNXT_ULP_CLASS_HID_2cd0e] = 686, - [BNXT_ULP_CLASS_HID_24d1a] = 687, - [BNXT_ULP_CLASS_HID_25b82] = 688, - [BNXT_ULP_CLASS_HID_2d042] = 689, - [BNXT_ULP_CLASS_HID_2d586] = 690, - [BNXT_ULP_CLASS_HID_2140a] = 691, - [BNXT_ULP_CLASS_HID_22292] = 692, - [BNXT_ULP_CLASS_HID_2b712] = 693, - [BNXT_ULP_CLASS_HID_2c59a] = 694, - [BNXT_ULP_CLASS_HID_24596] = 695, - [BNXT_ULP_CLASS_HID_2541e] = 696, - [BNXT_ULP_CLASS_HID_2e81e] = 697, - [BNXT_ULP_CLASS_HID_2f686] = 698, - [BNXT_ULP_CLASS_HID_24cf2] = 699, - [BNXT_ULP_CLASS_HID_23236] = 700, - [BNXT_ULP_CLASS_HID_286f6] = 701, - [BNXT_ULP_CLASS_HID_2d57e] = 702, - [BNXT_ULP_CLASS_HID_2555a] = 703, - [BNXT_ULP_CLASS_HID_263d2] = 704, - [BNXT_ULP_CLASS_HID_2f792] = 705, - [BNXT_ULP_CLASS_HID_2c61a] = 706, - [BNXT_ULP_CLASS_HID_244be] = 707, - [BNXT_ULP_CLASS_HID_20ab2] = 708, - [BNXT_ULP_CLASS_HID_29eb2] = 709, - [BNXT_ULP_CLASS_HID_2ad3a] = 710, - [BNXT_ULP_CLASS_HID_2761a] = 711, - [BNXT_ULP_CLASS_HID_27b9e] = 712, - [BNXT_ULP_CLASS_HID_2f01e] = 713, - [BNXT_ULP_CLASS_HID_2de96] = 714, - [BNXT_ULP_CLASS_HID_2341e] = 715, - [BNXT_ULP_CLASS_HID_24296] = 716, - [BNXT_ULP_CLASS_HID_2d756] = 717, - [BNXT_ULP_CLASS_HID_29c9a] = 718, - [BNXT_ULP_CLASS_HID_265da] = 719, - [BNXT_ULP_CLASS_HID_27452] = 720, - [BNXT_ULP_CLASS_HID_2c812] = 721, - [BNXT_ULP_CLASS_HID_2ce56] = 722, - [BNXT_ULP_CLASS_HID_20c9a] = 723, - [BNXT_ULP_CLASS_HID_25b12] = 724, - [BNXT_ULP_CLASS_HID_2af12] = 725, - [BNXT_ULP_CLASS_HID_29516] = 726, - [BNXT_ULP_CLASS_HID_27d96] = 727, - [BNXT_ULP_CLASS_HID_24c1e] = 728, - [BNXT_ULP_CLASS_HID_2c09e] = 729, - [BNXT_ULP_CLASS_HID_2c612] = 730, - [BNXT_ULP_CLASS_HID_24002] = 731, - [BNXT_ULP_CLASS_HID_20646] = 732, - [BNXT_ULP_CLASS_HID_29a06] = 733, - [BNXT_ULP_CLASS_HID_2a886] = 734, - [BNXT_ULP_CLASS_HID_271a6] = 735, - [BNXT_ULP_CLASS_HID_277e2] = 736, - [BNXT_ULP_CLASS_HID_2cba2] = 737, - [BNXT_ULP_CLASS_HID_2da22] = 738, - [BNXT_ULP_CLASS_HID_25896] = 739, - [BNXT_ULP_CLASS_HID_21e12] = 740, - [BNXT_ULP_CLASS_HID_29292] = 741, - [BNXT_ULP_CLASS_HID_2a112] = 742, - [BNXT_ULP_CLASS_HID_24a32] = 743, - [BNXT_ULP_CLASS_HID_24fb6] = 744, - [BNXT_ULP_CLASS_HID_2c436] = 745, - [BNXT_ULP_CLASS_HID_2d2a6] = 746, - [BNXT_ULP_CLASS_HID_20856] = 747, - [BNXT_ULP_CLASS_HID_256c6] = 748, - [BNXT_ULP_CLASS_HID_2aa86] = 749, - [BNXT_ULP_CLASS_HID_290d2] = 750, - [BNXT_ULP_CLASS_HID_279d2] = 751, - [BNXT_ULP_CLASS_HID_24842] = 752, - [BNXT_ULP_CLASS_HID_2dc02] = 753, - [BNXT_ULP_CLASS_HID_2c246] = 754, - [BNXT_ULP_CLASS_HID_20082] = 755, - [BNXT_ULP_CLASS_HID_22e92] = 756, - [BNXT_ULP_CLASS_HID_2a312] = 757, - [BNXT_ULP_CLASS_HID_2f192] = 758, - [BNXT_ULP_CLASS_HID_27196] = 759, - [BNXT_ULP_CLASS_HID_24016] = 760, - [BNXT_ULP_CLASS_HID_2d496] = 761, - [BNXT_ULP_CLASS_HID_2da12] = 762, - [BNXT_ULP_CLASS_HID_278d2] = 763, - [BNXT_ULP_CLASS_HID_23e16] = 764, - [BNXT_ULP_CLASS_HID_2b2d6] = 765, - [BNXT_ULP_CLASS_HID_2c156] = 766, - [BNXT_ULP_CLASS_HID_24132] = 767, - [BNXT_ULP_CLASS_HID_26fb2] = 768, - [BNXT_ULP_CLASS_HID_2e472] = 769, - [BNXT_ULP_CLASS_HID_2f2f2] = 770, - [BNXT_ULP_CLASS_HID_27096] = 771, - [BNXT_ULP_CLASS_HID_23692] = 772, - [BNXT_ULP_CLASS_HID_28a92] = 773, - [BNXT_ULP_CLASS_HID_2d912] = 774, - [BNXT_ULP_CLASS_HID_259b6] = 775, - [BNXT_ULP_CLASS_HID_26836] = 776, - [BNXT_ULP_CLASS_HID_2fc36] = 777, - [BNXT_ULP_CLASS_HID_2cab6] = 778, - [BNXT_ULP_CLASS_HID_22016] = 779, - [BNXT_ULP_CLASS_HID_24e96] = 780, - [BNXT_ULP_CLASS_HID_2c356] = 781, - [BNXT_ULP_CLASS_HID_28892] = 782, - [BNXT_ULP_CLASS_HID_25192] = 783, - [BNXT_ULP_CLASS_HID_257d6] = 784, - [BNXT_ULP_CLASS_HID_2f4d2] = 785, - [BNXT_ULP_CLASS_HID_2fa16] = 786, - [BNXT_ULP_CLASS_HID_23892] = 787, - [BNXT_ULP_CLASS_HID_24712] = 788, - [BNXT_ULP_CLASS_HID_2db12] = 789, - [BNXT_ULP_CLASS_HID_28116] = 790, - [BNXT_ULP_CLASS_HID_26a16] = 791, - [BNXT_ULP_CLASS_HID_27896] = 792, - [BNXT_ULP_CLASS_HID_2cc96] = 793, - [BNXT_ULP_CLASS_HID_2f292] = 794, - [BNXT_ULP_CLASS_HID_24b05] = 795, - [BNXT_ULP_CLASS_HID_20541] = 796, - [BNXT_ULP_CLASS_HID_2e84d] = 797, - [BNXT_ULP_CLASS_HID_2a389] = 798, - [BNXT_ULP_CLASS_HID_25ae9] = 799, - [BNXT_ULP_CLASS_HID_25425] = 800, - [BNXT_ULP_CLASS_HID_2c0e5] = 801, - [BNXT_ULP_CLASS_HID_2f16d] = 802, - [BNXT_ULP_CLASS_HID_253d5] = 803, - [BNXT_ULP_CLASS_HID_22d11] = 804, - [BNXT_ULP_CLASS_HID_299d1] = 805, - [BNXT_ULP_CLASS_HID_2ca59] = 806, - [BNXT_ULP_CLASS_HID_24a7d] = 807, - [BNXT_ULP_CLASS_HID_27cf5] = 808, - [BNXT_ULP_CLASS_HID_2e8b5] = 809, - [BNXT_ULP_CLASS_HID_2d93d] = 810, - [BNXT_ULP_CLASS_HID_25f25] = 811, - [BNXT_ULP_CLASS_HID_21961] = 812, - [BNXT_ULP_CLASS_HID_28521] = 813, - [BNXT_ULP_CLASS_HID_2b7a1] = 814, - [BNXT_ULP_CLASS_HID_26e81] = 815, - [BNXT_ULP_CLASS_HID_268c5] = 816, - [BNXT_ULP_CLASS_HID_2d485] = 817, - [BNXT_ULP_CLASS_HID_2c505] = 818, - [BNXT_ULP_CLASS_HID_267f5] = 819, - [BNXT_ULP_CLASS_HID_22131] = 820, - [BNXT_ULP_CLASS_HID_2adf1] = 821, - [BNXT_ULP_CLASS_HID_2de71] = 822, - [BNXT_ULP_CLASS_HID_25e15] = 823, - [BNXT_ULP_CLASS_HID_27095] = 824, - [BNXT_ULP_CLASS_HID_2fb55] = 825, - [BNXT_ULP_CLASS_HID_2edd5] = 826, - [BNXT_ULP_CLASS_HID_24511] = 827, - [BNXT_ULP_CLASS_HID_21f51] = 828, - [BNXT_ULP_CLASS_HID_28b11] = 829, - [BNXT_ULP_CLASS_HID_2bd99] = 830, - [BNXT_ULP_CLASS_HID_254f9] = 831, - [BNXT_ULP_CLASS_HID_26e31] = 832, - [BNXT_ULP_CLASS_HID_2daf1] = 833, - [BNXT_ULP_CLASS_HID_2cb79] = 834, - [BNXT_ULP_CLASS_HID_26dd1] = 835, - [BNXT_ULP_CLASS_HID_22711] = 836, - [BNXT_ULP_CLASS_HID_293d1] = 837, - [BNXT_ULP_CLASS_HID_2c459] = 838, - [BNXT_ULP_CLASS_HID_24419] = 839, - [BNXT_ULP_CLASS_HID_276f1] = 840, - [BNXT_ULP_CLASS_HID_2e2b1] = 841, - [BNXT_ULP_CLASS_HID_2d339] = 842, - [BNXT_ULP_CLASS_HID_25931] = 843, - [BNXT_ULP_CLASS_HID_21371] = 844, - [BNXT_ULP_CLASS_HID_29f31] = 845, - [BNXT_ULP_CLASS_HID_2b1b1] = 846, - [BNXT_ULP_CLASS_HID_26891] = 847, - [BNXT_ULP_CLASS_HID_262d1] = 848, - [BNXT_ULP_CLASS_HID_2ee91] = 849, - [BNXT_ULP_CLASS_HID_2df11] = 850, - [BNXT_ULP_CLASS_HID_20951] = 851, - [BNXT_ULP_CLASS_HID_23b31] = 852, - [BNXT_ULP_CLASS_HID_2a7f1] = 853, - [BNXT_ULP_CLASS_HID_2d871] = 854, - [BNXT_ULP_CLASS_HID_25831] = 855, - [BNXT_ULP_CLASS_HID_24a91] = 856, - [BNXT_ULP_CLASS_HID_2f551] = 857, - [BNXT_ULP_CLASS_HID_2e7d1] = 858, - [BNXT_ULP_CLASS_HID_2481f] = 859, - [BNXT_ULP_CLASS_HID_2025b] = 860, - [BNXT_ULP_CLASS_HID_28e1b] = 861, - [BNXT_ULP_CLASS_HID_2a083] = 862, - [BNXT_ULP_CLASS_HID_257e3] = 863, - [BNXT_ULP_CLASS_HID_2513f] = 864, - [BNXT_ULP_CLASS_HID_2ddff] = 865, - [BNXT_ULP_CLASS_HID_2ce67] = 866, - [BNXT_ULP_CLASS_HID_250df] = 867, - [BNXT_ULP_CLASS_HID_22a1b] = 868, - [BNXT_ULP_CLASS_HID_296db] = 869, - [BNXT_ULP_CLASS_HID_2c753] = 870, - [BNXT_ULP_CLASS_HID_24777] = 871, - [BNXT_ULP_CLASS_HID_279ff] = 872, - [BNXT_ULP_CLASS_HID_2e5bf] = 873, - [BNXT_ULP_CLASS_HID_2d637] = 874, - [BNXT_ULP_CLASS_HID_25c37] = 875, - [BNXT_ULP_CLASS_HID_21673] = 876, - [BNXT_ULP_CLASS_HID_28233] = 877, - [BNXT_ULP_CLASS_HID_2b4a3] = 878, - [BNXT_ULP_CLASS_HID_26b83] = 879, - [BNXT_ULP_CLASS_HID_265d7] = 880, - [BNXT_ULP_CLASS_HID_2d197] = 881, - [BNXT_ULP_CLASS_HID_2c207] = 882, - [BNXT_ULP_CLASS_HID_20db3] = 883, - [BNXT_ULP_CLASS_HID_23e33] = 884, - [BNXT_ULP_CLASS_HID_2aaf3] = 885, - [BNXT_ULP_CLASS_HID_2db73] = 886, - [BNXT_ULP_CLASS_HID_25b17] = 887, - [BNXT_ULP_CLASS_HID_24d97] = 888, - [BNXT_ULP_CLASS_HID_2f857] = 889, - [BNXT_ULP_CLASS_HID_2ead7] = 890, - [BNXT_ULP_CLASS_HID_2422b] = 891, - [BNXT_ULP_CLASS_HID_21c6b] = 892, - [BNXT_ULP_CLASS_HID_2882b] = 893, - [BNXT_ULP_CLASS_HID_2ba93] = 894, - [BNXT_ULP_CLASS_HID_251f3] = 895, - [BNXT_ULP_CLASS_HID_26bcb] = 896, - [BNXT_ULP_CLASS_HID_2d78b] = 897, - [BNXT_ULP_CLASS_HID_2c873] = 898, - [BNXT_ULP_CLASS_HID_26afb] = 899, - [BNXT_ULP_CLASS_HID_2243b] = 900, - [BNXT_ULP_CLASS_HID_290fb] = 901, - [BNXT_ULP_CLASS_HID_2c153] = 902, - [BNXT_ULP_CLASS_HID_24113] = 903, - [BNXT_ULP_CLASS_HID_2739b] = 904, - [BNXT_ULP_CLASS_HID_2fe5b] = 905, - [BNXT_ULP_CLASS_HID_2d033] = 906, - [BNXT_ULP_CLASS_HID_256c3] = 907, - [BNXT_ULP_CLASS_HID_21003] = 908, - [BNXT_ULP_CLASS_HID_29cc3] = 909, - [BNXT_ULP_CLASS_HID_2ceb3] = 910, - [BNXT_ULP_CLASS_HID_24d63] = 911, - [BNXT_ULP_CLASS_HID_27fe3] = 912, - [BNXT_ULP_CLASS_HID_2eba3] = 913, - [BNXT_ULP_CLASS_HID_2dc13] = 914, - [BNXT_ULP_CLASS_HID_20653] = 915, - [BNXT_ULP_CLASS_HID_238d3] = 916, - [BNXT_ULP_CLASS_HID_2a493] = 917, - [BNXT_ULP_CLASS_HID_2d573] = 918, - [BNXT_ULP_CLASS_HID_25533] = 919, - [BNXT_ULP_CLASS_HID_247b3] = 920, - [BNXT_ULP_CLASS_HID_2f273] = 921, - [BNXT_ULP_CLASS_HID_2cdb3] = 922, - [BNXT_ULP_CLASS_HID_25c7d] = 923, - [BNXT_ULP_CLASS_HID_21239] = 924, - [BNXT_ULP_CLASS_HID_2ff35] = 925, - [BNXT_ULP_CLASS_HID_2b4f1] = 926, - [BNXT_ULP_CLASS_HID_24d91] = 927, - [BNXT_ULP_CLASS_HID_2435d] = 928, - [BNXT_ULP_CLASS_HID_2d79d] = 929, - [BNXT_ULP_CLASS_HID_2e615] = 930, - [BNXT_ULP_CLASS_HID_244ad] = 931, - [BNXT_ULP_CLASS_HID_23a69] = 932, - [BNXT_ULP_CLASS_HID_28ea9] = 933, - [BNXT_ULP_CLASS_HID_2dd21] = 934, - [BNXT_ULP_CLASS_HID_25d05] = 935, - [BNXT_ULP_CLASS_HID_26b8d] = 936, - [BNXT_ULP_CLASS_HID_2ffcd] = 937, - [BNXT_ULP_CLASS_HID_2ce45] = 938, - [BNXT_ULP_CLASS_HID_2485d] = 939, - [BNXT_ULP_CLASS_HID_20e19] = 940, - [BNXT_ULP_CLASS_HID_29259] = 941, - [BNXT_ULP_CLASS_HID_2a0d9] = 942, - [BNXT_ULP_CLASS_HID_279f9] = 943, - [BNXT_ULP_CLASS_HID_27fbd] = 944, - [BNXT_ULP_CLASS_HID_2c3fd] = 945, - [BNXT_ULP_CLASS_HID_2d27d] = 946, - [BNXT_ULP_CLASS_HID_2708d] = 947, - [BNXT_ULP_CLASS_HID_23649] = 948, - [BNXT_ULP_CLASS_HID_2ba89] = 949, - [BNXT_ULP_CLASS_HID_2c909] = 950, - [BNXT_ULP_CLASS_HID_2496d] = 951, - [BNXT_ULP_CLASS_HID_267ed] = 952, - [BNXT_ULP_CLASS_HID_2ec2d] = 953, - [BNXT_ULP_CLASS_HID_2faad] = 954, - [BNXT_ULP_CLASS_HID_34c6] = 955, - [BNXT_ULP_CLASS_HID_0c22] = 956, - [BNXT_ULP_CLASS_HID_1cbe] = 957, - [BNXT_ULP_CLASS_HID_179a] = 958, - [BNXT_ULP_CLASS_HID_59be] = 959, - [BNXT_ULP_CLASS_HID_515a] = 960, - [BNXT_ULP_CLASS_HID_1c72] = 961, - [BNXT_ULP_CLASS_HID_171e] = 962, - [BNXT_ULP_CLASS_HID_19c8] = 963, - [BNXT_ULP_CLASS_HID_112c] = 964, - [BNXT_ULP_CLASS_HID_4d68] = 965, - [BNXT_ULP_CLASS_HID_444c] = 966, - [BNXT_ULP_CLASS_HID_0e8c] = 967, - [BNXT_ULP_CLASS_HID_09e0] = 968, - [BNXT_ULP_CLASS_HID_1af0] = 969, - [BNXT_ULP_CLASS_HID_15d4] = 970, - [BNXT_ULP_CLASS_HID_1dd0] = 971, - [BNXT_ULP_CLASS_HID_14f4] = 972, - [BNXT_ULP_CLASS_HID_70b0] = 973, - [BNXT_ULP_CLASS_HID_4854] = 974, - [BNXT_ULP_CLASS_HID_3dd4] = 975, - [BNXT_ULP_CLASS_HID_34f8] = 976, - [BNXT_ULP_CLASS_HID_09e8] = 977, - [BNXT_ULP_CLASS_HID_008c] = 978, - [BNXT_ULP_CLASS_HID_34e6] = 979, - [BNXT_ULP_CLASS_HID_0c02] = 980, - [BNXT_ULP_CLASS_HID_1c9e] = 981, - [BNXT_ULP_CLASS_HID_17ba] = 982, - [BNXT_ULP_CLASS_HID_429e] = 983, - [BNXT_ULP_CLASS_HID_5dba] = 984, - [BNXT_ULP_CLASS_HID_2a16] = 985, - [BNXT_ULP_CLASS_HID_2532] = 986, - [BNXT_ULP_CLASS_HID_2da2] = 987, - [BNXT_ULP_CLASS_HID_24fe] = 988, - [BNXT_ULP_CLASS_HID_355a] = 989, - [BNXT_ULP_CLASS_HID_0c76] = 990, - [BNXT_ULP_CLASS_HID_13e6] = 991, - [BNXT_ULP_CLASS_HID_7276] = 992, - [BNXT_ULP_CLASS_HID_42d2] = 993, - [BNXT_ULP_CLASS_HID_5dee] = 994, - [BNXT_ULP_CLASS_HID_59de] = 995, - [BNXT_ULP_CLASS_HID_513a] = 996, - [BNXT_ULP_CLASS_HID_1c12] = 997, - [BNXT_ULP_CLASS_HID_177e] = 998, - [BNXT_ULP_CLASS_HID_0e92] = 999, - [BNXT_ULP_CLASS_HID_09fe] = 1000, - [BNXT_ULP_CLASS_HID_5c1a] = 1001, - [BNXT_ULP_CLASS_HID_5746] = 1002, - [BNXT_ULP_CLASS_HID_79da] = 1003, - [BNXT_ULP_CLASS_HID_7106] = 1004, - [BNXT_ULP_CLASS_HID_3c1e] = 1005, - [BNXT_ULP_CLASS_HID_377a] = 1006, - [BNXT_ULP_CLASS_HID_2e9e] = 1007, - [BNXT_ULP_CLASS_HID_29fa] = 1008, - [BNXT_ULP_CLASS_HID_14d2] = 1009, - [BNXT_ULP_CLASS_HID_7742] = 1010, - [BNXT_ULP_CLASS_HID_3706] = 1011, - [BNXT_ULP_CLASS_HID_0fe2] = 1012, - [BNXT_ULP_CLASS_HID_1f7e] = 1013, - [BNXT_ULP_CLASS_HID_145a] = 1014, - [BNXT_ULP_CLASS_HID_417e] = 1015, - [BNXT_ULP_CLASS_HID_5e5a] = 1016, - [BNXT_ULP_CLASS_HID_29f6] = 1017, - [BNXT_ULP_CLASS_HID_26d2] = 1018, - [BNXT_ULP_CLASS_HID_2e42] = 1019, - [BNXT_ULP_CLASS_HID_271e] = 1020, - [BNXT_ULP_CLASS_HID_36ba] = 1021, - [BNXT_ULP_CLASS_HID_0f96] = 1022, - [BNXT_ULP_CLASS_HID_1006] = 1023, - [BNXT_ULP_CLASS_HID_7196] = 1024, - [BNXT_ULP_CLASS_HID_4132] = 1025, - [BNXT_ULP_CLASS_HID_5e0e] = 1026, - [BNXT_ULP_CLASS_HID_59fe] = 1027, - [BNXT_ULP_CLASS_HID_511a] = 1028, - [BNXT_ULP_CLASS_HID_1c32] = 1029, - [BNXT_ULP_CLASS_HID_175e] = 1030, - [BNXT_ULP_CLASS_HID_0eb2] = 1031, - [BNXT_ULP_CLASS_HID_09de] = 1032, - [BNXT_ULP_CLASS_HID_5c3a] = 1033, - [BNXT_ULP_CLASS_HID_5766] = 1034, - [BNXT_ULP_CLASS_HID_79fa] = 1035, - [BNXT_ULP_CLASS_HID_7126] = 1036, - [BNXT_ULP_CLASS_HID_3c3e] = 1037, - [BNXT_ULP_CLASS_HID_375a] = 1038, - [BNXT_ULP_CLASS_HID_2ebe] = 1039, - [BNXT_ULP_CLASS_HID_29da] = 1040, - [BNXT_ULP_CLASS_HID_14f2] = 1041, - [BNXT_ULP_CLASS_HID_7762] = 1042, - [BNXT_ULP_CLASS_HID_19e8] = 1043, - [BNXT_ULP_CLASS_HID_110c] = 1044, - [BNXT_ULP_CLASS_HID_4d48] = 1045, - [BNXT_ULP_CLASS_HID_446c] = 1046, - [BNXT_ULP_CLASS_HID_0eac] = 1047, - [BNXT_ULP_CLASS_HID_09c0] = 1048, - [BNXT_ULP_CLASS_HID_1ad0] = 1049, - [BNXT_ULP_CLASS_HID_15f4] = 1050, - [BNXT_ULP_CLASS_HID_39ec] = 1051, - [BNXT_ULP_CLASS_HID_3100] = 1052, - [BNXT_ULP_CLASS_HID_0210] = 1053, - [BNXT_ULP_CLASS_HID_1d34] = 1054, - [BNXT_ULP_CLASS_HID_2ea0] = 1055, - [BNXT_ULP_CLASS_HID_29c4] = 1056, - [BNXT_ULP_CLASS_HID_3ad4] = 1057, - [BNXT_ULP_CLASS_HID_35e8] = 1058, - [BNXT_ULP_CLASS_HID_5d80] = 1059, - [BNXT_ULP_CLASS_HID_54a4] = 1060, - [BNXT_ULP_CLASS_HID_29b4] = 1061, - [BNXT_ULP_CLASS_HID_20c8] = 1062, - [BNXT_ULP_CLASS_HID_7244] = 1063, - [BNXT_ULP_CLASS_HID_4d98] = 1064, - [BNXT_ULP_CLASS_HID_5e68] = 1065, - [BNXT_ULP_CLASS_HID_598c] = 1066, - [BNXT_ULP_CLASS_HID_1248] = 1067, - [BNXT_ULP_CLASS_HID_74d8] = 1068, - [BNXT_ULP_CLASS_HID_49a8] = 1069, - [BNXT_ULP_CLASS_HID_40cc] = 1070, - [BNXT_ULP_CLASS_HID_0b0c] = 1071, - [BNXT_ULP_CLASS_HID_0220] = 1072, - [BNXT_ULP_CLASS_HID_1730] = 1073, - [BNXT_ULP_CLASS_HID_7980] = 1074, - [BNXT_ULP_CLASS_HID_1db0] = 1075, - [BNXT_ULP_CLASS_HID_1494] = 1076, - [BNXT_ULP_CLASS_HID_70d0] = 1077, - [BNXT_ULP_CLASS_HID_4834] = 1078, - [BNXT_ULP_CLASS_HID_3db4] = 1079, - [BNXT_ULP_CLASS_HID_3498] = 1080, - [BNXT_ULP_CLASS_HID_0988] = 1081, - [BNXT_ULP_CLASS_HID_00ec] = 1082, - [BNXT_ULP_CLASS_HID_23f44] = 1083, - [BNXT_ULP_CLASS_HID_236a8] = 1084, - [BNXT_ULP_CLASS_HID_20b58] = 1085, - [BNXT_ULP_CLASS_HID_202bc] = 1086, - [BNXT_ULP_CLASS_HID_25f48] = 1087, - [BNXT_ULP_CLASS_HID_256ac] = 1088, - [BNXT_ULP_CLASS_HID_22b5c] = 1089, - [BNXT_ULP_CLASS_HID_22280] = 1090, - [BNXT_ULP_CLASS_HID_14000] = 1091, - [BNXT_ULP_CLASS_HID_15b64] = 1092, - [BNXT_ULP_CLASS_HID_12c14] = 1093, - [BNXT_ULP_CLASS_HID_12778] = 1094, - [BNXT_ULP_CLASS_HID_118f8] = 1095, - [BNXT_ULP_CLASS_HID_113dc] = 1096, - [BNXT_ULP_CLASS_HID_14c18] = 1097, - [BNXT_ULP_CLASS_HID_1477c] = 1098, - [BNXT_ULP_CLASS_HID_31a88] = 1099, - [BNXT_ULP_CLASS_HID_315ec] = 1100, - [BNXT_ULP_CLASS_HID_34e28] = 1101, - [BNXT_ULP_CLASS_HID_3490c] = 1102, - [BNXT_ULP_CLASS_HID_33a8c] = 1103, - [BNXT_ULP_CLASS_HID_335f0] = 1104, - [BNXT_ULP_CLASS_HID_306e0] = 1105, - [BNXT_ULP_CLASS_HID_301c4] = 1106, - [BNXT_ULP_CLASS_HID_1a08] = 1107, - [BNXT_ULP_CLASS_HID_12ec] = 1108, - [BNXT_ULP_CLASS_HID_4ea8] = 1109, - [BNXT_ULP_CLASS_HID_478c] = 1110, - [BNXT_ULP_CLASS_HID_0d4c] = 1111, - [BNXT_ULP_CLASS_HID_0a20] = 1112, - [BNXT_ULP_CLASS_HID_1930] = 1113, - [BNXT_ULP_CLASS_HID_1614] = 1114, - [BNXT_ULP_CLASS_HID_3a0c] = 1115, - [BNXT_ULP_CLASS_HID_32e0] = 1116, - [BNXT_ULP_CLASS_HID_01f0] = 1117, - [BNXT_ULP_CLASS_HID_1ed4] = 1118, - [BNXT_ULP_CLASS_HID_2d40] = 1119, - [BNXT_ULP_CLASS_HID_2a24] = 1120, - [BNXT_ULP_CLASS_HID_3934] = 1121, - [BNXT_ULP_CLASS_HID_3608] = 1122, - [BNXT_ULP_CLASS_HID_5e60] = 1123, - [BNXT_ULP_CLASS_HID_5744] = 1124, - [BNXT_ULP_CLASS_HID_2a54] = 1125, - [BNXT_ULP_CLASS_HID_2328] = 1126, - [BNXT_ULP_CLASS_HID_71a4] = 1127, - [BNXT_ULP_CLASS_HID_4e78] = 1128, - [BNXT_ULP_CLASS_HID_5d88] = 1129, - [BNXT_ULP_CLASS_HID_5a6c] = 1130, - [BNXT_ULP_CLASS_HID_11a8] = 1131, - [BNXT_ULP_CLASS_HID_7738] = 1132, - [BNXT_ULP_CLASS_HID_4a48] = 1133, - [BNXT_ULP_CLASS_HID_432c] = 1134, - [BNXT_ULP_CLASS_HID_08ec] = 1135, - [BNXT_ULP_CLASS_HID_01c0] = 1136, - [BNXT_ULP_CLASS_HID_14d0] = 1137, - [BNXT_ULP_CLASS_HID_7a60] = 1138, - [BNXT_ULP_CLASS_HID_1d90] = 1139, - [BNXT_ULP_CLASS_HID_14b4] = 1140, - [BNXT_ULP_CLASS_HID_70f0] = 1141, - [BNXT_ULP_CLASS_HID_4814] = 1142, - [BNXT_ULP_CLASS_HID_3d94] = 1143, - [BNXT_ULP_CLASS_HID_34b8] = 1144, - [BNXT_ULP_CLASS_HID_09a8] = 1145, - [BNXT_ULP_CLASS_HID_00cc] = 1146, - [BNXT_ULP_CLASS_HID_23f64] = 1147, - [BNXT_ULP_CLASS_HID_23688] = 1148, - [BNXT_ULP_CLASS_HID_20b78] = 1149, - [BNXT_ULP_CLASS_HID_2029c] = 1150, - [BNXT_ULP_CLASS_HID_25f68] = 1151, - [BNXT_ULP_CLASS_HID_2568c] = 1152, - [BNXT_ULP_CLASS_HID_22b7c] = 1153, - [BNXT_ULP_CLASS_HID_222a0] = 1154, - [BNXT_ULP_CLASS_HID_14020] = 1155, - [BNXT_ULP_CLASS_HID_15b44] = 1156, - [BNXT_ULP_CLASS_HID_12c34] = 1157, - [BNXT_ULP_CLASS_HID_12758] = 1158, - [BNXT_ULP_CLASS_HID_118d8] = 1159, - [BNXT_ULP_CLASS_HID_113fc] = 1160, - [BNXT_ULP_CLASS_HID_14c38] = 1161, - [BNXT_ULP_CLASS_HID_1475c] = 1162, - [BNXT_ULP_CLASS_HID_31aa8] = 1163, - [BNXT_ULP_CLASS_HID_315cc] = 1164, - [BNXT_ULP_CLASS_HID_34e08] = 1165, - [BNXT_ULP_CLASS_HID_3492c] = 1166, - [BNXT_ULP_CLASS_HID_33aac] = 1167, - [BNXT_ULP_CLASS_HID_335d0] = 1168, - [BNXT_ULP_CLASS_HID_306c0] = 1169, - [BNXT_ULP_CLASS_HID_301e4] = 1170, - [BNXT_ULP_CLASS_HID_4d32] = 1171, - [BNXT_ULP_CLASS_HID_54aa] = 1172, - [BNXT_ULP_CLASS_HID_0686] = 1173, - [BNXT_ULP_CLASS_HID_540e] = 1174, - [BNXT_ULP_CLASS_HID_2e3c] = 1175, - [BNXT_ULP_CLASS_HID_3a20] = 1176, - [BNXT_ULP_CLASS_HID_46f0] = 1177, - [BNXT_ULP_CLASS_HID_52e4] = 1178, - [BNXT_ULP_CLASS_HID_55e4] = 1179, - [BNXT_ULP_CLASS_HID_21f8] = 1180, - [BNXT_ULP_CLASS_HID_75e8] = 1181, - [BNXT_ULP_CLASS_HID_41fc] = 1182, - [BNXT_ULP_CLASS_HID_4d12] = 1183, - [BNXT_ULP_CLASS_HID_548a] = 1184, - [BNXT_ULP_CLASS_HID_3356] = 1185, - [BNXT_ULP_CLASS_HID_1ace] = 1186, - [BNXT_ULP_CLASS_HID_1a9a] = 1187, - [BNXT_ULP_CLASS_HID_4d46] = 1188, - [BNXT_ULP_CLASS_HID_2812] = 1189, - [BNXT_ULP_CLASS_HID_338a] = 1190, - [BNXT_ULP_CLASS_HID_06e6] = 1191, - [BNXT_ULP_CLASS_HID_546e] = 1192, - [BNXT_ULP_CLASS_HID_46ee] = 1193, - [BNXT_ULP_CLASS_HID_0d22] = 1194, - [BNXT_ULP_CLASS_HID_26e2] = 1195, - [BNXT_ULP_CLASS_HID_746a] = 1196, - [BNXT_ULP_CLASS_HID_1fa6] = 1197, - [BNXT_ULP_CLASS_HID_2d2e] = 1198, - [BNXT_ULP_CLASS_HID_4ef2] = 1199, - [BNXT_ULP_CLASS_HID_576a] = 1200, - [BNXT_ULP_CLASS_HID_30b6] = 1201, - [BNXT_ULP_CLASS_HID_192e] = 1202, - [BNXT_ULP_CLASS_HID_197a] = 1203, - [BNXT_ULP_CLASS_HID_4ea6] = 1204, - [BNXT_ULP_CLASS_HID_2bf2] = 1205, - [BNXT_ULP_CLASS_HID_306a] = 1206, - [BNXT_ULP_CLASS_HID_06c6] = 1207, - [BNXT_ULP_CLASS_HID_544e] = 1208, - [BNXT_ULP_CLASS_HID_46ce] = 1209, - [BNXT_ULP_CLASS_HID_0d02] = 1210, - [BNXT_ULP_CLASS_HID_26c2] = 1211, - [BNXT_ULP_CLASS_HID_744a] = 1212, - [BNXT_ULP_CLASS_HID_1f86] = 1213, - [BNXT_ULP_CLASS_HID_2d0e] = 1214, - [BNXT_ULP_CLASS_HID_2e1c] = 1215, - [BNXT_ULP_CLASS_HID_3a00] = 1216, - [BNXT_ULP_CLASS_HID_46d0] = 1217, - [BNXT_ULP_CLASS_HID_52c4] = 1218, - [BNXT_ULP_CLASS_HID_4e10] = 1219, - [BNXT_ULP_CLASS_HID_5a04] = 1220, - [BNXT_ULP_CLASS_HID_1f98] = 1221, - [BNXT_ULP_CLASS_HID_72f8] = 1222, - [BNXT_ULP_CLASS_HID_0a78] = 1223, - [BNXT_ULP_CLASS_HID_166c] = 1224, - [BNXT_ULP_CLASS_HID_233c] = 1225, - [BNXT_ULP_CLASS_HID_0f20] = 1226, - [BNXT_ULP_CLASS_HID_2a7c] = 1227, - [BNXT_ULP_CLASS_HID_3660] = 1228, - [BNXT_ULP_CLASS_HID_4330] = 1229, - [BNXT_ULP_CLASS_HID_2f24] = 1230, - [BNXT_ULP_CLASS_HID_5584] = 1231, - [BNXT_ULP_CLASS_HID_2198] = 1232, - [BNXT_ULP_CLASS_HID_7588] = 1233, - [BNXT_ULP_CLASS_HID_419c] = 1234, - [BNXT_ULP_CLASS_HID_27758] = 1235, - [BNXT_ULP_CLASS_HID_243ac] = 1236, - [BNXT_ULP_CLASS_HID_20c10] = 1237, - [BNXT_ULP_CLASS_HID_21864] = 1238, - [BNXT_ULP_CLASS_HID_130c8] = 1239, - [BNXT_ULP_CLASS_HID_11cdc] = 1240, - [BNXT_ULP_CLASS_HID_150cc] = 1241, - [BNXT_ULP_CLASS_HID_13d20] = 1242, - [BNXT_ULP_CLASS_HID_3529c] = 1243, - [BNXT_ULP_CLASS_HID_33ef0] = 1244, - [BNXT_ULP_CLASS_HID_372e0] = 1245, - [BNXT_ULP_CLASS_HID_35ef4] = 1246, - [BNXT_ULP_CLASS_HID_2dfc] = 1247, - [BNXT_ULP_CLASS_HID_39e0] = 1248, - [BNXT_ULP_CLASS_HID_4530] = 1249, - [BNXT_ULP_CLASS_HID_5124] = 1250, - [BNXT_ULP_CLASS_HID_4df0] = 1251, - [BNXT_ULP_CLASS_HID_59e4] = 1252, - [BNXT_ULP_CLASS_HID_1c78] = 1253, - [BNXT_ULP_CLASS_HID_7118] = 1254, - [BNXT_ULP_CLASS_HID_0998] = 1255, - [BNXT_ULP_CLASS_HID_158c] = 1256, - [BNXT_ULP_CLASS_HID_20dc] = 1257, - [BNXT_ULP_CLASS_HID_0cc0] = 1258, - [BNXT_ULP_CLASS_HID_299c] = 1259, - [BNXT_ULP_CLASS_HID_3580] = 1260, - [BNXT_ULP_CLASS_HID_40d0] = 1261, - [BNXT_ULP_CLASS_HID_2cc4] = 1262, - [BNXT_ULP_CLASS_HID_55a4] = 1263, - [BNXT_ULP_CLASS_HID_21b8] = 1264, - [BNXT_ULP_CLASS_HID_75a8] = 1265, - [BNXT_ULP_CLASS_HID_41bc] = 1266, - [BNXT_ULP_CLASS_HID_27778] = 1267, - [BNXT_ULP_CLASS_HID_2438c] = 1268, - [BNXT_ULP_CLASS_HID_20c30] = 1269, - [BNXT_ULP_CLASS_HID_21844] = 1270, - [BNXT_ULP_CLASS_HID_130e8] = 1271, - [BNXT_ULP_CLASS_HID_11cfc] = 1272, - [BNXT_ULP_CLASS_HID_150ec] = 1273, - [BNXT_ULP_CLASS_HID_13d00] = 1274, - [BNXT_ULP_CLASS_HID_352bc] = 1275, - [BNXT_ULP_CLASS_HID_33ed0] = 1276, - [BNXT_ULP_CLASS_HID_372c0] = 1277, - [BNXT_ULP_CLASS_HID_35ed4] = 1278, - [BNXT_ULP_CLASS_HID_3866] = 1279, - [BNXT_ULP_CLASS_HID_381e] = 1280, - [BNXT_ULP_CLASS_HID_3860] = 1281, - [BNXT_ULP_CLASS_HID_0454] = 1282, - [BNXT_ULP_CLASS_HID_3818] = 1283, - [BNXT_ULP_CLASS_HID_042c] = 1284, - [BNXT_ULP_CLASS_HID_3846] = 1285, - [BNXT_ULP_CLASS_HID_387e] = 1286, - [BNXT_ULP_CLASS_HID_3ba6] = 1287, - [BNXT_ULP_CLASS_HID_385e] = 1288, - [BNXT_ULP_CLASS_HID_3840] = 1289, - [BNXT_ULP_CLASS_HID_0474] = 1290, - [BNXT_ULP_CLASS_HID_3878] = 1291, - [BNXT_ULP_CLASS_HID_044c] = 1292, - [BNXT_ULP_CLASS_HID_3ba0] = 1293, - [BNXT_ULP_CLASS_HID_0794] = 1294, - [BNXT_ULP_CLASS_HID_3858] = 1295, - [BNXT_ULP_CLASS_HID_046c] = 1296 + [BNXT_ULP_CLASS_HID_00b8] = 1, + [BNXT_ULP_CLASS_HID_0cc2] = 2, + [BNXT_ULP_CLASS_HID_10e4] = 3, + [BNXT_ULP_CLASS_HID_1d0e] = 4, + [BNXT_ULP_CLASS_HID_0286] = 5, + [BNXT_ULP_CLASS_HID_0e98] = 6, + [BNXT_ULP_CLASS_HID_1666] = 7, + [BNXT_ULP_CLASS_HID_02de] = 8, + [BNXT_ULP_CLASS_HID_81d25] = 9, + [BNXT_ULP_CLASS_HID_809ad] = 10, + [BNXT_ULP_CLASS_HID_80ae3] = 11, + [BNXT_ULP_CLASS_HID_8170d] = 12, + [BNXT_ULP_CLASS_HID_80773] = 13, + [BNXT_ULP_CLASS_HID_8139d] = 14, + [BNXT_ULP_CLASS_HID_814d3] = 15, + [BNXT_ULP_CLASS_HID_8015b] = 16, + [BNXT_ULP_CLASS_HID_21977] = 17, + [BNXT_ULP_CLASS_HID_205ef] = 18, + [BNXT_ULP_CLASS_HID_20735] = 19, + [BNXT_ULP_CLASS_HID_2134f] = 20, + [BNXT_ULP_CLASS_HID_61beb] = 21, + [BNXT_ULP_CLASS_HID_60863] = 22, + [BNXT_ULP_CLASS_HID_609a9] = 23, + [BNXT_ULP_CLASS_HID_615c3] = 24, + [BNXT_ULP_CLASS_HID_00a8] = 25, + [BNXT_ULP_CLASS_HID_0cd2] = 26, + [BNXT_ULP_CLASS_HID_10f4] = 27, + [BNXT_ULP_CLASS_HID_1d1e] = 28, + [BNXT_ULP_CLASS_HID_1488] = 29, + [BNXT_ULP_CLASS_HID_0110] = 30, + [BNXT_ULP_CLASS_HID_0532] = 31, + [BNXT_ULP_CLASS_HID_115c] = 32, + [BNXT_ULP_CLASS_HID_0ab8] = 33, + [BNXT_ULP_CLASS_HID_16a2] = 34, + [BNXT_ULP_CLASS_HID_1ac4] = 35, + [BNXT_ULP_CLASS_HID_074c] = 36, + [BNXT_ULP_CLASS_HID_1e98] = 37, + [BNXT_ULP_CLASS_HID_0ae0] = 38, + [BNXT_ULP_CLASS_HID_0f02] = 39, + [BNXT_ULP_CLASS_HID_1b2c] = 40, + [BNXT_ULP_CLASS_HID_0296] = 41, + [BNXT_ULP_CLASS_HID_0e88] = 42, + [BNXT_ULP_CLASS_HID_1676] = 43, + [BNXT_ULP_CLASS_HID_02ce] = 44, + [BNXT_ULP_CLASS_HID_8076e] = 45, + [BNXT_ULP_CLASS_HID_81380] = 46, + [BNXT_ULP_CLASS_HID_81b4e] = 47, + [BNXT_ULP_CLASS_HID_807c6] = 48, + [BNXT_ULP_CLASS_HID_404ea] = 49, + [BNXT_ULP_CLASS_HID_4110c] = 50, + [BNXT_ULP_CLASS_HID_418ca] = 51, + [BNXT_ULP_CLASS_HID_40542] = 52, + [BNXT_ULP_CLASS_HID_c09e2] = 53, + [BNXT_ULP_CLASS_HID_c1604] = 54, + [BNXT_ULP_CLASS_HID_c1dc2] = 55, + [BNXT_ULP_CLASS_HID_c0a5a] = 56, + [BNXT_ULP_CLASS_HID_0098] = 57, + [BNXT_ULP_CLASS_HID_0ce2] = 58, + [BNXT_ULP_CLASS_HID_10c4] = 59, + [BNXT_ULP_CLASS_HID_1d2e] = 60, + [BNXT_ULP_CLASS_HID_14b8] = 61, + [BNXT_ULP_CLASS_HID_0120] = 62, + [BNXT_ULP_CLASS_HID_0502] = 63, + [BNXT_ULP_CLASS_HID_116c] = 64, + [BNXT_ULP_CLASS_HID_0a88] = 65, + [BNXT_ULP_CLASS_HID_1692] = 66, + [BNXT_ULP_CLASS_HID_1af4] = 67, + [BNXT_ULP_CLASS_HID_077c] = 68, + [BNXT_ULP_CLASS_HID_1ea8] = 69, + [BNXT_ULP_CLASS_HID_0ad0] = 70, + [BNXT_ULP_CLASS_HID_0f32] = 71, + [BNXT_ULP_CLASS_HID_1b1c] = 72, + [BNXT_ULP_CLASS_HID_02a6] = 73, + [BNXT_ULP_CLASS_HID_0eb8] = 74, + [BNXT_ULP_CLASS_HID_1646] = 75, + [BNXT_ULP_CLASS_HID_02fe] = 76, + [BNXT_ULP_CLASS_HID_8075e] = 77, + [BNXT_ULP_CLASS_HID_813b0] = 78, + [BNXT_ULP_CLASS_HID_81b7e] = 79, + [BNXT_ULP_CLASS_HID_807f6] = 80, + [BNXT_ULP_CLASS_HID_404da] = 81, + [BNXT_ULP_CLASS_HID_4113c] = 82, + [BNXT_ULP_CLASS_HID_418fa] = 83, + [BNXT_ULP_CLASS_HID_40572] = 84, + [BNXT_ULP_CLASS_HID_c09d2] = 85, + [BNXT_ULP_CLASS_HID_c1634] = 86, + [BNXT_ULP_CLASS_HID_c1df2] = 87, + [BNXT_ULP_CLASS_HID_c0a6a] = 88, + [BNXT_ULP_CLASS_HID_81d35] = 89, + [BNXT_ULP_CLASS_HID_809bd] = 90, + [BNXT_ULP_CLASS_HID_80af3] = 91, + [BNXT_ULP_CLASS_HID_8171d] = 92, + [BNXT_ULP_CLASS_HID_80763] = 93, + [BNXT_ULP_CLASS_HID_8138d] = 94, + [BNXT_ULP_CLASS_HID_814c3] = 95, + [BNXT_ULP_CLASS_HID_8014b] = 96, + [BNXT_ULP_CLASS_HID_c001f] = 97, + [BNXT_ULP_CLASS_HID_c0c39] = 98, + [BNXT_ULP_CLASS_HID_c0d7f] = 99, + [BNXT_ULP_CLASS_HID_c1999] = 100, + [BNXT_ULP_CLASS_HID_c09ef] = 101, + [BNXT_ULP_CLASS_HID_c1609] = 102, + [BNXT_ULP_CLASS_HID_c174f] = 103, + [BNXT_ULP_CLASS_HID_c03d7] = 104, + [BNXT_ULP_CLASS_HID_a1e73] = 105, + [BNXT_ULP_CLASS_HID_a0afb] = 106, + [BNXT_ULP_CLASS_HID_a0c31] = 107, + [BNXT_ULP_CLASS_HID_a185b] = 108, + [BNXT_ULP_CLASS_HID_a08a1] = 109, + [BNXT_ULP_CLASS_HID_a14cb] = 110, + [BNXT_ULP_CLASS_HID_a1601] = 111, + [BNXT_ULP_CLASS_HID_a0289] = 112, + [BNXT_ULP_CLASS_HID_e015d] = 113, + [BNXT_ULP_CLASS_HID_e0d47] = 114, + [BNXT_ULP_CLASS_HID_e0ebd] = 115, + [BNXT_ULP_CLASS_HID_e1aa7] = 116, + [BNXT_ULP_CLASS_HID_e0b2d] = 117, + [BNXT_ULP_CLASS_HID_e1757] = 118, + [BNXT_ULP_CLASS_HID_e188d] = 119, + [BNXT_ULP_CLASS_HID_e0515] = 120, + [BNXT_ULP_CLASS_HID_21967] = 121, + [BNXT_ULP_CLASS_HID_205ff] = 122, + [BNXT_ULP_CLASS_HID_20725] = 123, + [BNXT_ULP_CLASS_HID_2135f] = 124, + [BNXT_ULP_CLASS_HID_61bfb] = 125, + [BNXT_ULP_CLASS_HID_60873] = 126, + [BNXT_ULP_CLASS_HID_609b9] = 127, + [BNXT_ULP_CLASS_HID_615d3] = 128, + [BNXT_ULP_CLASS_HID_30a55] = 129, + [BNXT_ULP_CLASS_HID_3164f] = 130, + [BNXT_ULP_CLASS_HID_317b5] = 131, + [BNXT_ULP_CLASS_HID_3040d] = 132, + [BNXT_ULP_CLASS_HID_70ca9] = 133, + [BNXT_ULP_CLASS_HID_718c3] = 134, + [BNXT_ULP_CLASS_HID_71a09] = 135, + [BNXT_ULP_CLASS_HID_70681] = 136, + [BNXT_ULP_CLASS_HID_2821d] = 137, + [BNXT_ULP_CLASS_HID_28e37] = 138, + [BNXT_ULP_CLASS_HID_28f7d] = 139, + [BNXT_ULP_CLASS_HID_29b97] = 140, + [BNXT_ULP_CLASS_HID_68491] = 141, + [BNXT_ULP_CLASS_HID_6908b] = 142, + [BNXT_ULP_CLASS_HID_691f1] = 143, + [BNXT_ULP_CLASS_HID_69deb] = 144, + [BNXT_ULP_CLASS_HID_3926d] = 145, + [BNXT_ULP_CLASS_HID_39e87] = 146, + [BNXT_ULP_CLASS_HID_38023] = 147, + [BNXT_ULP_CLASS_HID_38c45] = 148, + [BNXT_ULP_CLASS_HID_794e1] = 149, + [BNXT_ULP_CLASS_HID_78179] = 150, + [BNXT_ULP_CLASS_HID_782a7] = 151, + [BNXT_ULP_CLASS_HID_78ed9] = 152, + [BNXT_ULP_CLASS_HID_81d05] = 153, + [BNXT_ULP_CLASS_HID_8098d] = 154, + [BNXT_ULP_CLASS_HID_80ac3] = 155, + [BNXT_ULP_CLASS_HID_8172d] = 156, + [BNXT_ULP_CLASS_HID_80753] = 157, + [BNXT_ULP_CLASS_HID_813bd] = 158, + [BNXT_ULP_CLASS_HID_814f3] = 159, + [BNXT_ULP_CLASS_HID_8017b] = 160, + [BNXT_ULP_CLASS_HID_c002f] = 161, + [BNXT_ULP_CLASS_HID_c0c09] = 162, + [BNXT_ULP_CLASS_HID_c0d4f] = 163, + [BNXT_ULP_CLASS_HID_c19a9] = 164, + [BNXT_ULP_CLASS_HID_c09df] = 165, + [BNXT_ULP_CLASS_HID_c1639] = 166, + [BNXT_ULP_CLASS_HID_c177f] = 167, + [BNXT_ULP_CLASS_HID_c03e7] = 168, + [BNXT_ULP_CLASS_HID_a1e43] = 169, + [BNXT_ULP_CLASS_HID_a0acb] = 170, + [BNXT_ULP_CLASS_HID_a0c01] = 171, + [BNXT_ULP_CLASS_HID_a186b] = 172, + [BNXT_ULP_CLASS_HID_a0891] = 173, + [BNXT_ULP_CLASS_HID_a14fb] = 174, + [BNXT_ULP_CLASS_HID_a1631] = 175, + [BNXT_ULP_CLASS_HID_a02b9] = 176, + [BNXT_ULP_CLASS_HID_e016d] = 177, + [BNXT_ULP_CLASS_HID_e0d77] = 178, + [BNXT_ULP_CLASS_HID_e0e8d] = 179, + [BNXT_ULP_CLASS_HID_e1a97] = 180, + [BNXT_ULP_CLASS_HID_e0b1d] = 181, + [BNXT_ULP_CLASS_HID_e1767] = 182, + [BNXT_ULP_CLASS_HID_e18bd] = 183, + [BNXT_ULP_CLASS_HID_e0525] = 184, + [BNXT_ULP_CLASS_HID_21957] = 185, + [BNXT_ULP_CLASS_HID_205cf] = 186, + [BNXT_ULP_CLASS_HID_20715] = 187, + [BNXT_ULP_CLASS_HID_2136f] = 188, + [BNXT_ULP_CLASS_HID_61bcb] = 189, + [BNXT_ULP_CLASS_HID_60843] = 190, + [BNXT_ULP_CLASS_HID_60989] = 191, + [BNXT_ULP_CLASS_HID_615e3] = 192, + [BNXT_ULP_CLASS_HID_30a65] = 193, + [BNXT_ULP_CLASS_HID_3167f] = 194, + [BNXT_ULP_CLASS_HID_31785] = 195, + [BNXT_ULP_CLASS_HID_3043d] = 196, + [BNXT_ULP_CLASS_HID_70c99] = 197, + [BNXT_ULP_CLASS_HID_718f3] = 198, + [BNXT_ULP_CLASS_HID_71a39] = 199, + [BNXT_ULP_CLASS_HID_706b1] = 200, + [BNXT_ULP_CLASS_HID_2822d] = 201, + [BNXT_ULP_CLASS_HID_28e07] = 202, + [BNXT_ULP_CLASS_HID_28f4d] = 203, + [BNXT_ULP_CLASS_HID_29ba7] = 204, + [BNXT_ULP_CLASS_HID_684a1] = 205, + [BNXT_ULP_CLASS_HID_690bb] = 206, + [BNXT_ULP_CLASS_HID_691c1] = 207, + [BNXT_ULP_CLASS_HID_69ddb] = 208, + [BNXT_ULP_CLASS_HID_3925d] = 209, + [BNXT_ULP_CLASS_HID_39eb7] = 210, + [BNXT_ULP_CLASS_HID_38013] = 211, + [BNXT_ULP_CLASS_HID_38c75] = 212, + [BNXT_ULP_CLASS_HID_794d1] = 213, + [BNXT_ULP_CLASS_HID_78149] = 214, + [BNXT_ULP_CLASS_HID_78297] = 215, + [BNXT_ULP_CLASS_HID_78ee9] = 216, + [BNXT_ULP_CLASS_HID_0816] = 217, + [BNXT_ULP_CLASS_HID_1852] = 218, + [BNXT_ULP_CLASS_HID_09f4] = 219, + [BNXT_ULP_CLASS_HID_1dd4] = 220, + [BNXT_ULP_CLASS_HID_804f1] = 221, + [BNXT_ULP_CLASS_HID_81251] = 222, + [BNXT_ULP_CLASS_HID_80ee1] = 223, + [BNXT_ULP_CLASS_HID_81c41] = 224, + [BNXT_ULP_CLASS_HID_2013b] = 225, + [BNXT_ULP_CLASS_HID_20e9b] = 226, + [BNXT_ULP_CLASS_HID_603bf] = 227, + [BNXT_ULP_CLASS_HID_6111f] = 228, + [BNXT_ULP_CLASS_HID_0806] = 229, + [BNXT_ULP_CLASS_HID_1842] = 230, + [BNXT_ULP_CLASS_HID_1be6] = 231, + [BNXT_ULP_CLASS_HID_0c80] = 232, + [BNXT_ULP_CLASS_HID_1216] = 233, + [BNXT_ULP_CLASS_HID_02b0] = 234, + [BNXT_ULP_CLASS_HID_0654] = 235, + [BNXT_ULP_CLASS_HID_1690] = 236, + [BNXT_ULP_CLASS_HID_09e4] = 237, + [BNXT_ULP_CLASS_HID_1dc4] = 238, + [BNXT_ULP_CLASS_HID_80efc] = 239, + [BNXT_ULP_CLASS_HID_80332] = 240, + [BNXT_ULP_CLASS_HID_40c78] = 241, + [BNXT_ULP_CLASS_HID_400be] = 242, + [BNXT_ULP_CLASS_HID_c1170] = 243, + [BNXT_ULP_CLASS_HID_c05b6] = 244, + [BNXT_ULP_CLASS_HID_0836] = 245, + [BNXT_ULP_CLASS_HID_1872] = 246, + [BNXT_ULP_CLASS_HID_1bd6] = 247, + [BNXT_ULP_CLASS_HID_0cb0] = 248, + [BNXT_ULP_CLASS_HID_1226] = 249, + [BNXT_ULP_CLASS_HID_0280] = 250, + [BNXT_ULP_CLASS_HID_0664] = 251, + [BNXT_ULP_CLASS_HID_16a0] = 252, + [BNXT_ULP_CLASS_HID_09d4] = 253, + [BNXT_ULP_CLASS_HID_1df4] = 254, + [BNXT_ULP_CLASS_HID_80ecc] = 255, + [BNXT_ULP_CLASS_HID_80302] = 256, + [BNXT_ULP_CLASS_HID_40c48] = 257, + [BNXT_ULP_CLASS_HID_4008e] = 258, + [BNXT_ULP_CLASS_HID_c1140] = 259, + [BNXT_ULP_CLASS_HID_c0586] = 260, + [BNXT_ULP_CLASS_HID_804e1] = 261, + [BNXT_ULP_CLASS_HID_81241] = 262, + [BNXT_ULP_CLASS_HID_80ef1] = 263, + [BNXT_ULP_CLASS_HID_81c51] = 264, + [BNXT_ULP_CLASS_HID_c076d] = 265, + [BNXT_ULP_CLASS_HID_c14cd] = 266, + [BNXT_ULP_CLASS_HID_c117d] = 267, + [BNXT_ULP_CLASS_HID_c1edd] = 268, + [BNXT_ULP_CLASS_HID_a062f] = 269, + [BNXT_ULP_CLASS_HID_a138f] = 270, + [BNXT_ULP_CLASS_HID_a103f] = 271, + [BNXT_ULP_CLASS_HID_a1d9f] = 272, + [BNXT_ULP_CLASS_HID_e08ab] = 273, + [BNXT_ULP_CLASS_HID_e160b] = 274, + [BNXT_ULP_CLASS_HID_e12bb] = 275, + [BNXT_ULP_CLASS_HID_e0079] = 276, + [BNXT_ULP_CLASS_HID_2012b] = 277, + [BNXT_ULP_CLASS_HID_20e8b] = 278, + [BNXT_ULP_CLASS_HID_603af] = 279, + [BNXT_ULP_CLASS_HID_6110f] = 280, + [BNXT_ULP_CLASS_HID_311bb] = 281, + [BNXT_ULP_CLASS_HID_31f1b] = 282, + [BNXT_ULP_CLASS_HID_7143f] = 283, + [BNXT_ULP_CLASS_HID_701fd] = 284, + [BNXT_ULP_CLASS_HID_28963] = 285, + [BNXT_ULP_CLASS_HID_296c3] = 286, + [BNXT_ULP_CLASS_HID_68be7] = 287, + [BNXT_ULP_CLASS_HID_69947] = 288, + [BNXT_ULP_CLASS_HID_399f3] = 289, + [BNXT_ULP_CLASS_HID_387b1] = 290, + [BNXT_ULP_CLASS_HID_79c77] = 291, + [BNXT_ULP_CLASS_HID_78a35] = 292, + [BNXT_ULP_CLASS_HID_804d1] = 293, + [BNXT_ULP_CLASS_HID_81271] = 294, + [BNXT_ULP_CLASS_HID_80ec1] = 295, + [BNXT_ULP_CLASS_HID_81c61] = 296, + [BNXT_ULP_CLASS_HID_c075d] = 297, + [BNXT_ULP_CLASS_HID_c14fd] = 298, + [BNXT_ULP_CLASS_HID_c114d] = 299, + [BNXT_ULP_CLASS_HID_c1eed] = 300, + [BNXT_ULP_CLASS_HID_a061f] = 301, + [BNXT_ULP_CLASS_HID_a13bf] = 302, + [BNXT_ULP_CLASS_HID_a100f] = 303, + [BNXT_ULP_CLASS_HID_a1daf] = 304, + [BNXT_ULP_CLASS_HID_e089b] = 305, + [BNXT_ULP_CLASS_HID_e163b] = 306, + [BNXT_ULP_CLASS_HID_e128b] = 307, + [BNXT_ULP_CLASS_HID_e0049] = 308, + [BNXT_ULP_CLASS_HID_2011b] = 309, + [BNXT_ULP_CLASS_HID_20ebb] = 310, + [BNXT_ULP_CLASS_HID_6039f] = 311, + [BNXT_ULP_CLASS_HID_6113f] = 312, + [BNXT_ULP_CLASS_HID_3118b] = 313, + [BNXT_ULP_CLASS_HID_31f2b] = 314, + [BNXT_ULP_CLASS_HID_7140f] = 315, + [BNXT_ULP_CLASS_HID_701cd] = 316, + [BNXT_ULP_CLASS_HID_28953] = 317, + [BNXT_ULP_CLASS_HID_296f3] = 318, + [BNXT_ULP_CLASS_HID_68bd7] = 319, + [BNXT_ULP_CLASS_HID_69977] = 320, + [BNXT_ULP_CLASS_HID_399c3] = 321, + [BNXT_ULP_CLASS_HID_38781] = 322, + [BNXT_ULP_CLASS_HID_79c47] = 323, + [BNXT_ULP_CLASS_HID_78a05] = 324, + [BNXT_ULP_CLASS_HID_04a4] = 325, + [BNXT_ULP_CLASS_HID_04a8] = 326, + [BNXT_ULP_CLASS_HID_04a5] = 327, + [BNXT_ULP_CLASS_HID_1205] = 328, + [BNXT_ULP_CLASS_HID_04a9] = 329, + [BNXT_ULP_CLASS_HID_1209] = 330, + [BNXT_ULP_CLASS_HID_04b4] = 331, + [BNXT_ULP_CLASS_HID_04b8] = 332, + [BNXT_ULP_CLASS_HID_0484] = 333, + [BNXT_ULP_CLASS_HID_0488] = 334, + [BNXT_ULP_CLASS_HID_04b5] = 335, + [BNXT_ULP_CLASS_HID_1215] = 336, + [BNXT_ULP_CLASS_HID_04b9] = 337, + [BNXT_ULP_CLASS_HID_1219] = 338, + [BNXT_ULP_CLASS_HID_0485] = 339, + [BNXT_ULP_CLASS_HID_1225] = 340, + [BNXT_ULP_CLASS_HID_0489] = 341, + [BNXT_ULP_CLASS_HID_1229] = 342, + [BNXT_ULP_CLASS_HID_0226] = 343, + [BNXT_ULP_CLASS_HID_4045a] = 344, + [BNXT_ULP_CLASS_HID_0daa] = 345, + [BNXT_ULP_CLASS_HID_11b0] = 346, + [BNXT_ULP_CLASS_HID_403f8] = 347, + [BNXT_ULP_CLASS_HID_4161e] = 348, + [BNXT_ULP_CLASS_HID_40439] = 349, + [BNXT_ULP_CLASS_HID_41405] = 350, + [BNXT_ULP_CLASS_HID_51449] = 351, + [BNXT_ULP_CLASS_HID_50b33] = 352, + [BNXT_ULP_CLASS_HID_48c01] = 353, + [BNXT_ULP_CLASS_HID_483eb] = 354, + [BNXT_ULP_CLASS_HID_5833f] = 355, + [BNXT_ULP_CLASS_HID_5937b] = 356, + [BNXT_ULP_CLASS_HID_41875] = 357, + [BNXT_ULP_CLASS_HID_40f5f] = 358, + [BNXT_ULP_CLASS_HID_50f23] = 359, + [BNXT_ULP_CLASS_HID_51f6f] = 360, + [BNXT_ULP_CLASS_HID_4875b] = 361, + [BNXT_ULP_CLASS_HID_49727] = 362, + [BNXT_ULP_CLASS_HID_5976b] = 363, + [BNXT_ULP_CLASS_HID_58655] = 364, + [BNXT_ULP_CLASS_HID_4125f] = 365, + [BNXT_ULP_CLASS_HID_401f9] = 366, + [BNXT_ULP_CLASS_HID_501cd] = 367, + [BNXT_ULP_CLASS_HID_51149] = 368, + [BNXT_ULP_CLASS_HID_49a67] = 369, + [BNXT_ULP_CLASS_HID_489c1] = 370, + [BNXT_ULP_CLASS_HID_58955] = 371, + [BNXT_ULP_CLASS_HID_59951] = 372, + [BNXT_ULP_CLASS_HID_40569] = 373, + [BNXT_ULP_CLASS_HID_41575] = 374, + [BNXT_ULP_CLASS_HID_51579] = 375, + [BNXT_ULP_CLASS_HID_50463] = 376, + [BNXT_ULP_CLASS_HID_48d71] = 377, + [BNXT_ULP_CLASS_HID_49d7d] = 378, + [BNXT_ULP_CLASS_HID_59d41] = 379, + [BNXT_ULP_CLASS_HID_58c6b] = 380, + [BNXT_ULP_CLASS_HID_10255] = 381, + [BNXT_ULP_CLASS_HID_11675] = 382, + [BNXT_ULP_CLASS_HID_14649] = 383, + [BNXT_ULP_CLASS_HID_15a69] = 384, + [BNXT_ULP_CLASS_HID_1205b] = 385, + [BNXT_ULP_CLASS_HID_1347b] = 386, + [BNXT_ULP_CLASS_HID_16bbf] = 387, + [BNXT_ULP_CLASS_HID_1785f] = 388, + [BNXT_ULP_CLASS_HID_11551] = 389, + [BNXT_ULP_CLASS_HID_10897] = 390, + [BNXT_ULP_CLASS_HID_15955] = 391, + [BNXT_ULP_CLASS_HID_14c8b] = 392, + [BNXT_ULP_CLASS_HID_13b47] = 393, + [BNXT_ULP_CLASS_HID_12e85] = 394, + [BNXT_ULP_CLASS_HID_17f5b] = 395, + [BNXT_ULP_CLASS_HID_17299] = 396, + [BNXT_ULP_CLASS_HID_10fe7] = 397, + [BNXT_ULP_CLASS_HID_10325] = 398, + [BNXT_ULP_CLASS_HID_153cb] = 399, + [BNXT_ULP_CLASS_HID_14709] = 400, + [BNXT_ULP_CLASS_HID_12dc5] = 401, + [BNXT_ULP_CLASS_HID_1212b] = 402, + [BNXT_ULP_CLASS_HID_171c9] = 403, + [BNXT_ULP_CLASS_HID_1650f] = 404, + [BNXT_ULP_CLASS_HID_10201] = 405, + [BNXT_ULP_CLASS_HID_116c1] = 406, + [BNXT_ULP_CLASS_HID_14605] = 407, + [BNXT_ULP_CLASS_HID_15a05] = 408, + [BNXT_ULP_CLASS_HID_12007] = 409, + [BNXT_ULP_CLASS_HID_13407] = 410, + [BNXT_ULP_CLASS_HID_1640b] = 411, + [BNXT_ULP_CLASS_HID_1780b] = 412, + [BNXT_ULP_CLASS_HID_404b0] = 413, + [BNXT_ULP_CLASS_HID_4148c] = 414, + [BNXT_ULP_CLASS_HID_514c0] = 415, + [BNXT_ULP_CLASS_HID_50bba] = 416, + [BNXT_ULP_CLASS_HID_48c88] = 417, + [BNXT_ULP_CLASS_HID_48362] = 418, + [BNXT_ULP_CLASS_HID_583b6] = 419, + [BNXT_ULP_CLASS_HID_593f2] = 420, + [BNXT_ULP_CLASS_HID_41f54] = 421, + [BNXT_ULP_CLASS_HID_40fce] = 422, + [BNXT_ULP_CLASS_HID_50e02] = 423, + [BNXT_ULP_CLASS_HID_51e5e] = 424, + [BNXT_ULP_CLASS_HID_487ca] = 425, + [BNXT_ULP_CLASS_HID_49606] = 426, + [BNXT_ULP_CLASS_HID_5965a] = 427, + [BNXT_ULP_CLASS_HID_58514] = 428, + [BNXT_ULP_CLASS_HID_412c2] = 429, + [BNXT_ULP_CLASS_HID_401ac] = 430, + [BNXT_ULP_CLASS_HID_501e0] = 431, + [BNXT_ULP_CLASS_HID_511cc] = 432, + [BNXT_ULP_CLASS_HID_4990a] = 433, + [BNXT_ULP_CLASS_HID_489e4] = 434, + [BNXT_ULP_CLASS_HID_589c8] = 435, + [BNXT_ULP_CLASS_HID_59804] = 436, + [BNXT_ULP_CLASS_HID_40404] = 437, + [BNXT_ULP_CLASS_HID_41440] = 438, + [BNXT_ULP_CLASS_HID_51484] = 439, + [BNXT_ULP_CLASS_HID_50b0e] = 440, + [BNXT_ULP_CLASS_HID_48c4c] = 441, + [BNXT_ULP_CLASS_HID_48306] = 442, + [BNXT_ULP_CLASS_HID_5830a] = 443, + [BNXT_ULP_CLASS_HID_59346] = 444, + [BNXT_ULP_CLASS_HID_102cc] = 445, + [BNXT_ULP_CLASS_HID_116ec] = 446, + [BNXT_ULP_CLASS_HID_146d0] = 447, + [BNXT_ULP_CLASS_HID_15af0] = 448, + [BNXT_ULP_CLASS_HID_120c2] = 449, + [BNXT_ULP_CLASS_HID_134e2] = 450, + [BNXT_ULP_CLASS_HID_16b26] = 451, + [BNXT_ULP_CLASS_HID_178c6] = 452, + [BNXT_ULP_CLASS_HID_115c6] = 453, + [BNXT_ULP_CLASS_HID_10804] = 454, + [BNXT_ULP_CLASS_HID_15822] = 455, + [BNXT_ULP_CLASS_HID_14c60] = 456, + [BNXT_ULP_CLASS_HID_13bd4] = 457, + [BNXT_ULP_CLASS_HID_12e12] = 458, + [BNXT_ULP_CLASS_HID_17e30] = 459, + [BNXT_ULP_CLASS_HID_17276] = 460, + [BNXT_ULP_CLASS_HID_11f1a] = 461, + [BNXT_ULP_CLASS_HID_11358] = 462, + [BNXT_ULP_CLASS_HID_14398] = 463, + [BNXT_ULP_CLASS_HID_157b8] = 464, + [BNXT_ULP_CLASS_HID_13d68] = 465, + [BNXT_ULP_CLASS_HID_131aa] = 466, + [BNXT_ULP_CLASS_HID_16192] = 467, + [BNXT_ULP_CLASS_HID_175b2] = 468, + [BNXT_ULP_CLASS_HID_112b2] = 469, + [BNXT_ULP_CLASS_HID_106f0] = 470, + [BNXT_ULP_CLASS_HID_15692] = 471, + [BNXT_ULP_CLASS_HID_14ad0] = 472, + [BNXT_ULP_CLASS_HID_13080] = 473, + [BNXT_ULP_CLASS_HID_124c2] = 474, + [BNXT_ULP_CLASS_HID_174e0] = 475, + [BNXT_ULP_CLASS_HID_16f22] = 476, + [BNXT_ULP_CLASS_HID_4025b] = 477, + [BNXT_ULP_CLASS_HID_41267] = 478, + [BNXT_ULP_CLASS_HID_5122b] = 479, + [BNXT_ULP_CLASS_HID_50d51] = 480, + [BNXT_ULP_CLASS_HID_48a63] = 481, + [BNXT_ULP_CLASS_HID_48589] = 482, + [BNXT_ULP_CLASS_HID_5855d] = 483, + [BNXT_ULP_CLASS_HID_59519] = 484, + [BNXT_ULP_CLASS_HID_41e17] = 485, + [BNXT_ULP_CLASS_HID_4093d] = 486, + [BNXT_ULP_CLASS_HID_50941] = 487, + [BNXT_ULP_CLASS_HID_5190d] = 488, + [BNXT_ULP_CLASS_HID_48139] = 489, + [BNXT_ULP_CLASS_HID_49145] = 490, + [BNXT_ULP_CLASS_HID_59109] = 491, + [BNXT_ULP_CLASS_HID_58037] = 492, + [BNXT_ULP_CLASS_HID_4143d] = 493, + [BNXT_ULP_CLASS_HID_4079b] = 494, + [BNXT_ULP_CLASS_HID_507af] = 495, + [BNXT_ULP_CLASS_HID_5172b] = 496, + [BNXT_ULP_CLASS_HID_49c05] = 497, + [BNXT_ULP_CLASS_HID_48fa3] = 498, + [BNXT_ULP_CLASS_HID_58f37] = 499, + [BNXT_ULP_CLASS_HID_59f33] = 500, + [BNXT_ULP_CLASS_HID_4030b] = 501, + [BNXT_ULP_CLASS_HID_41317] = 502, + [BNXT_ULP_CLASS_HID_5131b] = 503, + [BNXT_ULP_CLASS_HID_50201] = 504, + [BNXT_ULP_CLASS_HID_48b13] = 505, + [BNXT_ULP_CLASS_HID_49b1f] = 506, + [BNXT_ULP_CLASS_HID_59b23] = 507, + [BNXT_ULP_CLASS_HID_58a09] = 508, + [BNXT_ULP_CLASS_HID_419bf] = 509, + [BNXT_ULP_CLASS_HID_40925] = 510, + [BNXT_ULP_CLASS_HID_508e9] = 511, + [BNXT_ULP_CLASS_HID_518b5] = 512, + [BNXT_ULP_CLASS_HID_48121] = 513, + [BNXT_ULP_CLASS_HID_490ed] = 514, + [BNXT_ULP_CLASS_HID_590b1] = 515, + [BNXT_ULP_CLASS_HID_583ff] = 516, + [BNXT_ULP_CLASS_HID_41475] = 517, + [BNXT_ULP_CLASS_HID_40473] = 518, + [BNXT_ULP_CLASS_HID_50427] = 519, + [BNXT_ULP_CLASS_HID_51763] = 520, + [BNXT_ULP_CLASS_HID_49c3d] = 521, + [BNXT_ULP_CLASS_HID_48c3b] = 522, + [BNXT_ULP_CLASS_HID_58f6f] = 523, + [BNXT_ULP_CLASS_HID_59f2b] = 524, + [BNXT_ULP_CLASS_HID_40333] = 525, + [BNXT_ULP_CLASS_HID_412bf] = 526, + [BNXT_ULP_CLASS_HID_512a3] = 527, + [BNXT_ULP_CLASS_HID_50229] = 528, + [BNXT_ULP_CLASS_HID_48abb] = 529, + [BNXT_ULP_CLASS_HID_49aa7] = 530, + [BNXT_ULP_CLASS_HID_59a2b] = 531, + [BNXT_ULP_CLASS_HID_595b1] = 532, + [BNXT_ULP_CLASS_HID_41e2f] = 533, + [BNXT_ULP_CLASS_HID_40e35] = 534, + [BNXT_ULP_CLASS_HID_50939] = 535, + [BNXT_ULP_CLASS_HID_51925] = 536, + [BNXT_ULP_CLASS_HID_48631] = 537, + [BNXT_ULP_CLASS_HID_4913d] = 538, + [BNXT_ULP_CLASS_HID_59121] = 539, + [BNXT_ULP_CLASS_HID_5812f] = 540, + [BNXT_ULP_CLASS_HID_41429] = 541, + [BNXT_ULP_CLASS_HID_40747] = 542, + [BNXT_ULP_CLASS_HID_5070b] = 543, + [BNXT_ULP_CLASS_HID_51727] = 544, + [BNXT_ULP_CLASS_HID_49fe1] = 545, + [BNXT_ULP_CLASS_HID_48f0f] = 546, + [BNXT_ULP_CLASS_HID_58f23] = 547, + [BNXT_ULP_CLASS_HID_59eef] = 548, + [BNXT_ULP_CLASS_HID_40347] = 549, + [BNXT_ULP_CLASS_HID_41303] = 550, + [BNXT_ULP_CLASS_HID_51247] = 551, + [BNXT_ULP_CLASS_HID_5026d] = 552, + [BNXT_ULP_CLASS_HID_48b0f] = 553, + [BNXT_ULP_CLASS_HID_49a4b] = 554, + [BNXT_ULP_CLASS_HID_59a0f] = 555, + [BNXT_ULP_CLASS_HID_58a05] = 556, + [BNXT_ULP_CLASS_HID_41983] = 557, + [BNXT_ULP_CLASS_HID_40929] = 558, + [BNXT_ULP_CLASS_HID_5092d] = 559, + [BNXT_ULP_CLASS_HID_518a9] = 560, + [BNXT_ULP_CLASS_HID_48125] = 561, + [BNXT_ULP_CLASS_HID_49121] = 562, + [BNXT_ULP_CLASS_HID_59085] = 563, + [BNXT_ULP_CLASS_HID_58023] = 564, + [BNXT_ULP_CLASS_HID_41509] = 565, + [BNXT_ULP_CLASS_HID_40407] = 566, + [BNXT_ULP_CLASS_HID_5040b] = 567, + [BNXT_ULP_CLASS_HID_51407] = 568, + [BNXT_ULP_CLASS_HID_49d21] = 569, + [BNXT_ULP_CLASS_HID_48c0f] = 570, + [BNXT_ULP_CLASS_HID_58c03] = 571, + [BNXT_ULP_CLASS_HID_59f0f] = 572, + [BNXT_ULP_CLASS_HID_402ef] = 573, + [BNXT_ULP_CLASS_HID_412ab] = 574, + [BNXT_ULP_CLASS_HID_5126f] = 575, + [BNXT_ULP_CLASS_HID_50de5] = 576, + [BNXT_ULP_CLASS_HID_48aa7] = 577, + [BNXT_ULP_CLASS_HID_485ed] = 578, + [BNXT_ULP_CLASS_HID_585e1] = 579, + [BNXT_ULP_CLASS_HID_595ad] = 580, + [BNXT_ULP_CLASS_HID_41e6b] = 581, + [BNXT_ULP_CLASS_HID_40961] = 582, + [BNXT_ULP_CLASS_HID_50925] = 583, + [BNXT_ULP_CLASS_HID_51961] = 584, + [BNXT_ULP_CLASS_HID_4816d] = 585, + [BNXT_ULP_CLASS_HID_49129] = 586, + [BNXT_ULP_CLASS_HID_5916d] = 587, + [BNXT_ULP_CLASS_HID_5806b] = 588, + [BNXT_ULP_CLASS_HID_414a1] = 589, + [BNXT_ULP_CLASS_HID_4042f] = 590, + [BNXT_ULP_CLASS_HID_507a3] = 591, + [BNXT_ULP_CLASS_HID_517af] = 592, + [BNXT_ULP_CLASS_HID_49c29] = 593, + [BNXT_ULP_CLASS_HID_48fa7] = 594, + [BNXT_ULP_CLASS_HID_58fab] = 595, + [BNXT_ULP_CLASS_HID_59f27] = 596, + [BNXT_ULP_CLASS_HID_4032f] = 597, + [BNXT_ULP_CLASS_HID_4132b] = 598, + [BNXT_ULP_CLASS_HID_5132f] = 599, + [BNXT_ULP_CLASS_HID_50225] = 600, + [BNXT_ULP_CLASS_HID_48b27] = 601, + [BNXT_ULP_CLASS_HID_49b23] = 602, + [BNXT_ULP_CLASS_HID_59b27] = 603, + [BNXT_ULP_CLASS_HID_58a2d] = 604, + [BNXT_ULP_CLASS_HID_10437] = 605, + [BNXT_ULP_CLASS_HID_11017] = 606, + [BNXT_ULP_CLASS_HID_1402b] = 607, + [BNXT_ULP_CLASS_HID_15c0b] = 608, + [BNXT_ULP_CLASS_HID_12639] = 609, + [BNXT_ULP_CLASS_HID_13219] = 610, + [BNXT_ULP_CLASS_HID_16ddd] = 611, + [BNXT_ULP_CLASS_HID_17e3d] = 612, + [BNXT_ULP_CLASS_HID_11333] = 613, + [BNXT_ULP_CLASS_HID_10ef5] = 614, + [BNXT_ULP_CLASS_HID_15f37] = 615, + [BNXT_ULP_CLASS_HID_14ae9] = 616, + [BNXT_ULP_CLASS_HID_13d25] = 617, + [BNXT_ULP_CLASS_HID_128e7] = 618, + [BNXT_ULP_CLASS_HID_17939] = 619, + [BNXT_ULP_CLASS_HID_174fb] = 620, + [BNXT_ULP_CLASS_HID_10985] = 621, + [BNXT_ULP_CLASS_HID_10547] = 622, + [BNXT_ULP_CLASS_HID_155a9] = 623, + [BNXT_ULP_CLASS_HID_1416b] = 624, + [BNXT_ULP_CLASS_HID_12ba7] = 625, + [BNXT_ULP_CLASS_HID_12749] = 626, + [BNXT_ULP_CLASS_HID_177ab] = 627, + [BNXT_ULP_CLASS_HID_1636d] = 628, + [BNXT_ULP_CLASS_HID_10463] = 629, + [BNXT_ULP_CLASS_HID_110a3] = 630, + [BNXT_ULP_CLASS_HID_14067] = 631, + [BNXT_ULP_CLASS_HID_15c67] = 632, + [BNXT_ULP_CLASS_HID_12665] = 633, + [BNXT_ULP_CLASS_HID_13265] = 634, + [BNXT_ULP_CLASS_HID_16269] = 635, + [BNXT_ULP_CLASS_HID_17e69] = 636, + [BNXT_ULP_CLASS_HID_1133d] = 637, + [BNXT_ULP_CLASS_HID_10eff] = 638, + [BNXT_ULP_CLASS_HID_15ed9] = 639, + [BNXT_ULP_CLASS_HID_14a9b] = 640, + [BNXT_ULP_CLASS_HID_13d2f] = 641, + [BNXT_ULP_CLASS_HID_128e9] = 642, + [BNXT_ULP_CLASS_HID_178cb] = 643, + [BNXT_ULP_CLASS_HID_1748d] = 644, + [BNXT_ULP_CLASS_HID_109fb] = 645, + [BNXT_ULP_CLASS_HID_105bd] = 646, + [BNXT_ULP_CLASS_HID_155bf] = 647, + [BNXT_ULP_CLASS_HID_14179] = 648, + [BNXT_ULP_CLASS_HID_12bed] = 649, + [BNXT_ULP_CLASS_HID_127af] = 650, + [BNXT_ULP_CLASS_HID_177a9] = 651, + [BNXT_ULP_CLASS_HID_1636b] = 652, + [BNXT_ULP_CLASS_HID_1046d] = 653, + [BNXT_ULP_CLASS_HID_1104d] = 654, + [BNXT_ULP_CLASS_HID_14009] = 655, + [BNXT_ULP_CLASS_HID_15c69] = 656, + [BNXT_ULP_CLASS_HID_1260f] = 657, + [BNXT_ULP_CLASS_HID_1326f] = 658, + [BNXT_ULP_CLASS_HID_1622b] = 659, + [BNXT_ULP_CLASS_HID_17e0b] = 660, + [BNXT_ULP_CLASS_HID_11369] = 661, + [BNXT_ULP_CLASS_HID_10f2b] = 662, + [BNXT_ULP_CLASS_HID_15f6d] = 663, + [BNXT_ULP_CLASS_HID_14b2f] = 664, + [BNXT_ULP_CLASS_HID_13d6b] = 665, + [BNXT_ULP_CLASS_HID_1292d] = 666, + [BNXT_ULP_CLASS_HID_1792f] = 667, + [BNXT_ULP_CLASS_HID_174e9] = 668, + [BNXT_ULP_CLASS_HID_119e1] = 669, + [BNXT_ULP_CLASS_HID_115a3] = 670, + [BNXT_ULP_CLASS_HID_14563] = 671, + [BNXT_ULP_CLASS_HID_15143] = 672, + [BNXT_ULP_CLASS_HID_13b93] = 673, + [BNXT_ULP_CLASS_HID_13751] = 674, + [BNXT_ULP_CLASS_HID_16769] = 675, + [BNXT_ULP_CLASS_HID_17349] = 676, + [BNXT_ULP_CLASS_HID_114ab] = 677, + [BNXT_ULP_CLASS_HID_10061] = 678, + [BNXT_ULP_CLASS_HID_15063] = 679, + [BNXT_ULP_CLASS_HID_14c21] = 680, + [BNXT_ULP_CLASS_HID_13671] = 681, + [BNXT_ULP_CLASS_HID_12233] = 682, + [BNXT_ULP_CLASS_HID_17271] = 683, + [BNXT_ULP_CLASS_HID_16e33] = 684, + [BNXT_ULP_CLASS_HID_102c1] = 685, + [BNXT_ULP_CLASS_HID_11f21] = 686, + [BNXT_ULP_CLASS_HID_14ee1] = 687, + [BNXT_ULP_CLASS_HID_15ac1] = 688, + [BNXT_ULP_CLASS_HID_12cc3] = 689, + [BNXT_ULP_CLASS_HID_13923] = 690, + [BNXT_ULP_CLASS_HID_168e3] = 691, + [BNXT_ULP_CLASS_HID_164a9] = 692, + [BNXT_ULP_CLASS_HID_11e29] = 693, + [BNXT_ULP_CLASS_HID_115eb] = 694, + [BNXT_ULP_CLASS_HID_145a3] = 695, + [BNXT_ULP_CLASS_HID_151a3] = 696, + [BNXT_ULP_CLASS_HID_1382b] = 697, + [BNXT_ULP_CLASS_HID_137e1] = 698, + [BNXT_ULP_CLASS_HID_167a1] = 699, + [BNXT_ULP_CLASS_HID_173a1] = 700, + [BNXT_ULP_CLASS_HID_11449] = 701, + [BNXT_ULP_CLASS_HID_1000b] = 702, + [BNXT_ULP_CLASS_HID_15069] = 703, + [BNXT_ULP_CLASS_HID_14c2b] = 704, + [BNXT_ULP_CLASS_HID_1367b] = 705, + [BNXT_ULP_CLASS_HID_12239] = 706, + [BNXT_ULP_CLASS_HID_1721b] = 707, + [BNXT_ULP_CLASS_HID_169d9] = 708, + [BNXT_ULP_CLASS_HID_1033b] = 709, + [BNXT_ULP_CLASS_HID_11f3b] = 710, + [BNXT_ULP_CLASS_HID_14f2b] = 711, + [BNXT_ULP_CLASS_HID_15b2b] = 712, + [BNXT_ULP_CLASS_HID_12d39] = 713, + [BNXT_ULP_CLASS_HID_13939] = 714, + [BNXT_ULP_CLASS_HID_168f9] = 715, + [BNXT_ULP_CLASS_HID_164bb] = 716, + [BNXT_ULP_CLASS_HID_119cb] = 717, + [BNXT_ULP_CLASS_HID_11589] = 718, + [BNXT_ULP_CLASS_HID_14549] = 719, + [BNXT_ULP_CLASS_HID_151a9] = 720, + [BNXT_ULP_CLASS_HID_13bc9] = 721, + [BNXT_ULP_CLASS_HID_1378b] = 722, + [BNXT_ULP_CLASS_HID_1674b] = 723, + [BNXT_ULP_CLASS_HID_173ab] = 724, + [BNXT_ULP_CLASS_HID_114a9] = 725, + [BNXT_ULP_CLASS_HID_1006b] = 726, + [BNXT_ULP_CLASS_HID_150a9] = 727, + [BNXT_ULP_CLASS_HID_14c6b] = 728, + [BNXT_ULP_CLASS_HID_136ab] = 729, + [BNXT_ULP_CLASS_HID_12269] = 730, + [BNXT_ULP_CLASS_HID_172ab] = 731, + [BNXT_ULP_CLASS_HID_16e69] = 732, + [BNXT_ULP_CLASS_HID_402d2] = 733, + [BNXT_ULP_CLASS_HID_412ee] = 734, + [BNXT_ULP_CLASS_HID_512a2] = 735, + [BNXT_ULP_CLASS_HID_50dd8] = 736, + [BNXT_ULP_CLASS_HID_48aea] = 737, + [BNXT_ULP_CLASS_HID_48500] = 738, + [BNXT_ULP_CLASS_HID_585d4] = 739, + [BNXT_ULP_CLASS_HID_59590] = 740, + [BNXT_ULP_CLASS_HID_41936] = 741, + [BNXT_ULP_CLASS_HID_409ac] = 742, + [BNXT_ULP_CLASS_HID_50860] = 743, + [BNXT_ULP_CLASS_HID_5183c] = 744, + [BNXT_ULP_CLASS_HID_481a8] = 745, + [BNXT_ULP_CLASS_HID_49064] = 746, + [BNXT_ULP_CLASS_HID_59038] = 747, + [BNXT_ULP_CLASS_HID_58376] = 748, + [BNXT_ULP_CLASS_HID_414a0] = 749, + [BNXT_ULP_CLASS_HID_407ce] = 750, + [BNXT_ULP_CLASS_HID_50782] = 751, + [BNXT_ULP_CLASS_HID_517ae] = 752, + [BNXT_ULP_CLASS_HID_49f68] = 753, + [BNXT_ULP_CLASS_HID_48f86] = 754, + [BNXT_ULP_CLASS_HID_58faa] = 755, + [BNXT_ULP_CLASS_HID_59e66] = 756, + [BNXT_ULP_CLASS_HID_40266] = 757, + [BNXT_ULP_CLASS_HID_41222] = 758, + [BNXT_ULP_CLASS_HID_512e6] = 759, + [BNXT_ULP_CLASS_HID_50d6c] = 760, + [BNXT_ULP_CLASS_HID_48a2e] = 761, + [BNXT_ULP_CLASS_HID_48564] = 762, + [BNXT_ULP_CLASS_HID_58568] = 763, + [BNXT_ULP_CLASS_HID_59524] = 764, + [BNXT_ULP_CLASS_HID_419d8] = 765, + [BNXT_ULP_CLASS_HID_4087e] = 766, + [BNXT_ULP_CLASS_HID_5080a] = 767, + [BNXT_ULP_CLASS_HID_518ce] = 768, + [BNXT_ULP_CLASS_HID_4807a] = 769, + [BNXT_ULP_CLASS_HID_4900e] = 770, + [BNXT_ULP_CLASS_HID_590ca] = 771, + [BNXT_ULP_CLASS_HID_58378] = 772, + [BNXT_ULP_CLASS_HID_414be] = 773, + [BNXT_ULP_CLASS_HID_4073c] = 774, + [BNXT_ULP_CLASS_HID_507e8] = 775, + [BNXT_ULP_CLASS_HID_517ac] = 776, + [BNXT_ULP_CLASS_HID_49f7e] = 777, + [BNXT_ULP_CLASS_HID_48fec] = 778, + [BNXT_ULP_CLASS_HID_58fa8] = 779, + [BNXT_ULP_CLASS_HID_59e7c] = 780, + [BNXT_ULP_CLASS_HID_40208] = 781, + [BNXT_ULP_CLASS_HID_412cc] = 782, + [BNXT_ULP_CLASS_HID_51288] = 783, + [BNXT_ULP_CLASS_HID_50d2e] = 784, + [BNXT_ULP_CLASS_HID_48ac8] = 785, + [BNXT_ULP_CLASS_HID_4856e] = 786, + [BNXT_ULP_CLASS_HID_5852a] = 787, + [BNXT_ULP_CLASS_HID_595ce] = 788, + [BNXT_ULP_CLASS_HID_4196c] = 789, + [BNXT_ULP_CLASS_HID_409aa] = 790, + [BNXT_ULP_CLASS_HID_5086e] = 791, + [BNXT_ULP_CLASS_HID_5182a] = 792, + [BNXT_ULP_CLASS_HID_481ae] = 793, + [BNXT_ULP_CLASS_HID_4906a] = 794, + [BNXT_ULP_CLASS_HID_5902e] = 795, + [BNXT_ULP_CLASS_HID_580ac] = 796, + [BNXT_ULP_CLASS_HID_40766] = 797, + [BNXT_ULP_CLASS_HID_41726] = 798, + [BNXT_ULP_CLASS_HID_517f6] = 799, + [BNXT_ULP_CLASS_HID_5066c] = 800, + [BNXT_ULP_CLASS_HID_48f3e] = 801, + [BNXT_ULP_CLASS_HID_49ffe] = 802, + [BNXT_ULP_CLASS_HID_59f8e] = 803, + [BNXT_ULP_CLASS_HID_58e24] = 804, + [BNXT_ULP_CLASS_HID_4126e] = 805, + [BNXT_ULP_CLASS_HID_402e4] = 806, + [BNXT_ULP_CLASS_HID_502b4] = 807, + [BNXT_ULP_CLASS_HID_51d74] = 808, + [BNXT_ULP_CLASS_HID_49a26] = 809, + [BNXT_ULP_CLASS_HID_48abc] = 810, + [BNXT_ULP_CLASS_HID_5956c] = 811, + [BNXT_ULP_CLASS_HID_585ee] = 812, + [BNXT_ULP_CLASS_HID_409e4] = 813, + [BNXT_ULP_CLASS_HID_419a4] = 814, + [BNXT_ULP_CLASS_HID_51844] = 815, + [BNXT_ULP_CLASS_HID_508e6] = 816, + [BNXT_ULP_CLASS_HID_4918c] = 817, + [BNXT_ULP_CLASS_HID_4802e] = 818, + [BNXT_ULP_CLASS_HID_580ee] = 819, + [BNXT_ULP_CLASS_HID_590ae] = 820, + [BNXT_ULP_CLASS_HID_404ae] = 821, + [BNXT_ULP_CLASS_HID_41766] = 822, + [BNXT_ULP_CLASS_HID_5172e] = 823, + [BNXT_ULP_CLASS_HID_507a4] = 824, + [BNXT_ULP_CLASS_HID_48f66] = 825, + [BNXT_ULP_CLASS_HID_49f2e] = 826, + [BNXT_ULP_CLASS_HID_59fe6] = 827, + [BNXT_ULP_CLASS_HID_58e6c] = 828, + [BNXT_ULP_CLASS_HID_4126c] = 829, + [BNXT_ULP_CLASS_HID_4028e] = 830, + [BNXT_ULP_CLASS_HID_50d5e] = 831, + [BNXT_ULP_CLASS_HID_51d1e] = 832, + [BNXT_ULP_CLASS_HID_49a2c] = 833, + [BNXT_ULP_CLASS_HID_4954e] = 834, + [BNXT_ULP_CLASS_HID_5951e] = 835, + [BNXT_ULP_CLASS_HID_5858c] = 836, + [BNXT_ULP_CLASS_HID_409fe] = 837, + [BNXT_ULP_CLASS_HID_419ee] = 838, + [BNXT_ULP_CLASS_HID_519ae] = 839, + [BNXT_ULP_CLASS_HID_508fc] = 840, + [BNXT_ULP_CLASS_HID_491ee] = 841, + [BNXT_ULP_CLASS_HID_4802c] = 842, + [BNXT_ULP_CLASS_HID_580fc] = 843, + [BNXT_ULP_CLASS_HID_590bc] = 844, + [BNXT_ULP_CLASS_HID_4074c] = 845, + [BNXT_ULP_CLASS_HID_4170c] = 846, + [BNXT_ULP_CLASS_HID_5172c] = 847, + [BNXT_ULP_CLASS_HID_5064e] = 848, + [BNXT_ULP_CLASS_HID_48f0c] = 849, + [BNXT_ULP_CLASS_HID_49fcc] = 850, + [BNXT_ULP_CLASS_HID_59fec] = 851, + [BNXT_ULP_CLASS_HID_58e0e] = 852, + [BNXT_ULP_CLASS_HID_413ac] = 853, + [BNXT_ULP_CLASS_HID_402ee] = 854, + [BNXT_ULP_CLASS_HID_502ae] = 855, + [BNXT_ULP_CLASS_HID_512ae] = 856, + [BNXT_ULP_CLASS_HID_49a6c] = 857, + [BNXT_ULP_CLASS_HID_48aae] = 858, + [BNXT_ULP_CLASS_HID_58aae] = 859, + [BNXT_ULP_CLASS_HID_585ec] = 860, + [BNXT_ULP_CLASS_HID_104ae] = 861, + [BNXT_ULP_CLASS_HID_1108e] = 862, + [BNXT_ULP_CLASS_HID_140b2] = 863, + [BNXT_ULP_CLASS_HID_15c92] = 864, + [BNXT_ULP_CLASS_HID_126a0] = 865, + [BNXT_ULP_CLASS_HID_13280] = 866, + [BNXT_ULP_CLASS_HID_16d44] = 867, + [BNXT_ULP_CLASS_HID_17ea4] = 868, + [BNXT_ULP_CLASS_HID_113a4] = 869, + [BNXT_ULP_CLASS_HID_10e66] = 870, + [BNXT_ULP_CLASS_HID_15e40] = 871, + [BNXT_ULP_CLASS_HID_14a02] = 872, + [BNXT_ULP_CLASS_HID_13db6] = 873, + [BNXT_ULP_CLASS_HID_12870] = 874, + [BNXT_ULP_CLASS_HID_17852] = 875, + [BNXT_ULP_CLASS_HID_17414] = 876, + [BNXT_ULP_CLASS_HID_11978] = 877, + [BNXT_ULP_CLASS_HID_1153a] = 878, + [BNXT_ULP_CLASS_HID_145fa] = 879, + [BNXT_ULP_CLASS_HID_151da] = 880, + [BNXT_ULP_CLASS_HID_13b0a] = 881, + [BNXT_ULP_CLASS_HID_137c8] = 882, + [BNXT_ULP_CLASS_HID_167f0] = 883, + [BNXT_ULP_CLASS_HID_173d0] = 884, + [BNXT_ULP_CLASS_HID_114d0] = 885, + [BNXT_ULP_CLASS_HID_10092] = 886, + [BNXT_ULP_CLASS_HID_150f0] = 887, + [BNXT_ULP_CLASS_HID_14cb2] = 888, + [BNXT_ULP_CLASS_HID_136e2] = 889, + [BNXT_ULP_CLASS_HID_122a0] = 890, + [BNXT_ULP_CLASS_HID_17282] = 891, + [BNXT_ULP_CLASS_HID_16940] = 892, + [BNXT_ULP_CLASS_HID_11b90] = 893, + [BNXT_ULP_CLASS_HID_11654] = 894, + [BNXT_ULP_CLASS_HID_14618] = 895, + [BNXT_ULP_CLASS_HID_15278] = 896, + [BNXT_ULP_CLASS_HID_12404] = 897, + [BNXT_ULP_CLASS_HID_13064] = 898, + [BNXT_ULP_CLASS_HID_16028] = 899, + [BNXT_ULP_CLASS_HID_17c08] = 900, + [BNXT_ULP_CLASS_HID_11100] = 901, + [BNXT_ULP_CLASS_HID_10dc4] = 902, + [BNXT_ULP_CLASS_HID_15d24] = 903, + [BNXT_ULP_CLASS_HID_149d0] = 904, + [BNXT_ULP_CLASS_HID_13314] = 905, + [BNXT_ULP_CLASS_HID_12fd4] = 906, + [BNXT_ULP_CLASS_HID_17f20] = 907, + [BNXT_ULP_CLASS_HID_16be0] = 908, + [BNXT_ULP_CLASS_HID_11cd8] = 909, + [BNXT_ULP_CLASS_HID_10880] = 910, + [BNXT_ULP_CLASS_HID_158e0] = 911, + [BNXT_ULP_CLASS_HID_154a0] = 912, + [BNXT_ULP_CLASS_HID_13ed0] = 913, + [BNXT_ULP_CLASS_HID_12a90] = 914, + [BNXT_ULP_CLASS_HID_16550] = 915, + [BNXT_ULP_CLASS_HID_176b0] = 916, + [BNXT_ULP_CLASS_HID_10bb0] = 917, + [BNXT_ULP_CLASS_HID_10670] = 918, + [BNXT_ULP_CLASS_HID_15650] = 919, + [BNXT_ULP_CLASS_HID_14210] = 920, + [BNXT_ULP_CLASS_HID_13440] = 921, + [BNXT_ULP_CLASS_HID_12000] = 922, + [BNXT_ULP_CLASS_HID_17060] = 923, + [BNXT_ULP_CLASS_HID_16c20] = 924, + [BNXT_ULP_CLASS_HID_11511] = 925, + [BNXT_ULP_CLASS_HID_101d3] = 926, + [BNXT_ULP_CLASS_HID_15135] = 927, + [BNXT_ULP_CLASS_HID_14df7] = 928, + [BNXT_ULP_CLASS_HID_13723] = 929, + [BNXT_ULP_CLASS_HID_123e5] = 930, + [BNXT_ULP_CLASS_HID_173c7] = 931, + [BNXT_ULP_CLASS_HID_16f89] = 932, + [BNXT_ULP_CLASS_HID_10081] = 933, + [BNXT_ULP_CLASS_HID_11ce1] = 934, + [BNXT_ULP_CLASS_HID_14ca5] = 935, + [BNXT_ULP_CLASS_HID_15885] = 936, + [BNXT_ULP_CLASS_HID_12293] = 937, + [BNXT_ULP_CLASS_HID_13ef3] = 938, + [BNXT_ULP_CLASS_HID_16eb7] = 939, + [BNXT_ULP_CLASS_HID_16561] = 940, + [BNXT_ULP_CLASS_HID_10e59] = 941, + [BNXT_ULP_CLASS_HID_11bb9] = 942, + [BNXT_ULP_CLASS_HID_14a61] = 943, + [BNXT_ULP_CLASS_HID_14623] = 944, + [BNXT_ULP_CLASS_HID_1286b] = 945, + [BNXT_ULP_CLASS_HID_12411] = 946, + [BNXT_ULP_CLASS_HID_17473] = 947, + [BNXT_ULP_CLASS_HID_16031] = 948, + [BNXT_ULP_CLASS_HID_10531] = 949, + [BNXT_ULP_CLASS_HID_11111] = 950, + [BNXT_ULP_CLASS_HID_141d1] = 951, + [BNXT_ULP_CLASS_HID_15d31] = 952, + [BNXT_ULP_CLASS_HID_127c3] = 953, + [BNXT_ULP_CLASS_HID_13323] = 954, + [BNXT_ULP_CLASS_HID_163e3] = 955, + [BNXT_ULP_CLASS_HID_17fc3] = 956, + [BNXT_ULP_CLASS_HID_108f5] = 957, + [BNXT_ULP_CLASS_HID_104b9] = 958, + [BNXT_ULP_CLASS_HID_15499] = 959, + [BNXT_ULP_CLASS_HID_1435d] = 960, + [BNXT_ULP_CLASS_HID_12a89] = 961, + [BNXT_ULP_CLASS_HID_12149] = 962, + [BNXT_ULP_CLASS_HID_176ad] = 963, + [BNXT_ULP_CLASS_HID_16d6d] = 964, + [BNXT_ULP_CLASS_HID_10665] = 965, + [BNXT_ULP_CLASS_HID_11245] = 966, + [BNXT_ULP_CLASS_HID_14271] = 967, + [BNXT_ULP_CLASS_HID_15e51] = 968, + [BNXT_ULP_CLASS_HID_12061] = 969, + [BNXT_ULP_CLASS_HID_13c41] = 970, + [BNXT_ULP_CLASS_HID_16c05] = 971, + [BNXT_ULP_CLASS_HID_17865] = 972, + [BNXT_ULP_CLASS_HID_10d21] = 973, + [BNXT_ULP_CLASS_HID_11901] = 974, + [BNXT_ULP_CLASS_HID_149c1] = 975, + [BNXT_ULP_CLASS_HID_14589] = 976, + [BNXT_ULP_CLASS_HID_12f31] = 977, + [BNXT_ULP_CLASS_HID_13b11] = 978, + [BNXT_ULP_CLASS_HID_16bd9] = 979, + [BNXT_ULP_CLASS_HID_16799] = 980, + [BNXT_ULP_CLASS_HID_11831] = 981, + [BNXT_ULP_CLASS_HID_114f1] = 982, + [BNXT_ULP_CLASS_HID_144b1] = 983, + [BNXT_ULP_CLASS_HID_15091] = 984, + [BNXT_ULP_CLASS_HID_13ac1] = 985, + [BNXT_ULP_CLASS_HID_13681] = 986, + [BNXT_ULP_CLASS_HID_166b1] = 987, + [BNXT_ULP_CLASS_HID_17291] = 988, + [BNXT_ULP_CLASS_HID_4007d] = 989, + [BNXT_ULP_CLASS_HID_41041] = 990, + [BNXT_ULP_CLASS_HID_5100d] = 991, + [BNXT_ULP_CLASS_HID_50f77] = 992, + [BNXT_ULP_CLASS_HID_48845] = 993, + [BNXT_ULP_CLASS_HID_487af] = 994, + [BNXT_ULP_CLASS_HID_5877b] = 995, + [BNXT_ULP_CLASS_HID_5973f] = 996, + [BNXT_ULP_CLASS_HID_41c31] = 997, + [BNXT_ULP_CLASS_HID_40b1b] = 998, + [BNXT_ULP_CLASS_HID_50b67] = 999, + [BNXT_ULP_CLASS_HID_51b2b] = 1000, + [BNXT_ULP_CLASS_HID_4831f] = 1001, + [BNXT_ULP_CLASS_HID_49363] = 1002, + [BNXT_ULP_CLASS_HID_5932f] = 1003, + [BNXT_ULP_CLASS_HID_58211] = 1004, + [BNXT_ULP_CLASS_HID_4161b] = 1005, + [BNXT_ULP_CLASS_HID_405bd] = 1006, + [BNXT_ULP_CLASS_HID_50589] = 1007, + [BNXT_ULP_CLASS_HID_5150d] = 1008, + [BNXT_ULP_CLASS_HID_49e23] = 1009, + [BNXT_ULP_CLASS_HID_48d85] = 1010, + [BNXT_ULP_CLASS_HID_58d11] = 1011, + [BNXT_ULP_CLASS_HID_59d15] = 1012, + [BNXT_ULP_CLASS_HID_4012d] = 1013, + [BNXT_ULP_CLASS_HID_41131] = 1014, + [BNXT_ULP_CLASS_HID_5113d] = 1015, + [BNXT_ULP_CLASS_HID_50027] = 1016, + [BNXT_ULP_CLASS_HID_48935] = 1017, + [BNXT_ULP_CLASS_HID_49939] = 1018, + [BNXT_ULP_CLASS_HID_59905] = 1019, + [BNXT_ULP_CLASS_HID_5882f] = 1020, + [BNXT_ULP_CLASS_HID_41b99] = 1021, + [BNXT_ULP_CLASS_HID_40b03] = 1022, + [BNXT_ULP_CLASS_HID_50acf] = 1023, + [BNXT_ULP_CLASS_HID_51a93] = 1024, + [BNXT_ULP_CLASS_HID_48307] = 1025, + [BNXT_ULP_CLASS_HID_492cb] = 1026, + [BNXT_ULP_CLASS_HID_59297] = 1027, + [BNXT_ULP_CLASS_HID_581d9] = 1028, + [BNXT_ULP_CLASS_HID_41653] = 1029, + [BNXT_ULP_CLASS_HID_40655] = 1030, + [BNXT_ULP_CLASS_HID_50601] = 1031, + [BNXT_ULP_CLASS_HID_51545] = 1032, + [BNXT_ULP_CLASS_HID_49e1b] = 1033, + [BNXT_ULP_CLASS_HID_48e1d] = 1034, + [BNXT_ULP_CLASS_HID_58d49] = 1035, + [BNXT_ULP_CLASS_HID_59d0d] = 1036, + [BNXT_ULP_CLASS_HID_40115] = 1037, + [BNXT_ULP_CLASS_HID_41099] = 1038, + [BNXT_ULP_CLASS_HID_51085] = 1039, + [BNXT_ULP_CLASS_HID_5000f] = 1040, + [BNXT_ULP_CLASS_HID_4889d] = 1041, + [BNXT_ULP_CLASS_HID_49881] = 1042, + [BNXT_ULP_CLASS_HID_5980d] = 1043, + [BNXT_ULP_CLASS_HID_59797] = 1044, + [BNXT_ULP_CLASS_HID_41c09] = 1045, + [BNXT_ULP_CLASS_HID_40c13] = 1046, + [BNXT_ULP_CLASS_HID_50b1f] = 1047, + [BNXT_ULP_CLASS_HID_51b03] = 1048, + [BNXT_ULP_CLASS_HID_48417] = 1049, + [BNXT_ULP_CLASS_HID_4931b] = 1050, + [BNXT_ULP_CLASS_HID_59307] = 1051, + [BNXT_ULP_CLASS_HID_58309] = 1052, + [BNXT_ULP_CLASS_HID_4160f] = 1053, + [BNXT_ULP_CLASS_HID_40561] = 1054, + [BNXT_ULP_CLASS_HID_5052d] = 1055, + [BNXT_ULP_CLASS_HID_51501] = 1056, + [BNXT_ULP_CLASS_HID_49dc7] = 1057, + [BNXT_ULP_CLASS_HID_48d29] = 1058, + [BNXT_ULP_CLASS_HID_58d05] = 1059, + [BNXT_ULP_CLASS_HID_59cc9] = 1060, + [BNXT_ULP_CLASS_HID_40161] = 1061, + [BNXT_ULP_CLASS_HID_41125] = 1062, + [BNXT_ULP_CLASS_HID_51061] = 1063, + [BNXT_ULP_CLASS_HID_5004b] = 1064, + [BNXT_ULP_CLASS_HID_48929] = 1065, + [BNXT_ULP_CLASS_HID_4986d] = 1066, + [BNXT_ULP_CLASS_HID_59829] = 1067, + [BNXT_ULP_CLASS_HID_58823] = 1068, + [BNXT_ULP_CLASS_HID_41ba5] = 1069, + [BNXT_ULP_CLASS_HID_40b0f] = 1070, + [BNXT_ULP_CLASS_HID_50b0b] = 1071, + [BNXT_ULP_CLASS_HID_51a8f] = 1072, + [BNXT_ULP_CLASS_HID_48303] = 1073, + [BNXT_ULP_CLASS_HID_49307] = 1074, + [BNXT_ULP_CLASS_HID_592a3] = 1075, + [BNXT_ULP_CLASS_HID_58205] = 1076, + [BNXT_ULP_CLASS_HID_4172f] = 1077, + [BNXT_ULP_CLASS_HID_40621] = 1078, + [BNXT_ULP_CLASS_HID_5062d] = 1079, + [BNXT_ULP_CLASS_HID_51621] = 1080, + [BNXT_ULP_CLASS_HID_49f07] = 1081, + [BNXT_ULP_CLASS_HID_48e29] = 1082, + [BNXT_ULP_CLASS_HID_58e25] = 1083, + [BNXT_ULP_CLASS_HID_59d29] = 1084, + [BNXT_ULP_CLASS_HID_400c9] = 1085, + [BNXT_ULP_CLASS_HID_4108d] = 1086, + [BNXT_ULP_CLASS_HID_51049] = 1087, + [BNXT_ULP_CLASS_HID_50fc3] = 1088, + [BNXT_ULP_CLASS_HID_48881] = 1089, + [BNXT_ULP_CLASS_HID_487cb] = 1090, + [BNXT_ULP_CLASS_HID_587c7] = 1091, + [BNXT_ULP_CLASS_HID_5978b] = 1092, + [BNXT_ULP_CLASS_HID_41c4d] = 1093, + [BNXT_ULP_CLASS_HID_40b47] = 1094, + [BNXT_ULP_CLASS_HID_50b03] = 1095, + [BNXT_ULP_CLASS_HID_51b47] = 1096, + [BNXT_ULP_CLASS_HID_4834b] = 1097, + [BNXT_ULP_CLASS_HID_4930f] = 1098, + [BNXT_ULP_CLASS_HID_5934b] = 1099, + [BNXT_ULP_CLASS_HID_5824d] = 1100, + [BNXT_ULP_CLASS_HID_41687] = 1101, + [BNXT_ULP_CLASS_HID_40609] = 1102, + [BNXT_ULP_CLASS_HID_50585] = 1103, + [BNXT_ULP_CLASS_HID_51589] = 1104, + [BNXT_ULP_CLASS_HID_49e0f] = 1105, + [BNXT_ULP_CLASS_HID_48d81] = 1106, + [BNXT_ULP_CLASS_HID_58d8d] = 1107, + [BNXT_ULP_CLASS_HID_59d01] = 1108, + [BNXT_ULP_CLASS_HID_40109] = 1109, + [BNXT_ULP_CLASS_HID_4110d] = 1110, + [BNXT_ULP_CLASS_HID_51109] = 1111, + [BNXT_ULP_CLASS_HID_50003] = 1112, + [BNXT_ULP_CLASS_HID_48901] = 1113, + [BNXT_ULP_CLASS_HID_49905] = 1114, + [BNXT_ULP_CLASS_HID_59901] = 1115, + [BNXT_ULP_CLASS_HID_5880b] = 1116, + [BNXT_ULP_CLASS_HID_10619] = 1117, + [BNXT_ULP_CLASS_HID_11239] = 1118, + [BNXT_ULP_CLASS_HID_14205] = 1119, + [BNXT_ULP_CLASS_HID_15e25] = 1120, + [BNXT_ULP_CLASS_HID_12417] = 1121, + [BNXT_ULP_CLASS_HID_13037] = 1122, + [BNXT_ULP_CLASS_HID_16ff3] = 1123, + [BNXT_ULP_CLASS_HID_17c13] = 1124, + [BNXT_ULP_CLASS_HID_1111d] = 1125, + [BNXT_ULP_CLASS_HID_10cdb] = 1126, + [BNXT_ULP_CLASS_HID_15d19] = 1127, + [BNXT_ULP_CLASS_HID_148c7] = 1128, + [BNXT_ULP_CLASS_HID_13f0b] = 1129, + [BNXT_ULP_CLASS_HID_12ac9] = 1130, + [BNXT_ULP_CLASS_HID_17b17] = 1131, + [BNXT_ULP_CLASS_HID_176d5] = 1132, + [BNXT_ULP_CLASS_HID_10bab] = 1133, + [BNXT_ULP_CLASS_HID_10769] = 1134, + [BNXT_ULP_CLASS_HID_15787] = 1135, + [BNXT_ULP_CLASS_HID_14345] = 1136, + [BNXT_ULP_CLASS_HID_12989] = 1137, + [BNXT_ULP_CLASS_HID_12567] = 1138, + [BNXT_ULP_CLASS_HID_17585] = 1139, + [BNXT_ULP_CLASS_HID_16143] = 1140, + [BNXT_ULP_CLASS_HID_1064d] = 1141, + [BNXT_ULP_CLASS_HID_1128d] = 1142, + [BNXT_ULP_CLASS_HID_14249] = 1143, + [BNXT_ULP_CLASS_HID_15e49] = 1144, + [BNXT_ULP_CLASS_HID_1244b] = 1145, + [BNXT_ULP_CLASS_HID_1304b] = 1146, + [BNXT_ULP_CLASS_HID_16047] = 1147, + [BNXT_ULP_CLASS_HID_17c47] = 1148, + [BNXT_ULP_CLASS_HID_11113] = 1149, + [BNXT_ULP_CLASS_HID_10cd1] = 1150, + [BNXT_ULP_CLASS_HID_15cf7] = 1151, + [BNXT_ULP_CLASS_HID_148b5] = 1152, + [BNXT_ULP_CLASS_HID_13f01] = 1153, + [BNXT_ULP_CLASS_HID_12ac7] = 1154, + [BNXT_ULP_CLASS_HID_17ae5] = 1155, + [BNXT_ULP_CLASS_HID_176a3] = 1156, + [BNXT_ULP_CLASS_HID_10bd5] = 1157, + [BNXT_ULP_CLASS_HID_10793] = 1158, + [BNXT_ULP_CLASS_HID_15791] = 1159, + [BNXT_ULP_CLASS_HID_14357] = 1160, + [BNXT_ULP_CLASS_HID_129c3] = 1161, + [BNXT_ULP_CLASS_HID_12581] = 1162, + [BNXT_ULP_CLASS_HID_17587] = 1163, + [BNXT_ULP_CLASS_HID_16145] = 1164, + [BNXT_ULP_CLASS_HID_10643] = 1165, + [BNXT_ULP_CLASS_HID_11263] = 1166, + [BNXT_ULP_CLASS_HID_14227] = 1167, + [BNXT_ULP_CLASS_HID_15e47] = 1168, + [BNXT_ULP_CLASS_HID_12421] = 1169, + [BNXT_ULP_CLASS_HID_13041] = 1170, + [BNXT_ULP_CLASS_HID_16005] = 1171, + [BNXT_ULP_CLASS_HID_17c25] = 1172, + [BNXT_ULP_CLASS_HID_11147] = 1173, + [BNXT_ULP_CLASS_HID_10d05] = 1174, + [BNXT_ULP_CLASS_HID_15d43] = 1175, + [BNXT_ULP_CLASS_HID_14901] = 1176, + [BNXT_ULP_CLASS_HID_13f45] = 1177, + [BNXT_ULP_CLASS_HID_12b03] = 1178, + [BNXT_ULP_CLASS_HID_17b01] = 1179, + [BNXT_ULP_CLASS_HID_176c7] = 1180, + [BNXT_ULP_CLASS_HID_11bcf] = 1181, + [BNXT_ULP_CLASS_HID_1178d] = 1182, + [BNXT_ULP_CLASS_HID_1474d] = 1183, + [BNXT_ULP_CLASS_HID_1536d] = 1184, + [BNXT_ULP_CLASS_HID_139bd] = 1185, + [BNXT_ULP_CLASS_HID_1357f] = 1186, + [BNXT_ULP_CLASS_HID_16547] = 1187, + [BNXT_ULP_CLASS_HID_17167] = 1188, + [BNXT_ULP_CLASS_HID_11685] = 1189, + [BNXT_ULP_CLASS_HID_1024f] = 1190, + [BNXT_ULP_CLASS_HID_1524d] = 1191, + [BNXT_ULP_CLASS_HID_14e0f] = 1192, + [BNXT_ULP_CLASS_HID_1345f] = 1193, + [BNXT_ULP_CLASS_HID_1201d] = 1194, + [BNXT_ULP_CLASS_HID_1705f] = 1195, + [BNXT_ULP_CLASS_HID_16c1d] = 1196, + [BNXT_ULP_CLASS_HID_100ef] = 1197, + [BNXT_ULP_CLASS_HID_11d0f] = 1198, + [BNXT_ULP_CLASS_HID_14ccf] = 1199, + [BNXT_ULP_CLASS_HID_158ef] = 1200, + [BNXT_ULP_CLASS_HID_12eed] = 1201, + [BNXT_ULP_CLASS_HID_13b0d] = 1202, + [BNXT_ULP_CLASS_HID_16acd] = 1203, + [BNXT_ULP_CLASS_HID_16687] = 1204, + [BNXT_ULP_CLASS_HID_11c07] = 1205, + [BNXT_ULP_CLASS_HID_117c5] = 1206, + [BNXT_ULP_CLASS_HID_1478d] = 1207, + [BNXT_ULP_CLASS_HID_1538d] = 1208, + [BNXT_ULP_CLASS_HID_13a05] = 1209, + [BNXT_ULP_CLASS_HID_135cf] = 1210, + [BNXT_ULP_CLASS_HID_1658f] = 1211, + [BNXT_ULP_CLASS_HID_1718f] = 1212, + [BNXT_ULP_CLASS_HID_11667] = 1213, + [BNXT_ULP_CLASS_HID_10225] = 1214, + [BNXT_ULP_CLASS_HID_15247] = 1215, + [BNXT_ULP_CLASS_HID_14e05] = 1216, + [BNXT_ULP_CLASS_HID_13455] = 1217, + [BNXT_ULP_CLASS_HID_12017] = 1218, + [BNXT_ULP_CLASS_HID_17035] = 1219, + [BNXT_ULP_CLASS_HID_16bf7] = 1220, + [BNXT_ULP_CLASS_HID_10115] = 1221, + [BNXT_ULP_CLASS_HID_11d15] = 1222, + [BNXT_ULP_CLASS_HID_14d05] = 1223, + [BNXT_ULP_CLASS_HID_15905] = 1224, + [BNXT_ULP_CLASS_HID_12f17] = 1225, + [BNXT_ULP_CLASS_HID_13b17] = 1226, + [BNXT_ULP_CLASS_HID_16ad7] = 1227, + [BNXT_ULP_CLASS_HID_16695] = 1228, + [BNXT_ULP_CLASS_HID_11be5] = 1229, + [BNXT_ULP_CLASS_HID_117a7] = 1230, + [BNXT_ULP_CLASS_HID_14767] = 1231, + [BNXT_ULP_CLASS_HID_15387] = 1232, + [BNXT_ULP_CLASS_HID_139e7] = 1233, + [BNXT_ULP_CLASS_HID_135a5] = 1234, + [BNXT_ULP_CLASS_HID_16565] = 1235, + [BNXT_ULP_CLASS_HID_17185] = 1236, + [BNXT_ULP_CLASS_HID_11687] = 1237, + [BNXT_ULP_CLASS_HID_10245] = 1238, + [BNXT_ULP_CLASS_HID_15287] = 1239, + [BNXT_ULP_CLASS_HID_14e45] = 1240, + [BNXT_ULP_CLASS_HID_13485] = 1241, + [BNXT_ULP_CLASS_HID_12047] = 1242, + [BNXT_ULP_CLASS_HID_17085] = 1243, + [BNXT_ULP_CLASS_HID_16c47] = 1244, + [BNXT_ULP_CLASS_HID_400f4] = 1245, + [BNXT_ULP_CLASS_HID_410c8] = 1246, + [BNXT_ULP_CLASS_HID_51084] = 1247, + [BNXT_ULP_CLASS_HID_50ffe] = 1248, + [BNXT_ULP_CLASS_HID_488cc] = 1249, + [BNXT_ULP_CLASS_HID_48726] = 1250, + [BNXT_ULP_CLASS_HID_587f2] = 1251, + [BNXT_ULP_CLASS_HID_597b6] = 1252, + [BNXT_ULP_CLASS_HID_41b10] = 1253, + [BNXT_ULP_CLASS_HID_40b8a] = 1254, + [BNXT_ULP_CLASS_HID_50a46] = 1255, + [BNXT_ULP_CLASS_HID_51a1a] = 1256, + [BNXT_ULP_CLASS_HID_4838e] = 1257, + [BNXT_ULP_CLASS_HID_49242] = 1258, + [BNXT_ULP_CLASS_HID_5921e] = 1259, + [BNXT_ULP_CLASS_HID_58150] = 1260, + [BNXT_ULP_CLASS_HID_41686] = 1261, + [BNXT_ULP_CLASS_HID_405e8] = 1262, + [BNXT_ULP_CLASS_HID_505a4] = 1263, + [BNXT_ULP_CLASS_HID_51588] = 1264, + [BNXT_ULP_CLASS_HID_49d4e] = 1265, + [BNXT_ULP_CLASS_HID_48da0] = 1266, + [BNXT_ULP_CLASS_HID_58d8c] = 1267, + [BNXT_ULP_CLASS_HID_59c40] = 1268, + [BNXT_ULP_CLASS_HID_40040] = 1269, + [BNXT_ULP_CLASS_HID_41004] = 1270, + [BNXT_ULP_CLASS_HID_510c0] = 1271, + [BNXT_ULP_CLASS_HID_50f4a] = 1272, + [BNXT_ULP_CLASS_HID_48808] = 1273, + [BNXT_ULP_CLASS_HID_48742] = 1274, + [BNXT_ULP_CLASS_HID_5874e] = 1275, + [BNXT_ULP_CLASS_HID_59702] = 1276, + [BNXT_ULP_CLASS_HID_41bfe] = 1277, + [BNXT_ULP_CLASS_HID_40a58] = 1278, + [BNXT_ULP_CLASS_HID_50a2c] = 1279, + [BNXT_ULP_CLASS_HID_51ae8] = 1280, + [BNXT_ULP_CLASS_HID_4825c] = 1281, + [BNXT_ULP_CLASS_HID_49228] = 1282, + [BNXT_ULP_CLASS_HID_592ec] = 1283, + [BNXT_ULP_CLASS_HID_5815e] = 1284, + [BNXT_ULP_CLASS_HID_41698] = 1285, + [BNXT_ULP_CLASS_HID_4051a] = 1286, + [BNXT_ULP_CLASS_HID_505ce] = 1287, + [BNXT_ULP_CLASS_HID_5158a] = 1288, + [BNXT_ULP_CLASS_HID_49d58] = 1289, + [BNXT_ULP_CLASS_HID_48dca] = 1290, + [BNXT_ULP_CLASS_HID_58d8e] = 1291, + [BNXT_ULP_CLASS_HID_59c5a] = 1292, + [BNXT_ULP_CLASS_HID_4002e] = 1293, + [BNXT_ULP_CLASS_HID_410ea] = 1294, + [BNXT_ULP_CLASS_HID_510ae] = 1295, + [BNXT_ULP_CLASS_HID_50f08] = 1296, + [BNXT_ULP_CLASS_HID_488ee] = 1297, + [BNXT_ULP_CLASS_HID_48748] = 1298, + [BNXT_ULP_CLASS_HID_5870c] = 1299, + [BNXT_ULP_CLASS_HID_597e8] = 1300, + [BNXT_ULP_CLASS_HID_41b4a] = 1301, + [BNXT_ULP_CLASS_HID_40b8c] = 1302, + [BNXT_ULP_CLASS_HID_50a48] = 1303, + [BNXT_ULP_CLASS_HID_51a0c] = 1304, + [BNXT_ULP_CLASS_HID_48388] = 1305, + [BNXT_ULP_CLASS_HID_4924c] = 1306, + [BNXT_ULP_CLASS_HID_59208] = 1307, + [BNXT_ULP_CLASS_HID_5828a] = 1308, + [BNXT_ULP_CLASS_HID_40540] = 1309, + [BNXT_ULP_CLASS_HID_41500] = 1310, + [BNXT_ULP_CLASS_HID_515d0] = 1311, + [BNXT_ULP_CLASS_HID_5044a] = 1312, + [BNXT_ULP_CLASS_HID_48d18] = 1313, + [BNXT_ULP_CLASS_HID_49dd8] = 1314, + [BNXT_ULP_CLASS_HID_59da8] = 1315, + [BNXT_ULP_CLASS_HID_58c02] = 1316, + [BNXT_ULP_CLASS_HID_41048] = 1317, + [BNXT_ULP_CLASS_HID_400c2] = 1318, + [BNXT_ULP_CLASS_HID_50092] = 1319, + [BNXT_ULP_CLASS_HID_51f52] = 1320, + [BNXT_ULP_CLASS_HID_49800] = 1321, + [BNXT_ULP_CLASS_HID_4889a] = 1322, + [BNXT_ULP_CLASS_HID_5974a] = 1323, + [BNXT_ULP_CLASS_HID_587c8] = 1324, + [BNXT_ULP_CLASS_HID_40bc2] = 1325, + [BNXT_ULP_CLASS_HID_41b82] = 1326, + [BNXT_ULP_CLASS_HID_51a62] = 1327, + [BNXT_ULP_CLASS_HID_50ac0] = 1328, + [BNXT_ULP_CLASS_HID_493aa] = 1329, + [BNXT_ULP_CLASS_HID_48208] = 1330, + [BNXT_ULP_CLASS_HID_582c8] = 1331, + [BNXT_ULP_CLASS_HID_59288] = 1332, + [BNXT_ULP_CLASS_HID_40688] = 1333, + [BNXT_ULP_CLASS_HID_41540] = 1334, + [BNXT_ULP_CLASS_HID_51508] = 1335, + [BNXT_ULP_CLASS_HID_50582] = 1336, + [BNXT_ULP_CLASS_HID_48d40] = 1337, + [BNXT_ULP_CLASS_HID_49d08] = 1338, + [BNXT_ULP_CLASS_HID_59dc0] = 1339, + [BNXT_ULP_CLASS_HID_58c4a] = 1340, + [BNXT_ULP_CLASS_HID_4104a] = 1341, + [BNXT_ULP_CLASS_HID_400a8] = 1342, + [BNXT_ULP_CLASS_HID_50f78] = 1343, + [BNXT_ULP_CLASS_HID_51f38] = 1344, + [BNXT_ULP_CLASS_HID_4980a] = 1345, + [BNXT_ULP_CLASS_HID_49768] = 1346, + [BNXT_ULP_CLASS_HID_59738] = 1347, + [BNXT_ULP_CLASS_HID_587aa] = 1348, + [BNXT_ULP_CLASS_HID_40bd8] = 1349, + [BNXT_ULP_CLASS_HID_41bc8] = 1350, + [BNXT_ULP_CLASS_HID_51b88] = 1351, + [BNXT_ULP_CLASS_HID_50ada] = 1352, + [BNXT_ULP_CLASS_HID_493c8] = 1353, + [BNXT_ULP_CLASS_HID_4820a] = 1354, + [BNXT_ULP_CLASS_HID_582da] = 1355, + [BNXT_ULP_CLASS_HID_5929a] = 1356, + [BNXT_ULP_CLASS_HID_4056a] = 1357, + [BNXT_ULP_CLASS_HID_4152a] = 1358, + [BNXT_ULP_CLASS_HID_5150a] = 1359, + [BNXT_ULP_CLASS_HID_50468] = 1360, + [BNXT_ULP_CLASS_HID_48d2a] = 1361, + [BNXT_ULP_CLASS_HID_49dea] = 1362, + [BNXT_ULP_CLASS_HID_59dca] = 1363, + [BNXT_ULP_CLASS_HID_58c28] = 1364, + [BNXT_ULP_CLASS_HID_4118a] = 1365, + [BNXT_ULP_CLASS_HID_400c8] = 1366, + [BNXT_ULP_CLASS_HID_50088] = 1367, + [BNXT_ULP_CLASS_HID_51088] = 1368, + [BNXT_ULP_CLASS_HID_4984a] = 1369, + [BNXT_ULP_CLASS_HID_48888] = 1370, + [BNXT_ULP_CLASS_HID_58888] = 1371, + [BNXT_ULP_CLASS_HID_587ca] = 1372, + [BNXT_ULP_CLASS_HID_10690] = 1373, + [BNXT_ULP_CLASS_HID_112b0] = 1374, + [BNXT_ULP_CLASS_HID_1428c] = 1375, + [BNXT_ULP_CLASS_HID_15eac] = 1376, + [BNXT_ULP_CLASS_HID_1249e] = 1377, + [BNXT_ULP_CLASS_HID_130be] = 1378, + [BNXT_ULP_CLASS_HID_16f7a] = 1379, + [BNXT_ULP_CLASS_HID_17c9a] = 1380, + [BNXT_ULP_CLASS_HID_1119a] = 1381, + [BNXT_ULP_CLASS_HID_10c58] = 1382, + [BNXT_ULP_CLASS_HID_15c7e] = 1383, + [BNXT_ULP_CLASS_HID_1483c] = 1384, + [BNXT_ULP_CLASS_HID_13f88] = 1385, + [BNXT_ULP_CLASS_HID_12a4e] = 1386, + [BNXT_ULP_CLASS_HID_17a6c] = 1387, + [BNXT_ULP_CLASS_HID_1762a] = 1388, + [BNXT_ULP_CLASS_HID_11b46] = 1389, + [BNXT_ULP_CLASS_HID_11704] = 1390, + [BNXT_ULP_CLASS_HID_147c4] = 1391, + [BNXT_ULP_CLASS_HID_153e4] = 1392, + [BNXT_ULP_CLASS_HID_13934] = 1393, + [BNXT_ULP_CLASS_HID_135f6] = 1394, + [BNXT_ULP_CLASS_HID_165ce] = 1395, + [BNXT_ULP_CLASS_HID_171ee] = 1396, + [BNXT_ULP_CLASS_HID_116ee] = 1397, + [BNXT_ULP_CLASS_HID_102ac] = 1398, + [BNXT_ULP_CLASS_HID_152ce] = 1399, + [BNXT_ULP_CLASS_HID_14e8c] = 1400, + [BNXT_ULP_CLASS_HID_134dc] = 1401, + [BNXT_ULP_CLASS_HID_1209e] = 1402, + [BNXT_ULP_CLASS_HID_170bc] = 1403, + [BNXT_ULP_CLASS_HID_16b7e] = 1404, + [BNXT_ULP_CLASS_HID_119ae] = 1405, + [BNXT_ULP_CLASS_HID_1146a] = 1406, + [BNXT_ULP_CLASS_HID_14426] = 1407, + [BNXT_ULP_CLASS_HID_15046] = 1408, + [BNXT_ULP_CLASS_HID_1263a] = 1409, + [BNXT_ULP_CLASS_HID_1325a] = 1410, + [BNXT_ULP_CLASS_HID_16216] = 1411, + [BNXT_ULP_CLASS_HID_17e36] = 1412, + [BNXT_ULP_CLASS_HID_1133e] = 1413, + [BNXT_ULP_CLASS_HID_10ffa] = 1414, + [BNXT_ULP_CLASS_HID_15f1a] = 1415, + [BNXT_ULP_CLASS_HID_14bee] = 1416, + [BNXT_ULP_CLASS_HID_1312a] = 1417, + [BNXT_ULP_CLASS_HID_12dea] = 1418, + [BNXT_ULP_CLASS_HID_17d1e] = 1419, + [BNXT_ULP_CLASS_HID_169de] = 1420, + [BNXT_ULP_CLASS_HID_11ee6] = 1421, + [BNXT_ULP_CLASS_HID_10abe] = 1422, + [BNXT_ULP_CLASS_HID_15ade] = 1423, + [BNXT_ULP_CLASS_HID_1569e] = 1424, + [BNXT_ULP_CLASS_HID_13cee] = 1425, + [BNXT_ULP_CLASS_HID_128ae] = 1426, + [BNXT_ULP_CLASS_HID_1676e] = 1427, + [BNXT_ULP_CLASS_HID_1748e] = 1428, + [BNXT_ULP_CLASS_HID_1098e] = 1429, + [BNXT_ULP_CLASS_HID_1044e] = 1430, + [BNXT_ULP_CLASS_HID_1546e] = 1431, + [BNXT_ULP_CLASS_HID_1402e] = 1432, + [BNXT_ULP_CLASS_HID_1367e] = 1433, + [BNXT_ULP_CLASS_HID_1223e] = 1434, + [BNXT_ULP_CLASS_HID_1725e] = 1435, + [BNXT_ULP_CLASS_HID_16e1e] = 1436, + [BNXT_ULP_CLASS_HID_1172f] = 1437, + [BNXT_ULP_CLASS_HID_103ed] = 1438, + [BNXT_ULP_CLASS_HID_1530b] = 1439, + [BNXT_ULP_CLASS_HID_14fc9] = 1440, + [BNXT_ULP_CLASS_HID_1351d] = 1441, + [BNXT_ULP_CLASS_HID_121db] = 1442, + [BNXT_ULP_CLASS_HID_171f9] = 1443, + [BNXT_ULP_CLASS_HID_16db7] = 1444, + [BNXT_ULP_CLASS_HID_102bf] = 1445, + [BNXT_ULP_CLASS_HID_11edf] = 1446, + [BNXT_ULP_CLASS_HID_14e9b] = 1447, + [BNXT_ULP_CLASS_HID_15abb] = 1448, + [BNXT_ULP_CLASS_HID_120ad] = 1449, + [BNXT_ULP_CLASS_HID_13ccd] = 1450, + [BNXT_ULP_CLASS_HID_16c89] = 1451, + [BNXT_ULP_CLASS_HID_1675f] = 1452, + [BNXT_ULP_CLASS_HID_10c67] = 1453, + [BNXT_ULP_CLASS_HID_11987] = 1454, + [BNXT_ULP_CLASS_HID_1485f] = 1455, + [BNXT_ULP_CLASS_HID_1441d] = 1456, + [BNXT_ULP_CLASS_HID_12a55] = 1457, + [BNXT_ULP_CLASS_HID_1262f] = 1458, + [BNXT_ULP_CLASS_HID_1764d] = 1459, + [BNXT_ULP_CLASS_HID_1620f] = 1460, + [BNXT_ULP_CLASS_HID_1070f] = 1461, + [BNXT_ULP_CLASS_HID_1132f] = 1462, + [BNXT_ULP_CLASS_HID_143ef] = 1463, + [BNXT_ULP_CLASS_HID_15f0f] = 1464, + [BNXT_ULP_CLASS_HID_125fd] = 1465, + [BNXT_ULP_CLASS_HID_1311d] = 1466, + [BNXT_ULP_CLASS_HID_161dd] = 1467, + [BNXT_ULP_CLASS_HID_17dfd] = 1468, + [BNXT_ULP_CLASS_HID_10acb] = 1469, + [BNXT_ULP_CLASS_HID_10687] = 1470, + [BNXT_ULP_CLASS_HID_156a7] = 1471, + [BNXT_ULP_CLASS_HID_14163] = 1472, + [BNXT_ULP_CLASS_HID_128b7] = 1473, + [BNXT_ULP_CLASS_HID_12377] = 1474, + [BNXT_ULP_CLASS_HID_17493] = 1475, + [BNXT_ULP_CLASS_HID_16f53] = 1476, + [BNXT_ULP_CLASS_HID_1045b] = 1477, + [BNXT_ULP_CLASS_HID_1107b] = 1478, + [BNXT_ULP_CLASS_HID_1404f] = 1479, + [BNXT_ULP_CLASS_HID_15c6f] = 1480, + [BNXT_ULP_CLASS_HID_1225f] = 1481, + [BNXT_ULP_CLASS_HID_13e7f] = 1482, + [BNXT_ULP_CLASS_HID_16e3b] = 1483, + [BNXT_ULP_CLASS_HID_17a5b] = 1484, + [BNXT_ULP_CLASS_HID_10f1f] = 1485, + [BNXT_ULP_CLASS_HID_11b3f] = 1486, + [BNXT_ULP_CLASS_HID_14bff] = 1487, + [BNXT_ULP_CLASS_HID_147b7] = 1488, + [BNXT_ULP_CLASS_HID_12d0f] = 1489, + [BNXT_ULP_CLASS_HID_1392f] = 1490, + [BNXT_ULP_CLASS_HID_169e7] = 1491, + [BNXT_ULP_CLASS_HID_165a7] = 1492, + [BNXT_ULP_CLASS_HID_11a0f] = 1493, + [BNXT_ULP_CLASS_HID_116cf] = 1494, + [BNXT_ULP_CLASS_HID_1468f] = 1495, + [BNXT_ULP_CLASS_HID_152af] = 1496, + [BNXT_ULP_CLASS_HID_138ff] = 1497, + [BNXT_ULP_CLASS_HID_134bf] = 1498, + [BNXT_ULP_CLASS_HID_1648f] = 1499, + [BNXT_ULP_CLASS_HID_170af] = 1500, + [BNXT_ULP_CLASS_HID_40c38] = 1501, + [BNXT_ULP_CLASS_HID_41c04] = 1502, + [BNXT_ULP_CLASS_HID_51c48] = 1503, + [BNXT_ULP_CLASS_HID_50332] = 1504, + [BNXT_ULP_CLASS_HID_48400] = 1505, + [BNXT_ULP_CLASS_HID_48bea] = 1506, + [BNXT_ULP_CLASS_HID_58b3e] = 1507, + [BNXT_ULP_CLASS_HID_59b7a] = 1508, + [BNXT_ULP_CLASS_HID_417dc] = 1509, + [BNXT_ULP_CLASS_HID_40746] = 1510, + [BNXT_ULP_CLASS_HID_5068a] = 1511, + [BNXT_ULP_CLASS_HID_516d6] = 1512, + [BNXT_ULP_CLASS_HID_48f42] = 1513, + [BNXT_ULP_CLASS_HID_49e8e] = 1514, + [BNXT_ULP_CLASS_HID_59ed2] = 1515, + [BNXT_ULP_CLASS_HID_58d9c] = 1516, + [BNXT_ULP_CLASS_HID_41a4a] = 1517, + [BNXT_ULP_CLASS_HID_40924] = 1518, + [BNXT_ULP_CLASS_HID_50968] = 1519, + [BNXT_ULP_CLASS_HID_51944] = 1520, + [BNXT_ULP_CLASS_HID_49182] = 1521, + [BNXT_ULP_CLASS_HID_4816c] = 1522, + [BNXT_ULP_CLASS_HID_58140] = 1523, + [BNXT_ULP_CLASS_HID_5908c] = 1524, + [BNXT_ULP_CLASS_HID_40c8c] = 1525, + [BNXT_ULP_CLASS_HID_41cc8] = 1526, + [BNXT_ULP_CLASS_HID_51c0c] = 1527, + [BNXT_ULP_CLASS_HID_50386] = 1528, + [BNXT_ULP_CLASS_HID_484c4] = 1529, + [BNXT_ULP_CLASS_HID_48b8e] = 1530, + [BNXT_ULP_CLASS_HID_58b82] = 1531, + [BNXT_ULP_CLASS_HID_59bce] = 1532, + [BNXT_ULP_CLASS_HID_10a54] = 1533, + [BNXT_ULP_CLASS_HID_11e74] = 1534, + [BNXT_ULP_CLASS_HID_14e48] = 1535, + [BNXT_ULP_CLASS_HID_15268] = 1536, + [BNXT_ULP_CLASS_HID_1285a] = 1537, + [BNXT_ULP_CLASS_HID_13c7a] = 1538, + [BNXT_ULP_CLASS_HID_163be] = 1539, + [BNXT_ULP_CLASS_HID_1705e] = 1540, + [BNXT_ULP_CLASS_HID_11d5e] = 1541, + [BNXT_ULP_CLASS_HID_1009c] = 1542, + [BNXT_ULP_CLASS_HID_150ba] = 1543, + [BNXT_ULP_CLASS_HID_144f8] = 1544, + [BNXT_ULP_CLASS_HID_1334c] = 1545, + [BNXT_ULP_CLASS_HID_1268a] = 1546, + [BNXT_ULP_CLASS_HID_176a8] = 1547, + [BNXT_ULP_CLASS_HID_17aee] = 1548, + [BNXT_ULP_CLASS_HID_11782] = 1549, + [BNXT_ULP_CLASS_HID_11bc0] = 1550, + [BNXT_ULP_CLASS_HID_14b00] = 1551, + [BNXT_ULP_CLASS_HID_15f20] = 1552, + [BNXT_ULP_CLASS_HID_135f0] = 1553, + [BNXT_ULP_CLASS_HID_13932] = 1554, + [BNXT_ULP_CLASS_HID_1690a] = 1555, + [BNXT_ULP_CLASS_HID_17d2a] = 1556, + [BNXT_ULP_CLASS_HID_11a2a] = 1557, + [BNXT_ULP_CLASS_HID_10e68] = 1558, + [BNXT_ULP_CLASS_HID_15e0a] = 1559, + [BNXT_ULP_CLASS_HID_14248] = 1560, + [BNXT_ULP_CLASS_HID_13818] = 1561, + [BNXT_ULP_CLASS_HID_12c5a] = 1562, + [BNXT_ULP_CLASS_HID_17c78] = 1563, + [BNXT_ULP_CLASS_HID_167ba] = 1564, + [BNXT_ULP_CLASS_HID_1f91] = 1565, + [BNXT_ULP_CLASS_HID_0763] = 1566, + [BNXT_ULP_CLASS_HID_0f7b] = 1567, + [BNXT_ULP_CLASS_HID_16af] = 1568, + [BNXT_ULP_CLASS_HID_1daf] = 1569, + [BNXT_ULP_CLASS_HID_0539] = 1570, + [BNXT_ULP_CLASS_HID_01ed] = 1571, + [BNXT_ULP_CLASS_HID_097f] = 1572, + [BNXT_ULP_CLASS_HID_81ab8] = 1573, + [BNXT_ULP_CLASS_HID_8020e] = 1574, + [BNXT_ULP_CLASS_HID_815d8] = 1575, + [BNXT_ULP_CLASS_HID_81cae] = 1576, + [BNXT_ULP_CLASS_HID_810a8] = 1577, + [BNXT_ULP_CLASS_HID_8183e] = 1578, + [BNXT_ULP_CLASS_HID_8036a] = 1579, + [BNXT_ULP_CLASS_HID_80af8] = 1580, + [BNXT_ULP_CLASS_HID_206fe] = 1581, + [BNXT_ULP_CLASS_HID_20e4c] = 1582, + [BNXT_ULP_CLASS_HID_2111e] = 1583, + [BNXT_ULP_CLASS_HID_218ec] = 1584, + [BNXT_ULP_CLASS_HID_60472] = 1585, + [BNXT_ULP_CLASS_HID_603c0] = 1586, + [BNXT_ULP_CLASS_HID_61692] = 1587, + [BNXT_ULP_CLASS_HID_61e60] = 1588, + [BNXT_ULP_CLASS_HID_1f81] = 1589, + [BNXT_ULP_CLASS_HID_0773] = 1590, + [BNXT_ULP_CLASS_HID_0f6b] = 1591, + [BNXT_ULP_CLASS_HID_16bf] = 1592, + [BNXT_ULP_CLASS_HID_03cf] = 1593, + [BNXT_ULP_CLASS_HID_0ab1] = 1594, + [BNXT_ULP_CLASS_HID_130b] = 1595, + [BNXT_ULP_CLASS_HID_1afd] = 1596, + [BNXT_ULP_CLASS_HID_1591] = 1597, + [BNXT_ULP_CLASS_HID_1d03] = 1598, + [BNXT_ULP_CLASS_HID_057b] = 1599, + [BNXT_ULP_CLASS_HID_0ced] = 1600, + [BNXT_ULP_CLASS_HID_19df] = 1601, + [BNXT_ULP_CLASS_HID_0141] = 1602, + [BNXT_ULP_CLASS_HID_08b9] = 1603, + [BNXT_ULP_CLASS_HID_108d] = 1604, + [BNXT_ULP_CLASS_HID_1dbf] = 1605, + [BNXT_ULP_CLASS_HID_0529] = 1606, + [BNXT_ULP_CLASS_HID_01fd] = 1607, + [BNXT_ULP_CLASS_HID_096f] = 1608, + [BNXT_ULP_CLASS_HID_810b7] = 1609, + [BNXT_ULP_CLASS_HID_81821] = 1610, + [BNXT_ULP_CLASS_HID_804f5] = 1611, + [BNXT_ULP_CLASS_HID_80c67] = 1612, + [BNXT_ULP_CLASS_HID_41333] = 1613, + [BNXT_ULP_CLASS_HID_41aad] = 1614, + [BNXT_ULP_CLASS_HID_40771] = 1615, + [BNXT_ULP_CLASS_HID_40ee3] = 1616, + [BNXT_ULP_CLASS_HID_c16cb] = 1617, + [BNXT_ULP_CLASS_HID_c1da5] = 1618, + [BNXT_ULP_CLASS_HID_c1a09] = 1619, + [BNXT_ULP_CLASS_HID_c01fb] = 1620, + [BNXT_ULP_CLASS_HID_1ff1] = 1621, + [BNXT_ULP_CLASS_HID_0703] = 1622, + [BNXT_ULP_CLASS_HID_0f1b] = 1623, + [BNXT_ULP_CLASS_HID_16cf] = 1624, + [BNXT_ULP_CLASS_HID_03bf] = 1625, + [BNXT_ULP_CLASS_HID_0ac1] = 1626, + [BNXT_ULP_CLASS_HID_137b] = 1627, + [BNXT_ULP_CLASS_HID_1a8d] = 1628, + [BNXT_ULP_CLASS_HID_15e1] = 1629, + [BNXT_ULP_CLASS_HID_1d73] = 1630, + [BNXT_ULP_CLASS_HID_050b] = 1631, + [BNXT_ULP_CLASS_HID_0c9d] = 1632, + [BNXT_ULP_CLASS_HID_19af] = 1633, + [BNXT_ULP_CLASS_HID_0131] = 1634, + [BNXT_ULP_CLASS_HID_08c9] = 1635, + [BNXT_ULP_CLASS_HID_10fd] = 1636, + [BNXT_ULP_CLASS_HID_1dcf] = 1637, + [BNXT_ULP_CLASS_HID_0559] = 1638, + [BNXT_ULP_CLASS_HID_018d] = 1639, + [BNXT_ULP_CLASS_HID_091f] = 1640, + [BNXT_ULP_CLASS_HID_810c7] = 1641, + [BNXT_ULP_CLASS_HID_81851] = 1642, + [BNXT_ULP_CLASS_HID_80485] = 1643, + [BNXT_ULP_CLASS_HID_80c17] = 1644, + [BNXT_ULP_CLASS_HID_41343] = 1645, + [BNXT_ULP_CLASS_HID_41add] = 1646, + [BNXT_ULP_CLASS_HID_40701] = 1647, + [BNXT_ULP_CLASS_HID_40e93] = 1648, + [BNXT_ULP_CLASS_HID_c16bb] = 1649, + [BNXT_ULP_CLASS_HID_c1dd5] = 1650, + [BNXT_ULP_CLASS_HID_c1a79] = 1651, + [BNXT_ULP_CLASS_HID_c018b] = 1652, + [BNXT_ULP_CLASS_HID_81aa8] = 1653, + [BNXT_ULP_CLASS_HID_8021e] = 1654, + [BNXT_ULP_CLASS_HID_815c8] = 1655, + [BNXT_ULP_CLASS_HID_81cbe] = 1656, + [BNXT_ULP_CLASS_HID_810b8] = 1657, + [BNXT_ULP_CLASS_HID_8182e] = 1658, + [BNXT_ULP_CLASS_HID_8037a] = 1659, + [BNXT_ULP_CLASS_HID_80ae8] = 1660, + [BNXT_ULP_CLASS_HID_c1834] = 1661, + [BNXT_ULP_CLASS_HID_c079a] = 1662, + [BNXT_ULP_CLASS_HID_c0af6] = 1663, + [BNXT_ULP_CLASS_HID_c123a] = 1664, + [BNXT_ULP_CLASS_HID_c16c4] = 1665, + [BNXT_ULP_CLASS_HID_c1daa] = 1666, + [BNXT_ULP_CLASS_HID_c0086] = 1667, + [BNXT_ULP_CLASS_HID_c0874] = 1668, + [BNXT_ULP_CLASS_HID_a19ea] = 1669, + [BNXT_ULP_CLASS_HID_a0158] = 1670, + [BNXT_ULP_CLASS_HID_a0bb4] = 1671, + [BNXT_ULP_CLASS_HID_a13f8] = 1672, + [BNXT_ULP_CLASS_HID_a17fa] = 1673, + [BNXT_ULP_CLASS_HID_a1f68] = 1674, + [BNXT_ULP_CLASS_HID_a0244] = 1675, + [BNXT_ULP_CLASS_HID_a092a] = 1676, + [BNXT_ULP_CLASS_HID_e1f76] = 1677, + [BNXT_ULP_CLASS_HID_e06e4] = 1678, + [BNXT_ULP_CLASS_HID_e0930] = 1679, + [BNXT_ULP_CLASS_HID_e1104] = 1680, + [BNXT_ULP_CLASS_HID_e1506] = 1681, + [BNXT_ULP_CLASS_HID_e1cf4] = 1682, + [BNXT_ULP_CLASS_HID_e07c0] = 1683, + [BNXT_ULP_CLASS_HID_e0eb6] = 1684, + [BNXT_ULP_CLASS_HID_206ee] = 1685, + [BNXT_ULP_CLASS_HID_20e5c] = 1686, + [BNXT_ULP_CLASS_HID_2110e] = 1687, + [BNXT_ULP_CLASS_HID_218fc] = 1688, + [BNXT_ULP_CLASS_HID_60462] = 1689, + [BNXT_ULP_CLASS_HID_603d0] = 1690, + [BNXT_ULP_CLASS_HID_61682] = 1691, + [BNXT_ULP_CLASS_HID_61e70] = 1692, + [BNXT_ULP_CLASS_HID_3167e] = 1693, + [BNXT_ULP_CLASS_HID_31dec] = 1694, + [BNXT_ULP_CLASS_HID_30030] = 1695, + [BNXT_ULP_CLASS_HID_30fae] = 1696, + [BNXT_ULP_CLASS_HID_70b14] = 1697, + [BNXT_ULP_CLASS_HID_71360] = 1698, + [BNXT_ULP_CLASS_HID_705b4] = 1699, + [BNXT_ULP_CLASS_HID_70d22] = 1700, + [BNXT_ULP_CLASS_HID_29e26] = 1701, + [BNXT_ULP_CLASS_HID_28594] = 1702, + [BNXT_ULP_CLASS_HID_288f8] = 1703, + [BNXT_ULP_CLASS_HID_29034] = 1704, + [BNXT_ULP_CLASS_HID_693ba] = 1705, + [BNXT_ULP_CLASS_HID_69b28] = 1706, + [BNXT_ULP_CLASS_HID_68e7c] = 1707, + [BNXT_ULP_CLASS_HID_69648] = 1708, + [BNXT_ULP_CLASS_HID_38de8] = 1709, + [BNXT_ULP_CLASS_HID_39524] = 1710, + [BNXT_ULP_CLASS_HID_39808] = 1711, + [BNXT_ULP_CLASS_HID_387e6] = 1712, + [BNXT_ULP_CLASS_HID_7836c] = 1713, + [BNXT_ULP_CLASS_HID_78ada] = 1714, + [BNXT_ULP_CLASS_HID_79d8c] = 1715, + [BNXT_ULP_CLASS_HID_7857a] = 1716, + [BNXT_ULP_CLASS_HID_81ad8] = 1717, + [BNXT_ULP_CLASS_HID_8026e] = 1718, + [BNXT_ULP_CLASS_HID_815b8] = 1719, + [BNXT_ULP_CLASS_HID_81cce] = 1720, + [BNXT_ULP_CLASS_HID_810c8] = 1721, + [BNXT_ULP_CLASS_HID_8185e] = 1722, + [BNXT_ULP_CLASS_HID_8030a] = 1723, + [BNXT_ULP_CLASS_HID_80a98] = 1724, + [BNXT_ULP_CLASS_HID_c1844] = 1725, + [BNXT_ULP_CLASS_HID_c07ea] = 1726, + [BNXT_ULP_CLASS_HID_c0a86] = 1727, + [BNXT_ULP_CLASS_HID_c124a] = 1728, + [BNXT_ULP_CLASS_HID_c16b4] = 1729, + [BNXT_ULP_CLASS_HID_c1dda] = 1730, + [BNXT_ULP_CLASS_HID_c00f6] = 1731, + [BNXT_ULP_CLASS_HID_c0804] = 1732, + [BNXT_ULP_CLASS_HID_a199a] = 1733, + [BNXT_ULP_CLASS_HID_a0128] = 1734, + [BNXT_ULP_CLASS_HID_a0bc4] = 1735, + [BNXT_ULP_CLASS_HID_a1388] = 1736, + [BNXT_ULP_CLASS_HID_a178a] = 1737, + [BNXT_ULP_CLASS_HID_a1f18] = 1738, + [BNXT_ULP_CLASS_HID_a0234] = 1739, + [BNXT_ULP_CLASS_HID_a095a] = 1740, + [BNXT_ULP_CLASS_HID_e1f06] = 1741, + [BNXT_ULP_CLASS_HID_e0694] = 1742, + [BNXT_ULP_CLASS_HID_e0940] = 1743, + [BNXT_ULP_CLASS_HID_e1174] = 1744, + [BNXT_ULP_CLASS_HID_e1576] = 1745, + [BNXT_ULP_CLASS_HID_e1c84] = 1746, + [BNXT_ULP_CLASS_HID_e07b0] = 1747, + [BNXT_ULP_CLASS_HID_e0ec6] = 1748, + [BNXT_ULP_CLASS_HID_2069e] = 1749, + [BNXT_ULP_CLASS_HID_20e2c] = 1750, + [BNXT_ULP_CLASS_HID_2117e] = 1751, + [BNXT_ULP_CLASS_HID_2188c] = 1752, + [BNXT_ULP_CLASS_HID_60412] = 1753, + [BNXT_ULP_CLASS_HID_603a0] = 1754, + [BNXT_ULP_CLASS_HID_616f2] = 1755, + [BNXT_ULP_CLASS_HID_61e00] = 1756, + [BNXT_ULP_CLASS_HID_3160e] = 1757, + [BNXT_ULP_CLASS_HID_31d9c] = 1758, + [BNXT_ULP_CLASS_HID_30040] = 1759, + [BNXT_ULP_CLASS_HID_30fde] = 1760, + [BNXT_ULP_CLASS_HID_70b64] = 1761, + [BNXT_ULP_CLASS_HID_71310] = 1762, + [BNXT_ULP_CLASS_HID_705c4] = 1763, + [BNXT_ULP_CLASS_HID_70d52] = 1764, + [BNXT_ULP_CLASS_HID_29e56] = 1765, + [BNXT_ULP_CLASS_HID_285e4] = 1766, + [BNXT_ULP_CLASS_HID_28888] = 1767, + [BNXT_ULP_CLASS_HID_29044] = 1768, + [BNXT_ULP_CLASS_HID_693ca] = 1769, + [BNXT_ULP_CLASS_HID_69b58] = 1770, + [BNXT_ULP_CLASS_HID_68e0c] = 1771, + [BNXT_ULP_CLASS_HID_69638] = 1772, + [BNXT_ULP_CLASS_HID_38d98] = 1773, + [BNXT_ULP_CLASS_HID_39554] = 1774, + [BNXT_ULP_CLASS_HID_39878] = 1775, + [BNXT_ULP_CLASS_HID_38796] = 1776, + [BNXT_ULP_CLASS_HID_7831c] = 1777, + [BNXT_ULP_CLASS_HID_78aaa] = 1778, + [BNXT_ULP_CLASS_HID_79dfc] = 1779, + [BNXT_ULP_CLASS_HID_7850a] = 1780, + [BNXT_ULP_CLASS_HID_03b7] = 1781, + [BNXT_ULP_CLASS_HID_13f3] = 1782, + [BNXT_ULP_CLASS_HID_0255] = 1783, + [BNXT_ULP_CLASS_HID_1675] = 1784, + [BNXT_ULP_CLASS_HID_80f52] = 1785, + [BNXT_ULP_CLASS_HID_819f2] = 1786, + [BNXT_ULP_CLASS_HID_80542] = 1787, + [BNXT_ULP_CLASS_HID_817e2] = 1788, + [BNXT_ULP_CLASS_HID_20a98] = 1789, + [BNXT_ULP_CLASS_HID_20538] = 1790, + [BNXT_ULP_CLASS_HID_6081c] = 1791, + [BNXT_ULP_CLASS_HID_61abc] = 1792, + [BNXT_ULP_CLASS_HID_03a7] = 1793, + [BNXT_ULP_CLASS_HID_13e3] = 1794, + [BNXT_ULP_CLASS_HID_1047] = 1795, + [BNXT_ULP_CLASS_HID_0721] = 1796, + [BNXT_ULP_CLASS_HID_19b7] = 1797, + [BNXT_ULP_CLASS_HID_0911] = 1798, + [BNXT_ULP_CLASS_HID_0df5] = 1799, + [BNXT_ULP_CLASS_HID_1d31] = 1800, + [BNXT_ULP_CLASS_HID_0245] = 1801, + [BNXT_ULP_CLASS_HID_1665] = 1802, + [BNXT_ULP_CLASS_HID_8055d] = 1803, + [BNXT_ULP_CLASS_HID_80893] = 1804, + [BNXT_ULP_CLASS_HID_407d9] = 1805, + [BNXT_ULP_CLASS_HID_40b1f] = 1806, + [BNXT_ULP_CLASS_HID_c1ad1] = 1807, + [BNXT_ULP_CLASS_HID_c0e17] = 1808, + [BNXT_ULP_CLASS_HID_03d7] = 1809, + [BNXT_ULP_CLASS_HID_1393] = 1810, + [BNXT_ULP_CLASS_HID_1037] = 1811, + [BNXT_ULP_CLASS_HID_0751] = 1812, + [BNXT_ULP_CLASS_HID_19c7] = 1813, + [BNXT_ULP_CLASS_HID_0961] = 1814, + [BNXT_ULP_CLASS_HID_0d85] = 1815, + [BNXT_ULP_CLASS_HID_1d41] = 1816, + [BNXT_ULP_CLASS_HID_0235] = 1817, + [BNXT_ULP_CLASS_HID_1615] = 1818, + [BNXT_ULP_CLASS_HID_8052d] = 1819, + [BNXT_ULP_CLASS_HID_808e3] = 1820, + [BNXT_ULP_CLASS_HID_407a9] = 1821, + [BNXT_ULP_CLASS_HID_40b6f] = 1822, + [BNXT_ULP_CLASS_HID_c1aa1] = 1823, + [BNXT_ULP_CLASS_HID_c0e67] = 1824, + [BNXT_ULP_CLASS_HID_80f42] = 1825, + [BNXT_ULP_CLASS_HID_819e2] = 1826, + [BNXT_ULP_CLASS_HID_80552] = 1827, + [BNXT_ULP_CLASS_HID_817f2] = 1828, + [BNXT_ULP_CLASS_HID_c0cce] = 1829, + [BNXT_ULP_CLASS_HID_c1f6e] = 1830, + [BNXT_ULP_CLASS_HID_c1ade] = 1831, + [BNXT_ULP_CLASS_HID_c157e] = 1832, + [BNXT_ULP_CLASS_HID_a0d8c] = 1833, + [BNXT_ULP_CLASS_HID_a182c] = 1834, + [BNXT_ULP_CLASS_HID_a1b9c] = 1835, + [BNXT_ULP_CLASS_HID_a163c] = 1836, + [BNXT_ULP_CLASS_HID_e0308] = 1837, + [BNXT_ULP_CLASS_HID_e1da8] = 1838, + [BNXT_ULP_CLASS_HID_e1918] = 1839, + [BNXT_ULP_CLASS_HID_e0bda] = 1840, + [BNXT_ULP_CLASS_HID_20a88] = 1841, + [BNXT_ULP_CLASS_HID_20528] = 1842, + [BNXT_ULP_CLASS_HID_6080c] = 1843, + [BNXT_ULP_CLASS_HID_61aac] = 1844, + [BNXT_ULP_CLASS_HID_31a18] = 1845, + [BNXT_ULP_CLASS_HID_314b8] = 1846, + [BNXT_ULP_CLASS_HID_71f9c] = 1847, + [BNXT_ULP_CLASS_HID_70a5e] = 1848, + [BNXT_ULP_CLASS_HID_282c0] = 1849, + [BNXT_ULP_CLASS_HID_29d60] = 1850, + [BNXT_ULP_CLASS_HID_68044] = 1851, + [BNXT_ULP_CLASS_HID_692e4] = 1852, + [BNXT_ULP_CLASS_HID_39250] = 1853, + [BNXT_ULP_CLASS_HID_38c12] = 1854, + [BNXT_ULP_CLASS_HID_797d4] = 1855, + [BNXT_ULP_CLASS_HID_78196] = 1856, + [BNXT_ULP_CLASS_HID_80f32] = 1857, + [BNXT_ULP_CLASS_HID_81992] = 1858, + [BNXT_ULP_CLASS_HID_80522] = 1859, + [BNXT_ULP_CLASS_HID_81782] = 1860, + [BNXT_ULP_CLASS_HID_c0cbe] = 1861, + [BNXT_ULP_CLASS_HID_c1f1e] = 1862, + [BNXT_ULP_CLASS_HID_c1aae] = 1863, + [BNXT_ULP_CLASS_HID_c150e] = 1864, + [BNXT_ULP_CLASS_HID_a0dfc] = 1865, + [BNXT_ULP_CLASS_HID_a185c] = 1866, + [BNXT_ULP_CLASS_HID_a1bec] = 1867, + [BNXT_ULP_CLASS_HID_a164c] = 1868, + [BNXT_ULP_CLASS_HID_e0378] = 1869, + [BNXT_ULP_CLASS_HID_e1dd8] = 1870, + [BNXT_ULP_CLASS_HID_e1968] = 1871, + [BNXT_ULP_CLASS_HID_e0baa] = 1872, + [BNXT_ULP_CLASS_HID_20af8] = 1873, + [BNXT_ULP_CLASS_HID_20558] = 1874, + [BNXT_ULP_CLASS_HID_6087c] = 1875, + [BNXT_ULP_CLASS_HID_61adc] = 1876, + [BNXT_ULP_CLASS_HID_31a68] = 1877, + [BNXT_ULP_CLASS_HID_314c8] = 1878, + [BNXT_ULP_CLASS_HID_71fec] = 1879, + [BNXT_ULP_CLASS_HID_70a2e] = 1880, + [BNXT_ULP_CLASS_HID_282b0] = 1881, + [BNXT_ULP_CLASS_HID_29d10] = 1882, + [BNXT_ULP_CLASS_HID_68034] = 1883, + [BNXT_ULP_CLASS_HID_69294] = 1884, + [BNXT_ULP_CLASS_HID_39220] = 1885, + [BNXT_ULP_CLASS_HID_38c62] = 1886, + [BNXT_ULP_CLASS_HID_797a4] = 1887, + [BNXT_ULP_CLASS_HID_781e6] = 1888, + [BNXT_ULP_CLASS_HID_0f05] = 1889, + [BNXT_ULP_CLASS_HID_0f09] = 1890, + [BNXT_ULP_CLASS_HID_0f06] = 1891, + [BNXT_ULP_CLASS_HID_19a6] = 1892, + [BNXT_ULP_CLASS_HID_0f0a] = 1893, + [BNXT_ULP_CLASS_HID_19aa] = 1894, + [BNXT_ULP_CLASS_HID_0f15] = 1895, + [BNXT_ULP_CLASS_HID_0f19] = 1896, + [BNXT_ULP_CLASS_HID_0f65] = 1897, + [BNXT_ULP_CLASS_HID_0f69] = 1898, + [BNXT_ULP_CLASS_HID_0f16] = 1899, + [BNXT_ULP_CLASS_HID_19b6] = 1900, + [BNXT_ULP_CLASS_HID_0f1a] = 1901, + [BNXT_ULP_CLASS_HID_19ba] = 1902, + [BNXT_ULP_CLASS_HID_0f66] = 1903, + [BNXT_ULP_CLASS_HID_19c6] = 1904, + [BNXT_ULP_CLASS_HID_0f6a] = 1905, + [BNXT_ULP_CLASS_HID_19ca] = 1906 }; /* Array for the proto matcher list */ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { [1] = { - .class_hid = BNXT_ULP_CLASS_HID_55dd, + .class_hid = BNXT_ULP_CLASS_HID_00b8, .class_tid = 1, .hdr_sig_id = 0, .flow_sig_id = 4096UL, @@ -1332,7 +1940,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_0_BITMASK_O_IPV6_DST_ADDR } }, [2] = { - .class_hid = BNXT_ULP_CLASS_HID_1df1, + .class_hid = BNXT_ULP_CLASS_HID_0cc2, .class_tid = 1, .hdr_sig_id = 0, .flow_sig_id = 4104UL, @@ -1348,7 +1956,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_0_BITMASK_O_IPV6_DST_ADDR } }, [3] = { - .class_hid = BNXT_ULP_CLASS_HID_3e55, + .class_hid = BNXT_ULP_CLASS_HID_10e4, .class_tid = 1, .hdr_sig_id = 0, .flow_sig_id = 6144UL, @@ -1364,7 +1972,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_0_BITMASK_O_IPV6_DST_ADDR } }, [4] = { - .class_hid = BNXT_ULP_CLASS_HID_0649, + .class_hid = BNXT_ULP_CLASS_HID_1d0e, .class_tid = 1, .hdr_sig_id = 0, .flow_sig_id = 6152UL, @@ -1381,7 +1989,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_0_BITMASK_O_IPV6_DST_ADDR } }, [5] = { - .class_hid = BNXT_ULP_CLASS_HID_1011, + .class_hid = BNXT_ULP_CLASS_HID_0286, .class_tid = 1, .hdr_sig_id = 1, .flow_sig_id = 16384UL, @@ -1396,7 +2004,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_1_BITMASK_O_IPV4_DST_ADDR } }, [6] = { - .class_hid = BNXT_ULP_CLASS_HID_40e9, + .class_hid = BNXT_ULP_CLASS_HID_0e98, .class_tid = 1, .hdr_sig_id = 1, .flow_sig_id = 16392UL, @@ -1412,7 +2020,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_1_BITMASK_O_IPV4_DST_ADDR } }, [7] = { - .class_hid = BNXT_ULP_CLASS_HID_3e99, + .class_hid = BNXT_ULP_CLASS_HID_1666, .class_tid = 1, .hdr_sig_id = 1, .flow_sig_id = 24576UL, @@ -1428,7 +2036,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_1_BITMASK_O_IPV4_DST_ADDR } }, [8] = { - .class_hid = BNXT_ULP_CLASS_HID_06ad, + .class_hid = BNXT_ULP_CLASS_HID_02de, .class_tid = 1, .hdr_sig_id = 1, .flow_sig_id = 24584UL, @@ -1445,7 +2053,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_1_BITMASK_O_IPV4_DST_ADDR } }, [9] = { - .class_hid = BNXT_ULP_CLASS_HID_38c7, + .class_hid = BNXT_ULP_CLASS_HID_81d25, .class_tid = 1, .hdr_sig_id = 2, .flow_sig_id = 32768UL, @@ -1461,7 +2069,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_2_BITMASK_O_IPV6_DST_ADDR } }, [10] = { - .class_hid = BNXT_ULP_CLASS_HID_00fb, + .class_hid = BNXT_ULP_CLASS_HID_809ad, .class_tid = 1, .hdr_sig_id = 2, .flow_sig_id = 32776UL, @@ -1478,7 +2086,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_2_BITMASK_O_IPV6_DST_ADDR } }, [11] = { - .class_hid = BNXT_ULP_CLASS_HID_24d3, + .class_hid = BNXT_ULP_CLASS_HID_80ae3, .class_tid = 1, .hdr_sig_id = 2, .flow_sig_id = 32832UL, @@ -1495,7 +2103,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_2_BITMASK_O_IPV6_DST_ADDR } }, [12] = { - .class_hid = BNXT_ULP_CLASS_HID_559b, + .class_hid = BNXT_ULP_CLASS_HID_8170d, .class_tid = 1, .hdr_sig_id = 2, .flow_sig_id = 32840UL, @@ -1513,7 +2121,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_2_BITMASK_O_IPV6_DST_ADDR } }, [13] = { - .class_hid = BNXT_ULP_CLASS_HID_5003, + .class_hid = BNXT_ULP_CLASS_HID_80773, .class_tid = 1, .hdr_sig_id = 2, .flow_sig_id = 49152UL, @@ -1530,7 +2138,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_2_BITMASK_O_IPV6_DST_ADDR } }, [14] = { - .class_hid = BNXT_ULP_CLASS_HID_1837, + .class_hid = BNXT_ULP_CLASS_HID_8139d, .class_tid = 1, .hdr_sig_id = 2, .flow_sig_id = 49160UL, @@ -1548,7 +2156,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_2_BITMASK_O_IPV6_DST_ADDR } }, [15] = { - .class_hid = BNXT_ULP_CLASS_HID_3bef, + .class_hid = BNXT_ULP_CLASS_HID_814d3, .class_tid = 1, .hdr_sig_id = 2, .flow_sig_id = 49216UL, @@ -1566,7 +2174,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_2_BITMASK_O_IPV6_DST_ADDR } }, [16] = { - .class_hid = BNXT_ULP_CLASS_HID_0403, + .class_hid = BNXT_ULP_CLASS_HID_8015b, .class_tid = 1, .hdr_sig_id = 2, .flow_sig_id = 49224UL, @@ -1585,7 +2193,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_2_BITMASK_O_IPV6_DST_ADDR } }, [17] = { - .class_hid = BNXT_ULP_CLASS_HID_3d3f, + .class_hid = BNXT_ULP_CLASS_HID_21977, .class_tid = 1, .hdr_sig_id = 3, .flow_sig_id = 131072UL, @@ -1601,7 +2209,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_3_BITMASK_O_IPV4_DST_ADDR } }, [18] = { - .class_hid = BNXT_ULP_CLASS_HID_0543, + .class_hid = BNXT_ULP_CLASS_HID_205ef, .class_tid = 1, .hdr_sig_id = 3, .flow_sig_id = 131080UL, @@ -1618,7 +2226,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_3_BITMASK_O_IPV4_DST_ADDR } }, [19] = { - .class_hid = BNXT_ULP_CLASS_HID_292b, + .class_hid = BNXT_ULP_CLASS_HID_20735, .class_tid = 1, .hdr_sig_id = 3, .flow_sig_id = 131136UL, @@ -1635,7 +2243,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_3_BITMASK_O_IPV4_DST_ADDR } }, [20] = { - .class_hid = BNXT_ULP_CLASS_HID_59e3, + .class_hid = BNXT_ULP_CLASS_HID_2134f, .class_tid = 1, .hdr_sig_id = 3, .flow_sig_id = 131144UL, @@ -1653,7 +2261,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_3_BITMASK_O_IPV4_DST_ADDR } }, [21] = { - .class_hid = BNXT_ULP_CLASS_HID_5d3b, + .class_hid = BNXT_ULP_CLASS_HID_61beb, .class_tid = 1, .hdr_sig_id = 3, .flow_sig_id = 196608UL, @@ -1670,7 +2278,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_3_BITMASK_O_IPV4_DST_ADDR } }, [22] = { - .class_hid = BNXT_ULP_CLASS_HID_254f, + .class_hid = BNXT_ULP_CLASS_HID_60863, .class_tid = 1, .hdr_sig_id = 3, .flow_sig_id = 196616UL, @@ -1688,7 +2296,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_3_BITMASK_O_IPV4_DST_ADDR } }, [23] = { - .class_hid = BNXT_ULP_CLASS_HID_4917, + .class_hid = BNXT_ULP_CLASS_HID_609a9, .class_tid = 1, .hdr_sig_id = 3, .flow_sig_id = 196672UL, @@ -1706,7 +2314,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_3_BITMASK_O_IPV4_DST_ADDR } }, [24] = { - .class_hid = BNXT_ULP_CLASS_HID_113b, + .class_hid = BNXT_ULP_CLASS_HID_615c3, .class_tid = 1, .hdr_sig_id = 3, .flow_sig_id = 196680UL, @@ -1725,7 +2333,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_3_BITMASK_O_IPV4_DST_ADDR } }, [25] = { - .class_hid = BNXT_ULP_CLASS_HID_55fd, + .class_hid = BNXT_ULP_CLASS_HID_00a8, .class_tid = 1, .hdr_sig_id = 4, .flow_sig_id = 4096UL, @@ -1741,7 +2349,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_4_BITMASK_O_IPV6_DST_ADDR } }, [26] = { - .class_hid = BNXT_ULP_CLASS_HID_1dd1, + .class_hid = BNXT_ULP_CLASS_HID_0cd2, .class_tid = 1, .hdr_sig_id = 4, .flow_sig_id = 4104UL, @@ -1758,7 +2366,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_4_BITMASK_O_IPV6_DST_ADDR } }, [27] = { - .class_hid = BNXT_ULP_CLASS_HID_3e75, + .class_hid = BNXT_ULP_CLASS_HID_10f4, .class_tid = 1, .hdr_sig_id = 4, .flow_sig_id = 6144UL, @@ -1775,7 +2383,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_4_BITMASK_O_IPV6_DST_ADDR } }, [28] = { - .class_hid = BNXT_ULP_CLASS_HID_0669, + .class_hid = BNXT_ULP_CLASS_HID_1d1e, .class_tid = 1, .hdr_sig_id = 4, .flow_sig_id = 6152UL, @@ -1793,7 +2401,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_4_BITMASK_O_IPV6_DST_ADDR } }, [29] = { - .class_hid = BNXT_ULP_CLASS_HID_1ba1, + .class_hid = BNXT_ULP_CLASS_HID_1488, .class_tid = 1, .hdr_sig_id = 4, .flow_sig_id = 12288UL, @@ -1810,7 +2418,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_4_BITMASK_O_TCP_SRC_PORT } }, [30] = { - .class_hid = BNXT_ULP_CLASS_HID_4c69, + .class_hid = BNXT_ULP_CLASS_HID_0110, .class_tid = 1, .hdr_sig_id = 4, .flow_sig_id = 12296UL, @@ -1828,7 +2436,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_4_BITMASK_O_TCP_SRC_PORT } }, [31] = { - .class_hid = BNXT_ULP_CLASS_HID_0439, + .class_hid = BNXT_ULP_CLASS_HID_0532, .class_tid = 1, .hdr_sig_id = 4, .flow_sig_id = 14336UL, @@ -1846,7 +2454,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_4_BITMASK_O_TCP_SRC_PORT } }, [32] = { - .class_hid = BNXT_ULP_CLASS_HID_34e1, + .class_hid = BNXT_ULP_CLASS_HID_115c, .class_tid = 1, .hdr_sig_id = 4, .flow_sig_id = 14344UL, @@ -1865,7 +2473,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_4_BITMASK_O_TCP_SRC_PORT } }, [33] = { - .class_hid = BNXT_ULP_CLASS_HID_0465, + .class_hid = BNXT_ULP_CLASS_HID_0ab8, .class_tid = 1, .hdr_sig_id = 4, .flow_sig_id = 20480UL, @@ -1882,7 +2490,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_4_BITMASK_O_TCP_DST_PORT } }, [34] = { - .class_hid = BNXT_ULP_CLASS_HID_352d, + .class_hid = BNXT_ULP_CLASS_HID_16a2, .class_tid = 1, .hdr_sig_id = 4, .flow_sig_id = 20488UL, @@ -1900,7 +2508,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_4_BITMASK_O_TCP_DST_PORT } }, [35] = { - .class_hid = BNXT_ULP_CLASS_HID_55b1, + .class_hid = BNXT_ULP_CLASS_HID_1ac4, .class_tid = 1, .hdr_sig_id = 4, .flow_sig_id = 22528UL, @@ -1918,7 +2526,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_4_BITMASK_O_TCP_DST_PORT } }, [36] = { - .class_hid = BNXT_ULP_CLASS_HID_1da5, + .class_hid = BNXT_ULP_CLASS_HID_074c, .class_tid = 1, .hdr_sig_id = 4, .flow_sig_id = 22536UL, @@ -1937,7 +2545,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_4_BITMASK_O_TCP_DST_PORT } }, [37] = { - .class_hid = BNXT_ULP_CLASS_HID_32fd, + .class_hid = BNXT_ULP_CLASS_HID_1e98, .class_tid = 1, .hdr_sig_id = 4, .flow_sig_id = 28672UL, @@ -1955,7 +2563,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_4_BITMASK_O_TCP_DST_PORT } }, [38] = { - .class_hid = BNXT_ULP_CLASS_HID_63a5, + .class_hid = BNXT_ULP_CLASS_HID_0ae0, .class_tid = 1, .hdr_sig_id = 4, .flow_sig_id = 28680UL, @@ -1974,7 +2582,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_4_BITMASK_O_TCP_DST_PORT } }, [39] = { - .class_hid = BNXT_ULP_CLASS_HID_1b75, + .class_hid = BNXT_ULP_CLASS_HID_0f02, .class_tid = 1, .hdr_sig_id = 4, .flow_sig_id = 30720UL, @@ -1993,7 +2601,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_4_BITMASK_O_TCP_DST_PORT } }, [40] = { - .class_hid = BNXT_ULP_CLASS_HID_4c3d, + .class_hid = BNXT_ULP_CLASS_HID_1b2c, .class_tid = 1, .hdr_sig_id = 4, .flow_sig_id = 30728UL, @@ -2013,7 +2621,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_4_BITMASK_O_TCP_DST_PORT } }, [41] = { - .class_hid = BNXT_ULP_CLASS_HID_1031, + .class_hid = BNXT_ULP_CLASS_HID_0296, .class_tid = 1, .hdr_sig_id = 5, .flow_sig_id = 16384UL, @@ -2029,7 +2637,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_5_BITMASK_O_IPV4_DST_ADDR } }, [42] = { - .class_hid = BNXT_ULP_CLASS_HID_40c9, + .class_hid = BNXT_ULP_CLASS_HID_0e88, .class_tid = 1, .hdr_sig_id = 5, .flow_sig_id = 16392UL, @@ -2046,7 +2654,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_5_BITMASK_O_IPV4_DST_ADDR } }, [43] = { - .class_hid = BNXT_ULP_CLASS_HID_3eb9, + .class_hid = BNXT_ULP_CLASS_HID_1676, .class_tid = 1, .hdr_sig_id = 5, .flow_sig_id = 24576UL, @@ -2063,7 +2671,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_5_BITMASK_O_IPV4_DST_ADDR } }, [44] = { - .class_hid = BNXT_ULP_CLASS_HID_068d, + .class_hid = BNXT_ULP_CLASS_HID_02ce, .class_tid = 1, .hdr_sig_id = 5, .flow_sig_id = 24584UL, @@ -2081,7 +2689,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_5_BITMASK_O_IPV4_DST_ADDR } }, [45] = { - .class_hid = BNXT_ULP_CLASS_HID_5039, + .class_hid = BNXT_ULP_CLASS_HID_8076e, .class_tid = 1, .hdr_sig_id = 5, .flow_sig_id = 49152UL, @@ -2098,7 +2706,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_5_BITMASK_O_TCP_SRC_PORT } }, [46] = { - .class_hid = BNXT_ULP_CLASS_HID_180d, + .class_hid = BNXT_ULP_CLASS_HID_81380, .class_tid = 1, .hdr_sig_id = 5, .flow_sig_id = 49160UL, @@ -2116,7 +2724,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_5_BITMASK_O_TCP_SRC_PORT } }, [47] = { - .class_hid = BNXT_ULP_CLASS_HID_15fd, + .class_hid = BNXT_ULP_CLASS_HID_81b4e, .class_tid = 1, .hdr_sig_id = 5, .flow_sig_id = 57344UL, @@ -2134,7 +2742,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_5_BITMASK_O_TCP_SRC_PORT } }, [48] = { - .class_hid = BNXT_ULP_CLASS_HID_46b5, + .class_hid = BNXT_ULP_CLASS_HID_807c6, .class_tid = 1, .hdr_sig_id = 5, .flow_sig_id = 57352UL, @@ -2153,7 +2761,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_5_BITMASK_O_TCP_SRC_PORT } }, [49] = { - .class_hid = BNXT_ULP_CLASS_HID_303d, + .class_hid = BNXT_ULP_CLASS_HID_404ea, .class_tid = 1, .hdr_sig_id = 5, .flow_sig_id = 81920UL, @@ -2170,7 +2778,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_5_BITMASK_O_TCP_DST_PORT } }, [50] = { - .class_hid = BNXT_ULP_CLASS_HID_60f5, + .class_hid = BNXT_ULP_CLASS_HID_4110c, .class_tid = 1, .hdr_sig_id = 5, .flow_sig_id = 81928UL, @@ -2188,7 +2796,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_5_BITMASK_O_TCP_DST_PORT } }, [51] = { - .class_hid = BNXT_ULP_CLASS_HID_5ea5, + .class_hid = BNXT_ULP_CLASS_HID_418ca, .class_tid = 1, .hdr_sig_id = 5, .flow_sig_id = 90112UL, @@ -2206,7 +2814,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_5_BITMASK_O_TCP_DST_PORT } }, [52] = { - .class_hid = BNXT_ULP_CLASS_HID_2689, + .class_hid = BNXT_ULP_CLASS_HID_40542, .class_tid = 1, .hdr_sig_id = 5, .flow_sig_id = 90120UL, @@ -2225,7 +2833,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_5_BITMASK_O_TCP_DST_PORT } }, [53] = { - .class_hid = BNXT_ULP_CLASS_HID_0771, + .class_hid = BNXT_ULP_CLASS_HID_c09e2, .class_tid = 1, .hdr_sig_id = 5, .flow_sig_id = 114688UL, @@ -2243,7 +2851,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_5_BITMASK_O_TCP_DST_PORT } }, [54] = { - .class_hid = BNXT_ULP_CLASS_HID_3809, + .class_hid = BNXT_ULP_CLASS_HID_c1604, .class_tid = 1, .hdr_sig_id = 5, .flow_sig_id = 114696UL, @@ -2262,7 +2870,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_5_BITMASK_O_TCP_DST_PORT } }, [55] = { - .class_hid = BNXT_ULP_CLASS_HID_35f9, + .class_hid = BNXT_ULP_CLASS_HID_c1dc2, .class_tid = 1, .hdr_sig_id = 5, .flow_sig_id = 122880UL, @@ -2281,7 +2889,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_5_BITMASK_O_TCP_DST_PORT } }, [56] = { - .class_hid = BNXT_ULP_CLASS_HID_66b1, + .class_hid = BNXT_ULP_CLASS_HID_c0a5a, .class_tid = 1, .hdr_sig_id = 5, .flow_sig_id = 122888UL, @@ -2301,7 +2909,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_5_BITMASK_O_TCP_DST_PORT } }, [57] = { - .class_hid = BNXT_ULP_CLASS_HID_559d, + .class_hid = BNXT_ULP_CLASS_HID_0098, .class_tid = 1, .hdr_sig_id = 6, .flow_sig_id = 4096UL, @@ -2317,7 +2925,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_6_BITMASK_O_IPV6_DST_ADDR } }, [58] = { - .class_hid = BNXT_ULP_CLASS_HID_1db1, + .class_hid = BNXT_ULP_CLASS_HID_0ce2, .class_tid = 1, .hdr_sig_id = 6, .flow_sig_id = 4104UL, @@ -2334,7 +2942,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_6_BITMASK_O_IPV6_DST_ADDR } }, [59] = { - .class_hid = BNXT_ULP_CLASS_HID_3e15, + .class_hid = BNXT_ULP_CLASS_HID_10c4, .class_tid = 1, .hdr_sig_id = 6, .flow_sig_id = 6144UL, @@ -2351,7 +2959,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_6_BITMASK_O_IPV6_DST_ADDR } }, [60] = { - .class_hid = BNXT_ULP_CLASS_HID_0609, + .class_hid = BNXT_ULP_CLASS_HID_1d2e, .class_tid = 1, .hdr_sig_id = 6, .flow_sig_id = 6152UL, @@ -2369,7 +2977,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_6_BITMASK_O_IPV6_DST_ADDR } }, [61] = { - .class_hid = BNXT_ULP_CLASS_HID_1bc1, + .class_hid = BNXT_ULP_CLASS_HID_14b8, .class_tid = 1, .hdr_sig_id = 6, .flow_sig_id = 12288UL, @@ -2386,7 +2994,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_6_BITMASK_O_UDP_SRC_PORT } }, [62] = { - .class_hid = BNXT_ULP_CLASS_HID_4c09, + .class_hid = BNXT_ULP_CLASS_HID_0120, .class_tid = 1, .hdr_sig_id = 6, .flow_sig_id = 12296UL, @@ -2404,7 +3012,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_6_BITMASK_O_UDP_SRC_PORT } }, [63] = { - .class_hid = BNXT_ULP_CLASS_HID_0459, + .class_hid = BNXT_ULP_CLASS_HID_0502, .class_tid = 1, .hdr_sig_id = 6, .flow_sig_id = 14336UL, @@ -2422,7 +3030,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_6_BITMASK_O_UDP_SRC_PORT } }, [64] = { - .class_hid = BNXT_ULP_CLASS_HID_3481, + .class_hid = BNXT_ULP_CLASS_HID_116c, .class_tid = 1, .hdr_sig_id = 6, .flow_sig_id = 14344UL, @@ -2441,7 +3049,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_6_BITMASK_O_UDP_SRC_PORT } }, [65] = { - .class_hid = BNXT_ULP_CLASS_HID_0405, + .class_hid = BNXT_ULP_CLASS_HID_0a88, .class_tid = 1, .hdr_sig_id = 6, .flow_sig_id = 20480UL, @@ -2458,7 +3066,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_6_BITMASK_O_UDP_DST_PORT } }, [66] = { - .class_hid = BNXT_ULP_CLASS_HID_354d, + .class_hid = BNXT_ULP_CLASS_HID_1692, .class_tid = 1, .hdr_sig_id = 6, .flow_sig_id = 20488UL, @@ -2476,7 +3084,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_6_BITMASK_O_UDP_DST_PORT } }, [67] = { - .class_hid = BNXT_ULP_CLASS_HID_55d1, + .class_hid = BNXT_ULP_CLASS_HID_1af4, .class_tid = 1, .hdr_sig_id = 6, .flow_sig_id = 22528UL, @@ -2494,7 +3102,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_6_BITMASK_O_UDP_DST_PORT } }, [68] = { - .class_hid = BNXT_ULP_CLASS_HID_1dc5, + .class_hid = BNXT_ULP_CLASS_HID_077c, .class_tid = 1, .hdr_sig_id = 6, .flow_sig_id = 22536UL, @@ -2513,7 +3121,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_6_BITMASK_O_UDP_DST_PORT } }, [69] = { - .class_hid = BNXT_ULP_CLASS_HID_329d, + .class_hid = BNXT_ULP_CLASS_HID_1ea8, .class_tid = 1, .hdr_sig_id = 6, .flow_sig_id = 28672UL, @@ -2531,7 +3139,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_6_BITMASK_O_UDP_DST_PORT } }, [70] = { - .class_hid = BNXT_ULP_CLASS_HID_63c5, + .class_hid = BNXT_ULP_CLASS_HID_0ad0, .class_tid = 1, .hdr_sig_id = 6, .flow_sig_id = 28680UL, @@ -2550,7 +3158,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_6_BITMASK_O_UDP_DST_PORT } }, [71] = { - .class_hid = BNXT_ULP_CLASS_HID_1b15, + .class_hid = BNXT_ULP_CLASS_HID_0f32, .class_tid = 1, .hdr_sig_id = 6, .flow_sig_id = 30720UL, @@ -2569,7 +3177,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_6_BITMASK_O_UDP_DST_PORT } }, [72] = { - .class_hid = BNXT_ULP_CLASS_HID_4c5d, + .class_hid = BNXT_ULP_CLASS_HID_1b1c, .class_tid = 1, .hdr_sig_id = 6, .flow_sig_id = 30728UL, @@ -2589,7 +3197,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_6_BITMASK_O_UDP_DST_PORT } }, [73] = { - .class_hid = BNXT_ULP_CLASS_HID_1051, + .class_hid = BNXT_ULP_CLASS_HID_02a6, .class_tid = 1, .hdr_sig_id = 7, .flow_sig_id = 16384UL, @@ -2605,7 +3213,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_7_BITMASK_O_IPV4_DST_ADDR } }, [74] = { - .class_hid = BNXT_ULP_CLASS_HID_40a9, + .class_hid = BNXT_ULP_CLASS_HID_0eb8, .class_tid = 1, .hdr_sig_id = 7, .flow_sig_id = 16392UL, @@ -2622,7 +3230,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_7_BITMASK_O_IPV4_DST_ADDR } }, [75] = { - .class_hid = BNXT_ULP_CLASS_HID_3ed9, + .class_hid = BNXT_ULP_CLASS_HID_1646, .class_tid = 1, .hdr_sig_id = 7, .flow_sig_id = 24576UL, @@ -2639,7 +3247,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_7_BITMASK_O_IPV4_DST_ADDR } }, [76] = { - .class_hid = BNXT_ULP_CLASS_HID_06ed, + .class_hid = BNXT_ULP_CLASS_HID_02fe, .class_tid = 1, .hdr_sig_id = 7, .flow_sig_id = 24584UL, @@ -2657,7 +3265,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_7_BITMASK_O_IPV4_DST_ADDR } }, [77] = { - .class_hid = BNXT_ULP_CLASS_HID_5059, + .class_hid = BNXT_ULP_CLASS_HID_8075e, .class_tid = 1, .hdr_sig_id = 7, .flow_sig_id = 49152UL, @@ -2674,7 +3282,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_7_BITMASK_O_UDP_SRC_PORT } }, [78] = { - .class_hid = BNXT_ULP_CLASS_HID_186d, + .class_hid = BNXT_ULP_CLASS_HID_813b0, .class_tid = 1, .hdr_sig_id = 7, .flow_sig_id = 49160UL, @@ -2692,7 +3300,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_7_BITMASK_O_UDP_SRC_PORT } }, [79] = { - .class_hid = BNXT_ULP_CLASS_HID_159d, + .class_hid = BNXT_ULP_CLASS_HID_81b7e, .class_tid = 1, .hdr_sig_id = 7, .flow_sig_id = 57344UL, @@ -2710,7 +3318,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_7_BITMASK_O_UDP_SRC_PORT } }, [80] = { - .class_hid = BNXT_ULP_CLASS_HID_46d5, + .class_hid = BNXT_ULP_CLASS_HID_807f6, .class_tid = 1, .hdr_sig_id = 7, .flow_sig_id = 57352UL, @@ -2729,7 +3337,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_7_BITMASK_O_UDP_SRC_PORT } }, [81] = { - .class_hid = BNXT_ULP_CLASS_HID_305d, + .class_hid = BNXT_ULP_CLASS_HID_404da, .class_tid = 1, .hdr_sig_id = 7, .flow_sig_id = 81920UL, @@ -2746,7 +3354,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_7_BITMASK_O_UDP_DST_PORT } }, [82] = { - .class_hid = BNXT_ULP_CLASS_HID_6095, + .class_hid = BNXT_ULP_CLASS_HID_4113c, .class_tid = 1, .hdr_sig_id = 7, .flow_sig_id = 81928UL, @@ -2764,7 +3372,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_7_BITMASK_O_UDP_DST_PORT } }, [83] = { - .class_hid = BNXT_ULP_CLASS_HID_5ec5, + .class_hid = BNXT_ULP_CLASS_HID_418fa, .class_tid = 1, .hdr_sig_id = 7, .flow_sig_id = 90112UL, @@ -2782,7 +3390,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_7_BITMASK_O_UDP_DST_PORT } }, [84] = { - .class_hid = BNXT_ULP_CLASS_HID_26e9, + .class_hid = BNXT_ULP_CLASS_HID_40572, .class_tid = 1, .hdr_sig_id = 7, .flow_sig_id = 90120UL, @@ -2801,7 +3409,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_7_BITMASK_O_UDP_DST_PORT } }, [85] = { - .class_hid = BNXT_ULP_CLASS_HID_0711, + .class_hid = BNXT_ULP_CLASS_HID_c09d2, .class_tid = 1, .hdr_sig_id = 7, .flow_sig_id = 114688UL, @@ -2819,7 +3427,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_7_BITMASK_O_UDP_DST_PORT } }, [86] = { - .class_hid = BNXT_ULP_CLASS_HID_3869, + .class_hid = BNXT_ULP_CLASS_HID_c1634, .class_tid = 1, .hdr_sig_id = 7, .flow_sig_id = 114696UL, @@ -2838,7 +3446,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_7_BITMASK_O_UDP_DST_PORT } }, [87] = { - .class_hid = BNXT_ULP_CLASS_HID_3599, + .class_hid = BNXT_ULP_CLASS_HID_c1df2, .class_tid = 1, .hdr_sig_id = 7, .flow_sig_id = 122880UL, @@ -2857,7 +3465,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_7_BITMASK_O_UDP_DST_PORT } }, [88] = { - .class_hid = BNXT_ULP_CLASS_HID_66d1, + .class_hid = BNXT_ULP_CLASS_HID_c0a6a, .class_tid = 1, .hdr_sig_id = 7, .flow_sig_id = 122888UL, @@ -2877,7 +3485,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_7_BITMASK_O_UDP_DST_PORT } }, [89] = { - .class_hid = BNXT_ULP_CLASS_HID_38e7, + .class_hid = BNXT_ULP_CLASS_HID_81d35, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 32768UL, @@ -2894,7 +3502,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_IPV6_DST_ADDR } }, [90] = { - .class_hid = BNXT_ULP_CLASS_HID_00db, + .class_hid = BNXT_ULP_CLASS_HID_809bd, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 32776UL, @@ -2912,7 +3520,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_IPV6_DST_ADDR } }, [91] = { - .class_hid = BNXT_ULP_CLASS_HID_24f3, + .class_hid = BNXT_ULP_CLASS_HID_80af3, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 32832UL, @@ -2930,7 +3538,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_IPV6_DST_ADDR } }, [92] = { - .class_hid = BNXT_ULP_CLASS_HID_55bb, + .class_hid = BNXT_ULP_CLASS_HID_8171d, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 32840UL, @@ -2949,7 +3557,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_IPV6_DST_ADDR } }, [93] = { - .class_hid = BNXT_ULP_CLASS_HID_5023, + .class_hid = BNXT_ULP_CLASS_HID_80763, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 49152UL, @@ -2967,7 +3575,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_IPV6_DST_ADDR } }, [94] = { - .class_hid = BNXT_ULP_CLASS_HID_1817, + .class_hid = BNXT_ULP_CLASS_HID_8138d, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 49160UL, @@ -2986,7 +3594,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_IPV6_DST_ADDR } }, [95] = { - .class_hid = BNXT_ULP_CLASS_HID_3bcf, + .class_hid = BNXT_ULP_CLASS_HID_814c3, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 49216UL, @@ -3005,7 +3613,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_IPV6_DST_ADDR } }, [96] = { - .class_hid = BNXT_ULP_CLASS_HID_0423, + .class_hid = BNXT_ULP_CLASS_HID_8014b, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 49224UL, @@ -3025,7 +3633,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_IPV6_DST_ADDR } }, [97] = { - .class_hid = BNXT_ULP_CLASS_HID_58e3, + .class_hid = BNXT_ULP_CLASS_HID_c001f, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 98304UL, @@ -3043,7 +3651,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_SRC_PORT } }, [98] = { - .class_hid = BNXT_ULP_CLASS_HID_20d7, + .class_hid = BNXT_ULP_CLASS_HID_c0c39, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 98312UL, @@ -3062,7 +3670,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_SRC_PORT } }, [99] = { - .class_hid = BNXT_ULP_CLASS_HID_448f, + .class_hid = BNXT_ULP_CLASS_HID_c0d7f, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 98368UL, @@ -3081,7 +3689,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_SRC_PORT } }, [100] = { - .class_hid = BNXT_ULP_CLASS_HID_0ce3, + .class_hid = BNXT_ULP_CLASS_HID_c1999, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 98376UL, @@ -3101,7 +3709,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_SRC_PORT } }, [101] = { - .class_hid = BNXT_ULP_CLASS_HID_076b, + .class_hid = BNXT_ULP_CLASS_HID_c09ef, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 114688UL, @@ -3120,7 +3728,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_SRC_PORT } }, [102] = { - .class_hid = BNXT_ULP_CLASS_HID_3813, + .class_hid = BNXT_ULP_CLASS_HID_c1609, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 114696UL, @@ -3140,7 +3748,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_SRC_PORT } }, [103] = { - .class_hid = BNXT_ULP_CLASS_HID_5bcb, + .class_hid = BNXT_ULP_CLASS_HID_c174f, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 114752UL, @@ -3160,7 +3768,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_SRC_PORT } }, [104] = { - .class_hid = BNXT_ULP_CLASS_HID_243f, + .class_hid = BNXT_ULP_CLASS_HID_c03d7, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 114760UL, @@ -3181,7 +3789,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_SRC_PORT } }, [105] = { - .class_hid = BNXT_ULP_CLASS_HID_144b, + .class_hid = BNXT_ULP_CLASS_HID_a1e73, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 163840UL, @@ -3199,7 +3807,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_DST_PORT } }, [106] = { - .class_hid = BNXT_ULP_CLASS_HID_4573, + .class_hid = BNXT_ULP_CLASS_HID_a0afb, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 163848UL, @@ -3218,7 +3826,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_DST_PORT } }, [107] = { - .class_hid = BNXT_ULP_CLASS_HID_0057, + .class_hid = BNXT_ULP_CLASS_HID_a0c31, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 163904UL, @@ -3237,7 +3845,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_DST_PORT } }, [108] = { - .class_hid = BNXT_ULP_CLASS_HID_311f, + .class_hid = BNXT_ULP_CLASS_HID_a185b, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 163912UL, @@ -3257,7 +3865,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_DST_PORT } }, [109] = { - .class_hid = BNXT_ULP_CLASS_HID_2b87, + .class_hid = BNXT_ULP_CLASS_HID_a08a1, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 180224UL, @@ -3276,7 +3884,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_DST_PORT } }, [110] = { - .class_hid = BNXT_ULP_CLASS_HID_5c4f, + .class_hid = BNXT_ULP_CLASS_HID_a14cb, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 180232UL, @@ -3296,7 +3904,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_DST_PORT } }, [111] = { - .class_hid = BNXT_ULP_CLASS_HID_1793, + .class_hid = BNXT_ULP_CLASS_HID_a1601, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 180288UL, @@ -3316,7 +3924,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_DST_PORT } }, [112] = { - .class_hid = BNXT_ULP_CLASS_HID_485b, + .class_hid = BNXT_ULP_CLASS_HID_a0289, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 180296UL, @@ -3337,7 +3945,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_DST_PORT } }, [113] = { - .class_hid = BNXT_ULP_CLASS_HID_3447, + .class_hid = BNXT_ULP_CLASS_HID_e015d, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 229376UL, @@ -3356,7 +3964,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_DST_PORT } }, [114] = { - .class_hid = BNXT_ULP_CLASS_HID_650f, + .class_hid = BNXT_ULP_CLASS_HID_e0d47, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 229384UL, @@ -3376,7 +3984,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_DST_PORT } }, [115] = { - .class_hid = BNXT_ULP_CLASS_HID_2053, + .class_hid = BNXT_ULP_CLASS_HID_e0ebd, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 229440UL, @@ -3396,7 +4004,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_DST_PORT } }, [116] = { - .class_hid = BNXT_ULP_CLASS_HID_511b, + .class_hid = BNXT_ULP_CLASS_HID_e1aa7, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 229448UL, @@ -3417,7 +4025,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_DST_PORT } }, [117] = { - .class_hid = BNXT_ULP_CLASS_HID_4b83, + .class_hid = BNXT_ULP_CLASS_HID_e0b2d, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 245760UL, @@ -3437,7 +4045,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_DST_PORT } }, [118] = { - .class_hid = BNXT_ULP_CLASS_HID_13f7, + .class_hid = BNXT_ULP_CLASS_HID_e1757, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 245768UL, @@ -3458,7 +4066,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_DST_PORT } }, [119] = { - .class_hid = BNXT_ULP_CLASS_HID_37af, + .class_hid = BNXT_ULP_CLASS_HID_e188d, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 245824UL, @@ -3479,7 +4087,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_DST_PORT } }, [120] = { - .class_hid = BNXT_ULP_CLASS_HID_6857, + .class_hid = BNXT_ULP_CLASS_HID_e0515, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 245832UL, @@ -3501,7 +4109,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_DST_PORT } }, [121] = { - .class_hid = BNXT_ULP_CLASS_HID_3d1f, + .class_hid = BNXT_ULP_CLASS_HID_21967, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 131072UL, @@ -3518,7 +4126,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_IPV4_DST_ADDR } }, [122] = { - .class_hid = BNXT_ULP_CLASS_HID_0563, + .class_hid = BNXT_ULP_CLASS_HID_205ff, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 131080UL, @@ -3536,7 +4144,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_IPV4_DST_ADDR } }, [123] = { - .class_hid = BNXT_ULP_CLASS_HID_290b, + .class_hid = BNXT_ULP_CLASS_HID_20725, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 131136UL, @@ -3554,7 +4162,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_IPV4_DST_ADDR } }, [124] = { - .class_hid = BNXT_ULP_CLASS_HID_59c3, + .class_hid = BNXT_ULP_CLASS_HID_2135f, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 131144UL, @@ -3573,7 +4181,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_IPV4_DST_ADDR } }, [125] = { - .class_hid = BNXT_ULP_CLASS_HID_5d1b, + .class_hid = BNXT_ULP_CLASS_HID_61bfb, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 196608UL, @@ -3591,7 +4199,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_IPV4_DST_ADDR } }, [126] = { - .class_hid = BNXT_ULP_CLASS_HID_256f, + .class_hid = BNXT_ULP_CLASS_HID_60873, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 196616UL, @@ -3610,7 +4218,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_IPV4_DST_ADDR } }, [127] = { - .class_hid = BNXT_ULP_CLASS_HID_4937, + .class_hid = BNXT_ULP_CLASS_HID_609b9, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 196672UL, @@ -3629,7 +4237,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_IPV4_DST_ADDR } }, [128] = { - .class_hid = BNXT_ULP_CLASS_HID_111b, + .class_hid = BNXT_ULP_CLASS_HID_615d3, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 196680UL, @@ -3649,7 +4257,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_IPV4_DST_ADDR } }, [129] = { - .class_hid = BNXT_ULP_CLASS_HID_25f4b, + .class_hid = BNXT_ULP_CLASS_HID_30a55, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 393216UL, @@ -3667,7 +4275,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_SRC_PORT } }, [130] = { - .class_hid = BNXT_ULP_CLASS_HID_2275f, + .class_hid = BNXT_ULP_CLASS_HID_3164f, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 393224UL, @@ -3686,7 +4294,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_SRC_PORT } }, [131] = { - .class_hid = BNXT_ULP_CLASS_HID_24b67, + .class_hid = BNXT_ULP_CLASS_HID_317b5, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 393280UL, @@ -3705,7 +4313,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_SRC_PORT } }, [132] = { - .class_hid = BNXT_ULP_CLASS_HID_2134b, + .class_hid = BNXT_ULP_CLASS_HID_3040d, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 393288UL, @@ -3725,7 +4333,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_SRC_PORT } }, [133] = { - .class_hid = BNXT_ULP_CLASS_HID_21683, + .class_hid = BNXT_ULP_CLASS_HID_70ca9, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 458752UL, @@ -3744,7 +4352,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_SRC_PORT } }, [134] = { - .class_hid = BNXT_ULP_CLASS_HID_2475b, + .class_hid = BNXT_ULP_CLASS_HID_718c3, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 458760UL, @@ -3764,7 +4372,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_SRC_PORT } }, [135] = { - .class_hid = BNXT_ULP_CLASS_HID_202bf, + .class_hid = BNXT_ULP_CLASS_HID_71a09, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 458816UL, @@ -3784,7 +4392,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_SRC_PORT } }, [136] = { - .class_hid = BNXT_ULP_CLASS_HID_23377, + .class_hid = BNXT_ULP_CLASS_HID_70681, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 458824UL, @@ -3805,7 +4413,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_SRC_PORT } }, [137] = { - .class_hid = BNXT_ULP_CLASS_HID_119db, + .class_hid = BNXT_ULP_CLASS_HID_2821d, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 655360UL, @@ -3823,7 +4431,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_DST_PORT } }, [138] = { - .class_hid = BNXT_ULP_CLASS_HID_14a93, + .class_hid = BNXT_ULP_CLASS_HID_28e37, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 655368UL, @@ -3842,7 +4450,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_DST_PORT } }, [139] = { - .class_hid = BNXT_ULP_CLASS_HID_105f7, + .class_hid = BNXT_ULP_CLASS_HID_28f7d, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 655424UL, @@ -3861,7 +4469,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_DST_PORT } }, [140] = { - .class_hid = BNXT_ULP_CLASS_HID_1368f, + .class_hid = BNXT_ULP_CLASS_HID_29b97, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 655432UL, @@ -3881,7 +4489,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_DST_PORT } }, [141] = { - .class_hid = BNXT_ULP_CLASS_HID_139c7, + .class_hid = BNXT_ULP_CLASS_HID_68491, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 720896UL, @@ -3900,7 +4508,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_DST_PORT } }, [142] = { - .class_hid = BNXT_ULP_CLASS_HID_1022b, + .class_hid = BNXT_ULP_CLASS_HID_6908b, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 720904UL, @@ -3920,7 +4528,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_DST_PORT } }, [143] = { - .class_hid = BNXT_ULP_CLASS_HID_125f3, + .class_hid = BNXT_ULP_CLASS_HID_691f1, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 720960UL, @@ -3940,7 +4548,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_DST_PORT } }, [144] = { - .class_hid = BNXT_ULP_CLASS_HID_1568b, + .class_hid = BNXT_ULP_CLASS_HID_69deb, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 720968UL, @@ -3961,7 +4569,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_DST_PORT } }, [145] = { - .class_hid = BNXT_ULP_CLASS_HID_33c37, + .class_hid = BNXT_ULP_CLASS_HID_3926d, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 917504UL, @@ -3980,7 +4588,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_DST_PORT } }, [146] = { - .class_hid = BNXT_ULP_CLASS_HID_3041b, + .class_hid = BNXT_ULP_CLASS_HID_39e87, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 917512UL, @@ -4000,7 +4608,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_DST_PORT } }, [147] = { - .class_hid = BNXT_ULP_CLASS_HID_32823, + .class_hid = BNXT_ULP_CLASS_HID_38023, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 917568UL, @@ -4020,7 +4628,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_DST_PORT } }, [148] = { - .class_hid = BNXT_ULP_CLASS_HID_358fb, + .class_hid = BNXT_ULP_CLASS_HID_38c45, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 917576UL, @@ -4041,7 +4649,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_DST_PORT } }, [149] = { - .class_hid = BNXT_ULP_CLASS_HID_35c33, + .class_hid = BNXT_ULP_CLASS_HID_794e1, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 983040UL, @@ -4061,7 +4669,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_DST_PORT } }, [150] = { - .class_hid = BNXT_ULP_CLASS_HID_32407, + .class_hid = BNXT_ULP_CLASS_HID_78179, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 983048UL, @@ -4082,7 +4690,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_DST_PORT } }, [151] = { - .class_hid = BNXT_ULP_CLASS_HID_3482f, + .class_hid = BNXT_ULP_CLASS_HID_782a7, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 983104UL, @@ -4103,7 +4711,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_DST_PORT } }, [152] = { - .class_hid = BNXT_ULP_CLASS_HID_31033, + .class_hid = BNXT_ULP_CLASS_HID_78ed9, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 983112UL, @@ -4125,7 +4733,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_DST_PORT } }, [153] = { - .class_hid = BNXT_ULP_CLASS_HID_3887, + .class_hid = BNXT_ULP_CLASS_HID_81d05, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 32768UL, @@ -4142,7 +4750,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_IPV6_DST_ADDR } }, [154] = { - .class_hid = BNXT_ULP_CLASS_HID_00bb, + .class_hid = BNXT_ULP_CLASS_HID_8098d, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 32776UL, @@ -4160,7 +4768,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_IPV6_DST_ADDR } }, [155] = { - .class_hid = BNXT_ULP_CLASS_HID_2493, + .class_hid = BNXT_ULP_CLASS_HID_80ac3, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 32832UL, @@ -4178,7 +4786,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_IPV6_DST_ADDR } }, [156] = { - .class_hid = BNXT_ULP_CLASS_HID_55db, + .class_hid = BNXT_ULP_CLASS_HID_8172d, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 32840UL, @@ -4197,7 +4805,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_IPV6_DST_ADDR } }, [157] = { - .class_hid = BNXT_ULP_CLASS_HID_5043, + .class_hid = BNXT_ULP_CLASS_HID_80753, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 49152UL, @@ -4215,7 +4823,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_IPV6_DST_ADDR } }, [158] = { - .class_hid = BNXT_ULP_CLASS_HID_1877, + .class_hid = BNXT_ULP_CLASS_HID_813bd, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 49160UL, @@ -4234,7 +4842,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_IPV6_DST_ADDR } }, [159] = { - .class_hid = BNXT_ULP_CLASS_HID_3baf, + .class_hid = BNXT_ULP_CLASS_HID_814f3, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 49216UL, @@ -4253,7 +4861,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_IPV6_DST_ADDR } }, [160] = { - .class_hid = BNXT_ULP_CLASS_HID_0443, + .class_hid = BNXT_ULP_CLASS_HID_8017b, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 49224UL, @@ -4273,7 +4881,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_IPV6_DST_ADDR } }, [161] = { - .class_hid = BNXT_ULP_CLASS_HID_5883, + .class_hid = BNXT_ULP_CLASS_HID_c002f, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 98304UL, @@ -4291,7 +4899,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_SRC_PORT } }, [162] = { - .class_hid = BNXT_ULP_CLASS_HID_20b7, + .class_hid = BNXT_ULP_CLASS_HID_c0c09, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 98312UL, @@ -4310,7 +4918,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_SRC_PORT } }, [163] = { - .class_hid = BNXT_ULP_CLASS_HID_44ef, + .class_hid = BNXT_ULP_CLASS_HID_c0d4f, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 98368UL, @@ -4329,7 +4937,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_SRC_PORT } }, [164] = { - .class_hid = BNXT_ULP_CLASS_HID_0c83, + .class_hid = BNXT_ULP_CLASS_HID_c19a9, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 98376UL, @@ -4349,7 +4957,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_SRC_PORT } }, [165] = { - .class_hid = BNXT_ULP_CLASS_HID_070b, + .class_hid = BNXT_ULP_CLASS_HID_c09df, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 114688UL, @@ -4368,7 +4976,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_SRC_PORT } }, [166] = { - .class_hid = BNXT_ULP_CLASS_HID_3873, + .class_hid = BNXT_ULP_CLASS_HID_c1639, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 114696UL, @@ -4388,7 +4996,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_SRC_PORT } }, [167] = { - .class_hid = BNXT_ULP_CLASS_HID_5bab, + .class_hid = BNXT_ULP_CLASS_HID_c177f, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 114752UL, @@ -4408,7 +5016,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_SRC_PORT } }, [168] = { - .class_hid = BNXT_ULP_CLASS_HID_245f, + .class_hid = BNXT_ULP_CLASS_HID_c03e7, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 114760UL, @@ -4429,7 +5037,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_SRC_PORT } }, [169] = { - .class_hid = BNXT_ULP_CLASS_HID_142b, + .class_hid = BNXT_ULP_CLASS_HID_a1e43, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 163840UL, @@ -4447,7 +5055,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_DST_PORT } }, [170] = { - .class_hid = BNXT_ULP_CLASS_HID_4513, + .class_hid = BNXT_ULP_CLASS_HID_a0acb, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 163848UL, @@ -4466,7 +5074,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_DST_PORT } }, [171] = { - .class_hid = BNXT_ULP_CLASS_HID_0037, + .class_hid = BNXT_ULP_CLASS_HID_a0c01, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 163904UL, @@ -4485,7 +5093,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_DST_PORT } }, [172] = { - .class_hid = BNXT_ULP_CLASS_HID_317f, + .class_hid = BNXT_ULP_CLASS_HID_a186b, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 163912UL, @@ -4505,7 +5113,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_DST_PORT } }, [173] = { - .class_hid = BNXT_ULP_CLASS_HID_2be7, + .class_hid = BNXT_ULP_CLASS_HID_a0891, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 180224UL, @@ -4524,7 +5132,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_DST_PORT } }, [174] = { - .class_hid = BNXT_ULP_CLASS_HID_5c2f, + .class_hid = BNXT_ULP_CLASS_HID_a14fb, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 180232UL, @@ -4544,7 +5152,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_DST_PORT } }, [175] = { - .class_hid = BNXT_ULP_CLASS_HID_17f3, + .class_hid = BNXT_ULP_CLASS_HID_a1631, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 180288UL, @@ -4564,7 +5172,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_DST_PORT } }, [176] = { - .class_hid = BNXT_ULP_CLASS_HID_483b, + .class_hid = BNXT_ULP_CLASS_HID_a02b9, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 180296UL, @@ -4585,7 +5193,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_DST_PORT } }, [177] = { - .class_hid = BNXT_ULP_CLASS_HID_3427, + .class_hid = BNXT_ULP_CLASS_HID_e016d, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 229376UL, @@ -4604,7 +5212,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_DST_PORT } }, [178] = { - .class_hid = BNXT_ULP_CLASS_HID_656f, + .class_hid = BNXT_ULP_CLASS_HID_e0d77, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 229384UL, @@ -4624,7 +5232,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_DST_PORT } }, [179] = { - .class_hid = BNXT_ULP_CLASS_HID_2033, + .class_hid = BNXT_ULP_CLASS_HID_e0e8d, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 229440UL, @@ -4644,7 +5252,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_DST_PORT } }, [180] = { - .class_hid = BNXT_ULP_CLASS_HID_517b, + .class_hid = BNXT_ULP_CLASS_HID_e1a97, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 229448UL, @@ -4665,7 +5273,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_DST_PORT } }, [181] = { - .class_hid = BNXT_ULP_CLASS_HID_4be3, + .class_hid = BNXT_ULP_CLASS_HID_e0b1d, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 245760UL, @@ -4685,7 +5293,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_DST_PORT } }, [182] = { - .class_hid = BNXT_ULP_CLASS_HID_1397, + .class_hid = BNXT_ULP_CLASS_HID_e1767, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 245768UL, @@ -4706,7 +5314,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_DST_PORT } }, [183] = { - .class_hid = BNXT_ULP_CLASS_HID_37cf, + .class_hid = BNXT_ULP_CLASS_HID_e18bd, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 245824UL, @@ -4727,7 +5335,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_DST_PORT } }, [184] = { - .class_hid = BNXT_ULP_CLASS_HID_6837, + .class_hid = BNXT_ULP_CLASS_HID_e0525, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 245832UL, @@ -4749,7 +5357,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_DST_PORT } }, [185] = { - .class_hid = BNXT_ULP_CLASS_HID_3d7f, + .class_hid = BNXT_ULP_CLASS_HID_21957, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 131072UL, @@ -4766,7 +5374,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_IPV4_DST_ADDR } }, [186] = { - .class_hid = BNXT_ULP_CLASS_HID_0503, + .class_hid = BNXT_ULP_CLASS_HID_205cf, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 131080UL, @@ -4784,7 +5392,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_IPV4_DST_ADDR } }, [187] = { - .class_hid = BNXT_ULP_CLASS_HID_296b, + .class_hid = BNXT_ULP_CLASS_HID_20715, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 131136UL, @@ -4802,7 +5410,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_IPV4_DST_ADDR } }, [188] = { - .class_hid = BNXT_ULP_CLASS_HID_59a3, + .class_hid = BNXT_ULP_CLASS_HID_2136f, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 131144UL, @@ -4821,7 +5429,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_IPV4_DST_ADDR } }, [189] = { - .class_hid = BNXT_ULP_CLASS_HID_5d7b, + .class_hid = BNXT_ULP_CLASS_HID_61bcb, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 196608UL, @@ -4839,7 +5447,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_IPV4_DST_ADDR } }, [190] = { - .class_hid = BNXT_ULP_CLASS_HID_250f, + .class_hid = BNXT_ULP_CLASS_HID_60843, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 196616UL, @@ -4858,7 +5466,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_IPV4_DST_ADDR } }, [191] = { - .class_hid = BNXT_ULP_CLASS_HID_4957, + .class_hid = BNXT_ULP_CLASS_HID_60989, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 196672UL, @@ -4877,7 +5485,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_IPV4_DST_ADDR } }, [192] = { - .class_hid = BNXT_ULP_CLASS_HID_117b, + .class_hid = BNXT_ULP_CLASS_HID_615e3, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 196680UL, @@ -4897,7 +5505,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_IPV4_DST_ADDR } }, [193] = { - .class_hid = BNXT_ULP_CLASS_HID_25f2b, + .class_hid = BNXT_ULP_CLASS_HID_30a65, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 393216UL, @@ -4915,7 +5523,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_SRC_PORT } }, [194] = { - .class_hid = BNXT_ULP_CLASS_HID_2273f, + .class_hid = BNXT_ULP_CLASS_HID_3167f, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 393224UL, @@ -4934,7 +5542,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_SRC_PORT } }, [195] = { - .class_hid = BNXT_ULP_CLASS_HID_24b07, + .class_hid = BNXT_ULP_CLASS_HID_31785, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 393280UL, @@ -4953,7 +5561,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_SRC_PORT } }, [196] = { - .class_hid = BNXT_ULP_CLASS_HID_2132b, + .class_hid = BNXT_ULP_CLASS_HID_3043d, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 393288UL, @@ -4973,7 +5581,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_SRC_PORT } }, [197] = { - .class_hid = BNXT_ULP_CLASS_HID_216e3, + .class_hid = BNXT_ULP_CLASS_HID_70c99, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 458752UL, @@ -4992,7 +5600,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_SRC_PORT } }, [198] = { - .class_hid = BNXT_ULP_CLASS_HID_2473b, + .class_hid = BNXT_ULP_CLASS_HID_718f3, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 458760UL, @@ -5012,7 +5620,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_SRC_PORT } }, [199] = { - .class_hid = BNXT_ULP_CLASS_HID_202df, + .class_hid = BNXT_ULP_CLASS_HID_71a39, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 458816UL, @@ -5032,7 +5640,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_SRC_PORT } }, [200] = { - .class_hid = BNXT_ULP_CLASS_HID_23317, + .class_hid = BNXT_ULP_CLASS_HID_706b1, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 458824UL, @@ -5053,7 +5661,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_SRC_PORT } }, [201] = { - .class_hid = BNXT_ULP_CLASS_HID_119bb, + .class_hid = BNXT_ULP_CLASS_HID_2822d, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 655360UL, @@ -5071,7 +5679,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_DST_PORT } }, [202] = { - .class_hid = BNXT_ULP_CLASS_HID_14af3, + .class_hid = BNXT_ULP_CLASS_HID_28e07, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 655368UL, @@ -5090,7 +5698,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_DST_PORT } }, [203] = { - .class_hid = BNXT_ULP_CLASS_HID_10597, + .class_hid = BNXT_ULP_CLASS_HID_28f4d, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 655424UL, @@ -5109,7 +5717,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_DST_PORT } }, [204] = { - .class_hid = BNXT_ULP_CLASS_HID_136ef, + .class_hid = BNXT_ULP_CLASS_HID_29ba7, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 655432UL, @@ -5129,7 +5737,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_DST_PORT } }, [205] = { - .class_hid = BNXT_ULP_CLASS_HID_139a7, + .class_hid = BNXT_ULP_CLASS_HID_684a1, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 720896UL, @@ -5148,7 +5756,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_DST_PORT } }, [206] = { - .class_hid = BNXT_ULP_CLASS_HID_1024b, + .class_hid = BNXT_ULP_CLASS_HID_690bb, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 720904UL, @@ -5168,7 +5776,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_DST_PORT } }, [207] = { - .class_hid = BNXT_ULP_CLASS_HID_12593, + .class_hid = BNXT_ULP_CLASS_HID_691c1, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 720960UL, @@ -5188,7 +5796,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_DST_PORT } }, [208] = { - .class_hid = BNXT_ULP_CLASS_HID_156eb, + .class_hid = BNXT_ULP_CLASS_HID_69ddb, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 720968UL, @@ -5209,7 +5817,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_DST_PORT } }, [209] = { - .class_hid = BNXT_ULP_CLASS_HID_33c57, + .class_hid = BNXT_ULP_CLASS_HID_3925d, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 917504UL, @@ -5228,7 +5836,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_DST_PORT } }, [210] = { - .class_hid = BNXT_ULP_CLASS_HID_3047b, + .class_hid = BNXT_ULP_CLASS_HID_39eb7, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 917512UL, @@ -5248,7 +5856,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_DST_PORT } }, [211] = { - .class_hid = BNXT_ULP_CLASS_HID_32843, + .class_hid = BNXT_ULP_CLASS_HID_38013, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 917568UL, @@ -5268,7 +5876,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_DST_PORT } }, [212] = { - .class_hid = BNXT_ULP_CLASS_HID_3589b, + .class_hid = BNXT_ULP_CLASS_HID_38c75, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 917576UL, @@ -5289,7 +5897,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_DST_PORT } }, [213] = { - .class_hid = BNXT_ULP_CLASS_HID_35c53, + .class_hid = BNXT_ULP_CLASS_HID_794d1, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 983040UL, @@ -5309,7 +5917,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_DST_PORT } }, [214] = { - .class_hid = BNXT_ULP_CLASS_HID_32467, + .class_hid = BNXT_ULP_CLASS_HID_78149, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 983048UL, @@ -5330,7 +5938,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_DST_PORT } }, [215] = { - .class_hid = BNXT_ULP_CLASS_HID_3484f, + .class_hid = BNXT_ULP_CLASS_HID_78297, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 983104UL, @@ -5351,7 +5959,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_DST_PORT } }, [216] = { - .class_hid = BNXT_ULP_CLASS_HID_31053, + .class_hid = BNXT_ULP_CLASS_HID_78ee9, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 983112UL, @@ -5373,7 +5981,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_DST_PORT } }, [217] = { - .class_hid = BNXT_ULP_CLASS_HID_5ce1, + .class_hid = BNXT_ULP_CLASS_HID_0816, .class_tid = 1, .hdr_sig_id = 0, .flow_sig_id = 4096UL, @@ -5387,7 +5995,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_0_BITMASK_O_IPV6_DST_ADDR } }, [218] = { - .class_hid = BNXT_ULP_CLASS_HID_4579, + .class_hid = BNXT_ULP_CLASS_HID_1852, .class_tid = 1, .hdr_sig_id = 0, .flow_sig_id = 6144UL, @@ -5402,7 +6010,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_0_BITMASK_O_IPV6_DST_ADDR } }, [219] = { - .class_hid = BNXT_ULP_CLASS_HID_1735, + .class_hid = BNXT_ULP_CLASS_HID_09f4, .class_tid = 1, .hdr_sig_id = 1, .flow_sig_id = 16384UL, @@ -5416,7 +6024,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_1_BITMASK_O_IPV4_DST_ADDR } }, [220] = { - .class_hid = BNXT_ULP_CLASS_HID_45bd, + .class_hid = BNXT_ULP_CLASS_HID_1dd4, .class_tid = 1, .hdr_sig_id = 1, .flow_sig_id = 24576UL, @@ -5431,7 +6039,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_1_BITMASK_O_IPV4_DST_ADDR } }, [221] = { - .class_hid = BNXT_ULP_CLASS_HID_3feb, + .class_hid = BNXT_ULP_CLASS_HID_804f1, .class_tid = 1, .hdr_sig_id = 2, .flow_sig_id = 32768UL, @@ -5446,7 +6054,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_2_BITMASK_O_IPV6_DST_ADDR } }, [222] = { - .class_hid = BNXT_ULP_CLASS_HID_2bf7, + .class_hid = BNXT_ULP_CLASS_HID_81251, .class_tid = 1, .hdr_sig_id = 2, .flow_sig_id = 32832UL, @@ -5462,7 +6070,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_2_BITMASK_O_IPV6_DST_ADDR } }, [223] = { - .class_hid = BNXT_ULP_CLASS_HID_5727, + .class_hid = BNXT_ULP_CLASS_HID_80ee1, .class_tid = 1, .hdr_sig_id = 2, .flow_sig_id = 49152UL, @@ -5478,7 +6086,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_2_BITMASK_O_IPV6_DST_ADDR } }, [224] = { - .class_hid = BNXT_ULP_CLASS_HID_4333, + .class_hid = BNXT_ULP_CLASS_HID_81c41, .class_tid = 1, .hdr_sig_id = 2, .flow_sig_id = 49216UL, @@ -5495,7 +6103,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_2_BITMASK_O_IPV6_DST_ADDR } }, [225] = { - .class_hid = BNXT_ULP_CLASS_HID_4453, + .class_hid = BNXT_ULP_CLASS_HID_2013b, .class_tid = 1, .hdr_sig_id = 3, .flow_sig_id = 131072UL, @@ -5510,7 +6118,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_3_BITMASK_O_IPV4_DST_ADDR } }, [226] = { - .class_hid = BNXT_ULP_CLASS_HID_304f, + .class_hid = BNXT_ULP_CLASS_HID_20e9b, .class_tid = 1, .hdr_sig_id = 3, .flow_sig_id = 131136UL, @@ -5526,7 +6134,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_3_BITMASK_O_IPV4_DST_ADDR } }, [227] = { - .class_hid = BNXT_ULP_CLASS_HID_645f, + .class_hid = BNXT_ULP_CLASS_HID_603bf, .class_tid = 1, .hdr_sig_id = 3, .flow_sig_id = 196608UL, @@ -5542,7 +6150,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_3_BITMASK_O_IPV4_DST_ADDR } }, [228] = { - .class_hid = BNXT_ULP_CLASS_HID_504b, + .class_hid = BNXT_ULP_CLASS_HID_6111f, .class_tid = 1, .hdr_sig_id = 3, .flow_sig_id = 196672UL, @@ -5559,7 +6167,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_3_BITMASK_O_IPV4_DST_ADDR } }, [229] = { - .class_hid = BNXT_ULP_CLASS_HID_5cc1, + .class_hid = BNXT_ULP_CLASS_HID_0806, .class_tid = 1, .hdr_sig_id = 4, .flow_sig_id = 4096UL, @@ -5574,7 +6182,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_4_BITMASK_O_IPV6_DST_ADDR } }, [230] = { - .class_hid = BNXT_ULP_CLASS_HID_4559, + .class_hid = BNXT_ULP_CLASS_HID_1842, .class_tid = 1, .hdr_sig_id = 4, .flow_sig_id = 6144UL, @@ -5590,7 +6198,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_4_BITMASK_O_IPV6_DST_ADDR } }, [231] = { - .class_hid = BNXT_ULP_CLASS_HID_2285, + .class_hid = BNXT_ULP_CLASS_HID_1be6, .class_tid = 1, .hdr_sig_id = 4, .flow_sig_id = 12288UL, @@ -5606,7 +6214,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_4_BITMASK_O_TCP_SRC_PORT } }, [232] = { - .class_hid = BNXT_ULP_CLASS_HID_0b1d, + .class_hid = BNXT_ULP_CLASS_HID_0c80, .class_tid = 1, .hdr_sig_id = 4, .flow_sig_id = 14336UL, @@ -5623,7 +6231,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_4_BITMASK_O_TCP_SRC_PORT } }, [233] = { - .class_hid = BNXT_ULP_CLASS_HID_0b49, + .class_hid = BNXT_ULP_CLASS_HID_1216, .class_tid = 1, .hdr_sig_id = 4, .flow_sig_id = 20480UL, @@ -5639,7 +6247,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_4_BITMASK_O_TCP_DST_PORT } }, [234] = { - .class_hid = BNXT_ULP_CLASS_HID_5c95, + .class_hid = BNXT_ULP_CLASS_HID_02b0, .class_tid = 1, .hdr_sig_id = 4, .flow_sig_id = 22528UL, @@ -5656,7 +6264,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_4_BITMASK_O_TCP_DST_PORT } }, [235] = { - .class_hid = BNXT_ULP_CLASS_HID_39c1, + .class_hid = BNXT_ULP_CLASS_HID_0654, .class_tid = 1, .hdr_sig_id = 4, .flow_sig_id = 28672UL, @@ -5673,7 +6281,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_4_BITMASK_O_TCP_DST_PORT } }, [236] = { - .class_hid = BNXT_ULP_CLASS_HID_2259, + .class_hid = BNXT_ULP_CLASS_HID_1690, .class_tid = 1, .hdr_sig_id = 4, .flow_sig_id = 30720UL, @@ -5691,7 +6299,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_4_BITMASK_O_TCP_DST_PORT } }, [237] = { - .class_hid = BNXT_ULP_CLASS_HID_1715, + .class_hid = BNXT_ULP_CLASS_HID_09e4, .class_tid = 1, .hdr_sig_id = 5, .flow_sig_id = 16384UL, @@ -5706,7 +6314,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_5_BITMASK_O_IPV4_DST_ADDR } }, [238] = { - .class_hid = BNXT_ULP_CLASS_HID_459d, + .class_hid = BNXT_ULP_CLASS_HID_1dc4, .class_tid = 1, .hdr_sig_id = 5, .flow_sig_id = 24576UL, @@ -5722,7 +6330,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_5_BITMASK_O_IPV4_DST_ADDR } }, [239] = { - .class_hid = BNXT_ULP_CLASS_HID_571d, + .class_hid = BNXT_ULP_CLASS_HID_80efc, .class_tid = 1, .hdr_sig_id = 5, .flow_sig_id = 49152UL, @@ -5738,7 +6346,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_5_BITMASK_O_TCP_SRC_PORT } }, [240] = { - .class_hid = BNXT_ULP_CLASS_HID_1cd1, + .class_hid = BNXT_ULP_CLASS_HID_80332, .class_tid = 1, .hdr_sig_id = 5, .flow_sig_id = 57344UL, @@ -5755,7 +6363,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_5_BITMASK_O_TCP_SRC_PORT } }, [241] = { - .class_hid = BNXT_ULP_CLASS_HID_3711, + .class_hid = BNXT_ULP_CLASS_HID_40c78, .class_tid = 1, .hdr_sig_id = 5, .flow_sig_id = 81920UL, @@ -5771,7 +6379,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_5_BITMASK_O_TCP_DST_PORT } }, [242] = { - .class_hid = BNXT_ULP_CLASS_HID_6599, + .class_hid = BNXT_ULP_CLASS_HID_400be, .class_tid = 1, .hdr_sig_id = 5, .flow_sig_id = 90112UL, @@ -5788,7 +6396,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_5_BITMASK_O_TCP_DST_PORT } }, [243] = { - .class_hid = BNXT_ULP_CLASS_HID_0e55, + .class_hid = BNXT_ULP_CLASS_HID_c1170, .class_tid = 1, .hdr_sig_id = 5, .flow_sig_id = 114688UL, @@ -5805,7 +6413,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_5_BITMASK_O_TCP_DST_PORT } }, [244] = { - .class_hid = BNXT_ULP_CLASS_HID_3cdd, + .class_hid = BNXT_ULP_CLASS_HID_c05b6, .class_tid = 1, .hdr_sig_id = 5, .flow_sig_id = 122880UL, @@ -5823,7 +6431,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_5_BITMASK_O_TCP_DST_PORT } }, [245] = { - .class_hid = BNXT_ULP_CLASS_HID_5ca1, + .class_hid = BNXT_ULP_CLASS_HID_0836, .class_tid = 1, .hdr_sig_id = 6, .flow_sig_id = 4096UL, @@ -5838,7 +6446,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_6_BITMASK_O_IPV6_DST_ADDR } }, [246] = { - .class_hid = BNXT_ULP_CLASS_HID_4539, + .class_hid = BNXT_ULP_CLASS_HID_1872, .class_tid = 1, .hdr_sig_id = 6, .flow_sig_id = 6144UL, @@ -5854,7 +6462,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_6_BITMASK_O_IPV6_DST_ADDR } }, [247] = { - .class_hid = BNXT_ULP_CLASS_HID_22e5, + .class_hid = BNXT_ULP_CLASS_HID_1bd6, .class_tid = 1, .hdr_sig_id = 6, .flow_sig_id = 12288UL, @@ -5870,7 +6478,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_6_BITMASK_O_UDP_SRC_PORT } }, [248] = { - .class_hid = BNXT_ULP_CLASS_HID_0b7d, + .class_hid = BNXT_ULP_CLASS_HID_0cb0, .class_tid = 1, .hdr_sig_id = 6, .flow_sig_id = 14336UL, @@ -5887,7 +6495,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_6_BITMASK_O_UDP_SRC_PORT } }, [249] = { - .class_hid = BNXT_ULP_CLASS_HID_0b29, + .class_hid = BNXT_ULP_CLASS_HID_1226, .class_tid = 1, .hdr_sig_id = 6, .flow_sig_id = 20480UL, @@ -5903,7 +6511,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_6_BITMASK_O_UDP_DST_PORT } }, [250] = { - .class_hid = BNXT_ULP_CLASS_HID_5cf5, + .class_hid = BNXT_ULP_CLASS_HID_0280, .class_tid = 1, .hdr_sig_id = 6, .flow_sig_id = 22528UL, @@ -5920,7 +6528,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_6_BITMASK_O_UDP_DST_PORT } }, [251] = { - .class_hid = BNXT_ULP_CLASS_HID_39a1, + .class_hid = BNXT_ULP_CLASS_HID_0664, .class_tid = 1, .hdr_sig_id = 6, .flow_sig_id = 28672UL, @@ -5937,7 +6545,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_6_BITMASK_O_UDP_DST_PORT } }, [252] = { - .class_hid = BNXT_ULP_CLASS_HID_2239, + .class_hid = BNXT_ULP_CLASS_HID_16a0, .class_tid = 1, .hdr_sig_id = 6, .flow_sig_id = 30720UL, @@ -5955,7 +6563,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_6_BITMASK_O_UDP_DST_PORT } }, [253] = { - .class_hid = BNXT_ULP_CLASS_HID_1775, + .class_hid = BNXT_ULP_CLASS_HID_09d4, .class_tid = 1, .hdr_sig_id = 7, .flow_sig_id = 16384UL, @@ -5970,7 +6578,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_7_BITMASK_O_IPV4_DST_ADDR } }, [254] = { - .class_hid = BNXT_ULP_CLASS_HID_45fd, + .class_hid = BNXT_ULP_CLASS_HID_1df4, .class_tid = 1, .hdr_sig_id = 7, .flow_sig_id = 24576UL, @@ -5986,7 +6594,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_7_BITMASK_O_IPV4_DST_ADDR } }, [255] = { - .class_hid = BNXT_ULP_CLASS_HID_577d, + .class_hid = BNXT_ULP_CLASS_HID_80ecc, .class_tid = 1, .hdr_sig_id = 7, .flow_sig_id = 49152UL, @@ -6002,7 +6610,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_7_BITMASK_O_UDP_SRC_PORT } }, [256] = { - .class_hid = BNXT_ULP_CLASS_HID_1cb1, + .class_hid = BNXT_ULP_CLASS_HID_80302, .class_tid = 1, .hdr_sig_id = 7, .flow_sig_id = 57344UL, @@ -6019,7 +6627,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_7_BITMASK_O_UDP_SRC_PORT } }, [257] = { - .class_hid = BNXT_ULP_CLASS_HID_3771, + .class_hid = BNXT_ULP_CLASS_HID_40c48, .class_tid = 1, .hdr_sig_id = 7, .flow_sig_id = 81920UL, @@ -6035,7 +6643,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_7_BITMASK_O_UDP_DST_PORT } }, [258] = { - .class_hid = BNXT_ULP_CLASS_HID_65f9, + .class_hid = BNXT_ULP_CLASS_HID_4008e, .class_tid = 1, .hdr_sig_id = 7, .flow_sig_id = 90112UL, @@ -6052,7 +6660,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_7_BITMASK_O_UDP_DST_PORT } }, [259] = { - .class_hid = BNXT_ULP_CLASS_HID_0e35, + .class_hid = BNXT_ULP_CLASS_HID_c1140, .class_tid = 1, .hdr_sig_id = 7, .flow_sig_id = 114688UL, @@ -6069,7 +6677,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_7_BITMASK_O_UDP_DST_PORT } }, [260] = { - .class_hid = BNXT_ULP_CLASS_HID_3cbd, + .class_hid = BNXT_ULP_CLASS_HID_c0586, .class_tid = 1, .hdr_sig_id = 7, .flow_sig_id = 122880UL, @@ -6087,7 +6695,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_7_BITMASK_O_UDP_DST_PORT } }, [261] = { - .class_hid = BNXT_ULP_CLASS_HID_3fcb, + .class_hid = BNXT_ULP_CLASS_HID_804e1, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 32768UL, @@ -6103,7 +6711,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_IPV6_DST_ADDR } }, [262] = { - .class_hid = BNXT_ULP_CLASS_HID_2bd7, + .class_hid = BNXT_ULP_CLASS_HID_81241, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 32832UL, @@ -6120,7 +6728,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_IPV6_DST_ADDR } }, [263] = { - .class_hid = BNXT_ULP_CLASS_HID_5707, + .class_hid = BNXT_ULP_CLASS_HID_80ef1, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 49152UL, @@ -6137,7 +6745,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_IPV6_DST_ADDR } }, [264] = { - .class_hid = BNXT_ULP_CLASS_HID_4313, + .class_hid = BNXT_ULP_CLASS_HID_81c51, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 49216UL, @@ -6155,7 +6763,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_IPV6_DST_ADDR } }, [265] = { - .class_hid = BNXT_ULP_CLASS_HID_5fc7, + .class_hid = BNXT_ULP_CLASS_HID_c076d, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 98304UL, @@ -6172,7 +6780,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_SRC_PORT } }, [266] = { - .class_hid = BNXT_ULP_CLASS_HID_4bd3, + .class_hid = BNXT_ULP_CLASS_HID_c14cd, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 98368UL, @@ -6190,7 +6798,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_SRC_PORT } }, [267] = { - .class_hid = BNXT_ULP_CLASS_HID_0e4f, + .class_hid = BNXT_ULP_CLASS_HID_c117d, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 114688UL, @@ -6208,7 +6816,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_SRC_PORT } }, [268] = { - .class_hid = BNXT_ULP_CLASS_HID_632f, + .class_hid = BNXT_ULP_CLASS_HID_c1edd, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 114752UL, @@ -6227,7 +6835,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_SRC_PORT } }, [269] = { - .class_hid = BNXT_ULP_CLASS_HID_1baf, + .class_hid = BNXT_ULP_CLASS_HID_a062f, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 163840UL, @@ -6244,7 +6852,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_DST_PORT } }, [270] = { - .class_hid = BNXT_ULP_CLASS_HID_07bb, + .class_hid = BNXT_ULP_CLASS_HID_a138f, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 163904UL, @@ -6262,7 +6870,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_DST_PORT } }, [271] = { - .class_hid = BNXT_ULP_CLASS_HID_32eb, + .class_hid = BNXT_ULP_CLASS_HID_a103f, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 180224UL, @@ -6280,7 +6888,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_DST_PORT } }, [272] = { - .class_hid = BNXT_ULP_CLASS_HID_1ef7, + .class_hid = BNXT_ULP_CLASS_HID_a1d9f, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 180288UL, @@ -6299,7 +6907,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_DST_PORT } }, [273] = { - .class_hid = BNXT_ULP_CLASS_HID_3bab, + .class_hid = BNXT_ULP_CLASS_HID_e08ab, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 229376UL, @@ -6317,7 +6925,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_DST_PORT } }, [274] = { - .class_hid = BNXT_ULP_CLASS_HID_27b7, + .class_hid = BNXT_ULP_CLASS_HID_e160b, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 229440UL, @@ -6336,7 +6944,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_DST_PORT } }, [275] = { - .class_hid = BNXT_ULP_CLASS_HID_52e7, + .class_hid = BNXT_ULP_CLASS_HID_e12bb, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 245760UL, @@ -6355,7 +6963,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_DST_PORT } }, [276] = { - .class_hid = BNXT_ULP_CLASS_HID_3ef3, + .class_hid = BNXT_ULP_CLASS_HID_e0079, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 245824UL, @@ -6375,7 +6983,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_TCP_DST_PORT } }, [277] = { - .class_hid = BNXT_ULP_CLASS_HID_4473, + .class_hid = BNXT_ULP_CLASS_HID_2012b, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 131072UL, @@ -6391,7 +6999,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_IPV4_DST_ADDR } }, [278] = { - .class_hid = BNXT_ULP_CLASS_HID_306f, + .class_hid = BNXT_ULP_CLASS_HID_20e8b, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 131136UL, @@ -6408,7 +7016,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_IPV4_DST_ADDR } }, [279] = { - .class_hid = BNXT_ULP_CLASS_HID_647f, + .class_hid = BNXT_ULP_CLASS_HID_603af, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 196608UL, @@ -6425,7 +7033,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_IPV4_DST_ADDR } }, [280] = { - .class_hid = BNXT_ULP_CLASS_HID_506b, + .class_hid = BNXT_ULP_CLASS_HID_6110f, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 196672UL, @@ -6443,7 +7051,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_IPV4_DST_ADDR } }, [281] = { - .class_hid = BNXT_ULP_CLASS_HID_266af, + .class_hid = BNXT_ULP_CLASS_HID_311bb, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 393216UL, @@ -6460,7 +7068,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_SRC_PORT } }, [282] = { - .class_hid = BNXT_ULP_CLASS_HID_2525b, + .class_hid = BNXT_ULP_CLASS_HID_31f1b, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 393280UL, @@ -6478,7 +7086,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_SRC_PORT } }, [283] = { - .class_hid = BNXT_ULP_CLASS_HID_21de7, + .class_hid = BNXT_ULP_CLASS_HID_7143f, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 458752UL, @@ -6496,7 +7104,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_SRC_PORT } }, [284] = { - .class_hid = BNXT_ULP_CLASS_HID_20993, + .class_hid = BNXT_ULP_CLASS_HID_701fd, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 458816UL, @@ -6515,7 +7123,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_SRC_PORT } }, [285] = { - .class_hid = BNXT_ULP_CLASS_HID_1213f, + .class_hid = BNXT_ULP_CLASS_HID_28963, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 655360UL, @@ -6532,7 +7140,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_DST_PORT } }, [286] = { - .class_hid = BNXT_ULP_CLASS_HID_10d2b, + .class_hid = BNXT_ULP_CLASS_HID_296c3, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 655424UL, @@ -6550,7 +7158,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_DST_PORT } }, [287] = { - .class_hid = BNXT_ULP_CLASS_HID_1413b, + .class_hid = BNXT_ULP_CLASS_HID_68be7, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 720896UL, @@ -6568,7 +7176,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_DST_PORT } }, [288] = { - .class_hid = BNXT_ULP_CLASS_HID_12cd7, + .class_hid = BNXT_ULP_CLASS_HID_69947, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 720960UL, @@ -6587,7 +7195,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_DST_PORT } }, [289] = { - .class_hid = BNXT_ULP_CLASS_HID_3436b, + .class_hid = BNXT_ULP_CLASS_HID_399f3, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 917504UL, @@ -6605,7 +7213,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_DST_PORT } }, [290] = { - .class_hid = BNXT_ULP_CLASS_HID_32f07, + .class_hid = BNXT_ULP_CLASS_HID_387b1, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 917568UL, @@ -6624,7 +7232,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_DST_PORT } }, [291] = { - .class_hid = BNXT_ULP_CLASS_HID_36317, + .class_hid = BNXT_ULP_CLASS_HID_79c77, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 983040UL, @@ -6643,7 +7251,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_DST_PORT } }, [292] = { - .class_hid = BNXT_ULP_CLASS_HID_34f03, + .class_hid = BNXT_ULP_CLASS_HID_78a35, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 983104UL, @@ -6663,7 +7271,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_TCP_DST_PORT } }, [293] = { - .class_hid = BNXT_ULP_CLASS_HID_3fab, + .class_hid = BNXT_ULP_CLASS_HID_804d1, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 32768UL, @@ -6679,7 +7287,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_IPV6_DST_ADDR } }, [294] = { - .class_hid = BNXT_ULP_CLASS_HID_2bb7, + .class_hid = BNXT_ULP_CLASS_HID_81271, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 32832UL, @@ -6696,7 +7304,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_IPV6_DST_ADDR } }, [295] = { - .class_hid = BNXT_ULP_CLASS_HID_5767, + .class_hid = BNXT_ULP_CLASS_HID_80ec1, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 49152UL, @@ -6713,7 +7321,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_IPV6_DST_ADDR } }, [296] = { - .class_hid = BNXT_ULP_CLASS_HID_4373, + .class_hid = BNXT_ULP_CLASS_HID_81c61, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 49216UL, @@ -6731,7 +7339,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_IPV6_DST_ADDR } }, [297] = { - .class_hid = BNXT_ULP_CLASS_HID_5fa7, + .class_hid = BNXT_ULP_CLASS_HID_c075d, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 98304UL, @@ -6748,7 +7356,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_SRC_PORT } }, [298] = { - .class_hid = BNXT_ULP_CLASS_HID_4bb3, + .class_hid = BNXT_ULP_CLASS_HID_c14fd, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 98368UL, @@ -6766,7 +7374,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_SRC_PORT } }, [299] = { - .class_hid = BNXT_ULP_CLASS_HID_0e2f, + .class_hid = BNXT_ULP_CLASS_HID_c114d, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 114688UL, @@ -6784,7 +7392,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_SRC_PORT } }, [300] = { - .class_hid = BNXT_ULP_CLASS_HID_634f, + .class_hid = BNXT_ULP_CLASS_HID_c1eed, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 114752UL, @@ -6803,7 +7411,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_SRC_PORT } }, [301] = { - .class_hid = BNXT_ULP_CLASS_HID_1bcf, + .class_hid = BNXT_ULP_CLASS_HID_a061f, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 163840UL, @@ -6820,7 +7428,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_DST_PORT } }, [302] = { - .class_hid = BNXT_ULP_CLASS_HID_07db, + .class_hid = BNXT_ULP_CLASS_HID_a13bf, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 163904UL, @@ -6838,7 +7446,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_DST_PORT } }, [303] = { - .class_hid = BNXT_ULP_CLASS_HID_328b, + .class_hid = BNXT_ULP_CLASS_HID_a100f, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 180224UL, @@ -6856,7 +7464,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_DST_PORT } }, [304] = { - .class_hid = BNXT_ULP_CLASS_HID_1e97, + .class_hid = BNXT_ULP_CLASS_HID_a1daf, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 180288UL, @@ -6875,7 +7483,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_DST_PORT } }, [305] = { - .class_hid = BNXT_ULP_CLASS_HID_3bcb, + .class_hid = BNXT_ULP_CLASS_HID_e089b, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 229376UL, @@ -6893,7 +7501,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_DST_PORT } }, [306] = { - .class_hid = BNXT_ULP_CLASS_HID_27d7, + .class_hid = BNXT_ULP_CLASS_HID_e163b, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 229440UL, @@ -6912,7 +7520,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_DST_PORT } }, [307] = { - .class_hid = BNXT_ULP_CLASS_HID_5287, + .class_hid = BNXT_ULP_CLASS_HID_e128b, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 245760UL, @@ -6931,7 +7539,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_DST_PORT } }, [308] = { - .class_hid = BNXT_ULP_CLASS_HID_3e93, + .class_hid = BNXT_ULP_CLASS_HID_e0049, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 245824UL, @@ -6951,7 +7559,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_UDP_DST_PORT } }, [309] = { - .class_hid = BNXT_ULP_CLASS_HID_4413, + .class_hid = BNXT_ULP_CLASS_HID_2011b, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 131072UL, @@ -6967,7 +7575,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_IPV4_DST_ADDR } }, [310] = { - .class_hid = BNXT_ULP_CLASS_HID_300f, + .class_hid = BNXT_ULP_CLASS_HID_20ebb, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 131136UL, @@ -6984,7 +7592,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_IPV4_DST_ADDR } }, [311] = { - .class_hid = BNXT_ULP_CLASS_HID_641f, + .class_hid = BNXT_ULP_CLASS_HID_6039f, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 196608UL, @@ -7001,7 +7609,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_IPV4_DST_ADDR } }, [312] = { - .class_hid = BNXT_ULP_CLASS_HID_500b, + .class_hid = BNXT_ULP_CLASS_HID_6113f, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 196672UL, @@ -7019,7 +7627,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_IPV4_DST_ADDR } }, [313] = { - .class_hid = BNXT_ULP_CLASS_HID_266cf, + .class_hid = BNXT_ULP_CLASS_HID_3118b, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 393216UL, @@ -7036,7 +7644,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_SRC_PORT } }, [314] = { - .class_hid = BNXT_ULP_CLASS_HID_2523b, + .class_hid = BNXT_ULP_CLASS_HID_31f2b, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 393280UL, @@ -7054,7 +7662,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_SRC_PORT } }, [315] = { - .class_hid = BNXT_ULP_CLASS_HID_21d87, + .class_hid = BNXT_ULP_CLASS_HID_7140f, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 458752UL, @@ -7072,7 +7680,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_SRC_PORT } }, [316] = { - .class_hid = BNXT_ULP_CLASS_HID_209f3, + .class_hid = BNXT_ULP_CLASS_HID_701cd, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 458816UL, @@ -7091,7 +7699,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_SRC_PORT } }, [317] = { - .class_hid = BNXT_ULP_CLASS_HID_1215f, + .class_hid = BNXT_ULP_CLASS_HID_28953, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 655360UL, @@ -7108,7 +7716,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_DST_PORT } }, [318] = { - .class_hid = BNXT_ULP_CLASS_HID_10d4b, + .class_hid = BNXT_ULP_CLASS_HID_296f3, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 655424UL, @@ -7126,7 +7734,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_DST_PORT } }, [319] = { - .class_hid = BNXT_ULP_CLASS_HID_1415b, + .class_hid = BNXT_ULP_CLASS_HID_68bd7, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 720896UL, @@ -7144,7 +7752,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_DST_PORT } }, [320] = { - .class_hid = BNXT_ULP_CLASS_HID_12cb7, + .class_hid = BNXT_ULP_CLASS_HID_69977, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 720960UL, @@ -7163,7 +7771,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_DST_PORT } }, [321] = { - .class_hid = BNXT_ULP_CLASS_HID_3430b, + .class_hid = BNXT_ULP_CLASS_HID_399c3, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 917504UL, @@ -7181,7 +7789,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_DST_PORT } }, [322] = { - .class_hid = BNXT_ULP_CLASS_HID_32f67, + .class_hid = BNXT_ULP_CLASS_HID_38781, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 917568UL, @@ -7200,7 +7808,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_DST_PORT } }, [323] = { - .class_hid = BNXT_ULP_CLASS_HID_36377, + .class_hid = BNXT_ULP_CLASS_HID_79c47, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 983040UL, @@ -7219,7 +7827,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_DST_PORT } }, [324] = { - .class_hid = BNXT_ULP_CLASS_HID_34f63, + .class_hid = BNXT_ULP_CLASS_HID_78a05, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 983104UL, @@ -7239,7 +7847,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_UDP_DST_PORT } }, [325] = { - .class_hid = BNXT_ULP_CLASS_HID_29b5, + .class_hid = BNXT_ULP_CLASS_HID_04a4, .class_tid = 1, .hdr_sig_id = 0, .flow_sig_id = 8UL, @@ -7254,7 +7862,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_0_BITMASK_O_ETH_SMAC } }, [326] = { - .class_hid = BNXT_ULP_CLASS_HID_29ad, + .class_hid = BNXT_ULP_CLASS_HID_04a8, .class_tid = 1, .hdr_sig_id = 1, .flow_sig_id = 8UL, @@ -7269,7 +7877,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_1_BITMASK_O_ETH_SMAC } }, [327] = { - .class_hid = BNXT_ULP_CLASS_HID_29b7, + .class_hid = BNXT_ULP_CLASS_HID_04a5, .class_tid = 1, .hdr_sig_id = 2, .flow_sig_id = 8UL, @@ -7285,7 +7893,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_2_BITMASK_O_ETH_SMAC } }, [328] = { - .class_hid = BNXT_ULP_CLASS_HID_1583, + .class_hid = BNXT_ULP_CLASS_HID_1205, .class_tid = 1, .hdr_sig_id = 2, .flow_sig_id = 72UL, @@ -7302,7 +7910,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_2_BITMASK_OO_VLAN_VID } }, [329] = { - .class_hid = BNXT_ULP_CLASS_HID_29af, + .class_hid = BNXT_ULP_CLASS_HID_04a9, .class_tid = 1, .hdr_sig_id = 3, .flow_sig_id = 8UL, @@ -7318,7 +7926,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_3_BITMASK_O_ETH_SMAC } }, [330] = { - .class_hid = BNXT_ULP_CLASS_HID_159b, + .class_hid = BNXT_ULP_CLASS_HID_1209, .class_tid = 1, .hdr_sig_id = 3, .flow_sig_id = 72UL, @@ -7335,7 +7943,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_3_BITMASK_OO_VLAN_VID } }, [331] = { - .class_hid = BNXT_ULP_CLASS_HID_2995, + .class_hid = BNXT_ULP_CLASS_HID_04b4, .class_tid = 1, .hdr_sig_id = 4, .flow_sig_id = 8UL, @@ -7351,7 +7959,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_4_BITMASK_O_ETH_SMAC } }, [332] = { - .class_hid = BNXT_ULP_CLASS_HID_298d, + .class_hid = BNXT_ULP_CLASS_HID_04b8, .class_tid = 1, .hdr_sig_id = 5, .flow_sig_id = 8UL, @@ -7367,7 +7975,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_5_BITMASK_O_ETH_SMAC } }, [333] = { - .class_hid = BNXT_ULP_CLASS_HID_29f5, + .class_hid = BNXT_ULP_CLASS_HID_0484, .class_tid = 1, .hdr_sig_id = 6, .flow_sig_id = 8UL, @@ -7383,7 +7991,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_6_BITMASK_O_ETH_SMAC } }, [334] = { - .class_hid = BNXT_ULP_CLASS_HID_29ed, + .class_hid = BNXT_ULP_CLASS_HID_0488, .class_tid = 1, .hdr_sig_id = 7, .flow_sig_id = 8UL, @@ -7399,7 +8007,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_7_BITMASK_O_ETH_SMAC } }, [335] = { - .class_hid = BNXT_ULP_CLASS_HID_2997, + .class_hid = BNXT_ULP_CLASS_HID_04b5, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 8UL, @@ -7416,7 +8024,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_O_ETH_SMAC } }, [336] = { - .class_hid = BNXT_ULP_CLASS_HID_15a3, + .class_hid = BNXT_ULP_CLASS_HID_1215, .class_tid = 1, .hdr_sig_id = 8, .flow_sig_id = 72UL, @@ -7434,7 +8042,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_8_BITMASK_OO_VLAN_VID } }, [337] = { - .class_hid = BNXT_ULP_CLASS_HID_298f, + .class_hid = BNXT_ULP_CLASS_HID_04b9, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 8UL, @@ -7451,7 +8059,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_O_ETH_SMAC } }, [338] = { - .class_hid = BNXT_ULP_CLASS_HID_15bb, + .class_hid = BNXT_ULP_CLASS_HID_1219, .class_tid = 1, .hdr_sig_id = 9, .flow_sig_id = 72UL, @@ -7469,7 +8077,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_9_BITMASK_OO_VLAN_VID } }, [339] = { - .class_hid = BNXT_ULP_CLASS_HID_29f7, + .class_hid = BNXT_ULP_CLASS_HID_0485, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 8UL, @@ -7486,7 +8094,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_O_ETH_SMAC } }, [340] = { - .class_hid = BNXT_ULP_CLASS_HID_15c3, + .class_hid = BNXT_ULP_CLASS_HID_1225, .class_tid = 1, .hdr_sig_id = 10, .flow_sig_id = 72UL, @@ -7504,7 +8112,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_10_BITMASK_OO_VLAN_VID } }, [341] = { - .class_hid = BNXT_ULP_CLASS_HID_29ef, + .class_hid = BNXT_ULP_CLASS_HID_0489, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 8UL, @@ -7521,7 +8129,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_O_ETH_SMAC } }, [342] = { - .class_hid = BNXT_ULP_CLASS_HID_15db, + .class_hid = BNXT_ULP_CLASS_HID_1229, .class_tid = 1, .hdr_sig_id = 11, .flow_sig_id = 72UL, @@ -7539,7 +8147,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_11_BITMASK_OO_VLAN_VID } }, [343] = { - .class_hid = BNXT_ULP_CLASS_HID_1151, + .class_hid = BNXT_ULP_CLASS_HID_0226, .class_tid = 1, .hdr_sig_id = 12, .flow_sig_id = 16384UL, @@ -7556,7 +8164,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_12_BITMASK_O_IPV4_DST_ADDR } }, [344] = { - .class_hid = BNXT_ULP_CLASS_HID_315d, + .class_hid = BNXT_ULP_CLASS_HID_4045a, .class_tid = 1, .hdr_sig_id = 12, .flow_sig_id = 81920UL, @@ -7574,776 +8182,776 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_1_12_BITMASK_O_UDP_DST_PORT } }, [345] = { - .class_hid = BNXT_ULP_CLASS_HID_3612, + .class_hid = BNXT_ULP_CLASS_HID_0daa, .class_tid = 2, .hdr_sig_id = 0, - .flow_sig_id = 81920UL, + .flow_sig_id = 20480UL, .flow_pattern_id = 0, .app_sig = 0, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_F1 | BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = BNXT_ULP_HF_0_2_0_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF_0_2_0_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_0_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_2_0_BITMASK_O_UDP_DST_PORT } }, [346] = { - .class_hid = BNXT_ULP_CLASS_HID_66da, + .class_hid = BNXT_ULP_CLASS_HID_11b0, .class_tid = 2, .hdr_sig_id = 0, - .flow_sig_id = 81928UL, + .flow_sig_id = 20488UL, .flow_pattern_id = 0, .app_sig = 0, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_F1 | BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = BNXT_ULP_HF_0_2_0_BITMASK_O_ETH_DMAC | BNXT_ULP_HF_0_2_0_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF_0_2_0_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_0_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_2_0_BITMASK_O_UDP_DST_PORT } }, [347] = { - .class_hid = BNXT_ULP_CLASS_HID_243ca, + .class_hid = BNXT_ULP_CLASS_HID_403f8, .class_tid = 2, .hdr_sig_id = 1, - .flow_sig_id = 265216UL, - .flow_pattern_id = 1, + .flow_sig_id = 81920UL, + .flow_pattern_id = 0, .app_sig = 0, .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_F1 | + BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_O_IPV4 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_1_BITMASK_O_ETH_DMAC | BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI } + BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_DST_PORT } }, [348] = { - .class_hid = BNXT_ULP_CLASS_HID_20d8e, + .class_hid = BNXT_ULP_CLASS_HID_4161e, .class_tid = 2, .hdr_sig_id = 1, - .flow_sig_id = 273408UL, - .flow_pattern_id = 1, + .flow_sig_id = 81928UL, + .flow_pattern_id = 0, .app_sig = 0, .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_F1 | + BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_O_IPV4 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF_0_2_1_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI } + BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_DST_PORT } }, [349] = { - .class_hid = BNXT_ULP_CLASS_HID_2e082, + .class_hid = BNXT_ULP_CLASS_HID_40439, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 1313792UL, + .hdr_sig_id = 2, + .flow_sig_id = 66304UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI } }, [350] = { - .class_hid = BNXT_ULP_CLASS_HID_2ab46, + .class_hid = BNXT_ULP_CLASS_HID_41405, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 1321984UL, + .hdr_sig_id = 2, + .flow_sig_id = 68352UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI } }, [351] = { - .class_hid = BNXT_ULP_CLASS_HID_25226, + .class_hid = BNXT_ULP_CLASS_HID_51449, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 2362368UL, + .hdr_sig_id = 2, + .flow_sig_id = 328448UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC } }, [352] = { - .class_hid = BNXT_ULP_CLASS_HID_25cea, + .class_hid = BNXT_ULP_CLASS_HID_50b33, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 2370560UL, + .hdr_sig_id = 2, + .flow_sig_id = 330496UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC } }, [353] = { - .class_hid = BNXT_ULP_CLASS_HID_2c82a, + .class_hid = BNXT_ULP_CLASS_HID_48c01, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 3410944UL, + .hdr_sig_id = 2, + .flow_sig_id = 590592UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC } }, [354] = { - .class_hid = BNXT_ULP_CLASS_HID_2f9a2, + .class_hid = BNXT_ULP_CLASS_HID_483eb, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 3419136UL, + .hdr_sig_id = 2, + .flow_sig_id = 592640UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC } }, [355] = { - .class_hid = BNXT_ULP_CLASS_HID_23b56, + .class_hid = BNXT_ULP_CLASS_HID_5833f, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 537136128UL, + .hdr_sig_id = 2, + .flow_sig_id = 852736UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC } }, [356] = { - .class_hid = BNXT_ULP_CLASS_HID_205da, + .class_hid = BNXT_ULP_CLASS_HID_5937b, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 537144320UL, + .hdr_sig_id = 2, + .flow_sig_id = 854784UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC } }, [357] = { - .class_hid = BNXT_ULP_CLASS_HID_2d8ce, + .class_hid = BNXT_ULP_CLASS_HID_41875, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 538184704UL, + .hdr_sig_id = 2, + .flow_sig_id = 134284032UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR } }, [358] = { - .class_hid = BNXT_ULP_CLASS_HID_2a2d2, + .class_hid = BNXT_ULP_CLASS_HID_40f5f, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 538192896UL, + .hdr_sig_id = 2, + .flow_sig_id = 134286080UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR } }, [359] = { - .class_hid = BNXT_ULP_CLASS_HID_24a72, + .class_hid = BNXT_ULP_CLASS_HID_50f23, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 539233280UL, + .hdr_sig_id = 2, + .flow_sig_id = 134546176UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR } }, [360] = { - .class_hid = BNXT_ULP_CLASS_HID_25476, + .class_hid = BNXT_ULP_CLASS_HID_51f6f, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 539241472UL, + .hdr_sig_id = 2, + .flow_sig_id = 134548224UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR } }, [361] = { - .class_hid = BNXT_ULP_CLASS_HID_2c076, + .class_hid = BNXT_ULP_CLASS_HID_4875b, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 540281856UL, + .hdr_sig_id = 2, + .flow_sig_id = 134808320UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR } }, [362] = { - .class_hid = BNXT_ULP_CLASS_HID_2f1ee, + .class_hid = BNXT_ULP_CLASS_HID_49727, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 540290048UL, + .hdr_sig_id = 2, + .flow_sig_id = 134810368UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR } }, [363] = { - .class_hid = BNXT_ULP_CLASS_HID_20bb6, + .class_hid = BNXT_ULP_CLASS_HID_5976b, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 1074007040UL, + .hdr_sig_id = 2, + .flow_sig_id = 135070464UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR } }, [364] = { - .class_hid = BNXT_ULP_CLASS_HID_23d2e, + .class_hid = BNXT_ULP_CLASS_HID_58655, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 1074015232UL, + .hdr_sig_id = 2, + .flow_sig_id = 135072512UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR } }, [365] = { - .class_hid = BNXT_ULP_CLASS_HID_2a96e, + .class_hid = BNXT_ULP_CLASS_HID_4125f, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 1075055616UL, + .hdr_sig_id = 2, + .flow_sig_id = 268501760UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR } }, [366] = { - .class_hid = BNXT_ULP_CLASS_HID_2dae6, + .class_hid = BNXT_ULP_CLASS_HID_401f9, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 1075063808UL, + .hdr_sig_id = 2, + .flow_sig_id = 268503808UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR } }, [367] = { - .class_hid = BNXT_ULP_CLASS_HID_25af2, + .class_hid = BNXT_ULP_CLASS_HID_501cd, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 1076104192UL, + .hdr_sig_id = 2, + .flow_sig_id = 268763904UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR } }, [368] = { - .class_hid = BNXT_ULP_CLASS_HID_24c6a, + .class_hid = BNXT_ULP_CLASS_HID_51149, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 1076112384UL, + .hdr_sig_id = 2, + .flow_sig_id = 268765952UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR } }, [369] = { - .class_hid = BNXT_ULP_CLASS_HID_2c7aa, + .class_hid = BNXT_ULP_CLASS_HID_49a67, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 1077152768UL, + .hdr_sig_id = 2, + .flow_sig_id = 269026048UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR } }, [370] = { - .class_hid = BNXT_ULP_CLASS_HID_2c26e, + .class_hid = BNXT_ULP_CLASS_HID_489c1, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 1077160960UL, + .hdr_sig_id = 2, + .flow_sig_id = 269028096UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR } }, [371] = { - .class_hid = BNXT_ULP_CLASS_HID_203e2, + .class_hid = BNXT_ULP_CLASS_HID_58955, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 1610877952UL, + .hdr_sig_id = 2, + .flow_sig_id = 269288192UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR } }, [372] = { - .class_hid = BNXT_ULP_CLASS_HID_2357a, + .class_hid = BNXT_ULP_CLASS_HID_59951, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 1610886144UL, + .hdr_sig_id = 2, + .flow_sig_id = 269290240UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR } }, [373] = { - .class_hid = BNXT_ULP_CLASS_HID_2a0fa, + .class_hid = BNXT_ULP_CLASS_HID_40569, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 1611926528UL, + .hdr_sig_id = 2, + .flow_sig_id = 402719488UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR } }, [374] = { - .class_hid = BNXT_ULP_CLASS_HID_2d272, + .class_hid = BNXT_ULP_CLASS_HID_41575, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 1611934720UL, + .hdr_sig_id = 2, + .flow_sig_id = 402721536UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR } }, [375] = { - .class_hid = BNXT_ULP_CLASS_HID_2527e, + .class_hid = BNXT_ULP_CLASS_HID_51579, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 1612975104UL, + .hdr_sig_id = 2, + .flow_sig_id = 402981632UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR } }, [376] = { - .class_hid = BNXT_ULP_CLASS_HID_243f6, + .class_hid = BNXT_ULP_CLASS_HID_50463, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 1612983296UL, + .hdr_sig_id = 2, + .flow_sig_id = 402983680UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR } }, [377] = { - .class_hid = BNXT_ULP_CLASS_HID_2fff6, + .class_hid = BNXT_ULP_CLASS_HID_48d71, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 1614023680UL, + .hdr_sig_id = 2, + .flow_sig_id = 403243776UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR } }, [378] = { - .class_hid = BNXT_ULP_CLASS_HID_2e16e, + .class_hid = BNXT_ULP_CLASS_HID_49d7d, .class_tid = 2, - .hdr_sig_id = 1, - .flow_sig_id = 1614031872UL, + .hdr_sig_id = 2, + .flow_sig_id = 403245824UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR } }, [379] = { - .class_hid = BNXT_ULP_CLASS_HID_2422d, + .class_hid = BNXT_ULP_CLASS_HID_59d41, .class_tid = 2, .hdr_sig_id = 2, - .flow_sig_id = 265216UL, + .flow_sig_id = 403505920UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI } + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR } }, [380] = { - .class_hid = BNXT_ULP_CLASS_HID_20c69, + .class_hid = BNXT_ULP_CLASS_HID_58c6b, .class_tid = 2, .hdr_sig_id = 2, - .flow_sig_id = 273408UL, + .flow_sig_id = 403507968UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI } + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR } }, [381] = { - .class_hid = BNXT_ULP_CLASS_HID_2e165, + .class_hid = BNXT_ULP_CLASS_HID_10255, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 1313792UL, + .hdr_sig_id = 3, + .flow_sig_id = 265216UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8351,19 +8959,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI } }, [382] = { - .class_hid = BNXT_ULP_CLASS_HID_2aaa1, + .class_hid = BNXT_ULP_CLASS_HID_11675, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 1321984UL, + .hdr_sig_id = 3, + .flow_sig_id = 273408UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8371,20 +8978,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI } }, [383] = { - .class_hid = BNXT_ULP_CLASS_HID_253c1, + .class_hid = BNXT_ULP_CLASS_HID_14649, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 2362368UL, + .hdr_sig_id = 3, + .flow_sig_id = 1313792UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8392,19 +8998,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC } }, [384] = { - .class_hid = BNXT_ULP_CLASS_HID_25d0d, + .class_hid = BNXT_ULP_CLASS_HID_15a69, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 2370560UL, + .hdr_sig_id = 3, + .flow_sig_id = 1321984UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8412,20 +9018,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC } }, [385] = { - .class_hid = BNXT_ULP_CLASS_HID_2c9cd, + .class_hid = BNXT_ULP_CLASS_HID_1205b, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 3410944UL, + .hdr_sig_id = 3, + .flow_sig_id = 2362368UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8433,20 +9039,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC } }, [386] = { - .class_hid = BNXT_ULP_CLASS_HID_2f845, + .class_hid = BNXT_ULP_CLASS_HID_1347b, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 3419136UL, + .hdr_sig_id = 3, + .flow_sig_id = 2370560UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8454,21 +9059,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC } }, [387] = { - .class_hid = BNXT_ULP_CLASS_HID_25afd, + .class_hid = BNXT_ULP_CLASS_HID_16bbf, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 2147748864UL, + .hdr_sig_id = 3, + .flow_sig_id = 3410944UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8476,19 +9080,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC } }, [388] = { - .class_hid = BNXT_ULP_CLASS_HID_22439, + .class_hid = BNXT_ULP_CLASS_HID_1785f, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 2147757056UL, + .hdr_sig_id = 3, + .flow_sig_id = 3419136UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8496,20 +9101,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC } }, [389] = { - .class_hid = BNXT_ULP_CLASS_HID_290f9, + .class_hid = BNXT_ULP_CLASS_HID_11551, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 2148797440UL, + .hdr_sig_id = 3, + .flow_sig_id = 537136128UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8517,20 +9123,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR } }, [390] = { - .class_hid = BNXT_ULP_CLASS_HID_2c371, + .class_hid = BNXT_ULP_CLASS_HID_10897, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 2148805632UL, + .hdr_sig_id = 3, + .flow_sig_id = 537144320UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8538,21 +9143,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR } }, [391] = { - .class_hid = BNXT_ULP_CLASS_HID_24355, + .class_hid = BNXT_ULP_CLASS_HID_15955, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 2149846016UL, + .hdr_sig_id = 3, + .flow_sig_id = 538184704UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8560,20 +9164,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR } }, [392] = { - .class_hid = BNXT_ULP_CLASS_HID_275dd, + .class_hid = BNXT_ULP_CLASS_HID_14c8b, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 2149854208UL, + .hdr_sig_id = 3, + .flow_sig_id = 538192896UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8581,21 +9185,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR } }, [393] = { - .class_hid = BNXT_ULP_CLASS_HID_2e19d, + .class_hid = BNXT_ULP_CLASS_HID_13b47, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 2150894592UL, + .hdr_sig_id = 3, + .flow_sig_id = 539233280UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8603,21 +9207,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR } }, [394] = { - .class_hid = BNXT_ULP_CLASS_HID_2d015, + .class_hid = BNXT_ULP_CLASS_HID_12e85, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 2150902784UL, + .hdr_sig_id = 3, + .flow_sig_id = 539241472UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8625,22 +9228,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR } }, [395] = { - .class_hid = BNXT_ULP_CLASS_HID_2560d, + .class_hid = BNXT_ULP_CLASS_HID_17f5b, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 4295232512UL, + .hdr_sig_id = 3, + .flow_sig_id = 540281856UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8648,19 +9250,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR } }, [396] = { - .class_hid = BNXT_ULP_CLASS_HID_21049, + .class_hid = BNXT_ULP_CLASS_HID_17299, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 4295240704UL, + .hdr_sig_id = 3, + .flow_sig_id = 540290048UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8668,20 +9272,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR } }, [397] = { - .class_hid = BNXT_ULP_CLASS_HID_28c09, + .class_hid = BNXT_ULP_CLASS_HID_10fe7, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 4296281088UL, + .hdr_sig_id = 3, + .flow_sig_id = 1074007040UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8689,20 +9295,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } }, [398] = { - .class_hid = BNXT_ULP_CLASS_HID_2be89, + .class_hid = BNXT_ULP_CLASS_HID_10325, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 4296289280UL, + .hdr_sig_id = 3, + .flow_sig_id = 1074015232UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8710,21 +9315,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } }, [399] = { - .class_hid = BNXT_ULP_CLASS_HID_267a9, + .class_hid = BNXT_ULP_CLASS_HID_153cb, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 4297329664UL, + .hdr_sig_id = 3, + .flow_sig_id = 1075055616UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8732,20 +9336,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } }, [400] = { - .class_hid = BNXT_ULP_CLASS_HID_261ed, + .class_hid = BNXT_ULP_CLASS_HID_14709, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 4297337856UL, + .hdr_sig_id = 3, + .flow_sig_id = 1075063808UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8753,21 +9357,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } }, [401] = { - .class_hid = BNXT_ULP_CLASS_HID_2ddad, + .class_hid = BNXT_ULP_CLASS_HID_12dc5, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 4298378240UL, + .hdr_sig_id = 3, + .flow_sig_id = 1076104192UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8775,21 +9379,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } }, [402] = { - .class_hid = BNXT_ULP_CLASS_HID_2cc2d, + .class_hid = BNXT_ULP_CLASS_HID_1212b, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 4298386432UL, + .hdr_sig_id = 3, + .flow_sig_id = 1076112384UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8797,22 +9400,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } }, [403] = { - .class_hid = BNXT_ULP_CLASS_HID_26edd, + .class_hid = BNXT_ULP_CLASS_HID_171c9, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 6442716160UL, + .hdr_sig_id = 3, + .flow_sig_id = 1077152768UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8820,20 +9422,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } }, [404] = { - .class_hid = BNXT_ULP_CLASS_HID_22819, + .class_hid = BNXT_ULP_CLASS_HID_1650f, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 6442724352UL, + .hdr_sig_id = 3, + .flow_sig_id = 1077160960UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8841,21 +9444,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } }, [405] = { - .class_hid = BNXT_ULP_CLASS_HID_2a4d9, + .class_hid = BNXT_ULP_CLASS_HID_10201, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 6443764736UL, + .hdr_sig_id = 3, + .flow_sig_id = 1610877952UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8863,21 +9467,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } }, [406] = { - .class_hid = BNXT_ULP_CLASS_HID_2d759, + .class_hid = BNXT_ULP_CLASS_HID_116c1, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 6443772928UL, + .hdr_sig_id = 3, + .flow_sig_id = 1610886144UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8885,22 +9488,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } }, [407] = { - .class_hid = BNXT_ULP_CLASS_HID_2573d, + .class_hid = BNXT_ULP_CLASS_HID_14605, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 6444813312UL, + .hdr_sig_id = 3, + .flow_sig_id = 1611926528UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8908,21 +9510,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } }, [408] = { - .class_hid = BNXT_ULP_CLASS_HID_279bd, + .class_hid = BNXT_ULP_CLASS_HID_15a05, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 6444821504UL, + .hdr_sig_id = 3, + .flow_sig_id = 1611934720UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8930,22 +9532,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } }, [409] = { - .class_hid = BNXT_ULP_CLASS_HID_2f27d, + .class_hid = BNXT_ULP_CLASS_HID_12007, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 6445861888UL, + .hdr_sig_id = 3, + .flow_sig_id = 1612975104UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8953,22 +9555,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } }, [410] = { - .class_hid = BNXT_ULP_CLASS_HID_2e4fd, + .class_hid = BNXT_ULP_CLASS_HID_13407, .class_tid = 2, - .hdr_sig_id = 2, - .flow_sig_id = 6445870080UL, + .hdr_sig_id = 3, + .flow_sig_id = 1612983296UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -8976,23 +9577,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } }, [411] = { - .class_hid = BNXT_ULP_CLASS_HID_24fbe, + .class_hid = BNXT_ULP_CLASS_HID_1640b, .class_tid = 2, .hdr_sig_id = 3, - .flow_sig_id = 265216UL, + .flow_sig_id = 1614023680UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -9001,18 +9601,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI } + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } }, [412] = { - .class_hid = BNXT_ULP_CLASS_HID_201fa, + .class_hid = BNXT_ULP_CLASS_HID_1780b, .class_tid = 2, .hdr_sig_id = 3, - .flow_sig_id = 273408UL, + .flow_sig_id = 1614031872UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -9021,2202 +9624,16438 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI } + BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } }, [413] = { - .class_hid = BNXT_ULP_CLASS_HID_2ecf6, + .class_hid = BNXT_ULP_CLASS_HID_404b0, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 1313792UL, + .hdr_sig_id = 4, + .flow_sig_id = 66304UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC } + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI } }, [414] = { - .class_hid = BNXT_ULP_CLASS_HID_2a732, + .class_hid = BNXT_ULP_CLASS_HID_4148c, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 1321984UL, + .hdr_sig_id = 4, + .flow_sig_id = 68352UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC } + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI } }, [415] = { - .class_hid = BNXT_ULP_CLASS_HID_25e52, + .class_hid = BNXT_ULP_CLASS_HID_514c0, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 2362368UL, + .hdr_sig_id = 4, + .flow_sig_id = 328448UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC } + }, + [416] = { + .class_hid = BNXT_ULP_CLASS_HID_50bba, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 330496UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC } + }, + [417] = { + .class_hid = BNXT_ULP_CLASS_HID_48c88, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 590592UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC } + }, + [418] = { + .class_hid = BNXT_ULP_CLASS_HID_48362, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 592640UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC } + }, + [419] = { + .class_hid = BNXT_ULP_CLASS_HID_583b6, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 852736UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC } + }, + [420] = { + .class_hid = BNXT_ULP_CLASS_HID_593f2, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 854784UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC } + }, + [421] = { + .class_hid = BNXT_ULP_CLASS_HID_41f54, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 536937216UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR } + }, + [422] = { + .class_hid = BNXT_ULP_CLASS_HID_40fce, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 536939264UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR } + }, + [423] = { + .class_hid = BNXT_ULP_CLASS_HID_50e02, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 537199360UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR } + }, + [424] = { + .class_hid = BNXT_ULP_CLASS_HID_51e5e, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 537201408UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR } + }, + [425] = { + .class_hid = BNXT_ULP_CLASS_HID_487ca, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 537461504UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR } + }, + [426] = { + .class_hid = BNXT_ULP_CLASS_HID_49606, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 537463552UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR } + }, + [427] = { + .class_hid = BNXT_ULP_CLASS_HID_5965a, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 537723648UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR } + }, + [428] = { + .class_hid = BNXT_ULP_CLASS_HID_58514, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 537725696UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR } + }, + [429] = { + .class_hid = BNXT_ULP_CLASS_HID_412c2, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 1073808128UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + }, + [430] = { + .class_hid = BNXT_ULP_CLASS_HID_401ac, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 1073810176UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + }, + [431] = { + .class_hid = BNXT_ULP_CLASS_HID_501e0, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 1074070272UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + }, + [432] = { + .class_hid = BNXT_ULP_CLASS_HID_511cc, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 1074072320UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + }, + [433] = { + .class_hid = BNXT_ULP_CLASS_HID_4990a, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 1074332416UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + }, + [434] = { + .class_hid = BNXT_ULP_CLASS_HID_489e4, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 1074334464UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + }, + [435] = { + .class_hid = BNXT_ULP_CLASS_HID_589c8, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 1074594560UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + }, + [436] = { + .class_hid = BNXT_ULP_CLASS_HID_59804, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 1074596608UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + }, + [437] = { + .class_hid = BNXT_ULP_CLASS_HID_40404, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 1610679040UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + }, + [438] = { + .class_hid = BNXT_ULP_CLASS_HID_41440, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 1610681088UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + }, + [439] = { + .class_hid = BNXT_ULP_CLASS_HID_51484, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 1610941184UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + }, + [440] = { + .class_hid = BNXT_ULP_CLASS_HID_50b0e, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 1610943232UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + }, + [441] = { + .class_hid = BNXT_ULP_CLASS_HID_48c4c, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 1611203328UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + }, + [442] = { + .class_hid = BNXT_ULP_CLASS_HID_48306, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 1611205376UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + }, + [443] = { + .class_hid = BNXT_ULP_CLASS_HID_5830a, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 1611465472UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + }, + [444] = { + .class_hid = BNXT_ULP_CLASS_HID_59346, + .class_tid = 2, + .hdr_sig_id = 4, + .flow_sig_id = 1611467520UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + }, + [445] = { + .class_hid = BNXT_ULP_CLASS_HID_102cc, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 265216UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI } + }, + [446] = { + .class_hid = BNXT_ULP_CLASS_HID_116ec, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 273408UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI } + }, + [447] = { + .class_hid = BNXT_ULP_CLASS_HID_146d0, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 1313792UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC } + }, + [448] = { + .class_hid = BNXT_ULP_CLASS_HID_15af0, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 1321984UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC } + }, + [449] = { + .class_hid = BNXT_ULP_CLASS_HID_120c2, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 2362368UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC } + }, + [450] = { + .class_hid = BNXT_ULP_CLASS_HID_134e2, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 2370560UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC } + }, + [451] = { + .class_hid = BNXT_ULP_CLASS_HID_16b26, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 3410944UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC } + }, + [452] = { + .class_hid = BNXT_ULP_CLASS_HID_178c6, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 3419136UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC } + }, + [453] = { + .class_hid = BNXT_ULP_CLASS_HID_115c6, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 2147748864UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR } + }, + [454] = { + .class_hid = BNXT_ULP_CLASS_HID_10804, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 2147757056UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR } + }, + [455] = { + .class_hid = BNXT_ULP_CLASS_HID_15822, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 2148797440UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR } + }, + [456] = { + .class_hid = BNXT_ULP_CLASS_HID_14c60, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 2148805632UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR } + }, + [457] = { + .class_hid = BNXT_ULP_CLASS_HID_13bd4, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 2149846016UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR } + }, + [458] = { + .class_hid = BNXT_ULP_CLASS_HID_12e12, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 2149854208UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR } + }, + [459] = { + .class_hid = BNXT_ULP_CLASS_HID_17e30, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 2150894592UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR } + }, + [460] = { + .class_hid = BNXT_ULP_CLASS_HID_17276, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 2150902784UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR } + }, + [461] = { + .class_hid = BNXT_ULP_CLASS_HID_11f1a, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 4295232512UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR } + }, + [462] = { + .class_hid = BNXT_ULP_CLASS_HID_11358, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 4295240704UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR } + }, + [463] = { + .class_hid = BNXT_ULP_CLASS_HID_14398, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 4296281088UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR } + }, + [464] = { + .class_hid = BNXT_ULP_CLASS_HID_157b8, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 4296289280UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR } + }, + [465] = { + .class_hid = BNXT_ULP_CLASS_HID_13d68, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 4297329664UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR } + }, + [466] = { + .class_hid = BNXT_ULP_CLASS_HID_131aa, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 4297337856UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR } + }, + [467] = { + .class_hid = BNXT_ULP_CLASS_HID_16192, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 4298378240UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR } + }, + [468] = { + .class_hid = BNXT_ULP_CLASS_HID_175b2, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 4298386432UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR } + }, + [469] = { + .class_hid = BNXT_ULP_CLASS_HID_112b2, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 6442716160UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR } + }, + [470] = { + .class_hid = BNXT_ULP_CLASS_HID_106f0, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 6442724352UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR } + }, + [471] = { + .class_hid = BNXT_ULP_CLASS_HID_15692, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 6443764736UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR } + }, + [472] = { + .class_hid = BNXT_ULP_CLASS_HID_14ad0, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 6443772928UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR } + }, + [473] = { + .class_hid = BNXT_ULP_CLASS_HID_13080, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 6444813312UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR } + }, + [474] = { + .class_hid = BNXT_ULP_CLASS_HID_124c2, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 6444821504UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR } + }, + [475] = { + .class_hid = BNXT_ULP_CLASS_HID_174e0, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 6445861888UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR } + }, + [476] = { + .class_hid = BNXT_ULP_CLASS_HID_16f22, + .class_tid = 2, + .hdr_sig_id = 5, + .flow_sig_id = 6445870080UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR } + }, + [477] = { + .class_hid = BNXT_ULP_CLASS_HID_4025b, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 66304UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI } + }, + [478] = { + .class_hid = BNXT_ULP_CLASS_HID_41267, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 68352UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI } + }, + [479] = { + .class_hid = BNXT_ULP_CLASS_HID_5122b, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 328448UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC } + }, + [480] = { + .class_hid = BNXT_ULP_CLASS_HID_50d51, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 330496UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC } + }, + [481] = { + .class_hid = BNXT_ULP_CLASS_HID_48a63, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 590592UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC } + }, + [482] = { + .class_hid = BNXT_ULP_CLASS_HID_48589, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 592640UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC } + }, + [483] = { + .class_hid = BNXT_ULP_CLASS_HID_5855d, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 852736UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC } + }, + [484] = { + .class_hid = BNXT_ULP_CLASS_HID_59519, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 854784UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC } + }, + [485] = { + .class_hid = BNXT_ULP_CLASS_HID_41e17, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 134284032UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR } + }, + [486] = { + .class_hid = BNXT_ULP_CLASS_HID_4093d, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 134286080UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR } + }, + [487] = { + .class_hid = BNXT_ULP_CLASS_HID_50941, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 134546176UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR } + }, + [488] = { + .class_hid = BNXT_ULP_CLASS_HID_5190d, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 134548224UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR } + }, + [489] = { + .class_hid = BNXT_ULP_CLASS_HID_48139, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 134808320UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR } + }, + [490] = { + .class_hid = BNXT_ULP_CLASS_HID_49145, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 134810368UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR } + }, + [491] = { + .class_hid = BNXT_ULP_CLASS_HID_59109, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 135070464UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR } + }, + [492] = { + .class_hid = BNXT_ULP_CLASS_HID_58037, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 135072512UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR } + }, + [493] = { + .class_hid = BNXT_ULP_CLASS_HID_4143d, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 268501760UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR } + }, + [494] = { + .class_hid = BNXT_ULP_CLASS_HID_4079b, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 268503808UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR } + }, + [495] = { + .class_hid = BNXT_ULP_CLASS_HID_507af, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 268763904UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR } + }, + [496] = { + .class_hid = BNXT_ULP_CLASS_HID_5172b, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 268765952UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR } + }, + [497] = { + .class_hid = BNXT_ULP_CLASS_HID_49c05, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 269026048UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR } + }, + [498] = { + .class_hid = BNXT_ULP_CLASS_HID_48fa3, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 269028096UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR } + }, + [499] = { + .class_hid = BNXT_ULP_CLASS_HID_58f37, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 269288192UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR } + }, + [500] = { + .class_hid = BNXT_ULP_CLASS_HID_59f33, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 269290240UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR } + }, + [501] = { + .class_hid = BNXT_ULP_CLASS_HID_4030b, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 402719488UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR } + }, + [502] = { + .class_hid = BNXT_ULP_CLASS_HID_41317, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 402721536UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR } + }, + [503] = { + .class_hid = BNXT_ULP_CLASS_HID_5131b, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 402981632UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR } + }, + [504] = { + .class_hid = BNXT_ULP_CLASS_HID_50201, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 402983680UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR } + }, + [505] = { + .class_hid = BNXT_ULP_CLASS_HID_48b13, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 403243776UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR } + }, + [506] = { + .class_hid = BNXT_ULP_CLASS_HID_49b1f, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 403245824UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR } + }, + [507] = { + .class_hid = BNXT_ULP_CLASS_HID_59b23, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 403505920UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR } + }, + [508] = { + .class_hid = BNXT_ULP_CLASS_HID_58a09, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 403507968UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR } + }, + [509] = { + .class_hid = BNXT_ULP_CLASS_HID_419bf, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 536937216UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [510] = { + .class_hid = BNXT_ULP_CLASS_HID_40925, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 536939264UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [511] = { + .class_hid = BNXT_ULP_CLASS_HID_508e9, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 537199360UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [512] = { + .class_hid = BNXT_ULP_CLASS_HID_518b5, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 537201408UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [513] = { + .class_hid = BNXT_ULP_CLASS_HID_48121, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 537461504UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [514] = { + .class_hid = BNXT_ULP_CLASS_HID_490ed, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 537463552UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [515] = { + .class_hid = BNXT_ULP_CLASS_HID_590b1, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 537723648UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [516] = { + .class_hid = BNXT_ULP_CLASS_HID_583ff, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 537725696UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [517] = { + .class_hid = BNXT_ULP_CLASS_HID_41475, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 671154944UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [518] = { + .class_hid = BNXT_ULP_CLASS_HID_40473, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 671156992UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [519] = { + .class_hid = BNXT_ULP_CLASS_HID_50427, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 671417088UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [520] = { + .class_hid = BNXT_ULP_CLASS_HID_51763, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 671419136UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [521] = { + .class_hid = BNXT_ULP_CLASS_HID_49c3d, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 671679232UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [522] = { + .class_hid = BNXT_ULP_CLASS_HID_48c3b, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 671681280UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [523] = { + .class_hid = BNXT_ULP_CLASS_HID_58f6f, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 671941376UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [524] = { + .class_hid = BNXT_ULP_CLASS_HID_59f2b, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 671943424UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [525] = { + .class_hid = BNXT_ULP_CLASS_HID_40333, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 805372672UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [526] = { + .class_hid = BNXT_ULP_CLASS_HID_412bf, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 805374720UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [527] = { + .class_hid = BNXT_ULP_CLASS_HID_512a3, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 805634816UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [528] = { + .class_hid = BNXT_ULP_CLASS_HID_50229, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 805636864UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [529] = { + .class_hid = BNXT_ULP_CLASS_HID_48abb, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 805896960UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [530] = { + .class_hid = BNXT_ULP_CLASS_HID_49aa7, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 805899008UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [531] = { + .class_hid = BNXT_ULP_CLASS_HID_59a2b, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 806159104UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [532] = { + .class_hid = BNXT_ULP_CLASS_HID_595b1, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 806161152UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [533] = { + .class_hid = BNXT_ULP_CLASS_HID_41e2f, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 939590400UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [534] = { + .class_hid = BNXT_ULP_CLASS_HID_40e35, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 939592448UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [535] = { + .class_hid = BNXT_ULP_CLASS_HID_50939, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 939852544UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [536] = { + .class_hid = BNXT_ULP_CLASS_HID_51925, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 939854592UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [537] = { + .class_hid = BNXT_ULP_CLASS_HID_48631, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 940114688UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [538] = { + .class_hid = BNXT_ULP_CLASS_HID_4913d, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 940116736UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [539] = { + .class_hid = BNXT_ULP_CLASS_HID_59121, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 940376832UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [540] = { + .class_hid = BNXT_ULP_CLASS_HID_5812f, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 940378880UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT } + }, + [541] = { + .class_hid = BNXT_ULP_CLASS_HID_41429, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1073808128UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [542] = { + .class_hid = BNXT_ULP_CLASS_HID_40747, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1073810176UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [543] = { + .class_hid = BNXT_ULP_CLASS_HID_5070b, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1074070272UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [544] = { + .class_hid = BNXT_ULP_CLASS_HID_51727, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1074072320UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [545] = { + .class_hid = BNXT_ULP_CLASS_HID_49fe1, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1074332416UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [546] = { + .class_hid = BNXT_ULP_CLASS_HID_48f0f, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1074334464UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [547] = { + .class_hid = BNXT_ULP_CLASS_HID_58f23, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1074594560UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [548] = { + .class_hid = BNXT_ULP_CLASS_HID_59eef, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1074596608UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [549] = { + .class_hid = BNXT_ULP_CLASS_HID_40347, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1208025856UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [550] = { + .class_hid = BNXT_ULP_CLASS_HID_41303, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1208027904UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [551] = { + .class_hid = BNXT_ULP_CLASS_HID_51247, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1208288000UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [552] = { + .class_hid = BNXT_ULP_CLASS_HID_5026d, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1208290048UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [553] = { + .class_hid = BNXT_ULP_CLASS_HID_48b0f, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1208550144UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [554] = { + .class_hid = BNXT_ULP_CLASS_HID_49a4b, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1208552192UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [555] = { + .class_hid = BNXT_ULP_CLASS_HID_59a0f, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1208812288UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [556] = { + .class_hid = BNXT_ULP_CLASS_HID_58a05, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1208814336UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [557] = { + .class_hid = BNXT_ULP_CLASS_HID_41983, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1342243584UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [558] = { + .class_hid = BNXT_ULP_CLASS_HID_40929, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1342245632UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [559] = { + .class_hid = BNXT_ULP_CLASS_HID_5092d, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1342505728UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [560] = { + .class_hid = BNXT_ULP_CLASS_HID_518a9, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1342507776UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [561] = { + .class_hid = BNXT_ULP_CLASS_HID_48125, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1342767872UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [562] = { + .class_hid = BNXT_ULP_CLASS_HID_49121, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1342769920UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [563] = { + .class_hid = BNXT_ULP_CLASS_HID_59085, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1343030016UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [564] = { + .class_hid = BNXT_ULP_CLASS_HID_58023, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1343032064UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [565] = { + .class_hid = BNXT_ULP_CLASS_HID_41509, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1476461312UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [566] = { + .class_hid = BNXT_ULP_CLASS_HID_40407, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1476463360UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [567] = { + .class_hid = BNXT_ULP_CLASS_HID_5040b, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1476723456UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [568] = { + .class_hid = BNXT_ULP_CLASS_HID_51407, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1476725504UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [569] = { + .class_hid = BNXT_ULP_CLASS_HID_49d21, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1476985600UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [570] = { + .class_hid = BNXT_ULP_CLASS_HID_48c0f, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1476987648UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [571] = { + .class_hid = BNXT_ULP_CLASS_HID_58c03, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1477247744UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [572] = { + .class_hid = BNXT_ULP_CLASS_HID_59f0f, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1477249792UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [573] = { + .class_hid = BNXT_ULP_CLASS_HID_402ef, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1610679040UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [574] = { + .class_hid = BNXT_ULP_CLASS_HID_412ab, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1610681088UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [575] = { + .class_hid = BNXT_ULP_CLASS_HID_5126f, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1610941184UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [576] = { + .class_hid = BNXT_ULP_CLASS_HID_50de5, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1610943232UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [577] = { + .class_hid = BNXT_ULP_CLASS_HID_48aa7, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1611203328UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [578] = { + .class_hid = BNXT_ULP_CLASS_HID_485ed, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1611205376UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [579] = { + .class_hid = BNXT_ULP_CLASS_HID_585e1, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1611465472UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [580] = { + .class_hid = BNXT_ULP_CLASS_HID_595ad, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1611467520UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [581] = { + .class_hid = BNXT_ULP_CLASS_HID_41e6b, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1744896768UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [582] = { + .class_hid = BNXT_ULP_CLASS_HID_40961, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1744898816UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [583] = { + .class_hid = BNXT_ULP_CLASS_HID_50925, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1745158912UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [584] = { + .class_hid = BNXT_ULP_CLASS_HID_51961, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1745160960UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [585] = { + .class_hid = BNXT_ULP_CLASS_HID_4816d, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1745421056UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [586] = { + .class_hid = BNXT_ULP_CLASS_HID_49129, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1745423104UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [587] = { + .class_hid = BNXT_ULP_CLASS_HID_5916d, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1745683200UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [588] = { + .class_hid = BNXT_ULP_CLASS_HID_5806b, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1745685248UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [589] = { + .class_hid = BNXT_ULP_CLASS_HID_414a1, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1879114496UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [590] = { + .class_hid = BNXT_ULP_CLASS_HID_4042f, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1879116544UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [591] = { + .class_hid = BNXT_ULP_CLASS_HID_507a3, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1879376640UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [592] = { + .class_hid = BNXT_ULP_CLASS_HID_517af, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1879378688UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [593] = { + .class_hid = BNXT_ULP_CLASS_HID_49c29, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1879638784UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [594] = { + .class_hid = BNXT_ULP_CLASS_HID_48fa7, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1879640832UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [595] = { + .class_hid = BNXT_ULP_CLASS_HID_58fab, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1879900928UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [596] = { + .class_hid = BNXT_ULP_CLASS_HID_59f27, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 1879902976UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [597] = { + .class_hid = BNXT_ULP_CLASS_HID_4032f, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 2013332224UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [598] = { + .class_hid = BNXT_ULP_CLASS_HID_4132b, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 2013334272UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [599] = { + .class_hid = BNXT_ULP_CLASS_HID_5132f, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 2013594368UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [600] = { + .class_hid = BNXT_ULP_CLASS_HID_50225, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 2013596416UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [601] = { + .class_hid = BNXT_ULP_CLASS_HID_48b27, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 2013856512UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [602] = { + .class_hid = BNXT_ULP_CLASS_HID_49b23, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 2013858560UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [603] = { + .class_hid = BNXT_ULP_CLASS_HID_59b27, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 2014118656UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [604] = { + .class_hid = BNXT_ULP_CLASS_HID_58a2d, + .class_tid = 2, + .hdr_sig_id = 6, + .flow_sig_id = 2014120704UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT } + }, + [605] = { + .class_hid = BNXT_ULP_CLASS_HID_10437, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 265216UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI } + }, + [606] = { + .class_hid = BNXT_ULP_CLASS_HID_11017, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 273408UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI } + }, + [607] = { + .class_hid = BNXT_ULP_CLASS_HID_1402b, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 1313792UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC } + }, + [608] = { + .class_hid = BNXT_ULP_CLASS_HID_15c0b, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 1321984UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC } + }, + [609] = { + .class_hid = BNXT_ULP_CLASS_HID_12639, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 2362368UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC } + }, + [610] = { + .class_hid = BNXT_ULP_CLASS_HID_13219, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 2370560UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC } + }, + [611] = { + .class_hid = BNXT_ULP_CLASS_HID_16ddd, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 3410944UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC } + }, + [612] = { + .class_hid = BNXT_ULP_CLASS_HID_17e3d, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 3419136UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC } + }, + [613] = { + .class_hid = BNXT_ULP_CLASS_HID_11333, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 537136128UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR } + }, + [614] = { + .class_hid = BNXT_ULP_CLASS_HID_10ef5, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 537144320UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR } + }, + [615] = { + .class_hid = BNXT_ULP_CLASS_HID_15f37, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 538184704UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR } + }, + [616] = { + .class_hid = BNXT_ULP_CLASS_HID_14ae9, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 538192896UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR } + }, + [617] = { + .class_hid = BNXT_ULP_CLASS_HID_13d25, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 539233280UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR } + }, + [618] = { + .class_hid = BNXT_ULP_CLASS_HID_128e7, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 539241472UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR } + }, + [619] = { + .class_hid = BNXT_ULP_CLASS_HID_17939, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 540281856UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR } + }, + [620] = { + .class_hid = BNXT_ULP_CLASS_HID_174fb, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 540290048UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR } + }, + [621] = { + .class_hid = BNXT_ULP_CLASS_HID_10985, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 1074007040UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR } + }, + [622] = { + .class_hid = BNXT_ULP_CLASS_HID_10547, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 1074015232UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR } + }, + [623] = { + .class_hid = BNXT_ULP_CLASS_HID_155a9, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 1075055616UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR } + }, + [624] = { + .class_hid = BNXT_ULP_CLASS_HID_1416b, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 1075063808UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR } + }, + [625] = { + .class_hid = BNXT_ULP_CLASS_HID_12ba7, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 1076104192UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR } + }, + [626] = { + .class_hid = BNXT_ULP_CLASS_HID_12749, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 1076112384UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR } + }, + [627] = { + .class_hid = BNXT_ULP_CLASS_HID_177ab, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 1077152768UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR } + }, + [628] = { + .class_hid = BNXT_ULP_CLASS_HID_1636d, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 1077160960UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR } + }, + [629] = { + .class_hid = BNXT_ULP_CLASS_HID_10463, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 1610877952UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR } + }, + [630] = { + .class_hid = BNXT_ULP_CLASS_HID_110a3, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 1610886144UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR } + }, + [631] = { + .class_hid = BNXT_ULP_CLASS_HID_14067, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 1611926528UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR } + }, + [632] = { + .class_hid = BNXT_ULP_CLASS_HID_15c67, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 1611934720UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR } + }, + [633] = { + .class_hid = BNXT_ULP_CLASS_HID_12665, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 1612975104UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR } + }, + [634] = { + .class_hid = BNXT_ULP_CLASS_HID_13265, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 1612983296UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR } + }, + [635] = { + .class_hid = BNXT_ULP_CLASS_HID_16269, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 1614023680UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR } + }, + [636] = { + .class_hid = BNXT_ULP_CLASS_HID_17e69, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 1614031872UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR } + }, + [637] = { + .class_hid = BNXT_ULP_CLASS_HID_1133d, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 2147748864UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [638] = { + .class_hid = BNXT_ULP_CLASS_HID_10eff, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 2147757056UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [639] = { + .class_hid = BNXT_ULP_CLASS_HID_15ed9, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 2148797440UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [640] = { + .class_hid = BNXT_ULP_CLASS_HID_14a9b, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 2148805632UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [641] = { + .class_hid = BNXT_ULP_CLASS_HID_13d2f, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 2149846016UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [642] = { + .class_hid = BNXT_ULP_CLASS_HID_128e9, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 2149854208UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [643] = { + .class_hid = BNXT_ULP_CLASS_HID_178cb, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 2150894592UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [644] = { + .class_hid = BNXT_ULP_CLASS_HID_1748d, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 2150902784UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [645] = { + .class_hid = BNXT_ULP_CLASS_HID_109fb, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 2684619776UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [646] = { + .class_hid = BNXT_ULP_CLASS_HID_105bd, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 2684627968UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [647] = { + .class_hid = BNXT_ULP_CLASS_HID_155bf, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 2685668352UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [648] = { + .class_hid = BNXT_ULP_CLASS_HID_14179, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 2685676544UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [649] = { + .class_hid = BNXT_ULP_CLASS_HID_12bed, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 2686716928UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [650] = { + .class_hid = BNXT_ULP_CLASS_HID_127af, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 2686725120UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [651] = { + .class_hid = BNXT_ULP_CLASS_HID_177a9, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 2687765504UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [652] = { + .class_hid = BNXT_ULP_CLASS_HID_1636b, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 2687773696UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [653] = { + .class_hid = BNXT_ULP_CLASS_HID_1046d, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 3221490688UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [654] = { + .class_hid = BNXT_ULP_CLASS_HID_1104d, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 3221498880UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [655] = { + .class_hid = BNXT_ULP_CLASS_HID_14009, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 3222539264UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [656] = { + .class_hid = BNXT_ULP_CLASS_HID_15c69, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 3222547456UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [657] = { + .class_hid = BNXT_ULP_CLASS_HID_1260f, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 3223587840UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [658] = { + .class_hid = BNXT_ULP_CLASS_HID_1326f, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 3223596032UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [659] = { + .class_hid = BNXT_ULP_CLASS_HID_1622b, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 3224636416UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [660] = { + .class_hid = BNXT_ULP_CLASS_HID_17e0b, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 3224644608UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [661] = { + .class_hid = BNXT_ULP_CLASS_HID_11369, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 3758361600UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [662] = { + .class_hid = BNXT_ULP_CLASS_HID_10f2b, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 3758369792UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [663] = { + .class_hid = BNXT_ULP_CLASS_HID_15f6d, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 3759410176UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [664] = { + .class_hid = BNXT_ULP_CLASS_HID_14b2f, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 3759418368UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [665] = { + .class_hid = BNXT_ULP_CLASS_HID_13d6b, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 3760458752UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [666] = { + .class_hid = BNXT_ULP_CLASS_HID_1292d, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 3760466944UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [667] = { + .class_hid = BNXT_ULP_CLASS_HID_1792f, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 3761507328UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [668] = { + .class_hid = BNXT_ULP_CLASS_HID_174e9, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 3761515520UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT } + }, + [669] = { + .class_hid = BNXT_ULP_CLASS_HID_119e1, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 4295232512UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [670] = { + .class_hid = BNXT_ULP_CLASS_HID_115a3, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 4295240704UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [671] = { + .class_hid = BNXT_ULP_CLASS_HID_14563, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 4296281088UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [672] = { + .class_hid = BNXT_ULP_CLASS_HID_15143, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 4296289280UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [673] = { + .class_hid = BNXT_ULP_CLASS_HID_13b93, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 4297329664UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [674] = { + .class_hid = BNXT_ULP_CLASS_HID_13751, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 4297337856UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [675] = { + .class_hid = BNXT_ULP_CLASS_HID_16769, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 4298378240UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [676] = { + .class_hid = BNXT_ULP_CLASS_HID_17349, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 4298386432UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [677] = { + .class_hid = BNXT_ULP_CLASS_HID_114ab, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 4832103424UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [678] = { + .class_hid = BNXT_ULP_CLASS_HID_10061, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 4832111616UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [679] = { + .class_hid = BNXT_ULP_CLASS_HID_15063, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 4833152000UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [680] = { + .class_hid = BNXT_ULP_CLASS_HID_14c21, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 4833160192UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [681] = { + .class_hid = BNXT_ULP_CLASS_HID_13671, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 4834200576UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [682] = { + .class_hid = BNXT_ULP_CLASS_HID_12233, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 4834208768UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [683] = { + .class_hid = BNXT_ULP_CLASS_HID_17271, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 4835249152UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [684] = { + .class_hid = BNXT_ULP_CLASS_HID_16e33, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 4835257344UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [685] = { + .class_hid = BNXT_ULP_CLASS_HID_102c1, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 5368974336UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [686] = { + .class_hid = BNXT_ULP_CLASS_HID_11f21, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 5368982528UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [687] = { + .class_hid = BNXT_ULP_CLASS_HID_14ee1, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 5370022912UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [688] = { + .class_hid = BNXT_ULP_CLASS_HID_15ac1, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 5370031104UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [689] = { + .class_hid = BNXT_ULP_CLASS_HID_12cc3, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 5371071488UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [690] = { + .class_hid = BNXT_ULP_CLASS_HID_13923, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 5371079680UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [691] = { + .class_hid = BNXT_ULP_CLASS_HID_168e3, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 5372120064UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [692] = { + .class_hid = BNXT_ULP_CLASS_HID_164a9, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 5372128256UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [693] = { + .class_hid = BNXT_ULP_CLASS_HID_11e29, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 5905845248UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [694] = { + .class_hid = BNXT_ULP_CLASS_HID_115eb, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 5905853440UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [695] = { + .class_hid = BNXT_ULP_CLASS_HID_145a3, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 5906893824UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [696] = { + .class_hid = BNXT_ULP_CLASS_HID_151a3, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 5906902016UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [697] = { + .class_hid = BNXT_ULP_CLASS_HID_1382b, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 5907942400UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [698] = { + .class_hid = BNXT_ULP_CLASS_HID_137e1, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 5907950592UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [699] = { + .class_hid = BNXT_ULP_CLASS_HID_167a1, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 5908990976UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [700] = { + .class_hid = BNXT_ULP_CLASS_HID_173a1, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 5908999168UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [701] = { + .class_hid = BNXT_ULP_CLASS_HID_11449, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 6442716160UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [702] = { + .class_hid = BNXT_ULP_CLASS_HID_1000b, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 6442724352UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [703] = { + .class_hid = BNXT_ULP_CLASS_HID_15069, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 6443764736UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [704] = { + .class_hid = BNXT_ULP_CLASS_HID_14c2b, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 6443772928UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [705] = { + .class_hid = BNXT_ULP_CLASS_HID_1367b, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 6444813312UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [706] = { + .class_hid = BNXT_ULP_CLASS_HID_12239, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 6444821504UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [707] = { + .class_hid = BNXT_ULP_CLASS_HID_1721b, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 6445861888UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [708] = { + .class_hid = BNXT_ULP_CLASS_HID_169d9, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 6445870080UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [709] = { + .class_hid = BNXT_ULP_CLASS_HID_1033b, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 6979587072UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [710] = { + .class_hid = BNXT_ULP_CLASS_HID_11f3b, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 6979595264UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [711] = { + .class_hid = BNXT_ULP_CLASS_HID_14f2b, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 6980635648UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [712] = { + .class_hid = BNXT_ULP_CLASS_HID_15b2b, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 6980643840UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [713] = { + .class_hid = BNXT_ULP_CLASS_HID_12d39, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 6981684224UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [714] = { + .class_hid = BNXT_ULP_CLASS_HID_13939, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 6981692416UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [715] = { + .class_hid = BNXT_ULP_CLASS_HID_168f9, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 6982732800UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [716] = { + .class_hid = BNXT_ULP_CLASS_HID_164bb, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 6982740992UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [717] = { + .class_hid = BNXT_ULP_CLASS_HID_119cb, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 7516457984UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [718] = { + .class_hid = BNXT_ULP_CLASS_HID_11589, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 7516466176UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [719] = { + .class_hid = BNXT_ULP_CLASS_HID_14549, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 7517506560UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [720] = { + .class_hid = BNXT_ULP_CLASS_HID_151a9, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 7517514752UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [721] = { + .class_hid = BNXT_ULP_CLASS_HID_13bc9, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 7518555136UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [722] = { + .class_hid = BNXT_ULP_CLASS_HID_1378b, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 7518563328UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [723] = { + .class_hid = BNXT_ULP_CLASS_HID_1674b, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 7519603712UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [724] = { + .class_hid = BNXT_ULP_CLASS_HID_173ab, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 7519611904UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [725] = { + .class_hid = BNXT_ULP_CLASS_HID_114a9, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 8053328896UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [726] = { + .class_hid = BNXT_ULP_CLASS_HID_1006b, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 8053337088UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [727] = { + .class_hid = BNXT_ULP_CLASS_HID_150a9, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 8054377472UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [728] = { + .class_hid = BNXT_ULP_CLASS_HID_14c6b, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 8054385664UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [729] = { + .class_hid = BNXT_ULP_CLASS_HID_136ab, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 8055426048UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [730] = { + .class_hid = BNXT_ULP_CLASS_HID_12269, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 8055434240UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [731] = { + .class_hid = BNXT_ULP_CLASS_HID_172ab, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 8056474624UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [732] = { + .class_hid = BNXT_ULP_CLASS_HID_16e69, + .class_tid = 2, + .hdr_sig_id = 7, + .flow_sig_id = 8056482816UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT } + }, + [733] = { + .class_hid = BNXT_ULP_CLASS_HID_402d2, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 66304UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI } + }, + [734] = { + .class_hid = BNXT_ULP_CLASS_HID_412ee, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 68352UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI } + }, + [735] = { + .class_hid = BNXT_ULP_CLASS_HID_512a2, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 328448UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC } + }, + [736] = { + .class_hid = BNXT_ULP_CLASS_HID_50dd8, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 330496UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC } + }, + [737] = { + .class_hid = BNXT_ULP_CLASS_HID_48aea, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 590592UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC } + }, + [738] = { + .class_hid = BNXT_ULP_CLASS_HID_48500, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 592640UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC } + }, + [739] = { + .class_hid = BNXT_ULP_CLASS_HID_585d4, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 852736UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC } + }, + [740] = { + .class_hid = BNXT_ULP_CLASS_HID_59590, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 854784UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC } + }, + [741] = { + .class_hid = BNXT_ULP_CLASS_HID_41936, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 536937216UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR } + }, + [742] = { + .class_hid = BNXT_ULP_CLASS_HID_409ac, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 536939264UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR } + }, + [743] = { + .class_hid = BNXT_ULP_CLASS_HID_50860, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 537199360UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR } + }, + [744] = { + .class_hid = BNXT_ULP_CLASS_HID_5183c, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 537201408UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR } + }, + [745] = { + .class_hid = BNXT_ULP_CLASS_HID_481a8, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 537461504UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR } + }, + [746] = { + .class_hid = BNXT_ULP_CLASS_HID_49064, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 537463552UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR } + }, + [747] = { + .class_hid = BNXT_ULP_CLASS_HID_59038, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 537723648UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR } + }, + [748] = { + .class_hid = BNXT_ULP_CLASS_HID_58376, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 537725696UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR } + }, + [749] = { + .class_hid = BNXT_ULP_CLASS_HID_414a0, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 1073808128UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR } + }, + [750] = { + .class_hid = BNXT_ULP_CLASS_HID_407ce, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 1073810176UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR } + }, + [751] = { + .class_hid = BNXT_ULP_CLASS_HID_50782, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 1074070272UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR } + }, + [752] = { + .class_hid = BNXT_ULP_CLASS_HID_517ae, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 1074072320UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR } + }, + [753] = { + .class_hid = BNXT_ULP_CLASS_HID_49f68, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 1074332416UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR } + }, + [754] = { + .class_hid = BNXT_ULP_CLASS_HID_48f86, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 1074334464UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR } + }, + [755] = { + .class_hid = BNXT_ULP_CLASS_HID_58faa, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 1074594560UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR } + }, + [756] = { + .class_hid = BNXT_ULP_CLASS_HID_59e66, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 1074596608UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR } + }, + [757] = { + .class_hid = BNXT_ULP_CLASS_HID_40266, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 1610679040UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR } + }, + [758] = { + .class_hid = BNXT_ULP_CLASS_HID_41222, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 1610681088UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR } + }, + [759] = { + .class_hid = BNXT_ULP_CLASS_HID_512e6, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 1610941184UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR } + }, + [760] = { + .class_hid = BNXT_ULP_CLASS_HID_50d6c, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 1610943232UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR } + }, + [761] = { + .class_hid = BNXT_ULP_CLASS_HID_48a2e, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 1611203328UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR } + }, + [762] = { + .class_hid = BNXT_ULP_CLASS_HID_48564, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 1611205376UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR } + }, + [763] = { + .class_hid = BNXT_ULP_CLASS_HID_58568, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 1611465472UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR } + }, + [764] = { + .class_hid = BNXT_ULP_CLASS_HID_59524, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 1611467520UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR } + }, + [765] = { + .class_hid = BNXT_ULP_CLASS_HID_419d8, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 2147549952UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [766] = { + .class_hid = BNXT_ULP_CLASS_HID_4087e, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 2147552000UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [767] = { + .class_hid = BNXT_ULP_CLASS_HID_5080a, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 2147812096UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [768] = { + .class_hid = BNXT_ULP_CLASS_HID_518ce, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 2147814144UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [769] = { + .class_hid = BNXT_ULP_CLASS_HID_4807a, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 2148074240UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [770] = { + .class_hid = BNXT_ULP_CLASS_HID_4900e, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 2148076288UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [771] = { + .class_hid = BNXT_ULP_CLASS_HID_590ca, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 2148336384UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [772] = { + .class_hid = BNXT_ULP_CLASS_HID_58378, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 2148338432UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [773] = { + .class_hid = BNXT_ULP_CLASS_HID_414be, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 2684420864UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [774] = { + .class_hid = BNXT_ULP_CLASS_HID_4073c, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 2684422912UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [775] = { + .class_hid = BNXT_ULP_CLASS_HID_507e8, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 2684683008UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [776] = { + .class_hid = BNXT_ULP_CLASS_HID_517ac, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 2684685056UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [777] = { + .class_hid = BNXT_ULP_CLASS_HID_49f7e, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 2684945152UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [778] = { + .class_hid = BNXT_ULP_CLASS_HID_48fec, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 2684947200UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [779] = { + .class_hid = BNXT_ULP_CLASS_HID_58fa8, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 2685207296UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [780] = { + .class_hid = BNXT_ULP_CLASS_HID_59e7c, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 2685209344UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [781] = { + .class_hid = BNXT_ULP_CLASS_HID_40208, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 3221291776UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [782] = { + .class_hid = BNXT_ULP_CLASS_HID_412cc, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 3221293824UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [783] = { + .class_hid = BNXT_ULP_CLASS_HID_51288, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 3221553920UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [784] = { + .class_hid = BNXT_ULP_CLASS_HID_50d2e, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 3221555968UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [785] = { + .class_hid = BNXT_ULP_CLASS_HID_48ac8, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 3221816064UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [786] = { + .class_hid = BNXT_ULP_CLASS_HID_4856e, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 3221818112UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [787] = { + .class_hid = BNXT_ULP_CLASS_HID_5852a, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 3222078208UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [788] = { + .class_hid = BNXT_ULP_CLASS_HID_595ce, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 3222080256UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [789] = { + .class_hid = BNXT_ULP_CLASS_HID_4196c, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 3758162688UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [790] = { + .class_hid = BNXT_ULP_CLASS_HID_409aa, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 3758164736UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [791] = { + .class_hid = BNXT_ULP_CLASS_HID_5086e, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 3758424832UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [792] = { + .class_hid = BNXT_ULP_CLASS_HID_5182a, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 3758426880UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [793] = { + .class_hid = BNXT_ULP_CLASS_HID_481ae, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 3758686976UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [794] = { + .class_hid = BNXT_ULP_CLASS_HID_4906a, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 3758689024UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [795] = { + .class_hid = BNXT_ULP_CLASS_HID_5902e, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 3758949120UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [796] = { + .class_hid = BNXT_ULP_CLASS_HID_580ac, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 3758951168UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT } + }, + [797] = { + .class_hid = BNXT_ULP_CLASS_HID_40766, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 4295033600UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [798] = { + .class_hid = BNXT_ULP_CLASS_HID_41726, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 4295035648UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [799] = { + .class_hid = BNXT_ULP_CLASS_HID_517f6, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 4295295744UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [800] = { + .class_hid = BNXT_ULP_CLASS_HID_5066c, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 4295297792UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [801] = { + .class_hid = BNXT_ULP_CLASS_HID_48f3e, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 4295557888UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [802] = { + .class_hid = BNXT_ULP_CLASS_HID_49ffe, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 4295559936UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [803] = { + .class_hid = BNXT_ULP_CLASS_HID_59f8e, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 4295820032UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [804] = { + .class_hid = BNXT_ULP_CLASS_HID_58e24, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 4295822080UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [805] = { + .class_hid = BNXT_ULP_CLASS_HID_4126e, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 4831904512UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [806] = { + .class_hid = BNXT_ULP_CLASS_HID_402e4, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 4831906560UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [807] = { + .class_hid = BNXT_ULP_CLASS_HID_502b4, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 4832166656UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [808] = { + .class_hid = BNXT_ULP_CLASS_HID_51d74, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 4832168704UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [809] = { + .class_hid = BNXT_ULP_CLASS_HID_49a26, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 4832428800UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [810] = { + .class_hid = BNXT_ULP_CLASS_HID_48abc, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 4832430848UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [811] = { + .class_hid = BNXT_ULP_CLASS_HID_5956c, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 4832690944UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [812] = { + .class_hid = BNXT_ULP_CLASS_HID_585ee, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 4832692992UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [813] = { + .class_hid = BNXT_ULP_CLASS_HID_409e4, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 5368775424UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [814] = { + .class_hid = BNXT_ULP_CLASS_HID_419a4, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 5368777472UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [815] = { + .class_hid = BNXT_ULP_CLASS_HID_51844, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 5369037568UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [816] = { + .class_hid = BNXT_ULP_CLASS_HID_508e6, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 5369039616UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [817] = { + .class_hid = BNXT_ULP_CLASS_HID_4918c, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 5369299712UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [818] = { + .class_hid = BNXT_ULP_CLASS_HID_4802e, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 5369301760UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [819] = { + .class_hid = BNXT_ULP_CLASS_HID_580ee, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 5369561856UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [820] = { + .class_hid = BNXT_ULP_CLASS_HID_590ae, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 5369563904UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [821] = { + .class_hid = BNXT_ULP_CLASS_HID_404ae, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 5905646336UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [822] = { + .class_hid = BNXT_ULP_CLASS_HID_41766, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 5905648384UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [823] = { + .class_hid = BNXT_ULP_CLASS_HID_5172e, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 5905908480UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [824] = { + .class_hid = BNXT_ULP_CLASS_HID_507a4, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 5905910528UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [825] = { + .class_hid = BNXT_ULP_CLASS_HID_48f66, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 5906170624UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [826] = { + .class_hid = BNXT_ULP_CLASS_HID_49f2e, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 5906172672UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [827] = { + .class_hid = BNXT_ULP_CLASS_HID_59fe6, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 5906432768UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [828] = { + .class_hid = BNXT_ULP_CLASS_HID_58e6c, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 5906434816UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [829] = { + .class_hid = BNXT_ULP_CLASS_HID_4126c, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 6442517248UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [830] = { + .class_hid = BNXT_ULP_CLASS_HID_4028e, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 6442519296UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [831] = { + .class_hid = BNXT_ULP_CLASS_HID_50d5e, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 6442779392UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [832] = { + .class_hid = BNXT_ULP_CLASS_HID_51d1e, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 6442781440UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [833] = { + .class_hid = BNXT_ULP_CLASS_HID_49a2c, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 6443041536UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [834] = { + .class_hid = BNXT_ULP_CLASS_HID_4954e, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 6443043584UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [835] = { + .class_hid = BNXT_ULP_CLASS_HID_5951e, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 6443303680UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [836] = { + .class_hid = BNXT_ULP_CLASS_HID_5858c, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 6443305728UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [837] = { + .class_hid = BNXT_ULP_CLASS_HID_409fe, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 6979388160UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [838] = { + .class_hid = BNXT_ULP_CLASS_HID_419ee, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 6979390208UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [839] = { + .class_hid = BNXT_ULP_CLASS_HID_519ae, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 6979650304UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [840] = { + .class_hid = BNXT_ULP_CLASS_HID_508fc, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 6979652352UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [841] = { + .class_hid = BNXT_ULP_CLASS_HID_491ee, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 6979912448UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [842] = { + .class_hid = BNXT_ULP_CLASS_HID_4802c, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 6979914496UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [843] = { + .class_hid = BNXT_ULP_CLASS_HID_580fc, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 6980174592UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [844] = { + .class_hid = BNXT_ULP_CLASS_HID_590bc, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 6980176640UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [845] = { + .class_hid = BNXT_ULP_CLASS_HID_4074c, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 7516259072UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [846] = { + .class_hid = BNXT_ULP_CLASS_HID_4170c, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 7516261120UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [847] = { + .class_hid = BNXT_ULP_CLASS_HID_5172c, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 7516521216UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [848] = { + .class_hid = BNXT_ULP_CLASS_HID_5064e, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 7516523264UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [849] = { + .class_hid = BNXT_ULP_CLASS_HID_48f0c, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 7516783360UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [850] = { + .class_hid = BNXT_ULP_CLASS_HID_49fcc, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 7516785408UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [851] = { + .class_hid = BNXT_ULP_CLASS_HID_59fec, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 7517045504UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [852] = { + .class_hid = BNXT_ULP_CLASS_HID_58e0e, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 7517047552UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [853] = { + .class_hid = BNXT_ULP_CLASS_HID_413ac, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 8053129984UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [854] = { + .class_hid = BNXT_ULP_CLASS_HID_402ee, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 8053132032UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [855] = { + .class_hid = BNXT_ULP_CLASS_HID_502ae, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 8053392128UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [856] = { + .class_hid = BNXT_ULP_CLASS_HID_512ae, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 8053394176UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [857] = { + .class_hid = BNXT_ULP_CLASS_HID_49a6c, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 8053654272UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [858] = { + .class_hid = BNXT_ULP_CLASS_HID_48aae, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 8053656320UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [859] = { + .class_hid = BNXT_ULP_CLASS_HID_58aae, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 8053916416UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [860] = { + .class_hid = BNXT_ULP_CLASS_HID_585ec, + .class_tid = 2, + .hdr_sig_id = 8, + .flow_sig_id = 8053918464UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT } + }, + [861] = { + .class_hid = BNXT_ULP_CLASS_HID_104ae, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 265216UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI } + }, + [862] = { + .class_hid = BNXT_ULP_CLASS_HID_1108e, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 273408UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI } + }, + [863] = { + .class_hid = BNXT_ULP_CLASS_HID_140b2, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 1313792UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC } + }, + [864] = { + .class_hid = BNXT_ULP_CLASS_HID_15c92, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 1321984UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC } + }, + [865] = { + .class_hid = BNXT_ULP_CLASS_HID_126a0, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 2362368UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC } + }, + [866] = { + .class_hid = BNXT_ULP_CLASS_HID_13280, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 2370560UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC } + }, + [867] = { + .class_hid = BNXT_ULP_CLASS_HID_16d44, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 3410944UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC } + }, + [868] = { + .class_hid = BNXT_ULP_CLASS_HID_17ea4, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 3419136UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC } + }, + [869] = { + .class_hid = BNXT_ULP_CLASS_HID_113a4, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 2147748864UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR } + }, + [870] = { + .class_hid = BNXT_ULP_CLASS_HID_10e66, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 2147757056UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR } + }, + [871] = { + .class_hid = BNXT_ULP_CLASS_HID_15e40, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 2148797440UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR } + }, + [872] = { + .class_hid = BNXT_ULP_CLASS_HID_14a02, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 2148805632UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR } + }, + [873] = { + .class_hid = BNXT_ULP_CLASS_HID_13db6, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 2149846016UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR } + }, + [874] = { + .class_hid = BNXT_ULP_CLASS_HID_12870, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 2149854208UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR } + }, + [875] = { + .class_hid = BNXT_ULP_CLASS_HID_17852, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 2150894592UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR } + }, + [876] = { + .class_hid = BNXT_ULP_CLASS_HID_17414, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 2150902784UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR } + }, + [877] = { + .class_hid = BNXT_ULP_CLASS_HID_11978, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 4295232512UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR } + }, + [878] = { + .class_hid = BNXT_ULP_CLASS_HID_1153a, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 4295240704UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR } + }, + [879] = { + .class_hid = BNXT_ULP_CLASS_HID_145fa, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 4296281088UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR } + }, + [880] = { + .class_hid = BNXT_ULP_CLASS_HID_151da, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 4296289280UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR } + }, + [881] = { + .class_hid = BNXT_ULP_CLASS_HID_13b0a, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 4297329664UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR } + }, + [882] = { + .class_hid = BNXT_ULP_CLASS_HID_137c8, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 4297337856UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR } + }, + [883] = { + .class_hid = BNXT_ULP_CLASS_HID_167f0, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 4298378240UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR } + }, + [884] = { + .class_hid = BNXT_ULP_CLASS_HID_173d0, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 4298386432UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR } + }, + [885] = { + .class_hid = BNXT_ULP_CLASS_HID_114d0, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 6442716160UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR } + }, + [886] = { + .class_hid = BNXT_ULP_CLASS_HID_10092, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 6442724352UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR } + }, + [887] = { + .class_hid = BNXT_ULP_CLASS_HID_150f0, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 6443764736UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR } + }, + [888] = { + .class_hid = BNXT_ULP_CLASS_HID_14cb2, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 6443772928UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR } + }, + [889] = { + .class_hid = BNXT_ULP_CLASS_HID_136e2, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 6444813312UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR } + }, + [890] = { + .class_hid = BNXT_ULP_CLASS_HID_122a0, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 6444821504UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR } + }, + [891] = { + .class_hid = BNXT_ULP_CLASS_HID_17282, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 6445861888UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR } + }, + [892] = { + .class_hid = BNXT_ULP_CLASS_HID_16940, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 6445870080UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR } + }, + [893] = { + .class_hid = BNXT_ULP_CLASS_HID_11b90, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 8590199808UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [894] = { + .class_hid = BNXT_ULP_CLASS_HID_11654, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 8590208000UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [895] = { + .class_hid = BNXT_ULP_CLASS_HID_14618, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 8591248384UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [896] = { + .class_hid = BNXT_ULP_CLASS_HID_15278, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 8591256576UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [897] = { + .class_hid = BNXT_ULP_CLASS_HID_12404, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 8592296960UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [898] = { + .class_hid = BNXT_ULP_CLASS_HID_13064, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 8592305152UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [899] = { + .class_hid = BNXT_ULP_CLASS_HID_16028, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 8593345536UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [900] = { + .class_hid = BNXT_ULP_CLASS_HID_17c08, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 8593353728UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [901] = { + .class_hid = BNXT_ULP_CLASS_HID_11100, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 10737683456UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [902] = { + .class_hid = BNXT_ULP_CLASS_HID_10dc4, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 10737691648UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [903] = { + .class_hid = BNXT_ULP_CLASS_HID_15d24, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 10738732032UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [904] = { + .class_hid = BNXT_ULP_CLASS_HID_149d0, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 10738740224UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [905] = { + .class_hid = BNXT_ULP_CLASS_HID_13314, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 10739780608UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [906] = { + .class_hid = BNXT_ULP_CLASS_HID_12fd4, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 10739788800UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [907] = { + .class_hid = BNXT_ULP_CLASS_HID_17f20, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 10740829184UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [908] = { + .class_hid = BNXT_ULP_CLASS_HID_16be0, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 10740837376UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [909] = { + .class_hid = BNXT_ULP_CLASS_HID_11cd8, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 12885167104UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [910] = { + .class_hid = BNXT_ULP_CLASS_HID_10880, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 12885175296UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [911] = { + .class_hid = BNXT_ULP_CLASS_HID_158e0, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 12886215680UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [912] = { + .class_hid = BNXT_ULP_CLASS_HID_154a0, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 12886223872UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [913] = { + .class_hid = BNXT_ULP_CLASS_HID_13ed0, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 12887264256UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [914] = { + .class_hid = BNXT_ULP_CLASS_HID_12a90, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 12887272448UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [915] = { + .class_hid = BNXT_ULP_CLASS_HID_16550, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 12888312832UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [916] = { + .class_hid = BNXT_ULP_CLASS_HID_176b0, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 12888321024UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [917] = { + .class_hid = BNXT_ULP_CLASS_HID_10bb0, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 15032650752UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [918] = { + .class_hid = BNXT_ULP_CLASS_HID_10670, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 15032658944UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [919] = { + .class_hid = BNXT_ULP_CLASS_HID_15650, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 15033699328UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [920] = { + .class_hid = BNXT_ULP_CLASS_HID_14210, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 15033707520UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [921] = { + .class_hid = BNXT_ULP_CLASS_HID_13440, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 15034747904UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [922] = { + .class_hid = BNXT_ULP_CLASS_HID_12000, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 15034756096UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [923] = { + .class_hid = BNXT_ULP_CLASS_HID_17060, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 15035796480UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [924] = { + .class_hid = BNXT_ULP_CLASS_HID_16c20, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 15035804672UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT } + }, + [925] = { + .class_hid = BNXT_ULP_CLASS_HID_11511, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 17180134400UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [926] = { + .class_hid = BNXT_ULP_CLASS_HID_101d3, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 17180142592UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [927] = { + .class_hid = BNXT_ULP_CLASS_HID_15135, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 17181182976UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [928] = { + .class_hid = BNXT_ULP_CLASS_HID_14df7, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 17181191168UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [929] = { + .class_hid = BNXT_ULP_CLASS_HID_13723, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 17182231552UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [930] = { + .class_hid = BNXT_ULP_CLASS_HID_123e5, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 17182239744UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [931] = { + .class_hid = BNXT_ULP_CLASS_HID_173c7, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 17183280128UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [932] = { + .class_hid = BNXT_ULP_CLASS_HID_16f89, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 17183288320UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [933] = { + .class_hid = BNXT_ULP_CLASS_HID_10081, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 19327618048UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [934] = { + .class_hid = BNXT_ULP_CLASS_HID_11ce1, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 19327626240UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [935] = { + .class_hid = BNXT_ULP_CLASS_HID_14ca5, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 19328666624UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [936] = { + .class_hid = BNXT_ULP_CLASS_HID_15885, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 19328674816UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [937] = { + .class_hid = BNXT_ULP_CLASS_HID_12293, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 19329715200UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [938] = { + .class_hid = BNXT_ULP_CLASS_HID_13ef3, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 19329723392UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [939] = { + .class_hid = BNXT_ULP_CLASS_HID_16eb7, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 19330763776UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [940] = { + .class_hid = BNXT_ULP_CLASS_HID_16561, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 19330771968UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [941] = { + .class_hid = BNXT_ULP_CLASS_HID_10e59, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 21475101696UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [942] = { + .class_hid = BNXT_ULP_CLASS_HID_11bb9, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 21475109888UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [943] = { + .class_hid = BNXT_ULP_CLASS_HID_14a61, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 21476150272UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [944] = { + .class_hid = BNXT_ULP_CLASS_HID_14623, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 21476158464UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [945] = { + .class_hid = BNXT_ULP_CLASS_HID_1286b, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 21477198848UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [946] = { + .class_hid = BNXT_ULP_CLASS_HID_12411, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 21477207040UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [947] = { + .class_hid = BNXT_ULP_CLASS_HID_17473, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 21478247424UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [948] = { + .class_hid = BNXT_ULP_CLASS_HID_16031, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 21478255616UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [949] = { + .class_hid = BNXT_ULP_CLASS_HID_10531, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 23622585344UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [950] = { + .class_hid = BNXT_ULP_CLASS_HID_11111, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 23622593536UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [951] = { + .class_hid = BNXT_ULP_CLASS_HID_141d1, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 23623633920UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [952] = { + .class_hid = BNXT_ULP_CLASS_HID_15d31, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 23623642112UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [953] = { + .class_hid = BNXT_ULP_CLASS_HID_127c3, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 23624682496UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [954] = { + .class_hid = BNXT_ULP_CLASS_HID_13323, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 23624690688UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [955] = { + .class_hid = BNXT_ULP_CLASS_HID_163e3, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 23625731072UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [956] = { + .class_hid = BNXT_ULP_CLASS_HID_17fc3, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 23625739264UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [957] = { + .class_hid = BNXT_ULP_CLASS_HID_108f5, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 25770068992UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [958] = { + .class_hid = BNXT_ULP_CLASS_HID_104b9, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 25770077184UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [959] = { + .class_hid = BNXT_ULP_CLASS_HID_15499, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 25771117568UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [960] = { + .class_hid = BNXT_ULP_CLASS_HID_1435d, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 25771125760UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [961] = { + .class_hid = BNXT_ULP_CLASS_HID_12a89, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 25772166144UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [962] = { + .class_hid = BNXT_ULP_CLASS_HID_12149, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 25772174336UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [963] = { + .class_hid = BNXT_ULP_CLASS_HID_176ad, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 25773214720UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [964] = { + .class_hid = BNXT_ULP_CLASS_HID_16d6d, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 25773222912UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [965] = { + .class_hid = BNXT_ULP_CLASS_HID_10665, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 27917552640UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [966] = { + .class_hid = BNXT_ULP_CLASS_HID_11245, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 27917560832UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [967] = { + .class_hid = BNXT_ULP_CLASS_HID_14271, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 27918601216UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [968] = { + .class_hid = BNXT_ULP_CLASS_HID_15e51, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 27918609408UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [969] = { + .class_hid = BNXT_ULP_CLASS_HID_12061, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 27919649792UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [970] = { + .class_hid = BNXT_ULP_CLASS_HID_13c41, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 27919657984UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [971] = { + .class_hid = BNXT_ULP_CLASS_HID_16c05, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 27920698368UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [972] = { + .class_hid = BNXT_ULP_CLASS_HID_17865, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 27920706560UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [973] = { + .class_hid = BNXT_ULP_CLASS_HID_10d21, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 30065036288UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [974] = { + .class_hid = BNXT_ULP_CLASS_HID_11901, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 30065044480UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [975] = { + .class_hid = BNXT_ULP_CLASS_HID_149c1, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 30066084864UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [976] = { + .class_hid = BNXT_ULP_CLASS_HID_14589, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 30066093056UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [977] = { + .class_hid = BNXT_ULP_CLASS_HID_12f31, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 30067133440UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [978] = { + .class_hid = BNXT_ULP_CLASS_HID_13b11, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 30067141632UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [979] = { + .class_hid = BNXT_ULP_CLASS_HID_16bd9, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 30068182016UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [980] = { + .class_hid = BNXT_ULP_CLASS_HID_16799, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 30068190208UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [981] = { + .class_hid = BNXT_ULP_CLASS_HID_11831, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 32212519936UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [982] = { + .class_hid = BNXT_ULP_CLASS_HID_114f1, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 32212528128UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [983] = { + .class_hid = BNXT_ULP_CLASS_HID_144b1, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 32213568512UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [984] = { + .class_hid = BNXT_ULP_CLASS_HID_15091, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 32213576704UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [985] = { + .class_hid = BNXT_ULP_CLASS_HID_13ac1, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 32214617088UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [986] = { + .class_hid = BNXT_ULP_CLASS_HID_13681, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 32214625280UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [987] = { + .class_hid = BNXT_ULP_CLASS_HID_166b1, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 32215665664UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [988] = { + .class_hid = BNXT_ULP_CLASS_HID_17291, + .class_tid = 2, + .hdr_sig_id = 9, + .flow_sig_id = 32215673856UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT | + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT } + }, + [989] = { + .class_hid = BNXT_ULP_CLASS_HID_4007d, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 66304UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI } + }, + [990] = { + .class_hid = BNXT_ULP_CLASS_HID_41041, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 68352UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI } + }, + [991] = { + .class_hid = BNXT_ULP_CLASS_HID_5100d, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 328448UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC } + }, + [992] = { + .class_hid = BNXT_ULP_CLASS_HID_50f77, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 330496UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC } + }, + [993] = { + .class_hid = BNXT_ULP_CLASS_HID_48845, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 590592UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC } + }, + [994] = { + .class_hid = BNXT_ULP_CLASS_HID_487af, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 592640UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC } + }, + [995] = { + .class_hid = BNXT_ULP_CLASS_HID_5877b, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 852736UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC } + }, + [996] = { + .class_hid = BNXT_ULP_CLASS_HID_5973f, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 854784UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC } + }, + [997] = { + .class_hid = BNXT_ULP_CLASS_HID_41c31, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 134284032UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR } + }, + [998] = { + .class_hid = BNXT_ULP_CLASS_HID_40b1b, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 134286080UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR } + }, + [999] = { + .class_hid = BNXT_ULP_CLASS_HID_50b67, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 134546176UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR } + }, + [1000] = { + .class_hid = BNXT_ULP_CLASS_HID_51b2b, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 134548224UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR } + }, + [1001] = { + .class_hid = BNXT_ULP_CLASS_HID_4831f, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 134808320UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR } + }, + [1002] = { + .class_hid = BNXT_ULP_CLASS_HID_49363, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 134810368UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR } + }, + [1003] = { + .class_hid = BNXT_ULP_CLASS_HID_5932f, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 135070464UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR } + }, + [1004] = { + .class_hid = BNXT_ULP_CLASS_HID_58211, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 135072512UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR } + }, + [1005] = { + .class_hid = BNXT_ULP_CLASS_HID_4161b, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 268501760UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR } + }, + [1006] = { + .class_hid = BNXT_ULP_CLASS_HID_405bd, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 268503808UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR } + }, + [1007] = { + .class_hid = BNXT_ULP_CLASS_HID_50589, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 268763904UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR } + }, + [1008] = { + .class_hid = BNXT_ULP_CLASS_HID_5150d, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 268765952UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR } + }, + [1009] = { + .class_hid = BNXT_ULP_CLASS_HID_49e23, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 269026048UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR } + }, + [1010] = { + .class_hid = BNXT_ULP_CLASS_HID_48d85, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 269028096UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR } + }, + [1011] = { + .class_hid = BNXT_ULP_CLASS_HID_58d11, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 269288192UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR } + }, + [1012] = { + .class_hid = BNXT_ULP_CLASS_HID_59d15, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 269290240UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR } + }, + [1013] = { + .class_hid = BNXT_ULP_CLASS_HID_4012d, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 402719488UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR } + }, + [1014] = { + .class_hid = BNXT_ULP_CLASS_HID_41131, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 402721536UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR } }, - [416] = { - .class_hid = BNXT_ULP_CLASS_HID_2509e, + [1015] = { + .class_hid = BNXT_ULP_CLASS_HID_5113d, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 2370560UL, + .hdr_sig_id = 10, + .flow_sig_id = 402981632UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR } }, - [417] = { - .class_hid = BNXT_ULP_CLASS_HID_2c45e, + [1016] = { + .class_hid = BNXT_ULP_CLASS_HID_50027, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 3410944UL, + .hdr_sig_id = 10, + .flow_sig_id = 402983680UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR } }, - [418] = { - .class_hid = BNXT_ULP_CLASS_HID_2f5d6, + [1017] = { + .class_hid = BNXT_ULP_CLASS_HID_48935, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 3419136UL, + .hdr_sig_id = 10, + .flow_sig_id = 403243776UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR } }, - [419] = { - .class_hid = BNXT_ULP_CLASS_HID_23722, + [1018] = { + .class_hid = BNXT_ULP_CLASS_HID_49939, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 537136128UL, + .hdr_sig_id = 10, + .flow_sig_id = 403245824UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR } }, - [420] = { - .class_hid = BNXT_ULP_CLASS_HID_209ae, + [1019] = { + .class_hid = BNXT_ULP_CLASS_HID_59905, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 537144320UL, + .hdr_sig_id = 10, + .flow_sig_id = 403505920UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR } }, - [421] = { - .class_hid = BNXT_ULP_CLASS_HID_2d4ba, + [1020] = { + .class_hid = BNXT_ULP_CLASS_HID_5882f, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 538184704UL, + .hdr_sig_id = 10, + .flow_sig_id = 403507968UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR } + }, + [1021] = { + .class_hid = BNXT_ULP_CLASS_HID_41b99, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 536937216UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } + }, + [1022] = { + .class_hid = BNXT_ULP_CLASS_HID_40b03, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 536939264UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } + }, + [1023] = { + .class_hid = BNXT_ULP_CLASS_HID_50acf, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 537199360UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } + }, + [1024] = { + .class_hid = BNXT_ULP_CLASS_HID_51a93, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 537201408UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } + }, + [1025] = { + .class_hid = BNXT_ULP_CLASS_HID_48307, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 537461504UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } + }, + [1026] = { + .class_hid = BNXT_ULP_CLASS_HID_492cb, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 537463552UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } + }, + [1027] = { + .class_hid = BNXT_ULP_CLASS_HID_59297, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 537723648UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } + }, + [1028] = { + .class_hid = BNXT_ULP_CLASS_HID_581d9, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 537725696UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } + }, + [1029] = { + .class_hid = BNXT_ULP_CLASS_HID_41653, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 671154944UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } + }, + [1030] = { + .class_hid = BNXT_ULP_CLASS_HID_40655, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 671156992UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } + }, + [1031] = { + .class_hid = BNXT_ULP_CLASS_HID_50601, + .class_tid = 2, + .hdr_sig_id = 10, + .flow_sig_id = 671417088UL, + .flow_pattern_id = 1, + .app_sig = 0, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } }, - [422] = { - .class_hid = BNXT_ULP_CLASS_HID_2aea6, + [1032] = { + .class_hid = BNXT_ULP_CLASS_HID_51545, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 538192896UL, + .hdr_sig_id = 10, + .flow_sig_id = 671419136UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } }, - [423] = { - .class_hid = BNXT_ULP_CLASS_HID_24606, + [1033] = { + .class_hid = BNXT_ULP_CLASS_HID_49e1b, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 539233280UL, + .hdr_sig_id = 10, + .flow_sig_id = 671679232UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } }, - [424] = { - .class_hid = BNXT_ULP_CLASS_HID_25802, + [1034] = { + .class_hid = BNXT_ULP_CLASS_HID_48e1d, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 539241472UL, + .hdr_sig_id = 10, + .flow_sig_id = 671681280UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } }, - [425] = { - .class_hid = BNXT_ULP_CLASS_HID_2cc02, + [1035] = { + .class_hid = BNXT_ULP_CLASS_HID_58d49, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 540281856UL, + .hdr_sig_id = 10, + .flow_sig_id = 671941376UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } }, - [426] = { - .class_hid = BNXT_ULP_CLASS_HID_2fd9a, + [1036] = { + .class_hid = BNXT_ULP_CLASS_HID_59d0d, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 540290048UL, + .hdr_sig_id = 10, + .flow_sig_id = 671943424UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } }, - [427] = { - .class_hid = BNXT_ULP_CLASS_HID_207c2, + [1037] = { + .class_hid = BNXT_ULP_CLASS_HID_40115, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 1074007040UL, + .hdr_sig_id = 10, + .flow_sig_id = 805372672UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } }, - [428] = { - .class_hid = BNXT_ULP_CLASS_HID_2315a, + [1038] = { + .class_hid = BNXT_ULP_CLASS_HID_41099, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 1074015232UL, + .hdr_sig_id = 10, + .flow_sig_id = 805374720UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } }, - [429] = { - .class_hid = BNXT_ULP_CLASS_HID_2a51a, + [1039] = { + .class_hid = BNXT_ULP_CLASS_HID_51085, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 1075055616UL, + .hdr_sig_id = 10, + .flow_sig_id = 805634816UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } }, - [430] = { - .class_hid = BNXT_ULP_CLASS_HID_2d692, + [1040] = { + .class_hid = BNXT_ULP_CLASS_HID_5000f, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 1075063808UL, + .hdr_sig_id = 10, + .flow_sig_id = 805636864UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } }, - [431] = { - .class_hid = BNXT_ULP_CLASS_HID_25686, + [1041] = { + .class_hid = BNXT_ULP_CLASS_HID_4889d, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 1076104192UL, + .hdr_sig_id = 10, + .flow_sig_id = 805896960UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } }, - [432] = { - .class_hid = BNXT_ULP_CLASS_HID_2401e, + [1042] = { + .class_hid = BNXT_ULP_CLASS_HID_49881, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 1076112384UL, + .hdr_sig_id = 10, + .flow_sig_id = 805899008UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } }, - [433] = { - .class_hid = BNXT_ULP_CLASS_HID_2cbde, + [1043] = { + .class_hid = BNXT_ULP_CLASS_HID_5980d, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 1077152768UL, + .hdr_sig_id = 10, + .flow_sig_id = 806159104UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } }, - [434] = { - .class_hid = BNXT_ULP_CLASS_HID_2ce1a, + [1044] = { + .class_hid = BNXT_ULP_CLASS_HID_59797, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 1077160960UL, + .hdr_sig_id = 10, + .flow_sig_id = 806161152UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } }, - [435] = { - .class_hid = BNXT_ULP_CLASS_HID_20f96, + [1045] = { + .class_hid = BNXT_ULP_CLASS_HID_41c09, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 1610877952UL, + .hdr_sig_id = 10, + .flow_sig_id = 939590400UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } }, - [436] = { - .class_hid = BNXT_ULP_CLASS_HID_2390e, + [1046] = { + .class_hid = BNXT_ULP_CLASS_HID_40c13, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 1610886144UL, + .hdr_sig_id = 10, + .flow_sig_id = 939592448UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } }, - [437] = { - .class_hid = BNXT_ULP_CLASS_HID_2ac8e, + [1047] = { + .class_hid = BNXT_ULP_CLASS_HID_50b1f, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 1611926528UL, + .hdr_sig_id = 10, + .flow_sig_id = 939852544UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } }, - [438] = { - .class_hid = BNXT_ULP_CLASS_HID_2de06, + [1048] = { + .class_hid = BNXT_ULP_CLASS_HID_51b03, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 1611934720UL, + .hdr_sig_id = 10, + .flow_sig_id = 939854592UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } }, - [439] = { - .class_hid = BNXT_ULP_CLASS_HID_25e0a, + [1049] = { + .class_hid = BNXT_ULP_CLASS_HID_48417, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 1612975104UL, + .hdr_sig_id = 10, + .flow_sig_id = 940114688UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } }, - [440] = { - .class_hid = BNXT_ULP_CLASS_HID_24f82, + [1050] = { + .class_hid = BNXT_ULP_CLASS_HID_4931b, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 1612983296UL, + .hdr_sig_id = 10, + .flow_sig_id = 940116736UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } }, - [441] = { - .class_hid = BNXT_ULP_CLASS_HID_2f382, + [1051] = { + .class_hid = BNXT_ULP_CLASS_HID_59307, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 1614023680UL, + .hdr_sig_id = 10, + .flow_sig_id = 940376832UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } }, - [442] = { - .class_hid = BNXT_ULP_CLASS_HID_2ed1a, + [1052] = { + .class_hid = BNXT_ULP_CLASS_HID_58309, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 1614031872UL, + .hdr_sig_id = 10, + .flow_sig_id = 940378880UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT } }, - [443] = { - .class_hid = BNXT_ULP_CLASS_HID_2576e, + [1053] = { + .class_hid = BNXT_ULP_CLASS_HID_4160f, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 2147748864UL, + .hdr_sig_id = 10, + .flow_sig_id = 1073808128UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [444] = { - .class_hid = BNXT_ULP_CLASS_HID_229aa, + [1054] = { + .class_hid = BNXT_ULP_CLASS_HID_40561, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 2147757056UL, + .hdr_sig_id = 10, + .flow_sig_id = 1073810176UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [445] = { - .class_hid = BNXT_ULP_CLASS_HID_29d6a, + [1055] = { + .class_hid = BNXT_ULP_CLASS_HID_5052d, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 2148797440UL, + .hdr_sig_id = 10, + .flow_sig_id = 1074070272UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [446] = { - .class_hid = BNXT_ULP_CLASS_HID_2cee2, + [1056] = { + .class_hid = BNXT_ULP_CLASS_HID_51501, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 2148805632UL, + .hdr_sig_id = 10, + .flow_sig_id = 1074072320UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [447] = { - .class_hid = BNXT_ULP_CLASS_HID_24ec6, + [1057] = { + .class_hid = BNXT_ULP_CLASS_HID_49dc7, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 2149846016UL, + .hdr_sig_id = 10, + .flow_sig_id = 1074332416UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [448] = { - .class_hid = BNXT_ULP_CLASS_HID_2784e, + [1058] = { + .class_hid = BNXT_ULP_CLASS_HID_48d29, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 2149854208UL, + .hdr_sig_id = 10, + .flow_sig_id = 1074334464UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [449] = { - .class_hid = BNXT_ULP_CLASS_HID_2ec0e, + [1059] = { + .class_hid = BNXT_ULP_CLASS_HID_58d05, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 2150894592UL, + .hdr_sig_id = 10, + .flow_sig_id = 1074594560UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [450] = { - .class_hid = BNXT_ULP_CLASS_HID_2dd86, + [1060] = { + .class_hid = BNXT_ULP_CLASS_HID_59cc9, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 2150902784UL, + .hdr_sig_id = 10, + .flow_sig_id = 1074596608UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [451] = { - .class_hid = BNXT_ULP_CLASS_HID_25f22, + [1061] = { + .class_hid = BNXT_ULP_CLASS_HID_40161, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 2684619776UL, + .hdr_sig_id = 10, + .flow_sig_id = 1208025856UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [452] = { - .class_hid = BNXT_ULP_CLASS_HID_2112e, + [1062] = { + .class_hid = BNXT_ULP_CLASS_HID_41125, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 2684627968UL, + .hdr_sig_id = 10, + .flow_sig_id = 1208027904UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [453] = { - .class_hid = BNXT_ULP_CLASS_HID_2852e, + [1063] = { + .class_hid = BNXT_ULP_CLASS_HID_51061, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 2685668352UL, + .hdr_sig_id = 10, + .flow_sig_id = 1208288000UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [454] = { - .class_hid = BNXT_ULP_CLASS_HID_2b6a6, + [1064] = { + .class_hid = BNXT_ULP_CLASS_HID_5004b, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 2685676544UL, + .hdr_sig_id = 10, + .flow_sig_id = 1208290048UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [455] = { - .class_hid = BNXT_ULP_CLASS_HID_26d86, + [1065] = { + .class_hid = BNXT_ULP_CLASS_HID_48929, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 2686716928UL, + .hdr_sig_id = 10, + .flow_sig_id = 1208550144UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [456] = { - .class_hid = BNXT_ULP_CLASS_HID_26002, + [1066] = { + .class_hid = BNXT_ULP_CLASS_HID_4986d, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 2686725120UL, + .hdr_sig_id = 10, + .flow_sig_id = 1208552192UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [457] = { - .class_hid = BNXT_ULP_CLASS_HID_2eb82, + [1067] = { + .class_hid = BNXT_ULP_CLASS_HID_59829, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 2687765504UL, + .hdr_sig_id = 10, + .flow_sig_id = 1208812288UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [458] = { - .class_hid = BNXT_ULP_CLASS_HID_2c50a, + [1068] = { + .class_hid = BNXT_ULP_CLASS_HID_58823, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 2687773696UL, + .hdr_sig_id = 10, + .flow_sig_id = 1208814336UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [459] = { - .class_hid = BNXT_ULP_CLASS_HID_22f82, + [1069] = { + .class_hid = BNXT_ULP_CLASS_HID_41ba5, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 3221490688UL, + .hdr_sig_id = 10, + .flow_sig_id = 1342243584UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [460] = { - .class_hid = BNXT_ULP_CLASS_HID_2590a, + [1070] = { + .class_hid = BNXT_ULP_CLASS_HID_40b0f, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 3221498880UL, + .hdr_sig_id = 10, + .flow_sig_id = 1342245632UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [461] = { - .class_hid = BNXT_ULP_CLASS_HID_2ccca, + [1071] = { + .class_hid = BNXT_ULP_CLASS_HID_50b0b, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 3222539264UL, + .hdr_sig_id = 10, + .flow_sig_id = 1342505728UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [462] = { - .class_hid = BNXT_ULP_CLASS_HID_28706, + [1072] = { + .class_hid = BNXT_ULP_CLASS_HID_51a8f, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 3222547456UL, + .hdr_sig_id = 10, + .flow_sig_id = 1342507776UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [463] = { - .class_hid = BNXT_ULP_CLASS_HID_27e46, + [1073] = { + .class_hid = BNXT_ULP_CLASS_HID_48303, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 3223587840UL, + .hdr_sig_id = 10, + .flow_sig_id = 1342767872UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [464] = { - .class_hid = BNXT_ULP_CLASS_HID_26fce, + [1074] = { + .class_hid = BNXT_ULP_CLASS_HID_49307, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 3223596032UL, + .hdr_sig_id = 10, + .flow_sig_id = 1342769920UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [465] = { - .class_hid = BNXT_ULP_CLASS_HID_2d38e, + [1075] = { + .class_hid = BNXT_ULP_CLASS_HID_592a3, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 3224636416UL, + .hdr_sig_id = 10, + .flow_sig_id = 1343030016UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [466] = { - .class_hid = BNXT_ULP_CLASS_HID_2d5ca, + [1076] = { + .class_hid = BNXT_ULP_CLASS_HID_58205, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 3224644608UL, + .hdr_sig_id = 10, + .flow_sig_id = 1343032064UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [467] = { - .class_hid = BNXT_ULP_CLASS_HID_21706, + [1077] = { + .class_hid = BNXT_ULP_CLASS_HID_4172f, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 3758361600UL, + .hdr_sig_id = 10, + .flow_sig_id = 1476461312UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [468] = { - .class_hid = BNXT_ULP_CLASS_HID_2408e, + [1078] = { + .class_hid = BNXT_ULP_CLASS_HID_40621, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 3758369792UL, + .hdr_sig_id = 10, + .flow_sig_id = 1476463360UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [469] = { - .class_hid = BNXT_ULP_CLASS_HID_2b48e, + [1079] = { + .class_hid = BNXT_ULP_CLASS_HID_5062d, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 3759410176UL, + .hdr_sig_id = 10, + .flow_sig_id = 1476723456UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [470] = { - .class_hid = BNXT_ULP_CLASS_HID_28e8a, + [1080] = { + .class_hid = BNXT_ULP_CLASS_HID_51621, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 3759418368UL, + .hdr_sig_id = 10, + .flow_sig_id = 1476725504UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [471] = { - .class_hid = BNXT_ULP_CLASS_HID_2660a, + [1081] = { + .class_hid = BNXT_ULP_CLASS_HID_49f07, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 3760458752UL, + .hdr_sig_id = 10, + .flow_sig_id = 1476985600UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [472] = { - .class_hid = BNXT_ULP_CLASS_HID_25782, + [1082] = { + .class_hid = BNXT_ULP_CLASS_HID_48e29, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 3760466944UL, + .hdr_sig_id = 10, + .flow_sig_id = 1476987648UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [473] = { - .class_hid = BNXT_ULP_CLASS_HID_2db02, + [1083] = { + .class_hid = BNXT_ULP_CLASS_HID_58e25, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 3761507328UL, + .hdr_sig_id = 10, + .flow_sig_id = 1477247744UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [474] = { - .class_hid = BNXT_ULP_CLASS_HID_2dd8e, + [1084] = { + .class_hid = BNXT_ULP_CLASS_HID_59d29, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 3761515520UL, + .hdr_sig_id = 10, + .flow_sig_id = 1477249792UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [475] = { - .class_hid = BNXT_ULP_CLASS_HID_25b9e, + [1085] = { + .class_hid = BNXT_ULP_CLASS_HID_400c9, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 4295232512UL, + .hdr_sig_id = 10, + .flow_sig_id = 1610679040UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [476] = { - .class_hid = BNXT_ULP_CLASS_HID_21dda, + [1086] = { + .class_hid = BNXT_ULP_CLASS_HID_4108d, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 4295240704UL, + .hdr_sig_id = 10, + .flow_sig_id = 1610681088UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [477] = { - .class_hid = BNXT_ULP_CLASS_HID_2819a, + [1087] = { + .class_hid = BNXT_ULP_CLASS_HID_51049, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 4296281088UL, + .hdr_sig_id = 10, + .flow_sig_id = 1610941184UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [478] = { - .class_hid = BNXT_ULP_CLASS_HID_2b31a, + [1088] = { + .class_hid = BNXT_ULP_CLASS_HID_50fc3, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 4296289280UL, + .hdr_sig_id = 10, + .flow_sig_id = 1610943232UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [479] = { - .class_hid = BNXT_ULP_CLASS_HID_26a3a, + [1089] = { + .class_hid = BNXT_ULP_CLASS_HID_48881, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 4297329664UL, + .hdr_sig_id = 10, + .flow_sig_id = 1611203328UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [480] = { - .class_hid = BNXT_ULP_CLASS_HID_26c7e, + [1090] = { + .class_hid = BNXT_ULP_CLASS_HID_487cb, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 4297337856UL, + .hdr_sig_id = 10, + .flow_sig_id = 1611205376UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [481] = { - .class_hid = BNXT_ULP_CLASS_HID_2d03e, + [1091] = { + .class_hid = BNXT_ULP_CLASS_HID_587c7, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 4298378240UL, + .hdr_sig_id = 10, + .flow_sig_id = 1611465472UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [482] = { - .class_hid = BNXT_ULP_CLASS_HID_2c1be, + [1092] = { + .class_hid = BNXT_ULP_CLASS_HID_5978b, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 4298386432UL, + .hdr_sig_id = 10, + .flow_sig_id = 1611467520UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [483] = { - .class_hid = BNXT_ULP_CLASS_HID_2430a, + [1093] = { + .class_hid = BNXT_ULP_CLASS_HID_41c4d, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 4832103424UL, + .hdr_sig_id = 10, + .flow_sig_id = 1744896768UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [484] = { - .class_hid = BNXT_ULP_CLASS_HID_2058e, + [1094] = { + .class_hid = BNXT_ULP_CLASS_HID_40b47, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 4832111616UL, + .hdr_sig_id = 10, + .flow_sig_id = 1744898816UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [485] = { - .class_hid = BNXT_ULP_CLASS_HID_2890e, + [1095] = { + .class_hid = BNXT_ULP_CLASS_HID_50b03, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 4833152000UL, + .hdr_sig_id = 10, + .flow_sig_id = 1745158912UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [486] = { - .class_hid = BNXT_ULP_CLASS_HID_2ba8e, + [1096] = { + .class_hid = BNXT_ULP_CLASS_HID_51b47, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 4833160192UL, + .hdr_sig_id = 10, + .flow_sig_id = 1745160960UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [487] = { - .class_hid = BNXT_ULP_CLASS_HID_251ae, + [1097] = { + .class_hid = BNXT_ULP_CLASS_HID_4834b, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 4834200576UL, + .hdr_sig_id = 10, + .flow_sig_id = 1745421056UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [488] = { - .class_hid = BNXT_ULP_CLASS_HID_2542a, + [1098] = { + .class_hid = BNXT_ULP_CLASS_HID_4930f, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 4834208768UL, + .hdr_sig_id = 10, + .flow_sig_id = 1745423104UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [489] = { - .class_hid = BNXT_ULP_CLASS_HID_2dfaa, + [1099] = { + .class_hid = BNXT_ULP_CLASS_HID_5934b, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 4835249152UL, + .hdr_sig_id = 10, + .flow_sig_id = 1745683200UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [490] = { - .class_hid = BNXT_ULP_CLASS_HID_2c93a, + [1100] = { + .class_hid = BNXT_ULP_CLASS_HID_5824d, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 4835257344UL, + .hdr_sig_id = 10, + .flow_sig_id = 1745685248UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [491] = { - .class_hid = BNXT_ULP_CLASS_HID_213ca, + [1101] = { + .class_hid = BNXT_ULP_CLASS_HID_41687, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 5368974336UL, + .hdr_sig_id = 10, + .flow_sig_id = 1879114496UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [492] = { - .class_hid = BNXT_ULP_CLASS_HID_24d5a, + [1102] = { + .class_hid = BNXT_ULP_CLASS_HID_40609, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 5368982528UL, + .hdr_sig_id = 10, + .flow_sig_id = 1879116544UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [493] = { - .class_hid = BNXT_ULP_CLASS_HID_2b11a, + [1103] = { + .class_hid = BNXT_ULP_CLASS_HID_50585, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 5370022912UL, + .hdr_sig_id = 10, + .flow_sig_id = 1879376640UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [494] = { - .class_hid = BNXT_ULP_CLASS_HID_28b4e, + [1104] = { + .class_hid = BNXT_ULP_CLASS_HID_51589, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 5370031104UL, + .hdr_sig_id = 10, + .flow_sig_id = 1879378688UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [495] = { - .class_hid = BNXT_ULP_CLASS_HID_2624e, + [1105] = { + .class_hid = BNXT_ULP_CLASS_HID_49e0f, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 5371071488UL, + .hdr_sig_id = 10, + .flow_sig_id = 1879638784UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [496] = { - .class_hid = BNXT_ULP_CLASS_HID_253de, + [1106] = { + .class_hid = BNXT_ULP_CLASS_HID_48d81, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 5371079680UL, + .hdr_sig_id = 10, + .flow_sig_id = 1879640832UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [497] = { - .class_hid = BNXT_ULP_CLASS_HID_2c79e, + [1107] = { + .class_hid = BNXT_ULP_CLASS_HID_58d8d, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 5372120064UL, + .hdr_sig_id = 10, + .flow_sig_id = 1879900928UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [498] = { - .class_hid = BNXT_ULP_CLASS_HID_2d9da, + [1108] = { + .class_hid = BNXT_ULP_CLASS_HID_59d01, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 5372128256UL, + .hdr_sig_id = 10, + .flow_sig_id = 1879902976UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [499] = { - .class_hid = BNXT_ULP_CLASS_HID_21b1e, + [1109] = { + .class_hid = BNXT_ULP_CLASS_HID_40109, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 5905845248UL, + .hdr_sig_id = 10, + .flow_sig_id = 2013332224UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [500] = { - .class_hid = BNXT_ULP_CLASS_HID_2350e, + [1110] = { + .class_hid = BNXT_ULP_CLASS_HID_4110d, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 5905853440UL, + .hdr_sig_id = 10, + .flow_sig_id = 2013334272UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [501] = { - .class_hid = BNXT_ULP_CLASS_HID_2b88e, + [1111] = { + .class_hid = BNXT_ULP_CLASS_HID_51109, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 5906893824UL, + .hdr_sig_id = 10, + .flow_sig_id = 2013594368UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [502] = { - .class_hid = BNXT_ULP_CLASS_HID_2ea0e, + [1112] = { + .class_hid = BNXT_ULP_CLASS_HID_50003, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 5906902016UL, + .hdr_sig_id = 10, + .flow_sig_id = 2013596416UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [503] = { - .class_hid = BNXT_ULP_CLASS_HID_26a0a, + [1113] = { + .class_hid = BNXT_ULP_CLASS_HID_48901, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 5907942400UL, + .hdr_sig_id = 10, + .flow_sig_id = 2013856512UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [504] = { - .class_hid = BNXT_ULP_CLASS_HID_25b8a, + [1114] = { + .class_hid = BNXT_ULP_CLASS_HID_49905, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 5907950592UL, + .hdr_sig_id = 10, + .flow_sig_id = 2013858560UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [505] = { - .class_hid = BNXT_ULP_CLASS_HID_2cf0a, + [1115] = { + .class_hid = BNXT_ULP_CLASS_HID_59901, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 5908990976UL, + .hdr_sig_id = 10, + .flow_sig_id = 2014118656UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [506] = { - .class_hid = BNXT_ULP_CLASS_HID_2c18e, + [1116] = { + .class_hid = BNXT_ULP_CLASS_HID_5880b, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 5908999168UL, + .hdr_sig_id = 10, + .flow_sig_id = 2014120704UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT } }, - [507] = { - .class_hid = BNXT_ULP_CLASS_HID_2634e, + [1117] = { + .class_hid = BNXT_ULP_CLASS_HID_10619, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 6442716160UL, + .hdr_sig_id = 11, + .flow_sig_id = 265216UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11225,20 +26064,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI } }, - [508] = { - .class_hid = BNXT_ULP_CLASS_HID_2258a, + [1118] = { + .class_hid = BNXT_ULP_CLASS_HID_11239, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 6442724352UL, + .hdr_sig_id = 11, + .flow_sig_id = 273408UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11247,21 +26084,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI } }, - [509] = { - .class_hid = BNXT_ULP_CLASS_HID_2a94a, + [1119] = { + .class_hid = BNXT_ULP_CLASS_HID_14205, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 6443764736UL, + .hdr_sig_id = 11, + .flow_sig_id = 1313792UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11270,21 +26105,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC } }, - [510] = { - .class_hid = BNXT_ULP_CLASS_HID_2daca, + [1120] = { + .class_hid = BNXT_ULP_CLASS_HID_15e25, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 6443772928UL, + .hdr_sig_id = 11, + .flow_sig_id = 1321984UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11293,22 +26126,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC } }, - [511] = { - .class_hid = BNXT_ULP_CLASS_HID_25aae, + [1121] = { + .class_hid = BNXT_ULP_CLASS_HID_12417, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 6444813312UL, + .hdr_sig_id = 11, + .flow_sig_id = 2362368UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11317,21 +26148,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC } }, - [512] = { - .class_hid = BNXT_ULP_CLASS_HID_2742e, + [1122] = { + .class_hid = BNXT_ULP_CLASS_HID_13037, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 6444821504UL, + .hdr_sig_id = 11, + .flow_sig_id = 2370560UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11340,22 +26169,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC } }, - [513] = { - .class_hid = BNXT_ULP_CLASS_HID_2ffee, + [1123] = { + .class_hid = BNXT_ULP_CLASS_HID_16ff3, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 6445861888UL, + .hdr_sig_id = 11, + .flow_sig_id = 3410944UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11364,22 +26191,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC } }, - [514] = { - .class_hid = BNXT_ULP_CLASS_HID_2e96e, + [1124] = { + .class_hid = BNXT_ULP_CLASS_HID_17c13, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 6445870080UL, + .hdr_sig_id = 11, + .flow_sig_id = 3419136UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11388,23 +26213,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC } }, - [515] = { - .class_hid = BNXT_ULP_CLASS_HID_26b0a, + [1125] = { + .class_hid = BNXT_ULP_CLASS_HID_1111d, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 6979587072UL, + .hdr_sig_id = 11, + .flow_sig_id = 537136128UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11413,21 +26236,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR } }, - [516] = { - .class_hid = BNXT_ULP_CLASS_HID_22d0e, + [1126] = { + .class_hid = BNXT_ULP_CLASS_HID_10cdb, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 6979595264UL, + .hdr_sig_id = 11, + .flow_sig_id = 537144320UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11436,22 +26257,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR } }, - [517] = { - .class_hid = BNXT_ULP_CLASS_HID_2910e, + [1127] = { + .class_hid = BNXT_ULP_CLASS_HID_15d19, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 6980635648UL, + .hdr_sig_id = 11, + .flow_sig_id = 538184704UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11460,22 +26279,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR } }, - [518] = { - .class_hid = BNXT_ULP_CLASS_HID_2c28e, + [1128] = { + .class_hid = BNXT_ULP_CLASS_HID_148c7, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 6980643840UL, + .hdr_sig_id = 11, + .flow_sig_id = 538192896UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11484,23 +26301,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR } }, - [519] = { - .class_hid = BNXT_ULP_CLASS_HID_2422a, + [1129] = { + .class_hid = BNXT_ULP_CLASS_HID_13f0b, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 6981684224UL, + .hdr_sig_id = 11, + .flow_sig_id = 539233280UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11509,22 +26324,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR } }, - [520] = { - .class_hid = BNXT_ULP_CLASS_HID_273aa, + [1130] = { + .class_hid = BNXT_ULP_CLASS_HID_12ac9, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 6981692416UL, + .hdr_sig_id = 11, + .flow_sig_id = 539241472UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11533,23 +26346,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR } }, - [521] = { - .class_hid = BNXT_ULP_CLASS_HID_2e7aa, + [1131] = { + .class_hid = BNXT_ULP_CLASS_HID_17b17, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 6982732800UL, + .hdr_sig_id = 11, + .flow_sig_id = 540281856UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11558,23 +26369,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR } }, - [522] = { - .class_hid = BNXT_ULP_CLASS_HID_2d12a, + [1132] = { + .class_hid = BNXT_ULP_CLASS_HID_176d5, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 6982740992UL, + .hdr_sig_id = 11, + .flow_sig_id = 540290048UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11583,24 +26392,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR } }, - [523] = { - .class_hid = BNXT_ULP_CLASS_HID_23b8a, + [1133] = { + .class_hid = BNXT_ULP_CLASS_HID_10bab, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 7516457984UL, + .hdr_sig_id = 11, + .flow_sig_id = 1074007040UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11609,21 +26416,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR } }, - [524] = { - .class_hid = BNXT_ULP_CLASS_HID_2550a, + [1134] = { + .class_hid = BNXT_ULP_CLASS_HID_10769, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 7516466176UL, + .hdr_sig_id = 11, + .flow_sig_id = 1074015232UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11632,22 +26437,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR } }, - [525] = { - .class_hid = BNXT_ULP_CLASS_HID_2d8ca, + [1135] = { + .class_hid = BNXT_ULP_CLASS_HID_15787, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 7517506560UL, + .hdr_sig_id = 11, + .flow_sig_id = 1075055616UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11656,22 +26459,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR } }, - [526] = { - .class_hid = BNXT_ULP_CLASS_HID_2930e, + [1136] = { + .class_hid = BNXT_ULP_CLASS_HID_14345, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 7517514752UL, + .hdr_sig_id = 11, + .flow_sig_id = 1075063808UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11680,23 +26481,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR } }, - [527] = { - .class_hid = BNXT_ULP_CLASS_HID_24a0e, + [1137] = { + .class_hid = BNXT_ULP_CLASS_HID_12989, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 7518555136UL, + .hdr_sig_id = 11, + .flow_sig_id = 1076104192UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11705,22 +26504,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR } }, - [528] = { - .class_hid = BNXT_ULP_CLASS_HID_24c4a, + [1138] = { + .class_hid = BNXT_ULP_CLASS_HID_12567, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 7518563328UL, + .hdr_sig_id = 11, + .flow_sig_id = 1076112384UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11729,23 +26526,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR } }, - [529] = { - .class_hid = BNXT_ULP_CLASS_HID_2ef4e, + [1139] = { + .class_hid = BNXT_ULP_CLASS_HID_17585, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 7519603712UL, + .hdr_sig_id = 11, + .flow_sig_id = 1077152768UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11754,23 +26549,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR } }, - [530] = { - .class_hid = BNXT_ULP_CLASS_HID_2e18a, + [1140] = { + .class_hid = BNXT_ULP_CLASS_HID_16143, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 7519611904UL, + .hdr_sig_id = 11, + .flow_sig_id = 1077160960UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11779,24 +26572,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR } }, - [531] = { - .class_hid = BNXT_ULP_CLASS_HID_2230e, + [1141] = { + .class_hid = BNXT_ULP_CLASS_HID_1064d, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 8053328896UL, + .hdr_sig_id = 11, + .flow_sig_id = 1610877952UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11805,22 +26596,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR } }, - [532] = { - .class_hid = BNXT_ULP_CLASS_HID_25c8e, + [1142] = { + .class_hid = BNXT_ULP_CLASS_HID_1128d, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 8053337088UL, + .hdr_sig_id = 11, + .flow_sig_id = 1610886144UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11829,23 +26618,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR } }, - [533] = { - .class_hid = BNXT_ULP_CLASS_HID_2c08e, + [1143] = { + .class_hid = BNXT_ULP_CLASS_HID_14249, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 8054377472UL, + .hdr_sig_id = 11, + .flow_sig_id = 1611926528UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11854,23 +26641,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR } }, - [534] = { - .class_hid = BNXT_ULP_CLASS_HID_29a8a, + [1144] = { + .class_hid = BNXT_ULP_CLASS_HID_15e49, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 8054385664UL, + .hdr_sig_id = 11, + .flow_sig_id = 1611934720UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11879,24 +26664,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR } }, - [535] = { - .class_hid = BNXT_ULP_CLASS_HID_2718a, + [1145] = { + .class_hid = BNXT_ULP_CLASS_HID_1244b, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 8055426048UL, + .hdr_sig_id = 11, + .flow_sig_id = 1612975104UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11905,23 +26688,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR } }, - [536] = { - .class_hid = BNXT_ULP_CLASS_HID_2630a, + [1146] = { + .class_hid = BNXT_ULP_CLASS_HID_1304b, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 8055434240UL, + .hdr_sig_id = 11, + .flow_sig_id = 1612983296UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11930,24 +26711,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR } }, - [537] = { - .class_hid = BNXT_ULP_CLASS_HID_2d70a, + [1147] = { + .class_hid = BNXT_ULP_CLASS_HID_16047, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 8056474624UL, + .hdr_sig_id = 11, + .flow_sig_id = 1614023680UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11956,24 +26735,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR } }, - [538] = { - .class_hid = BNXT_ULP_CLASS_HID_2e90e, + [1148] = { + .class_hid = BNXT_ULP_CLASS_HID_17c47, .class_tid = 2, - .hdr_sig_id = 3, - .flow_sig_id = 8056482816UL, + .hdr_sig_id = 11, + .flow_sig_id = 1614031872UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -11982,25 +26759,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV6 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR } }, - [539] = { - .class_hid = BNXT_ULP_CLASS_HID_24e91, + [1149] = { + .class_hid = BNXT_ULP_CLASS_HID_11113, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 265216UL, + .hdr_sig_id = 11, + .flow_sig_id = 2147748864UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12008,19 +26783,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [540] = { - .class_hid = BNXT_ULP_CLASS_HID_200d5, + [1150] = { + .class_hid = BNXT_ULP_CLASS_HID_10cd1, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 273408UL, + .hdr_sig_id = 11, + .flow_sig_id = 2147757056UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12028,20 +26804,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [541] = { - .class_hid = BNXT_ULP_CLASS_HID_2edd9, + [1151] = { + .class_hid = BNXT_ULP_CLASS_HID_15cf7, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 1313792UL, + .hdr_sig_id = 11, + .flow_sig_id = 2148797440UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12049,20 +26826,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [542] = { - .class_hid = BNXT_ULP_CLASS_HID_2a61d, + [1152] = { + .class_hid = BNXT_ULP_CLASS_HID_148b5, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 1321984UL, + .hdr_sig_id = 11, + .flow_sig_id = 2148805632UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12070,21 +26848,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [543] = { - .class_hid = BNXT_ULP_CLASS_HID_25f7d, + [1153] = { + .class_hid = BNXT_ULP_CLASS_HID_13f01, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 2362368UL, + .hdr_sig_id = 11, + .flow_sig_id = 2149846016UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12092,20 +26871,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [544] = { - .class_hid = BNXT_ULP_CLASS_HID_251b1, + [1154] = { + .class_hid = BNXT_ULP_CLASS_HID_12ac7, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 2370560UL, + .hdr_sig_id = 11, + .flow_sig_id = 2149854208UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12113,21 +26893,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [545] = { - .class_hid = BNXT_ULP_CLASS_HID_2c571, + [1155] = { + .class_hid = BNXT_ULP_CLASS_HID_17ae5, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 3410944UL, + .hdr_sig_id = 11, + .flow_sig_id = 2150894592UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12135,21 +26916,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [546] = { - .class_hid = BNXT_ULP_CLASS_HID_2f4f9, + [1156] = { + .class_hid = BNXT_ULP_CLASS_HID_176a3, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 3419136UL, + .hdr_sig_id = 11, + .flow_sig_id = 2150902784UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12157,22 +26939,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [547] = { - .class_hid = BNXT_ULP_CLASS_HID_25641, + [1157] = { + .class_hid = BNXT_ULP_CLASS_HID_10bd5, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 2147748864UL, + .hdr_sig_id = 11, + .flow_sig_id = 2684619776UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12180,20 +26963,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [548] = { - .class_hid = BNXT_ULP_CLASS_HID_22885, + [1158] = { + .class_hid = BNXT_ULP_CLASS_HID_10793, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 2147757056UL, + .hdr_sig_id = 11, + .flow_sig_id = 2684627968UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12201,21 +26985,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [549] = { - .class_hid = BNXT_ULP_CLASS_HID_29c45, + [1159] = { + .class_hid = BNXT_ULP_CLASS_HID_15791, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 2148797440UL, + .hdr_sig_id = 11, + .flow_sig_id = 2685668352UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12223,21 +27008,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [550] = { - .class_hid = BNXT_ULP_CLASS_HID_2cfcd, + [1160] = { + .class_hid = BNXT_ULP_CLASS_HID_14357, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 2148805632UL, + .hdr_sig_id = 11, + .flow_sig_id = 2685676544UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12245,22 +27031,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [551] = { - .class_hid = BNXT_ULP_CLASS_HID_24fe9, + [1161] = { + .class_hid = BNXT_ULP_CLASS_HID_129c3, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 2149846016UL, + .hdr_sig_id = 11, + .flow_sig_id = 2686716928UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12268,21 +27055,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [552] = { - .class_hid = BNXT_ULP_CLASS_HID_27961, + [1162] = { + .class_hid = BNXT_ULP_CLASS_HID_12581, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 2149854208UL, + .hdr_sig_id = 11, + .flow_sig_id = 2686725120UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12290,22 +27078,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [553] = { - .class_hid = BNXT_ULP_CLASS_HID_2ed21, + [1163] = { + .class_hid = BNXT_ULP_CLASS_HID_17587, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 2150894592UL, + .hdr_sig_id = 11, + .flow_sig_id = 2687765504UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12313,22 +27102,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [554] = { - .class_hid = BNXT_ULP_CLASS_HID_2dca9, + [1164] = { + .class_hid = BNXT_ULP_CLASS_HID_16145, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 2150902784UL, + .hdr_sig_id = 11, + .flow_sig_id = 2687773696UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12336,23 +27126,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [555] = { - .class_hid = BNXT_ULP_CLASS_HID_25ab1, + [1165] = { + .class_hid = BNXT_ULP_CLASS_HID_10643, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 4295232512UL, + .hdr_sig_id = 11, + .flow_sig_id = 3221490688UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12360,20 +27151,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [556] = { - .class_hid = BNXT_ULP_CLASS_HID_21cf5, + [1166] = { + .class_hid = BNXT_ULP_CLASS_HID_11263, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 4295240704UL, + .hdr_sig_id = 11, + .flow_sig_id = 3221498880UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12381,21 +27173,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [557] = { - .class_hid = BNXT_ULP_CLASS_HID_280b5, + [1167] = { + .class_hid = BNXT_ULP_CLASS_HID_14227, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 4296281088UL, + .hdr_sig_id = 11, + .flow_sig_id = 3222539264UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12403,21 +27196,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [558] = { - .class_hid = BNXT_ULP_CLASS_HID_2b235, + [1168] = { + .class_hid = BNXT_ULP_CLASS_HID_15e47, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 4296289280UL, + .hdr_sig_id = 11, + .flow_sig_id = 3222547456UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12425,22 +27219,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [559] = { - .class_hid = BNXT_ULP_CLASS_HID_26b15, + [1169] = { + .class_hid = BNXT_ULP_CLASS_HID_12421, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 4297329664UL, + .hdr_sig_id = 11, + .flow_sig_id = 3223587840UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12448,21 +27243,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [560] = { - .class_hid = BNXT_ULP_CLASS_HID_26d51, + [1170] = { + .class_hid = BNXT_ULP_CLASS_HID_13041, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 4297337856UL, + .hdr_sig_id = 11, + .flow_sig_id = 3223596032UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12470,22 +27266,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [561] = { - .class_hid = BNXT_ULP_CLASS_HID_2d111, + [1171] = { + .class_hid = BNXT_ULP_CLASS_HID_16005, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 4298378240UL, + .hdr_sig_id = 11, + .flow_sig_id = 3224636416UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12493,22 +27290,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [562] = { - .class_hid = BNXT_ULP_CLASS_HID_2c091, + [1172] = { + .class_hid = BNXT_ULP_CLASS_HID_17c25, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 4298386432UL, + .hdr_sig_id = 11, + .flow_sig_id = 3224644608UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12516,23 +27314,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [563] = { - .class_hid = BNXT_ULP_CLASS_HID_26261, + [1173] = { + .class_hid = BNXT_ULP_CLASS_HID_11147, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 6442716160UL, + .hdr_sig_id = 11, + .flow_sig_id = 3758361600UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12540,21 +27339,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [564] = { - .class_hid = BNXT_ULP_CLASS_HID_224a5, + [1174] = { + .class_hid = BNXT_ULP_CLASS_HID_10d05, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 6442724352UL, + .hdr_sig_id = 11, + .flow_sig_id = 3758369792UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12562,22 +27362,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [565] = { - .class_hid = BNXT_ULP_CLASS_HID_2a865, + [1175] = { + .class_hid = BNXT_ULP_CLASS_HID_15d43, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 6443764736UL, + .hdr_sig_id = 11, + .flow_sig_id = 3759410176UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12585,22 +27386,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [566] = { - .class_hid = BNXT_ULP_CLASS_HID_2dbe5, + [1176] = { + .class_hid = BNXT_ULP_CLASS_HID_14901, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 6443772928UL, + .hdr_sig_id = 11, + .flow_sig_id = 3759418368UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12608,23 +27410,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [567] = { - .class_hid = BNXT_ULP_CLASS_HID_25b81, + [1177] = { + .class_hid = BNXT_ULP_CLASS_HID_13f45, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 6444813312UL, + .hdr_sig_id = 11, + .flow_sig_id = 3760458752UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12632,22 +27435,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [568] = { - .class_hid = BNXT_ULP_CLASS_HID_27501, + [1178] = { + .class_hid = BNXT_ULP_CLASS_HID_12b03, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 6444821504UL, + .hdr_sig_id = 11, + .flow_sig_id = 3760466944UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12655,23 +27459,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [569] = { - .class_hid = BNXT_ULP_CLASS_HID_2fec1, + [1179] = { + .class_hid = BNXT_ULP_CLASS_HID_17b01, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 6445861888UL, + .hdr_sig_id = 11, + .flow_sig_id = 3761507328UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12679,23 +27484,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [570] = { - .class_hid = BNXT_ULP_CLASS_HID_2e841, + [1180] = { + .class_hid = BNXT_ULP_CLASS_HID_176c7, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 6445870080UL, + .hdr_sig_id = 11, + .flow_sig_id = 3761515520UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12703,24 +27509,25 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT } }, - [571] = { - .class_hid = BNXT_ULP_CLASS_HID_24085, + [1181] = { + .class_hid = BNXT_ULP_CLASS_HID_11bcf, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 8590199808UL, + .hdr_sig_id = 11, + .flow_sig_id = 4295232512UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12728,20 +27535,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [572] = { - .class_hid = BNXT_ULP_CLASS_HID_21ac5, + [1182] = { + .class_hid = BNXT_ULP_CLASS_HID_1178d, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 8590208000UL, + .hdr_sig_id = 11, + .flow_sig_id = 4295240704UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12749,21 +27556,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [573] = { - .class_hid = BNXT_ULP_CLASS_HID_28e85, + [1183] = { + .class_hid = BNXT_ULP_CLASS_HID_1474d, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 8591248384UL, + .hdr_sig_id = 11, + .flow_sig_id = 4296281088UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12771,21 +27578,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [574] = { - .class_hid = BNXT_ULP_CLASS_HID_2b80d, + [1184] = { + .class_hid = BNXT_ULP_CLASS_HID_1536d, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 8591256576UL, + .hdr_sig_id = 11, + .flow_sig_id = 4296289280UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12793,22 +27600,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [575] = { - .class_hid = BNXT_ULP_CLASS_HID_2516d, + [1185] = { + .class_hid = BNXT_ULP_CLASS_HID_139bd, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 8592296960UL, + .hdr_sig_id = 11, + .flow_sig_id = 4297329664UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12816,21 +27623,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [576] = { - .class_hid = BNXT_ULP_CLASS_HID_26ba5, + [1186] = { + .class_hid = BNXT_ULP_CLASS_HID_1357f, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 8592305152UL, + .hdr_sig_id = 11, + .flow_sig_id = 4297337856UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12838,22 +27645,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [577] = { - .class_hid = BNXT_ULP_CLASS_HID_2df65, + [1187] = { + .class_hid = BNXT_ULP_CLASS_HID_16547, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 8593345536UL, + .hdr_sig_id = 11, + .flow_sig_id = 4298378240UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12861,22 +27668,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [578] = { - .class_hid = BNXT_ULP_CLASS_HID_2ceed, + [1188] = { + .class_hid = BNXT_ULP_CLASS_HID_17167, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 8593353728UL, + .hdr_sig_id = 11, + .flow_sig_id = 4298386432UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12884,23 +27691,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [579] = { - .class_hid = BNXT_ULP_CLASS_HID_26845, + [1189] = { + .class_hid = BNXT_ULP_CLASS_HID_11685, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 10737683456UL, + .hdr_sig_id = 11, + .flow_sig_id = 4832103424UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12908,21 +27715,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [580] = { - .class_hid = BNXT_ULP_CLASS_HID_22285, + [1190] = { + .class_hid = BNXT_ULP_CLASS_HID_1024f, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 10737691648UL, + .hdr_sig_id = 11, + .flow_sig_id = 4832111616UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12930,22 +27737,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [581] = { - .class_hid = BNXT_ULP_CLASS_HID_29645, + [1191] = { + .class_hid = BNXT_ULP_CLASS_HID_1524d, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 10738732032UL, + .hdr_sig_id = 11, + .flow_sig_id = 4833152000UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12953,22 +27760,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [582] = { - .class_hid = BNXT_ULP_CLASS_HID_2c1cd, + [1192] = { + .class_hid = BNXT_ULP_CLASS_HID_14e0f, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 10738740224UL, + .hdr_sig_id = 11, + .flow_sig_id = 4833160192UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -12976,23 +27783,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [583] = { - .class_hid = BNXT_ULP_CLASS_HID_2418d, + [1193] = { + .class_hid = BNXT_ULP_CLASS_HID_1345f, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 10739780608UL, + .hdr_sig_id = 11, + .flow_sig_id = 4834200576UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13000,22 +27807,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [584] = { - .class_hid = BNXT_ULP_CLASS_HID_27365, + [1194] = { + .class_hid = BNXT_ULP_CLASS_HID_1201d, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 10739788800UL, + .hdr_sig_id = 11, + .flow_sig_id = 4834208768UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13023,23 +27830,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [585] = { - .class_hid = BNXT_ULP_CLASS_HID_2e725, + [1195] = { + .class_hid = BNXT_ULP_CLASS_HID_1705f, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 10740829184UL, + .hdr_sig_id = 11, + .flow_sig_id = 4835249152UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13047,23 +27854,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [586] = { - .class_hid = BNXT_ULP_CLASS_HID_2d6ad, + [1196] = { + .class_hid = BNXT_ULP_CLASS_HID_16c1d, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 10740837376UL, + .hdr_sig_id = 11, + .flow_sig_id = 4835257344UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13071,24 +27878,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [587] = { - .class_hid = BNXT_ULP_CLASS_HID_25ca5, + [1197] = { + .class_hid = BNXT_ULP_CLASS_HID_100ef, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 12885167104UL, + .hdr_sig_id = 11, + .flow_sig_id = 5368974336UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13096,21 +27903,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [588] = { - .class_hid = BNXT_ULP_CLASS_HID_216e5, + [1198] = { + .class_hid = BNXT_ULP_CLASS_HID_11d0f, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 12885175296UL, + .hdr_sig_id = 11, + .flow_sig_id = 5368982528UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13118,22 +27925,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [589] = { - .class_hid = BNXT_ULP_CLASS_HID_29aa5, + [1199] = { + .class_hid = BNXT_ULP_CLASS_HID_14ccf, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 12886215680UL, + .hdr_sig_id = 11, + .flow_sig_id = 5370022912UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13141,22 +27948,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [590] = { - .class_hid = BNXT_ULP_CLASS_HID_2b425, + [1200] = { + .class_hid = BNXT_ULP_CLASS_HID_158ef, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 12886223872UL, + .hdr_sig_id = 11, + .flow_sig_id = 5370031104UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13164,23 +27971,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [591] = { - .class_hid = BNXT_ULP_CLASS_HID_26d05, + [1201] = { + .class_hid = BNXT_ULP_CLASS_HID_12eed, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 12887264256UL, + .hdr_sig_id = 11, + .flow_sig_id = 5371071488UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13188,22 +27995,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [592] = { - .class_hid = BNXT_ULP_CLASS_HID_26745, + [1202] = { + .class_hid = BNXT_ULP_CLASS_HID_13b0d, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 12887272448UL, + .hdr_sig_id = 11, + .flow_sig_id = 5371079680UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13211,23 +28018,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [593] = { - .class_hid = BNXT_ULP_CLASS_HID_2eb05, + [1203] = { + .class_hid = BNXT_ULP_CLASS_HID_16acd, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 12888312832UL, + .hdr_sig_id = 11, + .flow_sig_id = 5372120064UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13235,23 +28042,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [594] = { - .class_hid = BNXT_ULP_CLASS_HID_2da85, + [1204] = { + .class_hid = BNXT_ULP_CLASS_HID_16687, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 12888321024UL, + .hdr_sig_id = 11, + .flow_sig_id = 5372128256UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13259,24 +28066,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [595] = { - .class_hid = BNXT_ULP_CLASS_HID_20cc5, + [1205] = { + .class_hid = BNXT_ULP_CLASS_HID_11c07, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 15032650752UL, + .hdr_sig_id = 11, + .flow_sig_id = 5905845248UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13284,22 +28091,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [596] = { - .class_hid = BNXT_ULP_CLASS_HID_23ea5, + [1206] = { + .class_hid = BNXT_ULP_CLASS_HID_117c5, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 15032658944UL, + .hdr_sig_id = 11, + .flow_sig_id = 5905853440UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13307,23 +28114,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [597] = { - .class_hid = BNXT_ULP_CLASS_HID_2a265, + [1207] = { + .class_hid = BNXT_ULP_CLASS_HID_1478d, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 15033699328UL, + .hdr_sig_id = 11, + .flow_sig_id = 5906893824UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13331,23 +28138,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [598] = { - .class_hid = BNXT_ULP_CLASS_HID_2dde5, + [1208] = { + .class_hid = BNXT_ULP_CLASS_HID_1538d, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 15033707520UL, + .hdr_sig_id = 11, + .flow_sig_id = 5906902016UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13355,24 +28162,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [599] = { - .class_hid = BNXT_ULP_CLASS_HID_25da5, + [1209] = { + .class_hid = BNXT_ULP_CLASS_HID_13a05, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 15034747904UL, + .hdr_sig_id = 11, + .flow_sig_id = 5907942400UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13380,23 +28187,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [600] = { - .class_hid = BNXT_ULP_CLASS_HID_24f05, + [1210] = { + .class_hid = BNXT_ULP_CLASS_HID_135cf, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 15034756096UL, + .hdr_sig_id = 11, + .flow_sig_id = 5907950592UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13404,24 +28211,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [601] = { - .class_hid = BNXT_ULP_CLASS_HID_2f0c5, + [1211] = { + .class_hid = BNXT_ULP_CLASS_HID_1658f, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 15035796480UL, + .hdr_sig_id = 11, + .flow_sig_id = 5908990976UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13429,24 +28236,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [602] = { - .class_hid = BNXT_ULP_CLASS_HID_2e245, + [1212] = { + .class_hid = BNXT_ULP_CLASS_HID_1718f, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 15035804672UL, + .hdr_sig_id = 11, + .flow_sig_id = 5908999168UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13454,25 +28261,25 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [603] = { - .class_hid = BNXT_ULP_CLASS_HID_24d8b, + [1213] = { + .class_hid = BNXT_ULP_CLASS_HID_11667, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 17180134400UL, + .hdr_sig_id = 11, + .flow_sig_id = 6442716160UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13480,20 +28287,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [604] = { - .class_hid = BNXT_ULP_CLASS_HID_207cf, + [1214] = { + .class_hid = BNXT_ULP_CLASS_HID_10225, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 17180142592UL, + .hdr_sig_id = 11, + .flow_sig_id = 6442724352UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13501,21 +28309,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [605] = { - .class_hid = BNXT_ULP_CLASS_HID_28b8f, + [1215] = { + .class_hid = BNXT_ULP_CLASS_HID_15247, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 17181182976UL, + .hdr_sig_id = 11, + .flow_sig_id = 6443764736UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13523,21 +28332,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [606] = { - .class_hid = BNXT_ULP_CLASS_HID_2a517, + [1216] = { + .class_hid = BNXT_ULP_CLASS_HID_14e05, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 17181191168UL, + .hdr_sig_id = 11, + .flow_sig_id = 6443772928UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13545,22 +28355,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [607] = { - .class_hid = BNXT_ULP_CLASS_HID_25277, + [1217] = { + .class_hid = BNXT_ULP_CLASS_HID_13455, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 17182231552UL, + .hdr_sig_id = 11, + .flow_sig_id = 6444813312UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13568,21 +28379,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [608] = { - .class_hid = BNXT_ULP_CLASS_HID_254ab, + [1218] = { + .class_hid = BNXT_ULP_CLASS_HID_12017, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 17182239744UL, + .hdr_sig_id = 11, + .flow_sig_id = 6444821504UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13590,22 +28402,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [609] = { - .class_hid = BNXT_ULP_CLASS_HID_2d86b, + [1219] = { + .class_hid = BNXT_ULP_CLASS_HID_17035, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 17183280128UL, + .hdr_sig_id = 11, + .flow_sig_id = 6445861888UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13613,22 +28426,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [610] = { - .class_hid = BNXT_ULP_CLASS_HID_2cbf3, + [1220] = { + .class_hid = BNXT_ULP_CLASS_HID_16bf7, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 17183288320UL, + .hdr_sig_id = 11, + .flow_sig_id = 6445870080UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13636,23 +28450,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [611] = { - .class_hid = BNXT_ULP_CLASS_HID_2554b, + [1221] = { + .class_hid = BNXT_ULP_CLASS_HID_10115, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 19327618048UL, + .hdr_sig_id = 11, + .flow_sig_id = 6979587072UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13660,21 +28475,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [612] = { - .class_hid = BNXT_ULP_CLASS_HID_22f8f, + [1222] = { + .class_hid = BNXT_ULP_CLASS_HID_11d15, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 19327626240UL, + .hdr_sig_id = 11, + .flow_sig_id = 6979595264UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13682,22 +28498,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [613] = { - .class_hid = BNXT_ULP_CLASS_HID_2934f, + [1223] = { + .class_hid = BNXT_ULP_CLASS_HID_14d05, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 19328666624UL, + .hdr_sig_id = 11, + .flow_sig_id = 6980635648UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13705,22 +28522,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [614] = { - .class_hid = BNXT_ULP_CLASS_HID_2c2c7, + [1224] = { + .class_hid = BNXT_ULP_CLASS_HID_15905, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 19328674816UL, + .hdr_sig_id = 11, + .flow_sig_id = 6980643840UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13728,23 +28546,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [615] = { - .class_hid = BNXT_ULP_CLASS_HID_242e3, + [1225] = { + .class_hid = BNXT_ULP_CLASS_HID_12f17, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 19329715200UL, + .hdr_sig_id = 11, + .flow_sig_id = 6981684224UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13752,22 +28571,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [616] = { - .class_hid = BNXT_ULP_CLASS_HID_27c6b, + [1226] = { + .class_hid = BNXT_ULP_CLASS_HID_13b17, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 19329723392UL, + .hdr_sig_id = 11, + .flow_sig_id = 6981692416UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13775,23 +28595,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [617] = { - .class_hid = BNXT_ULP_CLASS_HID_2e02b, + [1227] = { + .class_hid = BNXT_ULP_CLASS_HID_16ad7, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 19330763776UL, + .hdr_sig_id = 11, + .flow_sig_id = 6982732800UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13799,23 +28620,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [618] = { - .class_hid = BNXT_ULP_CLASS_HID_2d3a3, + [1228] = { + .class_hid = BNXT_ULP_CLASS_HID_16695, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 19330771968UL, + .hdr_sig_id = 11, + .flow_sig_id = 6982740992UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13823,24 +28645,25 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [619] = { - .class_hid = BNXT_ULP_CLASS_HID_259a3, + [1229] = { + .class_hid = BNXT_ULP_CLASS_HID_11be5, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 21475101696UL, + .hdr_sig_id = 11, + .flow_sig_id = 7516457984UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13848,21 +28671,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [620] = { - .class_hid = BNXT_ULP_CLASS_HID_213e7, + [1230] = { + .class_hid = BNXT_ULP_CLASS_HID_117a7, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 21475109888UL, + .hdr_sig_id = 11, + .flow_sig_id = 7516466176UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13870,22 +28694,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [621] = { - .class_hid = BNXT_ULP_CLASS_HID_287a7, + [1231] = { + .class_hid = BNXT_ULP_CLASS_HID_14767, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 21476150272UL, + .hdr_sig_id = 11, + .flow_sig_id = 7517506560UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13893,22 +28718,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [622] = { - .class_hid = BNXT_ULP_CLASS_HID_2b137, + [1232] = { + .class_hid = BNXT_ULP_CLASS_HID_15387, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 21476158464UL, + .hdr_sig_id = 11, + .flow_sig_id = 7517514752UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13916,23 +28742,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [623] = { - .class_hid = BNXT_ULP_CLASS_HID_26e17, + [1233] = { + .class_hid = BNXT_ULP_CLASS_HID_139e7, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 21477198848UL, + .hdr_sig_id = 11, + .flow_sig_id = 7518555136UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13940,22 +28767,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [624] = { - .class_hid = BNXT_ULP_CLASS_HID_26043, + [1234] = { + .class_hid = BNXT_ULP_CLASS_HID_135a5, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 21477207040UL, + .hdr_sig_id = 11, + .flow_sig_id = 7518563328UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13963,23 +28791,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [625] = { - .class_hid = BNXT_ULP_CLASS_HID_2d403, + [1235] = { + .class_hid = BNXT_ULP_CLASS_HID_16565, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 21478247424UL, + .hdr_sig_id = 11, + .flow_sig_id = 7519603712UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -13987,23 +28816,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [626] = { - .class_hid = BNXT_ULP_CLASS_HID_2c793, + [1236] = { + .class_hid = BNXT_ULP_CLASS_HID_17185, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 21478255616UL, + .hdr_sig_id = 11, + .flow_sig_id = 7519611904UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -14011,24 +28841,25 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [627] = { - .class_hid = BNXT_ULP_CLASS_HID_20827, + [1237] = { + .class_hid = BNXT_ULP_CLASS_HID_11687, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 23622585344UL, + .hdr_sig_id = 11, + .flow_sig_id = 8053328896UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -14036,46 +28867,48 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [628] = { - .class_hid = BNXT_ULP_CLASS_HID_23ba7, + [1238] = { + .class_hid = BNXT_ULP_CLASS_HID_10245, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 23622593536UL, + .hdr_sig_id = 11, + .flow_sig_id = 8053337088UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_IPV4 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [629] = { - .class_hid = BNXT_ULP_CLASS_HID_2af67, + [1239] = { + .class_hid = BNXT_ULP_CLASS_HID_15287, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 23623633920UL, + .hdr_sig_id = 11, + .flow_sig_id = 8054377472UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -14083,23 +28916,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [630] = { - .class_hid = BNXT_ULP_CLASS_HID_2dee7, + [1240] = { + .class_hid = BNXT_ULP_CLASS_HID_14e45, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 23623642112UL, + .hdr_sig_id = 11, + .flow_sig_id = 8054385664UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -14107,24 +28941,25 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [631] = { - .class_hid = BNXT_ULP_CLASS_HID_25e83, + [1241] = { + .class_hid = BNXT_ULP_CLASS_HID_13485, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 23624682496UL, + .hdr_sig_id = 11, + .flow_sig_id = 8055426048UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -14132,23 +28967,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [632] = { - .class_hid = BNXT_ULP_CLASS_HID_24803, + [1242] = { + .class_hid = BNXT_ULP_CLASS_HID_12047, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 23624690688UL, + .hdr_sig_id = 11, + .flow_sig_id = 8055434240UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -14156,24 +28992,25 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [633] = { - .class_hid = BNXT_ULP_CLASS_HID_2fdc3, + [1243] = { + .class_hid = BNXT_ULP_CLASS_HID_17085, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 23625731072UL, + .hdr_sig_id = 11, + .flow_sig_id = 8056474624UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -14181,24 +29018,25 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [634] = { - .class_hid = BNXT_ULP_CLASS_HID_2ef43, + [1244] = { + .class_hid = BNXT_ULP_CLASS_HID_16c47, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 23625739264UL, + .hdr_sig_id = 11, + .flow_sig_id = 8056482816UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -14206,3033 +29044,3034 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT } }, - [635] = { - .class_hid = BNXT_ULP_CLASS_HID_247bf, + [1245] = { + .class_hid = BNXT_ULP_CLASS_HID_400f4, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 25770068992UL, + .hdr_sig_id = 12, + .flow_sig_id = 66304UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI } }, - [636] = { - .class_hid = BNXT_ULP_CLASS_HID_219ff, + [1246] = { + .class_hid = BNXT_ULP_CLASS_HID_410c8, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 25770077184UL, + .hdr_sig_id = 12, + .flow_sig_id = 68352UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI } }, - [637] = { - .class_hid = BNXT_ULP_CLASS_HID_28dbf, + [1247] = { + .class_hid = BNXT_ULP_CLASS_HID_51084, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 25771117568UL, + .hdr_sig_id = 12, + .flow_sig_id = 328448UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC } }, - [638] = { - .class_hid = BNXT_ULP_CLASS_HID_2bf07, + [1248] = { + .class_hid = BNXT_ULP_CLASS_HID_50ffe, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 25771125760UL, + .hdr_sig_id = 12, + .flow_sig_id = 330496UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC } }, - [639] = { - .class_hid = BNXT_ULP_CLASS_HID_25467, + [1249] = { + .class_hid = BNXT_ULP_CLASS_HID_488cc, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 25772166144UL, + .hdr_sig_id = 12, + .flow_sig_id = 590592UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC } }, - [640] = { - .class_hid = BNXT_ULP_CLASS_HID_26e5f, + [1250] = { + .class_hid = BNXT_ULP_CLASS_HID_48726, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 25772174336UL, + .hdr_sig_id = 12, + .flow_sig_id = 592640UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC } }, - [641] = { - .class_hid = BNXT_ULP_CLASS_HID_2d21f, + [1251] = { + .class_hid = BNXT_ULP_CLASS_HID_587f2, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 25773214720UL, + .hdr_sig_id = 12, + .flow_sig_id = 852736UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC } }, - [642] = { - .class_hid = BNXT_ULP_CLASS_HID_2cde7, + [1252] = { + .class_hid = BNXT_ULP_CLASS_HID_597b6, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 25773222912UL, + .hdr_sig_id = 12, + .flow_sig_id = 854784UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC } }, - [643] = { - .class_hid = BNXT_ULP_CLASS_HID_26f6f, + [1253] = { + .class_hid = BNXT_ULP_CLASS_HID_41b10, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 27917552640UL, + .hdr_sig_id = 12, + .flow_sig_id = 536937216UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR } }, - [644] = { - .class_hid = BNXT_ULP_CLASS_HID_221af, + [1254] = { + .class_hid = BNXT_ULP_CLASS_HID_40b8a, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 27917560832UL, + .hdr_sig_id = 12, + .flow_sig_id = 536939264UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR } }, - [645] = { - .class_hid = BNXT_ULP_CLASS_HID_2956f, + [1255] = { + .class_hid = BNXT_ULP_CLASS_HID_50a46, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 27918601216UL, + .hdr_sig_id = 12, + .flow_sig_id = 537199360UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR } }, - [646] = { - .class_hid = BNXT_ULP_CLASS_HID_2c4c7, + [1256] = { + .class_hid = BNXT_ULP_CLASS_HID_51a1a, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 27918609408UL, + .hdr_sig_id = 12, + .flow_sig_id = 537201408UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR } }, - [647] = { - .class_hid = BNXT_ULP_CLASS_HID_24487, + [1257] = { + .class_hid = BNXT_ULP_CLASS_HID_4838e, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 27919649792UL, + .hdr_sig_id = 12, + .flow_sig_id = 537461504UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR } }, - [648] = { - .class_hid = BNXT_ULP_CLASS_HID_2760f, + [1258] = { + .class_hid = BNXT_ULP_CLASS_HID_49242, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 27919657984UL, + .hdr_sig_id = 12, + .flow_sig_id = 537463552UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR } }, - [649] = { - .class_hid = BNXT_ULP_CLASS_HID_2fbcf, + [1259] = { + .class_hid = BNXT_ULP_CLASS_HID_5921e, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 27920698368UL, + .hdr_sig_id = 12, + .flow_sig_id = 537723648UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR } }, - [650] = { - .class_hid = BNXT_ULP_CLASS_HID_2d5a7, + [1260] = { + .class_hid = BNXT_ULP_CLASS_HID_58150, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 27920706560UL, + .hdr_sig_id = 12, + .flow_sig_id = 537725696UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR } }, - [651] = { - .class_hid = BNXT_ULP_CLASS_HID_25357, + [1261] = { + .class_hid = BNXT_ULP_CLASS_HID_41686, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 30065036288UL, + .hdr_sig_id = 12, + .flow_sig_id = 1073808128UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR } }, - [652] = { - .class_hid = BNXT_ULP_CLASS_HID_21597, + [1262] = { + .class_hid = BNXT_ULP_CLASS_HID_405e8, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 30065044480UL, + .hdr_sig_id = 12, + .flow_sig_id = 1073810176UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR } }, - [653] = { - .class_hid = BNXT_ULP_CLASS_HID_29957, + [1263] = { + .class_hid = BNXT_ULP_CLASS_HID_505a4, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 30066084864UL, + .hdr_sig_id = 12, + .flow_sig_id = 1074070272UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR } }, - [654] = { - .class_hid = BNXT_ULP_CLASS_HID_2cb27, + [1264] = { + .class_hid = BNXT_ULP_CLASS_HID_51588, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 30066093056UL, + .hdr_sig_id = 12, + .flow_sig_id = 1074072320UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR } }, - [655] = { - .class_hid = BNXT_ULP_CLASS_HID_248f7, + [1265] = { + .class_hid = BNXT_ULP_CLASS_HID_49d4e, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 30067133440UL, + .hdr_sig_id = 12, + .flow_sig_id = 1074332416UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR } }, - [656] = { - .class_hid = BNXT_ULP_CLASS_HID_27a77, + [1266] = { + .class_hid = BNXT_ULP_CLASS_HID_48da0, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 30067141632UL, + .hdr_sig_id = 12, + .flow_sig_id = 1074334464UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR } }, - [657] = { - .class_hid = BNXT_ULP_CLASS_HID_2ee37, + [1267] = { + .class_hid = BNXT_ULP_CLASS_HID_58d8c, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 30068182016UL, + .hdr_sig_id = 12, + .flow_sig_id = 1074594560UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR } }, - [658] = { - .class_hid = BNXT_ULP_CLASS_HID_2d987, + [1268] = { + .class_hid = BNXT_ULP_CLASS_HID_59c40, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 30068190208UL, + .hdr_sig_id = 12, + .flow_sig_id = 1074596608UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR } }, - [659] = { - .class_hid = BNXT_ULP_CLASS_HID_203c7, + [1269] = { + .class_hid = BNXT_ULP_CLASS_HID_40040, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 32212519936UL, + .hdr_sig_id = 12, + .flow_sig_id = 1610679040UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR } }, - [660] = { - .class_hid = BNXT_ULP_CLASS_HID_23d47, + [1270] = { + .class_hid = BNXT_ULP_CLASS_HID_41004, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 32212528128UL, + .hdr_sig_id = 12, + .flow_sig_id = 1610681088UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR } }, - [661] = { - .class_hid = BNXT_ULP_CLASS_HID_2a107, + [1271] = { + .class_hid = BNXT_ULP_CLASS_HID_510c0, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 32213568512UL, + .hdr_sig_id = 12, + .flow_sig_id = 1610941184UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR } }, - [662] = { - .class_hid = BNXT_ULP_CLASS_HID_2d0e7, + [1272] = { + .class_hid = BNXT_ULP_CLASS_HID_50f4a, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 32213576704UL, + .hdr_sig_id = 12, + .flow_sig_id = 1610943232UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR } }, - [663] = { - .class_hid = BNXT_ULP_CLASS_HID_250a7, + [1273] = { + .class_hid = BNXT_ULP_CLASS_HID_48808, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 32214617088UL, + .hdr_sig_id = 12, + .flow_sig_id = 1611203328UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR } }, - [664] = { - .class_hid = BNXT_ULP_CLASS_HID_24227, + [1274] = { + .class_hid = BNXT_ULP_CLASS_HID_48742, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 32214625280UL, + .hdr_sig_id = 12, + .flow_sig_id = 1611205376UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR } }, - [665] = { - .class_hid = BNXT_ULP_CLASS_HID_2f7e7, + [1275] = { + .class_hid = BNXT_ULP_CLASS_HID_5874e, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 32215665664UL, + .hdr_sig_id = 12, + .flow_sig_id = 1611465472UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR } }, - [666] = { - .class_hid = BNXT_ULP_CLASS_HID_2c827, + [1276] = { + .class_hid = BNXT_ULP_CLASS_HID_59702, .class_tid = 2, - .hdr_sig_id = 4, - .flow_sig_id = 32215673856UL, + .hdr_sig_id = 12, + .flow_sig_id = 1611467520UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_TCP | + BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT | - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR } }, - [667] = { - .class_hid = BNXT_ULP_CLASS_HID_25422, + [1277] = { + .class_hid = BNXT_ULP_CLASS_HID_41bfe, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 265216UL, + .hdr_sig_id = 12, + .flow_sig_id = 2147549952UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [668] = { - .class_hid = BNXT_ULP_CLASS_HID_21a66, + [1278] = { + .class_hid = BNXT_ULP_CLASS_HID_40a58, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 273408UL, + .hdr_sig_id = 12, + .flow_sig_id = 2147552000UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [669] = { - .class_hid = BNXT_ULP_CLASS_HID_2f76a, + [1279] = { + .class_hid = BNXT_ULP_CLASS_HID_50a2c, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 1313792UL, + .hdr_sig_id = 12, + .flow_sig_id = 2147812096UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [670] = { - .class_hid = BNXT_ULP_CLASS_HID_2bcae, + [1280] = { + .class_hid = BNXT_ULP_CLASS_HID_51ae8, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 1321984UL, + .hdr_sig_id = 12, + .flow_sig_id = 2147814144UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [671] = { - .class_hid = BNXT_ULP_CLASS_HID_245ce, + [1281] = { + .class_hid = BNXT_ULP_CLASS_HID_4825c, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 2362368UL, + .hdr_sig_id = 12, + .flow_sig_id = 2148074240UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [672] = { - .class_hid = BNXT_ULP_CLASS_HID_24b02, + [1282] = { + .class_hid = BNXT_ULP_CLASS_HID_49228, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 2370560UL, + .hdr_sig_id = 12, + .flow_sig_id = 2148076288UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [673] = { - .class_hid = BNXT_ULP_CLASS_HID_2dfc2, + [1283] = { + .class_hid = BNXT_ULP_CLASS_HID_592ec, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 3410944UL, + .hdr_sig_id = 12, + .flow_sig_id = 2148336384UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [674] = { - .class_hid = BNXT_ULP_CLASS_HID_2ee4a, + [1284] = { + .class_hid = BNXT_ULP_CLASS_HID_5815e, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 3419136UL, + .hdr_sig_id = 12, + .flow_sig_id = 2148338432UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [675] = { - .class_hid = BNXT_ULP_CLASS_HID_22cbe, + [1285] = { + .class_hid = BNXT_ULP_CLASS_HID_41698, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 537136128UL, + .hdr_sig_id = 12, + .flow_sig_id = 2684420864UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [676] = { - .class_hid = BNXT_ULP_CLASS_HID_21232, + [1286] = { + .class_hid = BNXT_ULP_CLASS_HID_4051a, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 537144320UL, + .hdr_sig_id = 12, + .flow_sig_id = 2684422912UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [677] = { - .class_hid = BNXT_ULP_CLASS_HID_2cf26, + [1287] = { + .class_hid = BNXT_ULP_CLASS_HID_505ce, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 538184704UL, + .hdr_sig_id = 12, + .flow_sig_id = 2684683008UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [678] = { - .class_hid = BNXT_ULP_CLASS_HID_2b53a, + [1288] = { + .class_hid = BNXT_ULP_CLASS_HID_5158a, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 538192896UL, + .hdr_sig_id = 12, + .flow_sig_id = 2684685056UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [679] = { - .class_hid = BNXT_ULP_CLASS_HID_25d9a, + [1289] = { + .class_hid = BNXT_ULP_CLASS_HID_49d58, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 539233280UL, + .hdr_sig_id = 12, + .flow_sig_id = 2684945152UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [680] = { - .class_hid = BNXT_ULP_CLASS_HID_2439e, + [1290] = { + .class_hid = BNXT_ULP_CLASS_HID_48dca, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 539241472UL, + .hdr_sig_id = 12, + .flow_sig_id = 2684947200UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [681] = { - .class_hid = BNXT_ULP_CLASS_HID_2d79e, + [1291] = { + .class_hid = BNXT_ULP_CLASS_HID_58d8e, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 540281856UL, + .hdr_sig_id = 12, + .flow_sig_id = 2685207296UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [682] = { - .class_hid = BNXT_ULP_CLASS_HID_2e606, + [1292] = { + .class_hid = BNXT_ULP_CLASS_HID_59c5a, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 540290048UL, + .hdr_sig_id = 12, + .flow_sig_id = 2685209344UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [683] = { - .class_hid = BNXT_ULP_CLASS_HID_21c5e, + [1293] = { + .class_hid = BNXT_ULP_CLASS_HID_4002e, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 1074007040UL, + .hdr_sig_id = 12, + .flow_sig_id = 3221291776UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [684] = { - .class_hid = BNXT_ULP_CLASS_HID_22ac6, + [1294] = { + .class_hid = BNXT_ULP_CLASS_HID_410ea, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 1074015232UL, + .hdr_sig_id = 12, + .flow_sig_id = 3221293824UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [685] = { - .class_hid = BNXT_ULP_CLASS_HID_2be86, + [1295] = { + .class_hid = BNXT_ULP_CLASS_HID_510ae, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 1075055616UL, + .hdr_sig_id = 12, + .flow_sig_id = 3221553920UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [686] = { - .class_hid = BNXT_ULP_CLASS_HID_2cd0e, + [1296] = { + .class_hid = BNXT_ULP_CLASS_HID_50f08, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 1075063808UL, + .hdr_sig_id = 12, + .flow_sig_id = 3221555968UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [687] = { - .class_hid = BNXT_ULP_CLASS_HID_24d1a, + [1297] = { + .class_hid = BNXT_ULP_CLASS_HID_488ee, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 1076104192UL, + .hdr_sig_id = 12, + .flow_sig_id = 3221816064UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [688] = { - .class_hid = BNXT_ULP_CLASS_HID_25b82, + [1298] = { + .class_hid = BNXT_ULP_CLASS_HID_48748, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 1076112384UL, + .hdr_sig_id = 12, + .flow_sig_id = 3221818112UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [689] = { - .class_hid = BNXT_ULP_CLASS_HID_2d042, + [1299] = { + .class_hid = BNXT_ULP_CLASS_HID_5870c, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 1077152768UL, + .hdr_sig_id = 12, + .flow_sig_id = 3222078208UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [690] = { - .class_hid = BNXT_ULP_CLASS_HID_2d586, + [1300] = { + .class_hid = BNXT_ULP_CLASS_HID_597e8, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 1077160960UL, + .hdr_sig_id = 12, + .flow_sig_id = 3222080256UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [691] = { - .class_hid = BNXT_ULP_CLASS_HID_2140a, + [1301] = { + .class_hid = BNXT_ULP_CLASS_HID_41b4a, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 1610877952UL, + .hdr_sig_id = 12, + .flow_sig_id = 3758162688UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [692] = { - .class_hid = BNXT_ULP_CLASS_HID_22292, + [1302] = { + .class_hid = BNXT_ULP_CLASS_HID_40b8c, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 1610886144UL, + .hdr_sig_id = 12, + .flow_sig_id = 3758164736UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [693] = { - .class_hid = BNXT_ULP_CLASS_HID_2b712, + [1303] = { + .class_hid = BNXT_ULP_CLASS_HID_50a48, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 1611926528UL, + .hdr_sig_id = 12, + .flow_sig_id = 3758424832UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [694] = { - .class_hid = BNXT_ULP_CLASS_HID_2c59a, + [1304] = { + .class_hid = BNXT_ULP_CLASS_HID_51a0c, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 1611934720UL, + .hdr_sig_id = 12, + .flow_sig_id = 3758426880UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [695] = { - .class_hid = BNXT_ULP_CLASS_HID_24596, + [1305] = { + .class_hid = BNXT_ULP_CLASS_HID_48388, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 1612975104UL, + .hdr_sig_id = 12, + .flow_sig_id = 3758686976UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [696] = { - .class_hid = BNXT_ULP_CLASS_HID_2541e, + [1306] = { + .class_hid = BNXT_ULP_CLASS_HID_4924c, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 1612983296UL, + .hdr_sig_id = 12, + .flow_sig_id = 3758689024UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [697] = { - .class_hid = BNXT_ULP_CLASS_HID_2e81e, + [1307] = { + .class_hid = BNXT_ULP_CLASS_HID_59208, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 1614023680UL, + .hdr_sig_id = 12, + .flow_sig_id = 3758949120UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [698] = { - .class_hid = BNXT_ULP_CLASS_HID_2f686, + [1308] = { + .class_hid = BNXT_ULP_CLASS_HID_5828a, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 1614031872UL, + .hdr_sig_id = 12, + .flow_sig_id = 3758951168UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT } }, - [699] = { - .class_hid = BNXT_ULP_CLASS_HID_24cf2, + [1309] = { + .class_hid = BNXT_ULP_CLASS_HID_40540, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 2147748864UL, + .hdr_sig_id = 12, + .flow_sig_id = 4295033600UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [700] = { - .class_hid = BNXT_ULP_CLASS_HID_23236, + [1310] = { + .class_hid = BNXT_ULP_CLASS_HID_41500, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 2147757056UL, + .hdr_sig_id = 12, + .flow_sig_id = 4295035648UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [701] = { - .class_hid = BNXT_ULP_CLASS_HID_286f6, + [1311] = { + .class_hid = BNXT_ULP_CLASS_HID_515d0, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 2148797440UL, + .hdr_sig_id = 12, + .flow_sig_id = 4295295744UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [702] = { - .class_hid = BNXT_ULP_CLASS_HID_2d57e, + [1312] = { + .class_hid = BNXT_ULP_CLASS_HID_5044a, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 2148805632UL, + .hdr_sig_id = 12, + .flow_sig_id = 4295297792UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [703] = { - .class_hid = BNXT_ULP_CLASS_HID_2555a, + [1313] = { + .class_hid = BNXT_ULP_CLASS_HID_48d18, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 2149846016UL, + .hdr_sig_id = 12, + .flow_sig_id = 4295557888UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [704] = { - .class_hid = BNXT_ULP_CLASS_HID_263d2, + [1314] = { + .class_hid = BNXT_ULP_CLASS_HID_49dd8, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 2149854208UL, + .hdr_sig_id = 12, + .flow_sig_id = 4295559936UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [705] = { - .class_hid = BNXT_ULP_CLASS_HID_2f792, + [1315] = { + .class_hid = BNXT_ULP_CLASS_HID_59da8, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 2150894592UL, + .hdr_sig_id = 12, + .flow_sig_id = 4295820032UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [706] = { - .class_hid = BNXT_ULP_CLASS_HID_2c61a, + [1316] = { + .class_hid = BNXT_ULP_CLASS_HID_58c02, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 2150902784UL, + .hdr_sig_id = 12, + .flow_sig_id = 4295822080UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [707] = { - .class_hid = BNXT_ULP_CLASS_HID_244be, + [1317] = { + .class_hid = BNXT_ULP_CLASS_HID_41048, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 2684619776UL, + .hdr_sig_id = 12, + .flow_sig_id = 4831904512UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [708] = { - .class_hid = BNXT_ULP_CLASS_HID_20ab2, + [1318] = { + .class_hid = BNXT_ULP_CLASS_HID_400c2, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 2684627968UL, + .hdr_sig_id = 12, + .flow_sig_id = 4831906560UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [709] = { - .class_hid = BNXT_ULP_CLASS_HID_29eb2, - .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 2685668352UL, + [1319] = { + .class_hid = BNXT_ULP_CLASS_HID_50092, + .class_tid = 2, + .hdr_sig_id = 12, + .flow_sig_id = 4832166656UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [710] = { - .class_hid = BNXT_ULP_CLASS_HID_2ad3a, + [1320] = { + .class_hid = BNXT_ULP_CLASS_HID_51f52, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 2685676544UL, + .hdr_sig_id = 12, + .flow_sig_id = 4832168704UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [711] = { - .class_hid = BNXT_ULP_CLASS_HID_2761a, + [1321] = { + .class_hid = BNXT_ULP_CLASS_HID_49800, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 2686716928UL, + .hdr_sig_id = 12, + .flow_sig_id = 4832428800UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [712] = { - .class_hid = BNXT_ULP_CLASS_HID_27b9e, + [1322] = { + .class_hid = BNXT_ULP_CLASS_HID_4889a, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 2686725120UL, + .hdr_sig_id = 12, + .flow_sig_id = 4832430848UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [713] = { - .class_hid = BNXT_ULP_CLASS_HID_2f01e, + [1323] = { + .class_hid = BNXT_ULP_CLASS_HID_5974a, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 2687765504UL, + .hdr_sig_id = 12, + .flow_sig_id = 4832690944UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [714] = { - .class_hid = BNXT_ULP_CLASS_HID_2de96, + [1324] = { + .class_hid = BNXT_ULP_CLASS_HID_587c8, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 2687773696UL, + .hdr_sig_id = 12, + .flow_sig_id = 4832692992UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [715] = { - .class_hid = BNXT_ULP_CLASS_HID_2341e, + [1325] = { + .class_hid = BNXT_ULP_CLASS_HID_40bc2, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 3221490688UL, + .hdr_sig_id = 12, + .flow_sig_id = 5368775424UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [716] = { - .class_hid = BNXT_ULP_CLASS_HID_24296, + [1326] = { + .class_hid = BNXT_ULP_CLASS_HID_41b82, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 3221498880UL, + .hdr_sig_id = 12, + .flow_sig_id = 5368777472UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [717] = { - .class_hid = BNXT_ULP_CLASS_HID_2d756, + [1327] = { + .class_hid = BNXT_ULP_CLASS_HID_51a62, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 3222539264UL, + .hdr_sig_id = 12, + .flow_sig_id = 5369037568UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [718] = { - .class_hid = BNXT_ULP_CLASS_HID_29c9a, + [1328] = { + .class_hid = BNXT_ULP_CLASS_HID_50ac0, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 3222547456UL, + .hdr_sig_id = 12, + .flow_sig_id = 5369039616UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [719] = { - .class_hid = BNXT_ULP_CLASS_HID_265da, + [1329] = { + .class_hid = BNXT_ULP_CLASS_HID_493aa, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 3223587840UL, + .hdr_sig_id = 12, + .flow_sig_id = 5369299712UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [720] = { - .class_hid = BNXT_ULP_CLASS_HID_27452, + [1330] = { + .class_hid = BNXT_ULP_CLASS_HID_48208, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 3223596032UL, + .hdr_sig_id = 12, + .flow_sig_id = 5369301760UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [721] = { - .class_hid = BNXT_ULP_CLASS_HID_2c812, + [1331] = { + .class_hid = BNXT_ULP_CLASS_HID_582c8, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 3224636416UL, + .hdr_sig_id = 12, + .flow_sig_id = 5369561856UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [722] = { - .class_hid = BNXT_ULP_CLASS_HID_2ce56, + [1332] = { + .class_hid = BNXT_ULP_CLASS_HID_59288, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 3224644608UL, + .hdr_sig_id = 12, + .flow_sig_id = 5369563904UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [723] = { - .class_hid = BNXT_ULP_CLASS_HID_20c9a, + [1333] = { + .class_hid = BNXT_ULP_CLASS_HID_40688, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 3758361600UL, + .hdr_sig_id = 12, + .flow_sig_id = 5905646336UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [724] = { - .class_hid = BNXT_ULP_CLASS_HID_25b12, + [1334] = { + .class_hid = BNXT_ULP_CLASS_HID_41540, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 3758369792UL, + .hdr_sig_id = 12, + .flow_sig_id = 5905648384UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [725] = { - .class_hid = BNXT_ULP_CLASS_HID_2af12, + [1335] = { + .class_hid = BNXT_ULP_CLASS_HID_51508, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 3759410176UL, + .hdr_sig_id = 12, + .flow_sig_id = 5905908480UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [726] = { - .class_hid = BNXT_ULP_CLASS_HID_29516, + [1336] = { + .class_hid = BNXT_ULP_CLASS_HID_50582, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 3759418368UL, + .hdr_sig_id = 12, + .flow_sig_id = 5905910528UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [727] = { - .class_hid = BNXT_ULP_CLASS_HID_27d96, + [1337] = { + .class_hid = BNXT_ULP_CLASS_HID_48d40, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 3760458752UL, + .hdr_sig_id = 12, + .flow_sig_id = 5906170624UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [728] = { - .class_hid = BNXT_ULP_CLASS_HID_24c1e, + [1338] = { + .class_hid = BNXT_ULP_CLASS_HID_49d08, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 3760466944UL, + .hdr_sig_id = 12, + .flow_sig_id = 5906172672UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [729] = { - .class_hid = BNXT_ULP_CLASS_HID_2c09e, + [1339] = { + .class_hid = BNXT_ULP_CLASS_HID_59dc0, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 3761507328UL, + .hdr_sig_id = 12, + .flow_sig_id = 5906432768UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [730] = { - .class_hid = BNXT_ULP_CLASS_HID_2c612, + [1340] = { + .class_hid = BNXT_ULP_CLASS_HID_58c4a, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 3761515520UL, + .hdr_sig_id = 12, + .flow_sig_id = 5906434816UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [731] = { - .class_hid = BNXT_ULP_CLASS_HID_24002, + [1341] = { + .class_hid = BNXT_ULP_CLASS_HID_4104a, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 4295232512UL, + .hdr_sig_id = 12, + .flow_sig_id = 6442517248UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [732] = { - .class_hid = BNXT_ULP_CLASS_HID_20646, + [1342] = { + .class_hid = BNXT_ULP_CLASS_HID_400a8, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 4295240704UL, + .hdr_sig_id = 12, + .flow_sig_id = 6442519296UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [733] = { - .class_hid = BNXT_ULP_CLASS_HID_29a06, + [1343] = { + .class_hid = BNXT_ULP_CLASS_HID_50f78, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 4296281088UL, + .hdr_sig_id = 12, + .flow_sig_id = 6442779392UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [734] = { - .class_hid = BNXT_ULP_CLASS_HID_2a886, + [1344] = { + .class_hid = BNXT_ULP_CLASS_HID_51f38, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 4296289280UL, + .hdr_sig_id = 12, + .flow_sig_id = 6442781440UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [735] = { - .class_hid = BNXT_ULP_CLASS_HID_271a6, + [1345] = { + .class_hid = BNXT_ULP_CLASS_HID_4980a, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 4297329664UL, + .hdr_sig_id = 12, + .flow_sig_id = 6443041536UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [736] = { - .class_hid = BNXT_ULP_CLASS_HID_277e2, + [1346] = { + .class_hid = BNXT_ULP_CLASS_HID_49768, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 4297337856UL, + .hdr_sig_id = 12, + .flow_sig_id = 6443043584UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [737] = { - .class_hid = BNXT_ULP_CLASS_HID_2cba2, + [1347] = { + .class_hid = BNXT_ULP_CLASS_HID_59738, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 4298378240UL, + .hdr_sig_id = 12, + .flow_sig_id = 6443303680UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [738] = { - .class_hid = BNXT_ULP_CLASS_HID_2da22, + [1348] = { + .class_hid = BNXT_ULP_CLASS_HID_587aa, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 4298386432UL, + .hdr_sig_id = 12, + .flow_sig_id = 6443305728UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [739] = { - .class_hid = BNXT_ULP_CLASS_HID_25896, + [1349] = { + .class_hid = BNXT_ULP_CLASS_HID_40bd8, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 4832103424UL, + .hdr_sig_id = 12, + .flow_sig_id = 6979388160UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [740] = { - .class_hid = BNXT_ULP_CLASS_HID_21e12, + [1350] = { + .class_hid = BNXT_ULP_CLASS_HID_41bc8, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 4832111616UL, + .hdr_sig_id = 12, + .flow_sig_id = 6979390208UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [741] = { - .class_hid = BNXT_ULP_CLASS_HID_29292, + [1351] = { + .class_hid = BNXT_ULP_CLASS_HID_51b88, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 4833152000UL, + .hdr_sig_id = 12, + .flow_sig_id = 6979650304UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [742] = { - .class_hid = BNXT_ULP_CLASS_HID_2a112, + [1352] = { + .class_hid = BNXT_ULP_CLASS_HID_50ada, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 4833160192UL, + .hdr_sig_id = 12, + .flow_sig_id = 6979652352UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [743] = { - .class_hid = BNXT_ULP_CLASS_HID_24a32, + [1353] = { + .class_hid = BNXT_ULP_CLASS_HID_493c8, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 4834200576UL, + .hdr_sig_id = 12, + .flow_sig_id = 6979912448UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [744] = { - .class_hid = BNXT_ULP_CLASS_HID_24fb6, + [1354] = { + .class_hid = BNXT_ULP_CLASS_HID_4820a, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 4834208768UL, + .hdr_sig_id = 12, + .flow_sig_id = 6979914496UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [745] = { - .class_hid = BNXT_ULP_CLASS_HID_2c436, + [1355] = { + .class_hid = BNXT_ULP_CLASS_HID_582da, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 4835249152UL, + .hdr_sig_id = 12, + .flow_sig_id = 6980174592UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [746] = { - .class_hid = BNXT_ULP_CLASS_HID_2d2a6, + [1356] = { + .class_hid = BNXT_ULP_CLASS_HID_5929a, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 4835257344UL, + .hdr_sig_id = 12, + .flow_sig_id = 6980176640UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [747] = { - .class_hid = BNXT_ULP_CLASS_HID_20856, + [1357] = { + .class_hid = BNXT_ULP_CLASS_HID_4056a, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 5368974336UL, + .hdr_sig_id = 12, + .flow_sig_id = 7516259072UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [748] = { - .class_hid = BNXT_ULP_CLASS_HID_256c6, + [1358] = { + .class_hid = BNXT_ULP_CLASS_HID_4152a, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 5368982528UL, + .hdr_sig_id = 12, + .flow_sig_id = 7516261120UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [749] = { - .class_hid = BNXT_ULP_CLASS_HID_2aa86, + [1359] = { + .class_hid = BNXT_ULP_CLASS_HID_5150a, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 5370022912UL, + .hdr_sig_id = 12, + .flow_sig_id = 7516521216UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [750] = { - .class_hid = BNXT_ULP_CLASS_HID_290d2, + [1360] = { + .class_hid = BNXT_ULP_CLASS_HID_50468, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 5370031104UL, + .hdr_sig_id = 12, + .flow_sig_id = 7516523264UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [751] = { - .class_hid = BNXT_ULP_CLASS_HID_279d2, + [1361] = { + .class_hid = BNXT_ULP_CLASS_HID_48d2a, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 5371071488UL, + .hdr_sig_id = 12, + .flow_sig_id = 7516783360UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [752] = { - .class_hid = BNXT_ULP_CLASS_HID_24842, + [1362] = { + .class_hid = BNXT_ULP_CLASS_HID_49dea, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 5371079680UL, + .hdr_sig_id = 12, + .flow_sig_id = 7516785408UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [753] = { - .class_hid = BNXT_ULP_CLASS_HID_2dc02, + [1363] = { + .class_hid = BNXT_ULP_CLASS_HID_59dca, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 5372120064UL, + .hdr_sig_id = 12, + .flow_sig_id = 7517045504UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [754] = { - .class_hid = BNXT_ULP_CLASS_HID_2c246, + [1364] = { + .class_hid = BNXT_ULP_CLASS_HID_58c28, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 5372128256UL, + .hdr_sig_id = 12, + .flow_sig_id = 7517047552UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [755] = { - .class_hid = BNXT_ULP_CLASS_HID_20082, + [1365] = { + .class_hid = BNXT_ULP_CLASS_HID_4118a, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 5905845248UL, + .hdr_sig_id = 12, + .flow_sig_id = 8053129984UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [756] = { - .class_hid = BNXT_ULP_CLASS_HID_22e92, + [1366] = { + .class_hid = BNXT_ULP_CLASS_HID_400c8, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 5905853440UL, + .hdr_sig_id = 12, + .flow_sig_id = 8053132032UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [757] = { - .class_hid = BNXT_ULP_CLASS_HID_2a312, + [1367] = { + .class_hid = BNXT_ULP_CLASS_HID_50088, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 5906893824UL, + .hdr_sig_id = 12, + .flow_sig_id = 8053392128UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [758] = { - .class_hid = BNXT_ULP_CLASS_HID_2f192, + [1368] = { + .class_hid = BNXT_ULP_CLASS_HID_51088, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 5906902016UL, + .hdr_sig_id = 12, + .flow_sig_id = 8053394176UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [759] = { - .class_hid = BNXT_ULP_CLASS_HID_27196, + [1369] = { + .class_hid = BNXT_ULP_CLASS_HID_4984a, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 5907942400UL, + .hdr_sig_id = 12, + .flow_sig_id = 8053654272UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [760] = { - .class_hid = BNXT_ULP_CLASS_HID_24016, + [1370] = { + .class_hid = BNXT_ULP_CLASS_HID_48888, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 5907950592UL, + .hdr_sig_id = 12, + .flow_sig_id = 8053656320UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [761] = { - .class_hid = BNXT_ULP_CLASS_HID_2d496, + [1371] = { + .class_hid = BNXT_ULP_CLASS_HID_58888, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 5908990976UL, + .hdr_sig_id = 12, + .flow_sig_id = 8053916416UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [762] = { - .class_hid = BNXT_ULP_CLASS_HID_2da12, + [1372] = { + .class_hid = BNXT_ULP_CLASS_HID_587ca, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 5908999168UL, + .hdr_sig_id = 12, + .flow_sig_id = 8053918464UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT } }, - [763] = { - .class_hid = BNXT_ULP_CLASS_HID_278d2, + [1373] = { + .class_hid = BNXT_ULP_CLASS_HID_10690, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 6442716160UL, + .hdr_sig_id = 13, + .flow_sig_id = 265216UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17240,21 +32079,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI } }, - [764] = { - .class_hid = BNXT_ULP_CLASS_HID_23e16, + [1374] = { + .class_hid = BNXT_ULP_CLASS_HID_112b0, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 6442724352UL, + .hdr_sig_id = 13, + .flow_sig_id = 273408UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17262,22 +32099,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI } }, - [765] = { - .class_hid = BNXT_ULP_CLASS_HID_2b2d6, + [1375] = { + .class_hid = BNXT_ULP_CLASS_HID_1428c, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 6443764736UL, + .hdr_sig_id = 13, + .flow_sig_id = 1313792UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17285,22 +32120,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC } }, - [766] = { - .class_hid = BNXT_ULP_CLASS_HID_2c156, + [1376] = { + .class_hid = BNXT_ULP_CLASS_HID_15eac, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 6443772928UL, + .hdr_sig_id = 13, + .flow_sig_id = 1321984UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17308,23 +32141,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC } }, - [767] = { - .class_hid = BNXT_ULP_CLASS_HID_24132, + [1377] = { + .class_hid = BNXT_ULP_CLASS_HID_1249e, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 6444813312UL, + .hdr_sig_id = 13, + .flow_sig_id = 2362368UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17332,22 +32163,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC } }, - [768] = { - .class_hid = BNXT_ULP_CLASS_HID_26fb2, + [1378] = { + .class_hid = BNXT_ULP_CLASS_HID_130be, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 6444821504UL, + .hdr_sig_id = 13, + .flow_sig_id = 2370560UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17355,23 +32184,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC } }, - [769] = { - .class_hid = BNXT_ULP_CLASS_HID_2e472, + [1379] = { + .class_hid = BNXT_ULP_CLASS_HID_16f7a, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 6445861888UL, + .hdr_sig_id = 13, + .flow_sig_id = 3410944UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17379,23 +32206,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC } }, - [770] = { - .class_hid = BNXT_ULP_CLASS_HID_2f2f2, + [1380] = { + .class_hid = BNXT_ULP_CLASS_HID_17c9a, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 6445870080UL, + .hdr_sig_id = 13, + .flow_sig_id = 3419136UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17403,24 +32228,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC } }, - [771] = { - .class_hid = BNXT_ULP_CLASS_HID_27096, + [1381] = { + .class_hid = BNXT_ULP_CLASS_HID_1119a, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 6979587072UL, + .hdr_sig_id = 13, + .flow_sig_id = 2147748864UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17428,22 +32251,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR } }, - [772] = { - .class_hid = BNXT_ULP_CLASS_HID_23692, + [1382] = { + .class_hid = BNXT_ULP_CLASS_HID_10c58, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 6979595264UL, + .hdr_sig_id = 13, + .flow_sig_id = 2147757056UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17451,23 +32272,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR } }, - [773] = { - .class_hid = BNXT_ULP_CLASS_HID_28a92, + [1383] = { + .class_hid = BNXT_ULP_CLASS_HID_15c7e, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 6980635648UL, + .hdr_sig_id = 13, + .flow_sig_id = 2148797440UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17475,23 +32294,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR } }, - [774] = { - .class_hid = BNXT_ULP_CLASS_HID_2d912, + [1384] = { + .class_hid = BNXT_ULP_CLASS_HID_1483c, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 6980643840UL, + .hdr_sig_id = 13, + .flow_sig_id = 2148805632UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17499,24 +32316,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR } }, - [775] = { - .class_hid = BNXT_ULP_CLASS_HID_259b6, + [1385] = { + .class_hid = BNXT_ULP_CLASS_HID_13f88, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 6981684224UL, + .hdr_sig_id = 13, + .flow_sig_id = 2149846016UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17524,23 +32339,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR } }, - [776] = { - .class_hid = BNXT_ULP_CLASS_HID_26836, + [1386] = { + .class_hid = BNXT_ULP_CLASS_HID_12a4e, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 6981692416UL, + .hdr_sig_id = 13, + .flow_sig_id = 2149854208UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17548,24 +32361,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR } }, - [777] = { - .class_hid = BNXT_ULP_CLASS_HID_2fc36, + [1387] = { + .class_hid = BNXT_ULP_CLASS_HID_17a6c, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 6982732800UL, + .hdr_sig_id = 13, + .flow_sig_id = 2150894592UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17573,24 +32384,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR } }, - [778] = { - .class_hid = BNXT_ULP_CLASS_HID_2cab6, + [1388] = { + .class_hid = BNXT_ULP_CLASS_HID_1762a, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 6982740992UL, + .hdr_sig_id = 13, + .flow_sig_id = 2150902784UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17598,25 +32407,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR } }, - [779] = { - .class_hid = BNXT_ULP_CLASS_HID_22016, + [1389] = { + .class_hid = BNXT_ULP_CLASS_HID_11b46, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 7516457984UL, + .hdr_sig_id = 13, + .flow_sig_id = 4295232512UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17624,22 +32431,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR } }, - [780] = { - .class_hid = BNXT_ULP_CLASS_HID_24e96, + [1390] = { + .class_hid = BNXT_ULP_CLASS_HID_11704, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 7516466176UL, + .hdr_sig_id = 13, + .flow_sig_id = 4295240704UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17647,23 +32452,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR } }, - [781] = { - .class_hid = BNXT_ULP_CLASS_HID_2c356, + [1391] = { + .class_hid = BNXT_ULP_CLASS_HID_147c4, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 7517506560UL, + .hdr_sig_id = 13, + .flow_sig_id = 4296281088UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17671,23 +32474,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR } }, - [782] = { - .class_hid = BNXT_ULP_CLASS_HID_28892, + [1392] = { + .class_hid = BNXT_ULP_CLASS_HID_153e4, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 7517514752UL, + .hdr_sig_id = 13, + .flow_sig_id = 4296289280UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17695,24 +32496,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR } }, - [783] = { - .class_hid = BNXT_ULP_CLASS_HID_25192, + [1393] = { + .class_hid = BNXT_ULP_CLASS_HID_13934, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 7518555136UL, + .hdr_sig_id = 13, + .flow_sig_id = 4297329664UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17720,23 +32519,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR } }, - [784] = { - .class_hid = BNXT_ULP_CLASS_HID_257d6, + [1394] = { + .class_hid = BNXT_ULP_CLASS_HID_135f6, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 7518563328UL, + .hdr_sig_id = 13, + .flow_sig_id = 4297337856UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17744,24 +32541,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR } }, - [785] = { - .class_hid = BNXT_ULP_CLASS_HID_2f4d2, + [1395] = { + .class_hid = BNXT_ULP_CLASS_HID_165ce, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 7519603712UL, + .hdr_sig_id = 13, + .flow_sig_id = 4298378240UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17769,24 +32564,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR } }, - [786] = { - .class_hid = BNXT_ULP_CLASS_HID_2fa16, + [1396] = { + .class_hid = BNXT_ULP_CLASS_HID_171ee, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 7519611904UL, + .hdr_sig_id = 13, + .flow_sig_id = 4298386432UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17794,25 +32587,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR } }, - [787] = { - .class_hid = BNXT_ULP_CLASS_HID_23892, + [1397] = { + .class_hid = BNXT_ULP_CLASS_HID_116ee, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 8053328896UL, + .hdr_sig_id = 13, + .flow_sig_id = 6442716160UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17820,23 +32611,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR } }, - [788] = { - .class_hid = BNXT_ULP_CLASS_HID_24712, + [1398] = { + .class_hid = BNXT_ULP_CLASS_HID_102ac, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 8053337088UL, + .hdr_sig_id = 13, + .flow_sig_id = 6442724352UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17844,24 +32633,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR } }, - [789] = { - .class_hid = BNXT_ULP_CLASS_HID_2db12, + [1399] = { + .class_hid = BNXT_ULP_CLASS_HID_152ce, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 8054377472UL, + .hdr_sig_id = 13, + .flow_sig_id = 6443764736UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17869,24 +32656,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR } }, - [790] = { - .class_hid = BNXT_ULP_CLASS_HID_28116, + [1400] = { + .class_hid = BNXT_ULP_CLASS_HID_14e8c, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 8054385664UL, + .hdr_sig_id = 13, + .flow_sig_id = 6443772928UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17894,25 +32679,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR } }, - [791] = { - .class_hid = BNXT_ULP_CLASS_HID_26a16, + [1401] = { + .class_hid = BNXT_ULP_CLASS_HID_134dc, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 8055426048UL, + .hdr_sig_id = 13, + .flow_sig_id = 6444813312UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17920,24 +32703,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR } }, - [792] = { - .class_hid = BNXT_ULP_CLASS_HID_27896, + [1402] = { + .class_hid = BNXT_ULP_CLASS_HID_1209e, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 8055434240UL, + .hdr_sig_id = 13, + .flow_sig_id = 6444821504UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17945,25 +32726,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR } }, - [793] = { - .class_hid = BNXT_ULP_CLASS_HID_2cc96, + [1403] = { + .class_hid = BNXT_ULP_CLASS_HID_170bc, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 8056474624UL, + .hdr_sig_id = 13, + .flow_sig_id = 6445861888UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17971,25 +32750,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR } }, - [794] = { - .class_hid = BNXT_ULP_CLASS_HID_2f292, + [1404] = { + .class_hid = BNXT_ULP_CLASS_HID_16b7e, .class_tid = 2, - .hdr_sig_id = 5, - .flow_sig_id = 8056482816UL, + .hdr_sig_id = 13, + .flow_sig_id = 6445870080UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -17997,26 +32774,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV6 | + BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR } }, - [795] = { - .class_hid = BNXT_ULP_CLASS_HID_24b05, + [1405] = { + .class_hid = BNXT_ULP_CLASS_HID_119ae, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 265216UL, + .hdr_sig_id = 13, + .flow_sig_id = 8590199808UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18028,15 +32803,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [796] = { - .class_hid = BNXT_ULP_CLASS_HID_20541, + [1406] = { + .class_hid = BNXT_ULP_CLASS_HID_1146a, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 273408UL, + .hdr_sig_id = 13, + .flow_sig_id = 8590208000UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18048,16 +32824,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [797] = { - .class_hid = BNXT_ULP_CLASS_HID_2e84d, + [1407] = { + .class_hid = BNXT_ULP_CLASS_HID_14426, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 1313792UL, + .hdr_sig_id = 13, + .flow_sig_id = 8591248384UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18069,16 +32846,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [798] = { - .class_hid = BNXT_ULP_CLASS_HID_2a389, + [1408] = { + .class_hid = BNXT_ULP_CLASS_HID_15046, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 1321984UL, + .hdr_sig_id = 13, + .flow_sig_id = 8591256576UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18090,17 +32868,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [799] = { - .class_hid = BNXT_ULP_CLASS_HID_25ae9, + [1409] = { + .class_hid = BNXT_ULP_CLASS_HID_1263a, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 2362368UL, + .hdr_sig_id = 13, + .flow_sig_id = 8592296960UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18112,16 +32891,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [800] = { - .class_hid = BNXT_ULP_CLASS_HID_25425, + [1410] = { + .class_hid = BNXT_ULP_CLASS_HID_1325a, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 2370560UL, + .hdr_sig_id = 13, + .flow_sig_id = 8592305152UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18133,17 +32913,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [801] = { - .class_hid = BNXT_ULP_CLASS_HID_2c0e5, + [1411] = { + .class_hid = BNXT_ULP_CLASS_HID_16216, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 3410944UL, + .hdr_sig_id = 13, + .flow_sig_id = 8593345536UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18155,17 +32936,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [802] = { - .class_hid = BNXT_ULP_CLASS_HID_2f16d, + [1412] = { + .class_hid = BNXT_ULP_CLASS_HID_17e36, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 3419136UL, + .hdr_sig_id = 13, + .flow_sig_id = 8593353728UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18177,18 +32959,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [803] = { - .class_hid = BNXT_ULP_CLASS_HID_253d5, + [1413] = { + .class_hid = BNXT_ULP_CLASS_HID_1133e, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 2147748864UL, + .hdr_sig_id = 13, + .flow_sig_id = 10737683456UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18200,16 +32983,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [804] = { - .class_hid = BNXT_ULP_CLASS_HID_22d11, + [1414] = { + .class_hid = BNXT_ULP_CLASS_HID_10ffa, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 2147757056UL, + .hdr_sig_id = 13, + .flow_sig_id = 10737691648UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18221,17 +33005,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [805] = { - .class_hid = BNXT_ULP_CLASS_HID_299d1, + [1415] = { + .class_hid = BNXT_ULP_CLASS_HID_15f1a, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 2148797440UL, + .hdr_sig_id = 13, + .flow_sig_id = 10738732032UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18243,17 +33028,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [806] = { - .class_hid = BNXT_ULP_CLASS_HID_2ca59, + [1416] = { + .class_hid = BNXT_ULP_CLASS_HID_14bee, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 2148805632UL, + .hdr_sig_id = 13, + .flow_sig_id = 10738740224UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18265,18 +33051,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [807] = { - .class_hid = BNXT_ULP_CLASS_HID_24a7d, + [1417] = { + .class_hid = BNXT_ULP_CLASS_HID_1312a, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 2149846016UL, + .hdr_sig_id = 13, + .flow_sig_id = 10739780608UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18288,17 +33075,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [808] = { - .class_hid = BNXT_ULP_CLASS_HID_27cf5, + [1418] = { + .class_hid = BNXT_ULP_CLASS_HID_12dea, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 2149854208UL, + .hdr_sig_id = 13, + .flow_sig_id = 10739788800UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18310,18 +33098,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [809] = { - .class_hid = BNXT_ULP_CLASS_HID_2e8b5, + [1419] = { + .class_hid = BNXT_ULP_CLASS_HID_17d1e, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 2150894592UL, + .hdr_sig_id = 13, + .flow_sig_id = 10740829184UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18333,18 +33122,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [810] = { - .class_hid = BNXT_ULP_CLASS_HID_2d93d, + [1420] = { + .class_hid = BNXT_ULP_CLASS_HID_169de, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 2150902784UL, + .hdr_sig_id = 13, + .flow_sig_id = 10740837376UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18356,19 +33146,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [811] = { - .class_hid = BNXT_ULP_CLASS_HID_25f25, + [1421] = { + .class_hid = BNXT_ULP_CLASS_HID_11ee6, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 4295232512UL, + .hdr_sig_id = 13, + .flow_sig_id = 12885167104UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18380,16 +33171,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [812] = { - .class_hid = BNXT_ULP_CLASS_HID_21961, + [1422] = { + .class_hid = BNXT_ULP_CLASS_HID_10abe, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 4295240704UL, + .hdr_sig_id = 13, + .flow_sig_id = 12885175296UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18401,17 +33193,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [813] = { - .class_hid = BNXT_ULP_CLASS_HID_28521, + [1423] = { + .class_hid = BNXT_ULP_CLASS_HID_15ade, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 4296281088UL, + .hdr_sig_id = 13, + .flow_sig_id = 12886215680UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18423,17 +33216,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [814] = { - .class_hid = BNXT_ULP_CLASS_HID_2b7a1, + [1424] = { + .class_hid = BNXT_ULP_CLASS_HID_1569e, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 4296289280UL, + .hdr_sig_id = 13, + .flow_sig_id = 12886223872UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18445,18 +33239,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [815] = { - .class_hid = BNXT_ULP_CLASS_HID_26e81, + [1425] = { + .class_hid = BNXT_ULP_CLASS_HID_13cee, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 4297329664UL, + .hdr_sig_id = 13, + .flow_sig_id = 12887264256UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18468,17 +33263,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [816] = { - .class_hid = BNXT_ULP_CLASS_HID_268c5, + [1426] = { + .class_hid = BNXT_ULP_CLASS_HID_128ae, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 4297337856UL, + .hdr_sig_id = 13, + .flow_sig_id = 12887272448UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18490,18 +33286,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [817] = { - .class_hid = BNXT_ULP_CLASS_HID_2d485, + [1427] = { + .class_hid = BNXT_ULP_CLASS_HID_1676e, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 4298378240UL, + .hdr_sig_id = 13, + .flow_sig_id = 12888312832UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18513,18 +33310,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [818] = { - .class_hid = BNXT_ULP_CLASS_HID_2c505, + [1428] = { + .class_hid = BNXT_ULP_CLASS_HID_1748e, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 4298386432UL, + .hdr_sig_id = 13, + .flow_sig_id = 12888321024UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18536,19 +33334,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [819] = { - .class_hid = BNXT_ULP_CLASS_HID_267f5, + [1429] = { + .class_hid = BNXT_ULP_CLASS_HID_1098e, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 6442716160UL, + .hdr_sig_id = 13, + .flow_sig_id = 15032650752UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18560,17 +33359,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [820] = { - .class_hid = BNXT_ULP_CLASS_HID_22131, + [1430] = { + .class_hid = BNXT_ULP_CLASS_HID_1044e, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 6442724352UL, + .hdr_sig_id = 13, + .flow_sig_id = 15032658944UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18582,18 +33382,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [821] = { - .class_hid = BNXT_ULP_CLASS_HID_2adf1, + [1431] = { + .class_hid = BNXT_ULP_CLASS_HID_1546e, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 6443764736UL, + .hdr_sig_id = 13, + .flow_sig_id = 15033699328UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18605,18 +33406,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [822] = { - .class_hid = BNXT_ULP_CLASS_HID_2de71, + [1432] = { + .class_hid = BNXT_ULP_CLASS_HID_1402e, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 6443772928UL, + .hdr_sig_id = 13, + .flow_sig_id = 15033707520UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18628,19 +33430,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [823] = { - .class_hid = BNXT_ULP_CLASS_HID_25e15, + [1433] = { + .class_hid = BNXT_ULP_CLASS_HID_1367e, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 6444813312UL, + .hdr_sig_id = 13, + .flow_sig_id = 15034747904UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18652,18 +33455,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [824] = { - .class_hid = BNXT_ULP_CLASS_HID_27095, + [1434] = { + .class_hid = BNXT_ULP_CLASS_HID_1223e, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 6444821504UL, + .hdr_sig_id = 13, + .flow_sig_id = 15034756096UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18675,19 +33479,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [825] = { - .class_hid = BNXT_ULP_CLASS_HID_2fb55, + [1435] = { + .class_hid = BNXT_ULP_CLASS_HID_1725e, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 6445861888UL, + .hdr_sig_id = 13, + .flow_sig_id = 15035796480UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18699,19 +33504,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [826] = { - .class_hid = BNXT_ULP_CLASS_HID_2edd5, + [1436] = { + .class_hid = BNXT_ULP_CLASS_HID_16e1e, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 6445870080UL, + .hdr_sig_id = 13, + .flow_sig_id = 15035804672UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18723,20 +33529,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT } }, - [827] = { - .class_hid = BNXT_ULP_CLASS_HID_24511, + [1437] = { + .class_hid = BNXT_ULP_CLASS_HID_1172f, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 8590199808UL, + .hdr_sig_id = 13, + .flow_sig_id = 17180134400UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18748,16 +33555,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [828] = { - .class_hid = BNXT_ULP_CLASS_HID_21f51, + [1438] = { + .class_hid = BNXT_ULP_CLASS_HID_103ed, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 8590208000UL, + .hdr_sig_id = 13, + .flow_sig_id = 17180142592UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18769,17 +33576,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [829] = { - .class_hid = BNXT_ULP_CLASS_HID_28b11, + [1439] = { + .class_hid = BNXT_ULP_CLASS_HID_1530b, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 8591248384UL, + .hdr_sig_id = 13, + .flow_sig_id = 17181182976UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18791,17 +33598,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [830] = { - .class_hid = BNXT_ULP_CLASS_HID_2bd99, + [1440] = { + .class_hid = BNXT_ULP_CLASS_HID_14fc9, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 8591256576UL, + .hdr_sig_id = 13, + .flow_sig_id = 17181191168UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18813,18 +33620,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [831] = { - .class_hid = BNXT_ULP_CLASS_HID_254f9, + [1441] = { + .class_hid = BNXT_ULP_CLASS_HID_1351d, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 8592296960UL, + .hdr_sig_id = 13, + .flow_sig_id = 17182231552UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18836,17 +33643,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [832] = { - .class_hid = BNXT_ULP_CLASS_HID_26e31, + [1442] = { + .class_hid = BNXT_ULP_CLASS_HID_121db, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 8592305152UL, + .hdr_sig_id = 13, + .flow_sig_id = 17182239744UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18858,18 +33665,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [833] = { - .class_hid = BNXT_ULP_CLASS_HID_2daf1, + [1443] = { + .class_hid = BNXT_ULP_CLASS_HID_171f9, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 8593345536UL, + .hdr_sig_id = 13, + .flow_sig_id = 17183280128UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18881,18 +33688,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [834] = { - .class_hid = BNXT_ULP_CLASS_HID_2cb79, + [1444] = { + .class_hid = BNXT_ULP_CLASS_HID_16db7, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 8593353728UL, + .hdr_sig_id = 13, + .flow_sig_id = 17183288320UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18904,19 +33711,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [835] = { - .class_hid = BNXT_ULP_CLASS_HID_26dd1, + [1445] = { + .class_hid = BNXT_ULP_CLASS_HID_102bf, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 10737683456UL, + .hdr_sig_id = 13, + .flow_sig_id = 19327618048UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18928,17 +33735,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [836] = { - .class_hid = BNXT_ULP_CLASS_HID_22711, + [1446] = { + .class_hid = BNXT_ULP_CLASS_HID_11edf, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 10737691648UL, + .hdr_sig_id = 13, + .flow_sig_id = 19327626240UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18950,18 +33757,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [837] = { - .class_hid = BNXT_ULP_CLASS_HID_293d1, + [1447] = { + .class_hid = BNXT_ULP_CLASS_HID_14e9b, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 10738732032UL, + .hdr_sig_id = 13, + .flow_sig_id = 19328666624UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18973,18 +33780,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [838] = { - .class_hid = BNXT_ULP_CLASS_HID_2c459, + [1448] = { + .class_hid = BNXT_ULP_CLASS_HID_15abb, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 10738740224UL, + .hdr_sig_id = 13, + .flow_sig_id = 19328674816UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -18996,19 +33803,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [839] = { - .class_hid = BNXT_ULP_CLASS_HID_24419, + [1449] = { + .class_hid = BNXT_ULP_CLASS_HID_120ad, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 10739780608UL, + .hdr_sig_id = 13, + .flow_sig_id = 19329715200UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19020,18 +33827,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [840] = { - .class_hid = BNXT_ULP_CLASS_HID_276f1, + [1450] = { + .class_hid = BNXT_ULP_CLASS_HID_13ccd, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 10739788800UL, + .hdr_sig_id = 13, + .flow_sig_id = 19329723392UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19043,19 +33850,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [841] = { - .class_hid = BNXT_ULP_CLASS_HID_2e2b1, + [1451] = { + .class_hid = BNXT_ULP_CLASS_HID_16c89, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 10740829184UL, + .hdr_sig_id = 13, + .flow_sig_id = 19330763776UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19067,19 +33874,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [842] = { - .class_hid = BNXT_ULP_CLASS_HID_2d339, + [1452] = { + .class_hid = BNXT_ULP_CLASS_HID_1675f, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 10740837376UL, + .hdr_sig_id = 13, + .flow_sig_id = 19330771968UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19091,20 +33898,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [843] = { - .class_hid = BNXT_ULP_CLASS_HID_25931, + [1453] = { + .class_hid = BNXT_ULP_CLASS_HID_10c67, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 12885167104UL, + .hdr_sig_id = 13, + .flow_sig_id = 21475101696UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19116,17 +33923,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [844] = { - .class_hid = BNXT_ULP_CLASS_HID_21371, + [1454] = { + .class_hid = BNXT_ULP_CLASS_HID_11987, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 12885175296UL, + .hdr_sig_id = 13, + .flow_sig_id = 21475109888UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19138,18 +33945,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [845] = { - .class_hid = BNXT_ULP_CLASS_HID_29f31, + [1455] = { + .class_hid = BNXT_ULP_CLASS_HID_1485f, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 12886215680UL, + .hdr_sig_id = 13, + .flow_sig_id = 21476150272UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19161,18 +33968,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [846] = { - .class_hid = BNXT_ULP_CLASS_HID_2b1b1, + [1456] = { + .class_hid = BNXT_ULP_CLASS_HID_1441d, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 12886223872UL, + .hdr_sig_id = 13, + .flow_sig_id = 21476158464UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19184,19 +33991,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [847] = { - .class_hid = BNXT_ULP_CLASS_HID_26891, + [1457] = { + .class_hid = BNXT_ULP_CLASS_HID_12a55, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 12887264256UL, + .hdr_sig_id = 13, + .flow_sig_id = 21477198848UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19208,18 +34015,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [848] = { - .class_hid = BNXT_ULP_CLASS_HID_262d1, + [1458] = { + .class_hid = BNXT_ULP_CLASS_HID_1262f, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 12887272448UL, + .hdr_sig_id = 13, + .flow_sig_id = 21477207040UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19231,19 +34038,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [849] = { - .class_hid = BNXT_ULP_CLASS_HID_2ee91, + [1459] = { + .class_hid = BNXT_ULP_CLASS_HID_1764d, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 12888312832UL, + .hdr_sig_id = 13, + .flow_sig_id = 21478247424UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19255,19 +34062,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [850] = { - .class_hid = BNXT_ULP_CLASS_HID_2df11, + [1460] = { + .class_hid = BNXT_ULP_CLASS_HID_1620f, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 12888321024UL, + .hdr_sig_id = 13, + .flow_sig_id = 21478255616UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19279,20 +34086,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [851] = { - .class_hid = BNXT_ULP_CLASS_HID_20951, + [1461] = { + .class_hid = BNXT_ULP_CLASS_HID_1070f, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 15032650752UL, + .hdr_sig_id = 13, + .flow_sig_id = 23622585344UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19304,18 +34111,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [852] = { - .class_hid = BNXT_ULP_CLASS_HID_23b31, + [1462] = { + .class_hid = BNXT_ULP_CLASS_HID_1132f, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 15032658944UL, + .hdr_sig_id = 13, + .flow_sig_id = 23622593536UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19327,19 +34134,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [853] = { - .class_hid = BNXT_ULP_CLASS_HID_2a7f1, + [1463] = { + .class_hid = BNXT_ULP_CLASS_HID_143ef, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 15033699328UL, + .hdr_sig_id = 13, + .flow_sig_id = 23623633920UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19351,19 +34158,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [854] = { - .class_hid = BNXT_ULP_CLASS_HID_2d871, + [1464] = { + .class_hid = BNXT_ULP_CLASS_HID_15f0f, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 15033707520UL, + .hdr_sig_id = 13, + .flow_sig_id = 23623642112UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19375,20 +34182,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [855] = { - .class_hid = BNXT_ULP_CLASS_HID_25831, + [1465] = { + .class_hid = BNXT_ULP_CLASS_HID_125fd, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 15034747904UL, + .hdr_sig_id = 13, + .flow_sig_id = 23624682496UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19400,19 +34207,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [856] = { - .class_hid = BNXT_ULP_CLASS_HID_24a91, + [1466] = { + .class_hid = BNXT_ULP_CLASS_HID_1311d, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 15034756096UL, + .hdr_sig_id = 13, + .flow_sig_id = 23624690688UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19424,20 +34231,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [857] = { - .class_hid = BNXT_ULP_CLASS_HID_2f551, + [1467] = { + .class_hid = BNXT_ULP_CLASS_HID_161dd, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 15035796480UL, + .hdr_sig_id = 13, + .flow_sig_id = 23625731072UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19449,20 +34256,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [858] = { - .class_hid = BNXT_ULP_CLASS_HID_2e7d1, + [1468] = { + .class_hid = BNXT_ULP_CLASS_HID_17dfd, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 15035804672UL, + .hdr_sig_id = 13, + .flow_sig_id = 23625739264UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19474,21 +34281,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [859] = { - .class_hid = BNXT_ULP_CLASS_HID_2481f, + [1469] = { + .class_hid = BNXT_ULP_CLASS_HID_10acb, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 17180134400UL, + .hdr_sig_id = 13, + .flow_sig_id = 25770068992UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19500,16 +34307,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [860] = { - .class_hid = BNXT_ULP_CLASS_HID_2025b, + [1470] = { + .class_hid = BNXT_ULP_CLASS_HID_10687, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 17180142592UL, + .hdr_sig_id = 13, + .flow_sig_id = 25770077184UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19521,17 +34329,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [861] = { - .class_hid = BNXT_ULP_CLASS_HID_28e1b, + [1471] = { + .class_hid = BNXT_ULP_CLASS_HID_156a7, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 17181182976UL, + .hdr_sig_id = 13, + .flow_sig_id = 25771117568UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19543,17 +34352,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [862] = { - .class_hid = BNXT_ULP_CLASS_HID_2a083, + [1472] = { + .class_hid = BNXT_ULP_CLASS_HID_14163, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 17181191168UL, + .hdr_sig_id = 13, + .flow_sig_id = 25771125760UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19565,18 +34375,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [863] = { - .class_hid = BNXT_ULP_CLASS_HID_257e3, + [1473] = { + .class_hid = BNXT_ULP_CLASS_HID_128b7, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 17182231552UL, + .hdr_sig_id = 13, + .flow_sig_id = 25772166144UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19588,17 +34399,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [864] = { - .class_hid = BNXT_ULP_CLASS_HID_2513f, + [1474] = { + .class_hid = BNXT_ULP_CLASS_HID_12377, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 17182239744UL, + .hdr_sig_id = 13, + .flow_sig_id = 25772174336UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19610,18 +34422,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [865] = { - .class_hid = BNXT_ULP_CLASS_HID_2ddff, + [1475] = { + .class_hid = BNXT_ULP_CLASS_HID_17493, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 17183280128UL, + .hdr_sig_id = 13, + .flow_sig_id = 25773214720UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19633,18 +34446,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [866] = { - .class_hid = BNXT_ULP_CLASS_HID_2ce67, + [1476] = { + .class_hid = BNXT_ULP_CLASS_HID_16f53, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 17183288320UL, + .hdr_sig_id = 13, + .flow_sig_id = 25773222912UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19656,19 +34470,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [867] = { - .class_hid = BNXT_ULP_CLASS_HID_250df, + [1477] = { + .class_hid = BNXT_ULP_CLASS_HID_1045b, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 19327618048UL, + .hdr_sig_id = 13, + .flow_sig_id = 27917552640UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19680,17 +34495,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [868] = { - .class_hid = BNXT_ULP_CLASS_HID_22a1b, + [1478] = { + .class_hid = BNXT_ULP_CLASS_HID_1107b, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 19327626240UL, + .hdr_sig_id = 13, + .flow_sig_id = 27917560832UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19702,18 +34518,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [869] = { - .class_hid = BNXT_ULP_CLASS_HID_296db, + [1479] = { + .class_hid = BNXT_ULP_CLASS_HID_1404f, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 19328666624UL, + .hdr_sig_id = 13, + .flow_sig_id = 27918601216UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19725,18 +34542,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [870] = { - .class_hid = BNXT_ULP_CLASS_HID_2c753, + [1480] = { + .class_hid = BNXT_ULP_CLASS_HID_15c6f, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 19328674816UL, + .hdr_sig_id = 13, + .flow_sig_id = 27918609408UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19748,19 +34566,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [871] = { - .class_hid = BNXT_ULP_CLASS_HID_24777, + [1481] = { + .class_hid = BNXT_ULP_CLASS_HID_1225f, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 19329715200UL, + .hdr_sig_id = 13, + .flow_sig_id = 27919649792UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19772,18 +34591,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [872] = { - .class_hid = BNXT_ULP_CLASS_HID_279ff, + [1482] = { + .class_hid = BNXT_ULP_CLASS_HID_13e7f, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 19329723392UL, + .hdr_sig_id = 13, + .flow_sig_id = 27919657984UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19795,19 +34615,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [873] = { - .class_hid = BNXT_ULP_CLASS_HID_2e5bf, + [1483] = { + .class_hid = BNXT_ULP_CLASS_HID_16e3b, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 19330763776UL, + .hdr_sig_id = 13, + .flow_sig_id = 27920698368UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19819,19 +34640,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [874] = { - .class_hid = BNXT_ULP_CLASS_HID_2d637, + [1484] = { + .class_hid = BNXT_ULP_CLASS_HID_17a5b, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 19330771968UL, + .hdr_sig_id = 13, + .flow_sig_id = 27920706560UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19842,21 +34664,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_IPV4 | BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + .field_sig = { .bits = + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [875] = { - .class_hid = BNXT_ULP_CLASS_HID_25c37, + [1485] = { + .class_hid = BNXT_ULP_CLASS_HID_10f1f, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 21475101696UL, + .hdr_sig_id = 13, + .flow_sig_id = 30065036288UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19868,17 +34691,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [876] = { - .class_hid = BNXT_ULP_CLASS_HID_21673, + [1486] = { + .class_hid = BNXT_ULP_CLASS_HID_11b3f, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 21475109888UL, + .hdr_sig_id = 13, + .flow_sig_id = 30065044480UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19890,18 +34714,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [877] = { - .class_hid = BNXT_ULP_CLASS_HID_28233, + [1487] = { + .class_hid = BNXT_ULP_CLASS_HID_14bff, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 21476150272UL, + .hdr_sig_id = 13, + .flow_sig_id = 30066084864UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19913,18 +34738,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [878] = { - .class_hid = BNXT_ULP_CLASS_HID_2b4a3, + [1488] = { + .class_hid = BNXT_ULP_CLASS_HID_147b7, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 21476158464UL, + .hdr_sig_id = 13, + .flow_sig_id = 30066093056UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19936,19 +34762,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [879] = { - .class_hid = BNXT_ULP_CLASS_HID_26b83, + [1489] = { + .class_hid = BNXT_ULP_CLASS_HID_12d0f, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 21477198848UL, + .hdr_sig_id = 13, + .flow_sig_id = 30067133440UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19960,18 +34787,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [880] = { - .class_hid = BNXT_ULP_CLASS_HID_265d7, + [1490] = { + .class_hid = BNXT_ULP_CLASS_HID_1392f, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 21477207040UL, + .hdr_sig_id = 13, + .flow_sig_id = 30067141632UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -19983,19 +34811,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [881] = { - .class_hid = BNXT_ULP_CLASS_HID_2d197, + [1491] = { + .class_hid = BNXT_ULP_CLASS_HID_169e7, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 21478247424UL, + .hdr_sig_id = 13, + .flow_sig_id = 30068182016UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -20007,19 +34836,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [882] = { - .class_hid = BNXT_ULP_CLASS_HID_2c207, + [1492] = { + .class_hid = BNXT_ULP_CLASS_HID_165a7, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 21478255616UL, + .hdr_sig_id = 13, + .flow_sig_id = 30068190208UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -20031,20 +34861,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [883] = { - .class_hid = BNXT_ULP_CLASS_HID_20db3, + [1493] = { + .class_hid = BNXT_ULP_CLASS_HID_11a0f, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 23622585344UL, + .hdr_sig_id = 13, + .flow_sig_id = 32212519936UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -20056,18 +34887,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [884] = { - .class_hid = BNXT_ULP_CLASS_HID_23e33, + [1494] = { + .class_hid = BNXT_ULP_CLASS_HID_116cf, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 23622593536UL, + .hdr_sig_id = 13, + .flow_sig_id = 32212528128UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -20079,19 +34911,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [885] = { - .class_hid = BNXT_ULP_CLASS_HID_2aaf3, + [1495] = { + .class_hid = BNXT_ULP_CLASS_HID_1468f, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 23623633920UL, + .hdr_sig_id = 13, + .flow_sig_id = 32213568512UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -20103,19 +34936,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [886] = { - .class_hid = BNXT_ULP_CLASS_HID_2db73, + [1496] = { + .class_hid = BNXT_ULP_CLASS_HID_152af, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 23623642112UL, + .hdr_sig_id = 13, + .flow_sig_id = 32213576704UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -20127,20 +34961,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [887] = { - .class_hid = BNXT_ULP_CLASS_HID_25b17, + [1497] = { + .class_hid = BNXT_ULP_CLASS_HID_138ff, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 23624682496UL, + .hdr_sig_id = 13, + .flow_sig_id = 32214617088UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -20152,19 +34987,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [888] = { - .class_hid = BNXT_ULP_CLASS_HID_24d97, + [1498] = { + .class_hid = BNXT_ULP_CLASS_HID_134bf, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 23624690688UL, + .hdr_sig_id = 13, + .flow_sig_id = 32214625280UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -20176,20 +35012,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [889] = { - .class_hid = BNXT_ULP_CLASS_HID_2f857, + [1499] = { + .class_hid = BNXT_ULP_CLASS_HID_1648f, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 23625731072UL, + .hdr_sig_id = 13, + .flow_sig_id = 32215665664UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -20201,20 +35038,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [890] = { - .class_hid = BNXT_ULP_CLASS_HID_2ead7, + [1500] = { + .class_hid = BNXT_ULP_CLASS_HID_170af, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 23625739264UL, + .hdr_sig_id = 13, + .flow_sig_id = 32215673856UL, .flow_pattern_id = 1, .app_sig = 0, .hdr_sig = { .bits = @@ -20226,804 +35064,741 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT } }, - [891] = { - .class_hid = BNXT_ULP_CLASS_HID_2422b, + [1501] = { + .class_hid = BNXT_ULP_CLASS_HID_40c38, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 25770068992UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 66304UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI } }, - [892] = { - .class_hid = BNXT_ULP_CLASS_HID_21c6b, + [1502] = { + .class_hid = BNXT_ULP_CLASS_HID_41c04, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 25770077184UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 68352UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI } }, - [893] = { - .class_hid = BNXT_ULP_CLASS_HID_2882b, + [1503] = { + .class_hid = BNXT_ULP_CLASS_HID_51c48, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 25771117568UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 328448UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_DMAC } }, - [894] = { - .class_hid = BNXT_ULP_CLASS_HID_2ba93, + [1504] = { + .class_hid = BNXT_ULP_CLASS_HID_50332, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 25771125760UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 330496UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_DMAC } }, - [895] = { - .class_hid = BNXT_ULP_CLASS_HID_251f3, + [1505] = { + .class_hid = BNXT_ULP_CLASS_HID_48400, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 25772166144UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 590592UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_SMAC } }, - [896] = { - .class_hid = BNXT_ULP_CLASS_HID_26bcb, + [1506] = { + .class_hid = BNXT_ULP_CLASS_HID_48bea, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 25772174336UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 592640UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_SMAC } }, - [897] = { - .class_hid = BNXT_ULP_CLASS_HID_2d78b, + [1507] = { + .class_hid = BNXT_ULP_CLASS_HID_58b3e, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 25773214720UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 852736UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_SMAC } }, - [898] = { - .class_hid = BNXT_ULP_CLASS_HID_2c873, + [1508] = { + .class_hid = BNXT_ULP_CLASS_HID_59b7a, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 25773222912UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 854784UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_SMAC } }, - [899] = { - .class_hid = BNXT_ULP_CLASS_HID_26afb, + [1509] = { + .class_hid = BNXT_ULP_CLASS_HID_417dc, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 27917552640UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 536937216UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_SRC_ADDR } }, - [900] = { - .class_hid = BNXT_ULP_CLASS_HID_2243b, + [1510] = { + .class_hid = BNXT_ULP_CLASS_HID_40746, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 27917560832UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 536939264UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_SRC_ADDR } }, - [901] = { - .class_hid = BNXT_ULP_CLASS_HID_290fb, + [1511] = { + .class_hid = BNXT_ULP_CLASS_HID_5068a, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 27918601216UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 537199360UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_SRC_ADDR } }, - [902] = { - .class_hid = BNXT_ULP_CLASS_HID_2c153, + [1512] = { + .class_hid = BNXT_ULP_CLASS_HID_516d6, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 27918609408UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 537201408UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_SRC_ADDR } }, - [903] = { - .class_hid = BNXT_ULP_CLASS_HID_24113, + [1513] = { + .class_hid = BNXT_ULP_CLASS_HID_48f42, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 27919649792UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 537461504UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_SRC_ADDR } }, - [904] = { - .class_hid = BNXT_ULP_CLASS_HID_2739b, + [1514] = { + .class_hid = BNXT_ULP_CLASS_HID_49e8e, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 27919657984UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 537463552UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_SRC_ADDR } }, - [905] = { - .class_hid = BNXT_ULP_CLASS_HID_2fe5b, + [1515] = { + .class_hid = BNXT_ULP_CLASS_HID_59ed2, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 27920698368UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 537723648UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_SRC_ADDR } }, - [906] = { - .class_hid = BNXT_ULP_CLASS_HID_2d033, + [1516] = { + .class_hid = BNXT_ULP_CLASS_HID_58d9c, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 27920706560UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 537725696UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_SRC_ADDR } }, - [907] = { - .class_hid = BNXT_ULP_CLASS_HID_256c3, + [1517] = { + .class_hid = BNXT_ULP_CLASS_HID_41a4a, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 30065036288UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 1073808128UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_DST_ADDR } }, - [908] = { - .class_hid = BNXT_ULP_CLASS_HID_21003, + [1518] = { + .class_hid = BNXT_ULP_CLASS_HID_40924, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 30065044480UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 1073810176UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_DST_ADDR } }, - [909] = { - .class_hid = BNXT_ULP_CLASS_HID_29cc3, + [1519] = { + .class_hid = BNXT_ULP_CLASS_HID_50968, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 30066084864UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 1074070272UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_DST_ADDR } }, - [910] = { - .class_hid = BNXT_ULP_CLASS_HID_2ceb3, + [1520] = { + .class_hid = BNXT_ULP_CLASS_HID_51944, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 30066093056UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 1074072320UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_DST_ADDR } }, - [911] = { - .class_hid = BNXT_ULP_CLASS_HID_24d63, + [1521] = { + .class_hid = BNXT_ULP_CLASS_HID_49182, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 30067133440UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 1074332416UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_DST_ADDR } }, - [912] = { - .class_hid = BNXT_ULP_CLASS_HID_27fe3, + [1522] = { + .class_hid = BNXT_ULP_CLASS_HID_4816c, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 30067141632UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 1074334464UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_DST_ADDR } }, - [913] = { - .class_hid = BNXT_ULP_CLASS_HID_2eba3, + [1523] = { + .class_hid = BNXT_ULP_CLASS_HID_58140, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 30068182016UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 1074594560UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_DST_ADDR } }, - [914] = { - .class_hid = BNXT_ULP_CLASS_HID_2dc13, + [1524] = { + .class_hid = BNXT_ULP_CLASS_HID_5908c, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 30068190208UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 1074596608UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_DST_ADDR } }, - [915] = { - .class_hid = BNXT_ULP_CLASS_HID_20653, + [1525] = { + .class_hid = BNXT_ULP_CLASS_HID_40c8c, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 32212519936UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 1610679040UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_DST_ADDR } }, - [916] = { - .class_hid = BNXT_ULP_CLASS_HID_238d3, + [1526] = { + .class_hid = BNXT_ULP_CLASS_HID_41cc8, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 32212528128UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 1610681088UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_DST_ADDR } }, - [917] = { - .class_hid = BNXT_ULP_CLASS_HID_2a493, + [1527] = { + .class_hid = BNXT_ULP_CLASS_HID_51c0c, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 32213568512UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 1610941184UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_DST_ADDR } }, - [918] = { - .class_hid = BNXT_ULP_CLASS_HID_2d573, + [1528] = { + .class_hid = BNXT_ULP_CLASS_HID_50386, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 32213576704UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 1610943232UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_DST_ADDR } }, - [919] = { - .class_hid = BNXT_ULP_CLASS_HID_25533, + [1529] = { + .class_hid = BNXT_ULP_CLASS_HID_484c4, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 32214617088UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 1611203328UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_DST_ADDR } }, - [920] = { - .class_hid = BNXT_ULP_CLASS_HID_247b3, + [1530] = { + .class_hid = BNXT_ULP_CLASS_HID_48b8e, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 32214625280UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 1611205376UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_DST_ADDR } }, - [921] = { - .class_hid = BNXT_ULP_CLASS_HID_2f273, + [1531] = { + .class_hid = BNXT_ULP_CLASS_HID_58b82, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 32215665664UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 1611465472UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_DST_ADDR } }, - [922] = { - .class_hid = BNXT_ULP_CLASS_HID_2cdb3, + [1532] = { + .class_hid = BNXT_ULP_CLASS_HID_59bce, .class_tid = 2, - .hdr_sig_id = 6, - .flow_sig_id = 32215673856UL, - .flow_pattern_id = 1, + .hdr_sig_id = 14, + .flow_sig_id = 1611467520UL, + .flow_pattern_id = 2, .app_sig = 0, .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_HDR_BIT_I_ETH | BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT } + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_DST_ADDR } }, - [923] = { - .class_hid = BNXT_ULP_CLASS_HID_25c7d, + [1533] = { + .class_hid = BNXT_ULP_CLASS_HID_10a54, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 265216UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21036,14 +35811,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI } }, - [924] = { - .class_hid = BNXT_ULP_CLASS_HID_21239, + [1534] = { + .class_hid = BNXT_ULP_CLASS_HID_11e74, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 273408UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21056,15 +35831,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI } }, - [925] = { - .class_hid = BNXT_ULP_CLASS_HID_2ff35, + [1535] = { + .class_hid = BNXT_ULP_CLASS_HID_14e48, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 1313792UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21077,15 +35852,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC } }, - [926] = { - .class_hid = BNXT_ULP_CLASS_HID_2b4f1, + [1536] = { + .class_hid = BNXT_ULP_CLASS_HID_15268, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 1321984UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21098,16 +35873,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC } }, - [927] = { - .class_hid = BNXT_ULP_CLASS_HID_24d91, + [1537] = { + .class_hid = BNXT_ULP_CLASS_HID_1285a, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 2362368UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21120,15 +35895,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC } }, - [928] = { - .class_hid = BNXT_ULP_CLASS_HID_2435d, + [1538] = { + .class_hid = BNXT_ULP_CLASS_HID_13c7a, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 2370560UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21141,16 +35916,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC } }, - [929] = { - .class_hid = BNXT_ULP_CLASS_HID_2d79d, + [1539] = { + .class_hid = BNXT_ULP_CLASS_HID_163be, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 3410944UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21163,16 +35938,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC } }, - [930] = { - .class_hid = BNXT_ULP_CLASS_HID_2e615, + [1540] = { + .class_hid = BNXT_ULP_CLASS_HID_1705e, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 3419136UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21185,17 +35960,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC } }, - [931] = { - .class_hid = BNXT_ULP_CLASS_HID_244ad, + [1541] = { + .class_hid = BNXT_ULP_CLASS_HID_11d5e, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 2147748864UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21208,15 +35983,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_SRC_ADDR } }, - [932] = { - .class_hid = BNXT_ULP_CLASS_HID_23a69, + [1542] = { + .class_hid = BNXT_ULP_CLASS_HID_1009c, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 2147757056UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21229,16 +36004,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_SRC_ADDR } }, - [933] = { - .class_hid = BNXT_ULP_CLASS_HID_28ea9, + [1543] = { + .class_hid = BNXT_ULP_CLASS_HID_150ba, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 2148797440UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21251,16 +36026,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_SRC_ADDR } }, - [934] = { - .class_hid = BNXT_ULP_CLASS_HID_2dd21, + [1544] = { + .class_hid = BNXT_ULP_CLASS_HID_144f8, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 2148805632UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21273,17 +36048,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_SRC_ADDR } }, - [935] = { - .class_hid = BNXT_ULP_CLASS_HID_25d05, + [1545] = { + .class_hid = BNXT_ULP_CLASS_HID_1334c, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 2149846016UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21296,16 +36071,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_SRC_ADDR } }, - [936] = { - .class_hid = BNXT_ULP_CLASS_HID_26b8d, + [1546] = { + .class_hid = BNXT_ULP_CLASS_HID_1268a, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 2149854208UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21318,17 +36093,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_SRC_ADDR } }, - [937] = { - .class_hid = BNXT_ULP_CLASS_HID_2ffcd, + [1547] = { + .class_hid = BNXT_ULP_CLASS_HID_176a8, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 2150894592UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21341,17 +36116,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_SRC_ADDR } }, - [938] = { - .class_hid = BNXT_ULP_CLASS_HID_2ce45, + [1548] = { + .class_hid = BNXT_ULP_CLASS_HID_17aee, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 2150902784UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21364,18 +36139,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_SRC_ADDR } }, - [939] = { - .class_hid = BNXT_ULP_CLASS_HID_2485d, + [1549] = { + .class_hid = BNXT_ULP_CLASS_HID_11782, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 4295232512UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21388,15 +36163,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_DST_ADDR } }, - [940] = { - .class_hid = BNXT_ULP_CLASS_HID_20e19, + [1550] = { + .class_hid = BNXT_ULP_CLASS_HID_11bc0, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 4295240704UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21409,16 +36184,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_DST_ADDR } }, - [941] = { - .class_hid = BNXT_ULP_CLASS_HID_29259, + [1551] = { + .class_hid = BNXT_ULP_CLASS_HID_14b00, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 4296281088UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21431,16 +36206,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_DST_ADDR } }, - [942] = { - .class_hid = BNXT_ULP_CLASS_HID_2a0d9, + [1552] = { + .class_hid = BNXT_ULP_CLASS_HID_15f20, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 4296289280UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21453,17 +36228,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_DST_ADDR } }, - [943] = { - .class_hid = BNXT_ULP_CLASS_HID_279f9, + [1553] = { + .class_hid = BNXT_ULP_CLASS_HID_135f0, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 4297329664UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21476,16 +36251,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_DST_ADDR } }, - [944] = { - .class_hid = BNXT_ULP_CLASS_HID_27fbd, + [1554] = { + .class_hid = BNXT_ULP_CLASS_HID_13932, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 4297337856UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21498,17 +36273,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_DST_ADDR } }, - [945] = { - .class_hid = BNXT_ULP_CLASS_HID_2c3fd, + [1555] = { + .class_hid = BNXT_ULP_CLASS_HID_1690a, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 4298378240UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21521,17 +36296,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_DST_ADDR } }, - [946] = { - .class_hid = BNXT_ULP_CLASS_HID_2d27d, + [1556] = { + .class_hid = BNXT_ULP_CLASS_HID_17d2a, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 4298386432UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21544,18 +36319,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_DST_ADDR } }, - [947] = { - .class_hid = BNXT_ULP_CLASS_HID_2708d, + [1557] = { + .class_hid = BNXT_ULP_CLASS_HID_11a2a, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 6442716160UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21568,16 +36343,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_DST_ADDR } }, - [948] = { - .class_hid = BNXT_ULP_CLASS_HID_23649, + [1558] = { + .class_hid = BNXT_ULP_CLASS_HID_10e68, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 6442724352UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21590,17 +36365,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_DST_ADDR } }, - [949] = { - .class_hid = BNXT_ULP_CLASS_HID_2ba89, + [1559] = { + .class_hid = BNXT_ULP_CLASS_HID_15e0a, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 6443764736UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21613,17 +36388,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_DST_ADDR } }, - [950] = { - .class_hid = BNXT_ULP_CLASS_HID_2c909, + [1560] = { + .class_hid = BNXT_ULP_CLASS_HID_14248, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 6443772928UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21636,18 +36411,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_DST_ADDR } }, - [951] = { - .class_hid = BNXT_ULP_CLASS_HID_2496d, + [1561] = { + .class_hid = BNXT_ULP_CLASS_HID_13818, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 6444813312UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21660,17 +36435,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_DST_ADDR } }, - [952] = { - .class_hid = BNXT_ULP_CLASS_HID_267ed, + [1562] = { + .class_hid = BNXT_ULP_CLASS_HID_12c5a, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 6444821504UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21683,18 +36458,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_DST_ADDR } }, - [953] = { - .class_hid = BNXT_ULP_CLASS_HID_2ec2d, + [1563] = { + .class_hid = BNXT_ULP_CLASS_HID_17c78, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 6445861888UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21707,18 +36482,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_DST_ADDR } }, - [954] = { - .class_hid = BNXT_ULP_CLASS_HID_2faad, + [1564] = { + .class_hid = BNXT_ULP_CLASS_HID_167ba, .class_tid = 2, - .hdr_sig_id = 7, + .hdr_sig_id = 15, .flow_sig_id = 6445870080UL, .flow_pattern_id = 2, .app_sig = 0, @@ -21731,17 +36506,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_ICMP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR } + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_DST_ADDR } }, - [955] = { - .class_hid = BNXT_ULP_CLASS_HID_34c6, + [1565] = { + .class_hid = BNXT_ULP_CLASS_HID_1f91, .class_tid = 3, .hdr_sig_id = 0, .flow_sig_id = 4096UL, @@ -21755,8 +36530,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_0_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_0_BITMASK_O_IPV6_DST_ADDR } }, - [956] = { - .class_hid = BNXT_ULP_CLASS_HID_0c22, + [1566] = { + .class_hid = BNXT_ULP_CLASS_HID_0763, .class_tid = 3, .hdr_sig_id = 0, .flow_sig_id = 4100UL, @@ -21771,8 +36546,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_0_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_0_BITMASK_O_IPV6_DST_ADDR } }, - [957] = { - .class_hid = BNXT_ULP_CLASS_HID_1cbe, + [1567] = { + .class_hid = BNXT_ULP_CLASS_HID_0f7b, .class_tid = 3, .hdr_sig_id = 0, .flow_sig_id = 6144UL, @@ -21787,8 +36562,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_0_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_0_BITMASK_O_IPV6_DST_ADDR } }, - [958] = { - .class_hid = BNXT_ULP_CLASS_HID_179a, + [1568] = { + .class_hid = BNXT_ULP_CLASS_HID_16af, .class_tid = 3, .hdr_sig_id = 0, .flow_sig_id = 6148UL, @@ -21804,8 +36579,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_0_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_0_BITMASK_O_IPV6_DST_ADDR } }, - [959] = { - .class_hid = BNXT_ULP_CLASS_HID_59be, + [1569] = { + .class_hid = BNXT_ULP_CLASS_HID_1daf, .class_tid = 3, .hdr_sig_id = 1, .flow_sig_id = 16384UL, @@ -21819,8 +36594,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_1_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_1_BITMASK_O_IPV4_DST_ADDR } }, - [960] = { - .class_hid = BNXT_ULP_CLASS_HID_515a, + [1570] = { + .class_hid = BNXT_ULP_CLASS_HID_0539, .class_tid = 3, .hdr_sig_id = 1, .flow_sig_id = 16388UL, @@ -21835,8 +36610,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_1_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_1_BITMASK_O_IPV4_DST_ADDR } }, - [961] = { - .class_hid = BNXT_ULP_CLASS_HID_1c72, + [1571] = { + .class_hid = BNXT_ULP_CLASS_HID_01ed, .class_tid = 3, .hdr_sig_id = 1, .flow_sig_id = 24576UL, @@ -21851,8 +36626,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_1_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_1_BITMASK_O_IPV4_DST_ADDR } }, - [962] = { - .class_hid = BNXT_ULP_CLASS_HID_171e, + [1572] = { + .class_hid = BNXT_ULP_CLASS_HID_097f, .class_tid = 3, .hdr_sig_id = 1, .flow_sig_id = 24580UL, @@ -21868,8 +36643,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_1_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_1_BITMASK_O_IPV4_DST_ADDR } }, - [963] = { - .class_hid = BNXT_ULP_CLASS_HID_19c8, + [1573] = { + .class_hid = BNXT_ULP_CLASS_HID_81ab8, .class_tid = 3, .hdr_sig_id = 2, .flow_sig_id = 32768UL, @@ -21884,8 +36659,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_2_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_DST_ADDR } }, - [964] = { - .class_hid = BNXT_ULP_CLASS_HID_112c, + [1574] = { + .class_hid = BNXT_ULP_CLASS_HID_8020e, .class_tid = 3, .hdr_sig_id = 2, .flow_sig_id = 32772UL, @@ -21901,8 +36676,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_2_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_DST_ADDR } }, - [965] = { - .class_hid = BNXT_ULP_CLASS_HID_4d68, + [1575] = { + .class_hid = BNXT_ULP_CLASS_HID_815d8, .class_tid = 3, .hdr_sig_id = 2, .flow_sig_id = 32832UL, @@ -21918,8 +36693,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_2_BITMASK_OO_VLAN_VID | BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_DST_ADDR } }, - [966] = { - .class_hid = BNXT_ULP_CLASS_HID_444c, + [1576] = { + .class_hid = BNXT_ULP_CLASS_HID_81cae, .class_tid = 3, .hdr_sig_id = 2, .flow_sig_id = 32836UL, @@ -21936,8 +36711,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_2_BITMASK_OO_VLAN_VID | BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_DST_ADDR } }, - [967] = { - .class_hid = BNXT_ULP_CLASS_HID_0e8c, + [1577] = { + .class_hid = BNXT_ULP_CLASS_HID_810a8, .class_tid = 3, .hdr_sig_id = 2, .flow_sig_id = 49152UL, @@ -21953,8 +36728,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_DST_ADDR } }, - [968] = { - .class_hid = BNXT_ULP_CLASS_HID_09e0, + [1578] = { + .class_hid = BNXT_ULP_CLASS_HID_8183e, .class_tid = 3, .hdr_sig_id = 2, .flow_sig_id = 49156UL, @@ -21971,8 +36746,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_DST_ADDR } }, - [969] = { - .class_hid = BNXT_ULP_CLASS_HID_1af0, + [1579] = { + .class_hid = BNXT_ULP_CLASS_HID_8036a, .class_tid = 3, .hdr_sig_id = 2, .flow_sig_id = 49216UL, @@ -21989,8 +36764,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_DST_ADDR } }, - [970] = { - .class_hid = BNXT_ULP_CLASS_HID_15d4, + [1580] = { + .class_hid = BNXT_ULP_CLASS_HID_80af8, .class_tid = 3, .hdr_sig_id = 2, .flow_sig_id = 49220UL, @@ -22008,8 +36783,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_DST_ADDR } }, - [971] = { - .class_hid = BNXT_ULP_CLASS_HID_1dd0, + [1581] = { + .class_hid = BNXT_ULP_CLASS_HID_206fe, .class_tid = 3, .hdr_sig_id = 3, .flow_sig_id = 131072UL, @@ -22024,8 +36799,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_3_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_DST_ADDR } }, - [972] = { - .class_hid = BNXT_ULP_CLASS_HID_14f4, + [1582] = { + .class_hid = BNXT_ULP_CLASS_HID_20e4c, .class_tid = 3, .hdr_sig_id = 3, .flow_sig_id = 131076UL, @@ -22041,8 +36816,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_3_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_DST_ADDR } }, - [973] = { - .class_hid = BNXT_ULP_CLASS_HID_70b0, + [1583] = { + .class_hid = BNXT_ULP_CLASS_HID_2111e, .class_tid = 3, .hdr_sig_id = 3, .flow_sig_id = 131136UL, @@ -22058,8 +36833,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_3_BITMASK_OO_VLAN_VID | BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_DST_ADDR } }, - [974] = { - .class_hid = BNXT_ULP_CLASS_HID_4854, + [1584] = { + .class_hid = BNXT_ULP_CLASS_HID_218ec, .class_tid = 3, .hdr_sig_id = 3, .flow_sig_id = 131140UL, @@ -22076,8 +36851,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_3_BITMASK_OO_VLAN_VID | BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_DST_ADDR } }, - [975] = { - .class_hid = BNXT_ULP_CLASS_HID_3dd4, + [1585] = { + .class_hid = BNXT_ULP_CLASS_HID_60472, .class_tid = 3, .hdr_sig_id = 3, .flow_sig_id = 196608UL, @@ -22093,8 +36868,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_DST_ADDR } }, - [976] = { - .class_hid = BNXT_ULP_CLASS_HID_34f8, + [1586] = { + .class_hid = BNXT_ULP_CLASS_HID_603c0, .class_tid = 3, .hdr_sig_id = 3, .flow_sig_id = 196612UL, @@ -22111,8 +36886,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_DST_ADDR } }, - [977] = { - .class_hid = BNXT_ULP_CLASS_HID_09e8, + [1587] = { + .class_hid = BNXT_ULP_CLASS_HID_61692, .class_tid = 3, .hdr_sig_id = 3, .flow_sig_id = 196672UL, @@ -22129,8 +36904,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_DST_ADDR } }, - [978] = { - .class_hid = BNXT_ULP_CLASS_HID_008c, + [1588] = { + .class_hid = BNXT_ULP_CLASS_HID_61e60, .class_tid = 3, .hdr_sig_id = 3, .flow_sig_id = 196676UL, @@ -22148,8 +36923,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_DST_ADDR } }, - [979] = { - .class_hid = BNXT_ULP_CLASS_HID_34e6, + [1589] = { + .class_hid = BNXT_ULP_CLASS_HID_1f81, .class_tid = 3, .hdr_sig_id = 4, .flow_sig_id = 4096UL, @@ -22164,8 +36939,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_4_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR } }, - [980] = { - .class_hid = BNXT_ULP_CLASS_HID_0c02, + [1590] = { + .class_hid = BNXT_ULP_CLASS_HID_0773, .class_tid = 3, .hdr_sig_id = 4, .flow_sig_id = 4100UL, @@ -22181,8 +36956,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_4_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR } }, - [981] = { - .class_hid = BNXT_ULP_CLASS_HID_1c9e, + [1591] = { + .class_hid = BNXT_ULP_CLASS_HID_0f6b, .class_tid = 3, .hdr_sig_id = 4, .flow_sig_id = 6144UL, @@ -22198,8 +36973,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR } }, - [982] = { - .class_hid = BNXT_ULP_CLASS_HID_17ba, + [1592] = { + .class_hid = BNXT_ULP_CLASS_HID_16bf, .class_tid = 3, .hdr_sig_id = 4, .flow_sig_id = 6148UL, @@ -22216,8 +36991,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR } }, - [983] = { - .class_hid = BNXT_ULP_CLASS_HID_429e, + [1593] = { + .class_hid = BNXT_ULP_CLASS_HID_03cf, .class_tid = 3, .hdr_sig_id = 4, .flow_sig_id = 12288UL, @@ -22233,8 +37008,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_SRC_PORT } }, - [984] = { - .class_hid = BNXT_ULP_CLASS_HID_5dba, + [1594] = { + .class_hid = BNXT_ULP_CLASS_HID_0ab1, .class_tid = 3, .hdr_sig_id = 4, .flow_sig_id = 12292UL, @@ -22251,8 +37026,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_SRC_PORT } }, - [985] = { - .class_hid = BNXT_ULP_CLASS_HID_2a16, + [1595] = { + .class_hid = BNXT_ULP_CLASS_HID_130b, .class_tid = 3, .hdr_sig_id = 4, .flow_sig_id = 14336UL, @@ -22269,8 +37044,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_SRC_PORT } }, - [986] = { - .class_hid = BNXT_ULP_CLASS_HID_2532, + [1596] = { + .class_hid = BNXT_ULP_CLASS_HID_1afd, .class_tid = 3, .hdr_sig_id = 4, .flow_sig_id = 14340UL, @@ -22288,8 +37063,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_SRC_PORT } }, - [987] = { - .class_hid = BNXT_ULP_CLASS_HID_2da2, + [1597] = { + .class_hid = BNXT_ULP_CLASS_HID_1591, .class_tid = 3, .hdr_sig_id = 4, .flow_sig_id = 20480UL, @@ -22305,8 +37080,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_DST_PORT } }, - [988] = { - .class_hid = BNXT_ULP_CLASS_HID_24fe, + [1598] = { + .class_hid = BNXT_ULP_CLASS_HID_1d03, .class_tid = 3, .hdr_sig_id = 4, .flow_sig_id = 20484UL, @@ -22323,8 +37098,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_DST_PORT } }, - [989] = { - .class_hid = BNXT_ULP_CLASS_HID_355a, + [1599] = { + .class_hid = BNXT_ULP_CLASS_HID_057b, .class_tid = 3, .hdr_sig_id = 4, .flow_sig_id = 22528UL, @@ -22341,8 +37116,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_DST_PORT } }, - [990] = { - .class_hid = BNXT_ULP_CLASS_HID_0c76, + [1600] = { + .class_hid = BNXT_ULP_CLASS_HID_0ced, .class_tid = 3, .hdr_sig_id = 4, .flow_sig_id = 22532UL, @@ -22360,8 +37135,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_DST_PORT } }, - [991] = { - .class_hid = BNXT_ULP_CLASS_HID_13e6, + [1601] = { + .class_hid = BNXT_ULP_CLASS_HID_19df, .class_tid = 3, .hdr_sig_id = 4, .flow_sig_id = 28672UL, @@ -22378,8 +37153,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_DST_PORT } }, - [992] = { - .class_hid = BNXT_ULP_CLASS_HID_7276, + [1602] = { + .class_hid = BNXT_ULP_CLASS_HID_0141, .class_tid = 3, .hdr_sig_id = 4, .flow_sig_id = 28676UL, @@ -22397,8 +37172,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_DST_PORT } }, - [993] = { - .class_hid = BNXT_ULP_CLASS_HID_42d2, + [1603] = { + .class_hid = BNXT_ULP_CLASS_HID_08b9, .class_tid = 3, .hdr_sig_id = 4, .flow_sig_id = 30720UL, @@ -22416,8 +37191,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_DST_PORT } }, - [994] = { - .class_hid = BNXT_ULP_CLASS_HID_5dee, + [1604] = { + .class_hid = BNXT_ULP_CLASS_HID_108d, .class_tid = 3, .hdr_sig_id = 4, .flow_sig_id = 30724UL, @@ -22436,8 +37211,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_DST_PORT } }, - [995] = { - .class_hid = BNXT_ULP_CLASS_HID_59de, + [1605] = { + .class_hid = BNXT_ULP_CLASS_HID_1dbf, .class_tid = 3, .hdr_sig_id = 5, .flow_sig_id = 16384UL, @@ -22452,8 +37227,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_5_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR } }, - [996] = { - .class_hid = BNXT_ULP_CLASS_HID_513a, + [1606] = { + .class_hid = BNXT_ULP_CLASS_HID_0529, .class_tid = 3, .hdr_sig_id = 5, .flow_sig_id = 16388UL, @@ -22469,8 +37244,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_5_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR } }, - [997] = { - .class_hid = BNXT_ULP_CLASS_HID_1c12, + [1607] = { + .class_hid = BNXT_ULP_CLASS_HID_01fd, .class_tid = 3, .hdr_sig_id = 5, .flow_sig_id = 24576UL, @@ -22486,8 +37261,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR } }, - [998] = { - .class_hid = BNXT_ULP_CLASS_HID_177e, + [1608] = { + .class_hid = BNXT_ULP_CLASS_HID_096f, .class_tid = 3, .hdr_sig_id = 5, .flow_sig_id = 24580UL, @@ -22504,8 +37279,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR } }, - [999] = { - .class_hid = BNXT_ULP_CLASS_HID_0e92, + [1609] = { + .class_hid = BNXT_ULP_CLASS_HID_810b7, .class_tid = 3, .hdr_sig_id = 5, .flow_sig_id = 49152UL, @@ -22521,8 +37296,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_SRC_PORT } }, - [1000] = { - .class_hid = BNXT_ULP_CLASS_HID_09fe, + [1610] = { + .class_hid = BNXT_ULP_CLASS_HID_81821, .class_tid = 3, .hdr_sig_id = 5, .flow_sig_id = 49156UL, @@ -22539,8 +37314,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_SRC_PORT } }, - [1001] = { - .class_hid = BNXT_ULP_CLASS_HID_5c1a, + [1611] = { + .class_hid = BNXT_ULP_CLASS_HID_804f5, .class_tid = 3, .hdr_sig_id = 5, .flow_sig_id = 57344UL, @@ -22557,8 +37332,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_SRC_PORT } }, - [1002] = { - .class_hid = BNXT_ULP_CLASS_HID_5746, + [1612] = { + .class_hid = BNXT_ULP_CLASS_HID_80c67, .class_tid = 3, .hdr_sig_id = 5, .flow_sig_id = 57348UL, @@ -22576,8 +37351,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_SRC_PORT } }, - [1003] = { - .class_hid = BNXT_ULP_CLASS_HID_79da, + [1613] = { + .class_hid = BNXT_ULP_CLASS_HID_41333, .class_tid = 3, .hdr_sig_id = 5, .flow_sig_id = 81920UL, @@ -22593,8 +37368,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_DST_PORT } }, - [1004] = { - .class_hid = BNXT_ULP_CLASS_HID_7106, + [1614] = { + .class_hid = BNXT_ULP_CLASS_HID_41aad, .class_tid = 3, .hdr_sig_id = 5, .flow_sig_id = 81924UL, @@ -22611,8 +37386,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_DST_PORT } }, - [1005] = { - .class_hid = BNXT_ULP_CLASS_HID_3c1e, + [1615] = { + .class_hid = BNXT_ULP_CLASS_HID_40771, .class_tid = 3, .hdr_sig_id = 5, .flow_sig_id = 90112UL, @@ -22629,8 +37404,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_DST_PORT } }, - [1006] = { - .class_hid = BNXT_ULP_CLASS_HID_377a, + [1616] = { + .class_hid = BNXT_ULP_CLASS_HID_40ee3, .class_tid = 3, .hdr_sig_id = 5, .flow_sig_id = 90116UL, @@ -22648,8 +37423,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_DST_PORT } }, - [1007] = { - .class_hid = BNXT_ULP_CLASS_HID_2e9e, + [1617] = { + .class_hid = BNXT_ULP_CLASS_HID_c16cb, .class_tid = 3, .hdr_sig_id = 5, .flow_sig_id = 114688UL, @@ -22666,8 +37441,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_DST_PORT } }, - [1008] = { - .class_hid = BNXT_ULP_CLASS_HID_29fa, + [1618] = { + .class_hid = BNXT_ULP_CLASS_HID_c1da5, .class_tid = 3, .hdr_sig_id = 5, .flow_sig_id = 114692UL, @@ -22685,8 +37460,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_DST_PORT } }, - [1009] = { - .class_hid = BNXT_ULP_CLASS_HID_14d2, + [1619] = { + .class_hid = BNXT_ULP_CLASS_HID_c1a09, .class_tid = 3, .hdr_sig_id = 5, .flow_sig_id = 122880UL, @@ -22704,8 +37479,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_DST_PORT } }, - [1010] = { - .class_hid = BNXT_ULP_CLASS_HID_7742, + [1620] = { + .class_hid = BNXT_ULP_CLASS_HID_c01fb, .class_tid = 3, .hdr_sig_id = 5, .flow_sig_id = 122884UL, @@ -22724,8 +37499,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_DST_PORT } }, - [1011] = { - .class_hid = BNXT_ULP_CLASS_HID_3706, + [1621] = { + .class_hid = BNXT_ULP_CLASS_HID_1ff1, .class_tid = 3, .hdr_sig_id = 6, .flow_sig_id = 4096UL, @@ -22740,8 +37515,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_6_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR } }, - [1012] = { - .class_hid = BNXT_ULP_CLASS_HID_0fe2, + [1622] = { + .class_hid = BNXT_ULP_CLASS_HID_0703, .class_tid = 3, .hdr_sig_id = 6, .flow_sig_id = 4100UL, @@ -22757,8 +37532,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_6_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR } }, - [1013] = { - .class_hid = BNXT_ULP_CLASS_HID_1f7e, + [1623] = { + .class_hid = BNXT_ULP_CLASS_HID_0f1b, .class_tid = 3, .hdr_sig_id = 6, .flow_sig_id = 6144UL, @@ -22774,8 +37549,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR } }, - [1014] = { - .class_hid = BNXT_ULP_CLASS_HID_145a, + [1624] = { + .class_hid = BNXT_ULP_CLASS_HID_16cf, .class_tid = 3, .hdr_sig_id = 6, .flow_sig_id = 6148UL, @@ -22792,8 +37567,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR } }, - [1015] = { - .class_hid = BNXT_ULP_CLASS_HID_417e, + [1625] = { + .class_hid = BNXT_ULP_CLASS_HID_03bf, .class_tid = 3, .hdr_sig_id = 6, .flow_sig_id = 12288UL, @@ -22809,8 +37584,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_SRC_PORT } }, - [1016] = { - .class_hid = BNXT_ULP_CLASS_HID_5e5a, + [1626] = { + .class_hid = BNXT_ULP_CLASS_HID_0ac1, .class_tid = 3, .hdr_sig_id = 6, .flow_sig_id = 12292UL, @@ -22827,8 +37602,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_SRC_PORT } }, - [1017] = { - .class_hid = BNXT_ULP_CLASS_HID_29f6, + [1627] = { + .class_hid = BNXT_ULP_CLASS_HID_137b, .class_tid = 3, .hdr_sig_id = 6, .flow_sig_id = 14336UL, @@ -22845,8 +37620,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_SRC_PORT } }, - [1018] = { - .class_hid = BNXT_ULP_CLASS_HID_26d2, + [1628] = { + .class_hid = BNXT_ULP_CLASS_HID_1a8d, .class_tid = 3, .hdr_sig_id = 6, .flow_sig_id = 14340UL, @@ -22864,8 +37639,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_SRC_PORT } }, - [1019] = { - .class_hid = BNXT_ULP_CLASS_HID_2e42, + [1629] = { + .class_hid = BNXT_ULP_CLASS_HID_15e1, .class_tid = 3, .hdr_sig_id = 6, .flow_sig_id = 20480UL, @@ -22881,8 +37656,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_DST_PORT } }, - [1020] = { - .class_hid = BNXT_ULP_CLASS_HID_271e, + [1630] = { + .class_hid = BNXT_ULP_CLASS_HID_1d73, .class_tid = 3, .hdr_sig_id = 6, .flow_sig_id = 20484UL, @@ -22899,8 +37674,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_DST_PORT } }, - [1021] = { - .class_hid = BNXT_ULP_CLASS_HID_36ba, + [1631] = { + .class_hid = BNXT_ULP_CLASS_HID_050b, .class_tid = 3, .hdr_sig_id = 6, .flow_sig_id = 22528UL, @@ -22917,8 +37692,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_DST_PORT } }, - [1022] = { - .class_hid = BNXT_ULP_CLASS_HID_0f96, + [1632] = { + .class_hid = BNXT_ULP_CLASS_HID_0c9d, .class_tid = 3, .hdr_sig_id = 6, .flow_sig_id = 22532UL, @@ -22936,8 +37711,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_DST_PORT } }, - [1023] = { - .class_hid = BNXT_ULP_CLASS_HID_1006, + [1633] = { + .class_hid = BNXT_ULP_CLASS_HID_19af, .class_tid = 3, .hdr_sig_id = 6, .flow_sig_id = 28672UL, @@ -22954,8 +37729,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_DST_PORT } }, - [1024] = { - .class_hid = BNXT_ULP_CLASS_HID_7196, + [1634] = { + .class_hid = BNXT_ULP_CLASS_HID_0131, .class_tid = 3, .hdr_sig_id = 6, .flow_sig_id = 28676UL, @@ -22973,8 +37748,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_DST_PORT } }, - [1025] = { - .class_hid = BNXT_ULP_CLASS_HID_4132, + [1635] = { + .class_hid = BNXT_ULP_CLASS_HID_08c9, .class_tid = 3, .hdr_sig_id = 6, .flow_sig_id = 30720UL, @@ -22992,8 +37767,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_DST_PORT } }, - [1026] = { - .class_hid = BNXT_ULP_CLASS_HID_5e0e, + [1636] = { + .class_hid = BNXT_ULP_CLASS_HID_10fd, .class_tid = 3, .hdr_sig_id = 6, .flow_sig_id = 30724UL, @@ -23012,8 +37787,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_DST_PORT } }, - [1027] = { - .class_hid = BNXT_ULP_CLASS_HID_59fe, + [1637] = { + .class_hid = BNXT_ULP_CLASS_HID_1dcf, .class_tid = 3, .hdr_sig_id = 7, .flow_sig_id = 16384UL, @@ -23028,8 +37803,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_7_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR } }, - [1028] = { - .class_hid = BNXT_ULP_CLASS_HID_511a, + [1638] = { + .class_hid = BNXT_ULP_CLASS_HID_0559, .class_tid = 3, .hdr_sig_id = 7, .flow_sig_id = 16388UL, @@ -23045,8 +37820,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_7_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR } }, - [1029] = { - .class_hid = BNXT_ULP_CLASS_HID_1c32, + [1639] = { + .class_hid = BNXT_ULP_CLASS_HID_018d, .class_tid = 3, .hdr_sig_id = 7, .flow_sig_id = 24576UL, @@ -23062,8 +37837,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR } }, - [1030] = { - .class_hid = BNXT_ULP_CLASS_HID_175e, + [1640] = { + .class_hid = BNXT_ULP_CLASS_HID_091f, .class_tid = 3, .hdr_sig_id = 7, .flow_sig_id = 24580UL, @@ -23080,8 +37855,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR } }, - [1031] = { - .class_hid = BNXT_ULP_CLASS_HID_0eb2, + [1641] = { + .class_hid = BNXT_ULP_CLASS_HID_810c7, .class_tid = 3, .hdr_sig_id = 7, .flow_sig_id = 49152UL, @@ -23097,8 +37872,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_SRC_PORT } }, - [1032] = { - .class_hid = BNXT_ULP_CLASS_HID_09de, + [1642] = { + .class_hid = BNXT_ULP_CLASS_HID_81851, .class_tid = 3, .hdr_sig_id = 7, .flow_sig_id = 49156UL, @@ -23115,8 +37890,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_SRC_PORT } }, - [1033] = { - .class_hid = BNXT_ULP_CLASS_HID_5c3a, + [1643] = { + .class_hid = BNXT_ULP_CLASS_HID_80485, .class_tid = 3, .hdr_sig_id = 7, .flow_sig_id = 57344UL, @@ -23133,8 +37908,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_SRC_PORT } }, - [1034] = { - .class_hid = BNXT_ULP_CLASS_HID_5766, + [1644] = { + .class_hid = BNXT_ULP_CLASS_HID_80c17, .class_tid = 3, .hdr_sig_id = 7, .flow_sig_id = 57348UL, @@ -23152,8 +37927,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_SRC_PORT } }, - [1035] = { - .class_hid = BNXT_ULP_CLASS_HID_79fa, + [1645] = { + .class_hid = BNXT_ULP_CLASS_HID_41343, .class_tid = 3, .hdr_sig_id = 7, .flow_sig_id = 81920UL, @@ -23169,8 +37944,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_DST_PORT } }, - [1036] = { - .class_hid = BNXT_ULP_CLASS_HID_7126, + [1646] = { + .class_hid = BNXT_ULP_CLASS_HID_41add, .class_tid = 3, .hdr_sig_id = 7, .flow_sig_id = 81924UL, @@ -23187,8 +37962,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_DST_PORT } }, - [1037] = { - .class_hid = BNXT_ULP_CLASS_HID_3c3e, + [1647] = { + .class_hid = BNXT_ULP_CLASS_HID_40701, .class_tid = 3, .hdr_sig_id = 7, .flow_sig_id = 90112UL, @@ -23205,8 +37980,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_DST_PORT } }, - [1038] = { - .class_hid = BNXT_ULP_CLASS_HID_375a, + [1648] = { + .class_hid = BNXT_ULP_CLASS_HID_40e93, .class_tid = 3, .hdr_sig_id = 7, .flow_sig_id = 90116UL, @@ -23224,8 +37999,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_DST_PORT } }, - [1039] = { - .class_hid = BNXT_ULP_CLASS_HID_2ebe, + [1649] = { + .class_hid = BNXT_ULP_CLASS_HID_c16bb, .class_tid = 3, .hdr_sig_id = 7, .flow_sig_id = 114688UL, @@ -23242,8 +38017,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_DST_PORT } }, - [1040] = { - .class_hid = BNXT_ULP_CLASS_HID_29da, + [1650] = { + .class_hid = BNXT_ULP_CLASS_HID_c1dd5, .class_tid = 3, .hdr_sig_id = 7, .flow_sig_id = 114692UL, @@ -23261,8 +38036,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_DST_PORT } }, - [1041] = { - .class_hid = BNXT_ULP_CLASS_HID_14f2, + [1651] = { + .class_hid = BNXT_ULP_CLASS_HID_c1a79, .class_tid = 3, .hdr_sig_id = 7, .flow_sig_id = 122880UL, @@ -23280,8 +38055,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_DST_PORT } }, - [1042] = { - .class_hid = BNXT_ULP_CLASS_HID_7762, + [1652] = { + .class_hid = BNXT_ULP_CLASS_HID_c018b, .class_tid = 3, .hdr_sig_id = 7, .flow_sig_id = 122884UL, @@ -23300,8 +38075,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_DST_PORT } }, - [1043] = { - .class_hid = BNXT_ULP_CLASS_HID_19e8, + [1653] = { + .class_hid = BNXT_ULP_CLASS_HID_81aa8, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 32768UL, @@ -23317,8 +38092,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR } }, - [1044] = { - .class_hid = BNXT_ULP_CLASS_HID_110c, + [1654] = { + .class_hid = BNXT_ULP_CLASS_HID_8021e, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 32772UL, @@ -23335,8 +38110,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR } }, - [1045] = { - .class_hid = BNXT_ULP_CLASS_HID_4d48, + [1655] = { + .class_hid = BNXT_ULP_CLASS_HID_815c8, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 32832UL, @@ -23353,8 +38128,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_OO_VLAN_VID | BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR } }, - [1046] = { - .class_hid = BNXT_ULP_CLASS_HID_446c, + [1656] = { + .class_hid = BNXT_ULP_CLASS_HID_81cbe, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 32836UL, @@ -23372,8 +38147,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_OO_VLAN_VID | BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR } }, - [1047] = { - .class_hid = BNXT_ULP_CLASS_HID_0eac, + [1657] = { + .class_hid = BNXT_ULP_CLASS_HID_810b8, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 49152UL, @@ -23390,8 +38165,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR } }, - [1048] = { - .class_hid = BNXT_ULP_CLASS_HID_09c0, + [1658] = { + .class_hid = BNXT_ULP_CLASS_HID_8182e, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 49156UL, @@ -23409,8 +38184,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR } }, - [1049] = { - .class_hid = BNXT_ULP_CLASS_HID_1ad0, + [1659] = { + .class_hid = BNXT_ULP_CLASS_HID_8037a, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 49216UL, @@ -23428,8 +38203,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR } }, - [1050] = { - .class_hid = BNXT_ULP_CLASS_HID_15f4, + [1660] = { + .class_hid = BNXT_ULP_CLASS_HID_80ae8, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 49220UL, @@ -23448,8 +38223,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR } }, - [1051] = { - .class_hid = BNXT_ULP_CLASS_HID_39ec, + [1661] = { + .class_hid = BNXT_ULP_CLASS_HID_c1834, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 98304UL, @@ -23466,8 +38241,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT } }, - [1052] = { - .class_hid = BNXT_ULP_CLASS_HID_3100, + [1662] = { + .class_hid = BNXT_ULP_CLASS_HID_c079a, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 98308UL, @@ -23485,8 +38260,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT } }, - [1053] = { - .class_hid = BNXT_ULP_CLASS_HID_0210, + [1663] = { + .class_hid = BNXT_ULP_CLASS_HID_c0af6, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 98368UL, @@ -23504,8 +38279,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT } }, - [1054] = { - .class_hid = BNXT_ULP_CLASS_HID_1d34, + [1664] = { + .class_hid = BNXT_ULP_CLASS_HID_c123a, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 98372UL, @@ -23524,8 +38299,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT } }, - [1055] = { - .class_hid = BNXT_ULP_CLASS_HID_2ea0, + [1665] = { + .class_hid = BNXT_ULP_CLASS_HID_c16c4, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 114688UL, @@ -23543,8 +38318,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT } }, - [1056] = { - .class_hid = BNXT_ULP_CLASS_HID_29c4, + [1666] = { + .class_hid = BNXT_ULP_CLASS_HID_c1daa, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 114692UL, @@ -23563,8 +38338,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT } }, - [1057] = { - .class_hid = BNXT_ULP_CLASS_HID_3ad4, + [1667] = { + .class_hid = BNXT_ULP_CLASS_HID_c0086, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 114752UL, @@ -23583,8 +38358,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT } }, - [1058] = { - .class_hid = BNXT_ULP_CLASS_HID_35e8, + [1668] = { + .class_hid = BNXT_ULP_CLASS_HID_c0874, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 114756UL, @@ -23604,8 +38379,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT } }, - [1059] = { - .class_hid = BNXT_ULP_CLASS_HID_5d80, + [1669] = { + .class_hid = BNXT_ULP_CLASS_HID_a19ea, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 163840UL, @@ -23622,8 +38397,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT } }, - [1060] = { - .class_hid = BNXT_ULP_CLASS_HID_54a4, + [1670] = { + .class_hid = BNXT_ULP_CLASS_HID_a0158, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 163844UL, @@ -23641,8 +38416,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT } }, - [1061] = { - .class_hid = BNXT_ULP_CLASS_HID_29b4, + [1671] = { + .class_hid = BNXT_ULP_CLASS_HID_a0bb4, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 163904UL, @@ -23660,8 +38435,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT } }, - [1062] = { - .class_hid = BNXT_ULP_CLASS_HID_20c8, + [1672] = { + .class_hid = BNXT_ULP_CLASS_HID_a13f8, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 163908UL, @@ -23680,8 +38455,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT } }, - [1063] = { - .class_hid = BNXT_ULP_CLASS_HID_7244, + [1673] = { + .class_hid = BNXT_ULP_CLASS_HID_a17fa, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 180224UL, @@ -23699,8 +38474,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT } }, - [1064] = { - .class_hid = BNXT_ULP_CLASS_HID_4d98, + [1674] = { + .class_hid = BNXT_ULP_CLASS_HID_a1f68, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 180228UL, @@ -23719,8 +38494,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT } }, - [1065] = { - .class_hid = BNXT_ULP_CLASS_HID_5e68, + [1675] = { + .class_hid = BNXT_ULP_CLASS_HID_a0244, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 180288UL, @@ -23739,8 +38514,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT } }, - [1066] = { - .class_hid = BNXT_ULP_CLASS_HID_598c, + [1676] = { + .class_hid = BNXT_ULP_CLASS_HID_a092a, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 180292UL, @@ -23760,8 +38535,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT } }, - [1067] = { - .class_hid = BNXT_ULP_CLASS_HID_1248, + [1677] = { + .class_hid = BNXT_ULP_CLASS_HID_e1f76, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 229376UL, @@ -23779,8 +38554,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT } }, - [1068] = { - .class_hid = BNXT_ULP_CLASS_HID_74d8, + [1678] = { + .class_hid = BNXT_ULP_CLASS_HID_e06e4, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 229380UL, @@ -23799,8 +38574,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT } }, - [1069] = { - .class_hid = BNXT_ULP_CLASS_HID_49a8, + [1679] = { + .class_hid = BNXT_ULP_CLASS_HID_e0930, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 229440UL, @@ -23819,8 +38594,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT } }, - [1070] = { - .class_hid = BNXT_ULP_CLASS_HID_40cc, + [1680] = { + .class_hid = BNXT_ULP_CLASS_HID_e1104, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 229444UL, @@ -23840,8 +38615,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT } }, - [1071] = { - .class_hid = BNXT_ULP_CLASS_HID_0b0c, + [1681] = { + .class_hid = BNXT_ULP_CLASS_HID_e1506, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 245760UL, @@ -23860,8 +38635,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT } }, - [1072] = { - .class_hid = BNXT_ULP_CLASS_HID_0220, + [1682] = { + .class_hid = BNXT_ULP_CLASS_HID_e1cf4, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 245764UL, @@ -23881,8 +38656,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT } }, - [1073] = { - .class_hid = BNXT_ULP_CLASS_HID_1730, + [1683] = { + .class_hid = BNXT_ULP_CLASS_HID_e07c0, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 245824UL, @@ -23902,8 +38677,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT } }, - [1074] = { - .class_hid = BNXT_ULP_CLASS_HID_7980, + [1684] = { + .class_hid = BNXT_ULP_CLASS_HID_e0eb6, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 245828UL, @@ -23924,8 +38699,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT } }, - [1075] = { - .class_hid = BNXT_ULP_CLASS_HID_1db0, + [1685] = { + .class_hid = BNXT_ULP_CLASS_HID_206ee, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 131072UL, @@ -23941,8 +38716,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR } }, - [1076] = { - .class_hid = BNXT_ULP_CLASS_HID_1494, + [1686] = { + .class_hid = BNXT_ULP_CLASS_HID_20e5c, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 131076UL, @@ -23959,8 +38734,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR } }, - [1077] = { - .class_hid = BNXT_ULP_CLASS_HID_70d0, + [1687] = { + .class_hid = BNXT_ULP_CLASS_HID_2110e, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 131136UL, @@ -23977,8 +38752,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_OO_VLAN_VID | BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR } }, - [1078] = { - .class_hid = BNXT_ULP_CLASS_HID_4834, + [1688] = { + .class_hid = BNXT_ULP_CLASS_HID_218fc, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 131140UL, @@ -23996,8 +38771,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_OO_VLAN_VID | BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR } }, - [1079] = { - .class_hid = BNXT_ULP_CLASS_HID_3db4, + [1689] = { + .class_hid = BNXT_ULP_CLASS_HID_60462, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 196608UL, @@ -24014,8 +38789,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR } }, - [1080] = { - .class_hid = BNXT_ULP_CLASS_HID_3498, + [1690] = { + .class_hid = BNXT_ULP_CLASS_HID_603d0, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 196612UL, @@ -24033,8 +38808,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR } }, - [1081] = { - .class_hid = BNXT_ULP_CLASS_HID_0988, + [1691] = { + .class_hid = BNXT_ULP_CLASS_HID_61682, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 196672UL, @@ -24052,8 +38827,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR } }, - [1082] = { - .class_hid = BNXT_ULP_CLASS_HID_00ec, + [1692] = { + .class_hid = BNXT_ULP_CLASS_HID_61e70, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 196676UL, @@ -24072,8 +38847,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR } }, - [1083] = { - .class_hid = BNXT_ULP_CLASS_HID_23f44, + [1693] = { + .class_hid = BNXT_ULP_CLASS_HID_3167e, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 393216UL, @@ -24090,8 +38865,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT } }, - [1084] = { - .class_hid = BNXT_ULP_CLASS_HID_236a8, + [1694] = { + .class_hid = BNXT_ULP_CLASS_HID_31dec, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 393220UL, @@ -24109,8 +38884,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT } }, - [1085] = { - .class_hid = BNXT_ULP_CLASS_HID_20b58, + [1695] = { + .class_hid = BNXT_ULP_CLASS_HID_30030, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 393280UL, @@ -24128,8 +38903,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT } }, - [1086] = { - .class_hid = BNXT_ULP_CLASS_HID_202bc, + [1696] = { + .class_hid = BNXT_ULP_CLASS_HID_30fae, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 393284UL, @@ -24148,8 +38923,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT } }, - [1087] = { - .class_hid = BNXT_ULP_CLASS_HID_25f48, + [1697] = { + .class_hid = BNXT_ULP_CLASS_HID_70b14, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 458752UL, @@ -24167,8 +38942,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT } }, - [1088] = { - .class_hid = BNXT_ULP_CLASS_HID_256ac, + [1698] = { + .class_hid = BNXT_ULP_CLASS_HID_71360, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 458756UL, @@ -24187,8 +38962,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT } }, - [1089] = { - .class_hid = BNXT_ULP_CLASS_HID_22b5c, + [1699] = { + .class_hid = BNXT_ULP_CLASS_HID_705b4, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 458816UL, @@ -24207,8 +38982,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT } }, - [1090] = { - .class_hid = BNXT_ULP_CLASS_HID_22280, + [1700] = { + .class_hid = BNXT_ULP_CLASS_HID_70d22, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 458820UL, @@ -24228,8 +39003,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT } }, - [1091] = { - .class_hid = BNXT_ULP_CLASS_HID_14000, + [1701] = { + .class_hid = BNXT_ULP_CLASS_HID_29e26, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 655360UL, @@ -24246,8 +39021,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT } }, - [1092] = { - .class_hid = BNXT_ULP_CLASS_HID_15b64, + [1702] = { + .class_hid = BNXT_ULP_CLASS_HID_28594, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 655364UL, @@ -24265,8 +39040,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT } }, - [1093] = { - .class_hid = BNXT_ULP_CLASS_HID_12c14, + [1703] = { + .class_hid = BNXT_ULP_CLASS_HID_288f8, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 655424UL, @@ -24284,8 +39059,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT } }, - [1094] = { - .class_hid = BNXT_ULP_CLASS_HID_12778, + [1704] = { + .class_hid = BNXT_ULP_CLASS_HID_29034, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 655428UL, @@ -24304,8 +39079,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT } }, - [1095] = { - .class_hid = BNXT_ULP_CLASS_HID_118f8, + [1705] = { + .class_hid = BNXT_ULP_CLASS_HID_693ba, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 720896UL, @@ -24323,8 +39098,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT } }, - [1096] = { - .class_hid = BNXT_ULP_CLASS_HID_113dc, + [1706] = { + .class_hid = BNXT_ULP_CLASS_HID_69b28, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 720900UL, @@ -24343,8 +39118,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT } }, - [1097] = { - .class_hid = BNXT_ULP_CLASS_HID_14c18, + [1707] = { + .class_hid = BNXT_ULP_CLASS_HID_68e7c, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 720960UL, @@ -24363,8 +39138,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT } }, - [1098] = { - .class_hid = BNXT_ULP_CLASS_HID_1477c, + [1708] = { + .class_hid = BNXT_ULP_CLASS_HID_69648, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 720964UL, @@ -24384,8 +39159,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT } }, - [1099] = { - .class_hid = BNXT_ULP_CLASS_HID_31a88, + [1709] = { + .class_hid = BNXT_ULP_CLASS_HID_38de8, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 917504UL, @@ -24403,8 +39178,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT } }, - [1100] = { - .class_hid = BNXT_ULP_CLASS_HID_315ec, + [1710] = { + .class_hid = BNXT_ULP_CLASS_HID_39524, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 917508UL, @@ -24423,8 +39198,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT } }, - [1101] = { - .class_hid = BNXT_ULP_CLASS_HID_34e28, + [1711] = { + .class_hid = BNXT_ULP_CLASS_HID_39808, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 917568UL, @@ -24443,8 +39218,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT } }, - [1102] = { - .class_hid = BNXT_ULP_CLASS_HID_3490c, + [1712] = { + .class_hid = BNXT_ULP_CLASS_HID_387e6, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 917572UL, @@ -24464,8 +39239,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT } }, - [1103] = { - .class_hid = BNXT_ULP_CLASS_HID_33a8c, + [1713] = { + .class_hid = BNXT_ULP_CLASS_HID_7836c, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 983040UL, @@ -24484,8 +39259,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT } }, - [1104] = { - .class_hid = BNXT_ULP_CLASS_HID_335f0, + [1714] = { + .class_hid = BNXT_ULP_CLASS_HID_78ada, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 983044UL, @@ -24505,8 +39280,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT } }, - [1105] = { - .class_hid = BNXT_ULP_CLASS_HID_306e0, + [1715] = { + .class_hid = BNXT_ULP_CLASS_HID_79d8c, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 983104UL, @@ -24526,8 +39301,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT } }, - [1106] = { - .class_hid = BNXT_ULP_CLASS_HID_301c4, + [1716] = { + .class_hid = BNXT_ULP_CLASS_HID_7857a, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 983108UL, @@ -24548,8 +39323,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT } }, - [1107] = { - .class_hid = BNXT_ULP_CLASS_HID_1a08, + [1717] = { + .class_hid = BNXT_ULP_CLASS_HID_81ad8, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 32768UL, @@ -24565,8 +39340,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR } }, - [1108] = { - .class_hid = BNXT_ULP_CLASS_HID_12ec, + [1718] = { + .class_hid = BNXT_ULP_CLASS_HID_8026e, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 32772UL, @@ -24583,8 +39358,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR } }, - [1109] = { - .class_hid = BNXT_ULP_CLASS_HID_4ea8, + [1719] = { + .class_hid = BNXT_ULP_CLASS_HID_815b8, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 32832UL, @@ -24601,8 +39376,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_OO_VLAN_VID | BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR } }, - [1110] = { - .class_hid = BNXT_ULP_CLASS_HID_478c, + [1720] = { + .class_hid = BNXT_ULP_CLASS_HID_81cce, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 32836UL, @@ -24620,8 +39395,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_OO_VLAN_VID | BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR } }, - [1111] = { - .class_hid = BNXT_ULP_CLASS_HID_0d4c, + [1721] = { + .class_hid = BNXT_ULP_CLASS_HID_810c8, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 49152UL, @@ -24638,8 +39413,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR } }, - [1112] = { - .class_hid = BNXT_ULP_CLASS_HID_0a20, + [1722] = { + .class_hid = BNXT_ULP_CLASS_HID_8185e, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 49156UL, @@ -24657,8 +39432,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR } }, - [1113] = { - .class_hid = BNXT_ULP_CLASS_HID_1930, + [1723] = { + .class_hid = BNXT_ULP_CLASS_HID_8030a, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 49216UL, @@ -24676,8 +39451,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR } }, - [1114] = { - .class_hid = BNXT_ULP_CLASS_HID_1614, + [1724] = { + .class_hid = BNXT_ULP_CLASS_HID_80a98, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 49220UL, @@ -24696,8 +39471,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR } }, - [1115] = { - .class_hid = BNXT_ULP_CLASS_HID_3a0c, + [1725] = { + .class_hid = BNXT_ULP_CLASS_HID_c1844, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 98304UL, @@ -24714,8 +39489,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT } }, - [1116] = { - .class_hid = BNXT_ULP_CLASS_HID_32e0, + [1726] = { + .class_hid = BNXT_ULP_CLASS_HID_c07ea, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 98308UL, @@ -24733,8 +39508,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT } }, - [1117] = { - .class_hid = BNXT_ULP_CLASS_HID_01f0, + [1727] = { + .class_hid = BNXT_ULP_CLASS_HID_c0a86, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 98368UL, @@ -24752,8 +39527,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT } }, - [1118] = { - .class_hid = BNXT_ULP_CLASS_HID_1ed4, + [1728] = { + .class_hid = BNXT_ULP_CLASS_HID_c124a, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 98372UL, @@ -24772,8 +39547,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT } }, - [1119] = { - .class_hid = BNXT_ULP_CLASS_HID_2d40, + [1729] = { + .class_hid = BNXT_ULP_CLASS_HID_c16b4, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 114688UL, @@ -24791,8 +39566,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT } }, - [1120] = { - .class_hid = BNXT_ULP_CLASS_HID_2a24, + [1730] = { + .class_hid = BNXT_ULP_CLASS_HID_c1dda, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 114692UL, @@ -24811,8 +39586,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT } }, - [1121] = { - .class_hid = BNXT_ULP_CLASS_HID_3934, + [1731] = { + .class_hid = BNXT_ULP_CLASS_HID_c00f6, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 114752UL, @@ -24831,8 +39606,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT } }, - [1122] = { - .class_hid = BNXT_ULP_CLASS_HID_3608, + [1732] = { + .class_hid = BNXT_ULP_CLASS_HID_c0804, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 114756UL, @@ -24852,8 +39627,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT } }, - [1123] = { - .class_hid = BNXT_ULP_CLASS_HID_5e60, + [1733] = { + .class_hid = BNXT_ULP_CLASS_HID_a199a, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 163840UL, @@ -24870,8 +39645,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT } }, - [1124] = { - .class_hid = BNXT_ULP_CLASS_HID_5744, + [1734] = { + .class_hid = BNXT_ULP_CLASS_HID_a0128, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 163844UL, @@ -24889,8 +39664,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT } }, - [1125] = { - .class_hid = BNXT_ULP_CLASS_HID_2a54, + [1735] = { + .class_hid = BNXT_ULP_CLASS_HID_a0bc4, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 163904UL, @@ -24908,8 +39683,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT } }, - [1126] = { - .class_hid = BNXT_ULP_CLASS_HID_2328, + [1736] = { + .class_hid = BNXT_ULP_CLASS_HID_a1388, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 163908UL, @@ -24928,8 +39703,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT } }, - [1127] = { - .class_hid = BNXT_ULP_CLASS_HID_71a4, + [1737] = { + .class_hid = BNXT_ULP_CLASS_HID_a178a, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 180224UL, @@ -24947,8 +39722,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT } }, - [1128] = { - .class_hid = BNXT_ULP_CLASS_HID_4e78, + [1738] = { + .class_hid = BNXT_ULP_CLASS_HID_a1f18, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 180228UL, @@ -24967,8 +39742,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT } }, - [1129] = { - .class_hid = BNXT_ULP_CLASS_HID_5d88, + [1739] = { + .class_hid = BNXT_ULP_CLASS_HID_a0234, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 180288UL, @@ -24987,8 +39762,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT } }, - [1130] = { - .class_hid = BNXT_ULP_CLASS_HID_5a6c, + [1740] = { + .class_hid = BNXT_ULP_CLASS_HID_a095a, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 180292UL, @@ -25008,8 +39783,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT } }, - [1131] = { - .class_hid = BNXT_ULP_CLASS_HID_11a8, + [1741] = { + .class_hid = BNXT_ULP_CLASS_HID_e1f06, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 229376UL, @@ -25027,8 +39802,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT } }, - [1132] = { - .class_hid = BNXT_ULP_CLASS_HID_7738, + [1742] = { + .class_hid = BNXT_ULP_CLASS_HID_e0694, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 229380UL, @@ -25047,8 +39822,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT } }, - [1133] = { - .class_hid = BNXT_ULP_CLASS_HID_4a48, + [1743] = { + .class_hid = BNXT_ULP_CLASS_HID_e0940, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 229440UL, @@ -25067,8 +39842,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT } }, - [1134] = { - .class_hid = BNXT_ULP_CLASS_HID_432c, + [1744] = { + .class_hid = BNXT_ULP_CLASS_HID_e1174, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 229444UL, @@ -25088,8 +39863,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT } }, - [1135] = { - .class_hid = BNXT_ULP_CLASS_HID_08ec, + [1745] = { + .class_hid = BNXT_ULP_CLASS_HID_e1576, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 245760UL, @@ -25108,8 +39883,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT } }, - [1136] = { - .class_hid = BNXT_ULP_CLASS_HID_01c0, + [1746] = { + .class_hid = BNXT_ULP_CLASS_HID_e1c84, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 245764UL, @@ -25129,8 +39904,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT } }, - [1137] = { - .class_hid = BNXT_ULP_CLASS_HID_14d0, + [1747] = { + .class_hid = BNXT_ULP_CLASS_HID_e07b0, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 245824UL, @@ -25150,8 +39925,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT } }, - [1138] = { - .class_hid = BNXT_ULP_CLASS_HID_7a60, + [1748] = { + .class_hid = BNXT_ULP_CLASS_HID_e0ec6, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 245828UL, @@ -25172,8 +39947,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT } }, - [1139] = { - .class_hid = BNXT_ULP_CLASS_HID_1d90, + [1749] = { + .class_hid = BNXT_ULP_CLASS_HID_2069e, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 131072UL, @@ -25189,8 +39964,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR } }, - [1140] = { - .class_hid = BNXT_ULP_CLASS_HID_14b4, + [1750] = { + .class_hid = BNXT_ULP_CLASS_HID_20e2c, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 131076UL, @@ -25207,8 +39982,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR } }, - [1141] = { - .class_hid = BNXT_ULP_CLASS_HID_70f0, + [1751] = { + .class_hid = BNXT_ULP_CLASS_HID_2117e, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 131136UL, @@ -25225,8 +40000,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_OO_VLAN_VID | BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR } }, - [1142] = { - .class_hid = BNXT_ULP_CLASS_HID_4814, + [1752] = { + .class_hid = BNXT_ULP_CLASS_HID_2188c, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 131140UL, @@ -25244,8 +40019,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_OO_VLAN_VID | BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR } }, - [1143] = { - .class_hid = BNXT_ULP_CLASS_HID_3d94, + [1753] = { + .class_hid = BNXT_ULP_CLASS_HID_60412, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 196608UL, @@ -25262,8 +40037,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR } }, - [1144] = { - .class_hid = BNXT_ULP_CLASS_HID_34b8, + [1754] = { + .class_hid = BNXT_ULP_CLASS_HID_603a0, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 196612UL, @@ -25281,8 +40056,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR } }, - [1145] = { - .class_hid = BNXT_ULP_CLASS_HID_09a8, + [1755] = { + .class_hid = BNXT_ULP_CLASS_HID_616f2, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 196672UL, @@ -25300,8 +40075,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR } }, - [1146] = { - .class_hid = BNXT_ULP_CLASS_HID_00cc, + [1756] = { + .class_hid = BNXT_ULP_CLASS_HID_61e00, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 196676UL, @@ -25320,8 +40095,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR } }, - [1147] = { - .class_hid = BNXT_ULP_CLASS_HID_23f64, + [1757] = { + .class_hid = BNXT_ULP_CLASS_HID_3160e, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 393216UL, @@ -25338,8 +40113,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT } }, - [1148] = { - .class_hid = BNXT_ULP_CLASS_HID_23688, + [1758] = { + .class_hid = BNXT_ULP_CLASS_HID_31d9c, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 393220UL, @@ -25357,8 +40132,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT } }, - [1149] = { - .class_hid = BNXT_ULP_CLASS_HID_20b78, + [1759] = { + .class_hid = BNXT_ULP_CLASS_HID_30040, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 393280UL, @@ -25376,8 +40151,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT } }, - [1150] = { - .class_hid = BNXT_ULP_CLASS_HID_2029c, + [1760] = { + .class_hid = BNXT_ULP_CLASS_HID_30fde, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 393284UL, @@ -25396,8 +40171,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT } }, - [1151] = { - .class_hid = BNXT_ULP_CLASS_HID_25f68, + [1761] = { + .class_hid = BNXT_ULP_CLASS_HID_70b64, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 458752UL, @@ -25415,8 +40190,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT } }, - [1152] = { - .class_hid = BNXT_ULP_CLASS_HID_2568c, + [1762] = { + .class_hid = BNXT_ULP_CLASS_HID_71310, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 458756UL, @@ -25435,8 +40210,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT } }, - [1153] = { - .class_hid = BNXT_ULP_CLASS_HID_22b7c, + [1763] = { + .class_hid = BNXT_ULP_CLASS_HID_705c4, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 458816UL, @@ -25455,8 +40230,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT } }, - [1154] = { - .class_hid = BNXT_ULP_CLASS_HID_222a0, + [1764] = { + .class_hid = BNXT_ULP_CLASS_HID_70d52, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 458820UL, @@ -25476,8 +40251,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT } }, - [1155] = { - .class_hid = BNXT_ULP_CLASS_HID_14020, + [1765] = { + .class_hid = BNXT_ULP_CLASS_HID_29e56, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 655360UL, @@ -25494,8 +40269,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT } }, - [1156] = { - .class_hid = BNXT_ULP_CLASS_HID_15b44, + [1766] = { + .class_hid = BNXT_ULP_CLASS_HID_285e4, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 655364UL, @@ -25513,8 +40288,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT } }, - [1157] = { - .class_hid = BNXT_ULP_CLASS_HID_12c34, + [1767] = { + .class_hid = BNXT_ULP_CLASS_HID_28888, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 655424UL, @@ -25532,8 +40307,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT } }, - [1158] = { - .class_hid = BNXT_ULP_CLASS_HID_12758, + [1768] = { + .class_hid = BNXT_ULP_CLASS_HID_29044, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 655428UL, @@ -25552,8 +40327,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT } }, - [1159] = { - .class_hid = BNXT_ULP_CLASS_HID_118d8, + [1769] = { + .class_hid = BNXT_ULP_CLASS_HID_693ca, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 720896UL, @@ -25571,8 +40346,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT } }, - [1160] = { - .class_hid = BNXT_ULP_CLASS_HID_113fc, + [1770] = { + .class_hid = BNXT_ULP_CLASS_HID_69b58, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 720900UL, @@ -25591,8 +40366,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT } }, - [1161] = { - .class_hid = BNXT_ULP_CLASS_HID_14c38, + [1771] = { + .class_hid = BNXT_ULP_CLASS_HID_68e0c, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 720960UL, @@ -25611,8 +40386,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT } }, - [1162] = { - .class_hid = BNXT_ULP_CLASS_HID_1475c, + [1772] = { + .class_hid = BNXT_ULP_CLASS_HID_69638, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 720964UL, @@ -25632,8 +40407,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT } }, - [1163] = { - .class_hid = BNXT_ULP_CLASS_HID_31aa8, + [1773] = { + .class_hid = BNXT_ULP_CLASS_HID_38d98, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 917504UL, @@ -25651,8 +40426,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT } }, - [1164] = { - .class_hid = BNXT_ULP_CLASS_HID_315cc, + [1774] = { + .class_hid = BNXT_ULP_CLASS_HID_39554, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 917508UL, @@ -25671,8 +40446,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT } }, - [1165] = { - .class_hid = BNXT_ULP_CLASS_HID_34e08, + [1775] = { + .class_hid = BNXT_ULP_CLASS_HID_39878, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 917568UL, @@ -25691,8 +40466,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT } }, - [1166] = { - .class_hid = BNXT_ULP_CLASS_HID_3492c, + [1776] = { + .class_hid = BNXT_ULP_CLASS_HID_38796, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 917572UL, @@ -25712,8 +40487,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT } }, - [1167] = { - .class_hid = BNXT_ULP_CLASS_HID_33aac, + [1777] = { + .class_hid = BNXT_ULP_CLASS_HID_7831c, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 983040UL, @@ -25732,8 +40507,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT } }, - [1168] = { - .class_hid = BNXT_ULP_CLASS_HID_335d0, + [1778] = { + .class_hid = BNXT_ULP_CLASS_HID_78aaa, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 983044UL, @@ -25753,8 +40528,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT } }, - [1169] = { - .class_hid = BNXT_ULP_CLASS_HID_306c0, + [1779] = { + .class_hid = BNXT_ULP_CLASS_HID_79dfc, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 983104UL, @@ -25774,8 +40549,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT } }, - [1170] = { - .class_hid = BNXT_ULP_CLASS_HID_301e4, + [1780] = { + .class_hid = BNXT_ULP_CLASS_HID_7850a, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 983108UL, @@ -25796,8 +40571,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT } }, - [1171] = { - .class_hid = BNXT_ULP_CLASS_HID_4d32, + [1781] = { + .class_hid = BNXT_ULP_CLASS_HID_03b7, .class_tid = 3, .hdr_sig_id = 0, .flow_sig_id = 4096UL, @@ -25810,8 +40585,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { .field_sig = { .bits = BNXT_ULP_HF_0_3_0_BITMASK_O_IPV6_DST_ADDR } }, - [1172] = { - .class_hid = BNXT_ULP_CLASS_HID_54aa, + [1782] = { + .class_hid = BNXT_ULP_CLASS_HID_13f3, .class_tid = 3, .hdr_sig_id = 0, .flow_sig_id = 6144UL, @@ -25825,8 +40600,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_0_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_0_BITMASK_O_IPV6_DST_ADDR } }, - [1173] = { - .class_hid = BNXT_ULP_CLASS_HID_0686, + [1783] = { + .class_hid = BNXT_ULP_CLASS_HID_0255, .class_tid = 3, .hdr_sig_id = 1, .flow_sig_id = 16384UL, @@ -25839,8 +40614,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { .field_sig = { .bits = BNXT_ULP_HF_0_3_1_BITMASK_O_IPV4_DST_ADDR } }, - [1174] = { - .class_hid = BNXT_ULP_CLASS_HID_540e, + [1784] = { + .class_hid = BNXT_ULP_CLASS_HID_1675, .class_tid = 3, .hdr_sig_id = 1, .flow_sig_id = 24576UL, @@ -25854,8 +40629,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_1_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_1_BITMASK_O_IPV4_DST_ADDR } }, - [1175] = { - .class_hid = BNXT_ULP_CLASS_HID_2e3c, + [1785] = { + .class_hid = BNXT_ULP_CLASS_HID_80f52, .class_tid = 3, .hdr_sig_id = 2, .flow_sig_id = 32768UL, @@ -25869,8 +40644,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { .field_sig = { .bits = BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_DST_ADDR } }, - [1176] = { - .class_hid = BNXT_ULP_CLASS_HID_3a20, + [1786] = { + .class_hid = BNXT_ULP_CLASS_HID_819f2, .class_tid = 3, .hdr_sig_id = 2, .flow_sig_id = 32832UL, @@ -25885,8 +40660,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_2_BITMASK_OO_VLAN_VID | BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_DST_ADDR } }, - [1177] = { - .class_hid = BNXT_ULP_CLASS_HID_46f0, + [1787] = { + .class_hid = BNXT_ULP_CLASS_HID_80542, .class_tid = 3, .hdr_sig_id = 2, .flow_sig_id = 49152UL, @@ -25901,8 +40676,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_DST_ADDR } }, - [1178] = { - .class_hid = BNXT_ULP_CLASS_HID_52e4, + [1788] = { + .class_hid = BNXT_ULP_CLASS_HID_817e2, .class_tid = 3, .hdr_sig_id = 2, .flow_sig_id = 49216UL, @@ -25918,8 +40693,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_DST_ADDR } }, - [1179] = { - .class_hid = BNXT_ULP_CLASS_HID_55e4, + [1789] = { + .class_hid = BNXT_ULP_CLASS_HID_20a98, .class_tid = 3, .hdr_sig_id = 3, .flow_sig_id = 131072UL, @@ -25933,8 +40708,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { .field_sig = { .bits = BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_DST_ADDR } }, - [1180] = { - .class_hid = BNXT_ULP_CLASS_HID_21f8, + [1790] = { + .class_hid = BNXT_ULP_CLASS_HID_20538, .class_tid = 3, .hdr_sig_id = 3, .flow_sig_id = 131136UL, @@ -25949,8 +40724,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_3_BITMASK_OO_VLAN_VID | BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_DST_ADDR } }, - [1181] = { - .class_hid = BNXT_ULP_CLASS_HID_75e8, + [1791] = { + .class_hid = BNXT_ULP_CLASS_HID_6081c, .class_tid = 3, .hdr_sig_id = 3, .flow_sig_id = 196608UL, @@ -25965,8 +40740,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_DST_ADDR } }, - [1182] = { - .class_hid = BNXT_ULP_CLASS_HID_41fc, + [1792] = { + .class_hid = BNXT_ULP_CLASS_HID_61abc, .class_tid = 3, .hdr_sig_id = 3, .flow_sig_id = 196672UL, @@ -25982,8 +40757,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_DST_ADDR } }, - [1183] = { - .class_hid = BNXT_ULP_CLASS_HID_4d12, + [1793] = { + .class_hid = BNXT_ULP_CLASS_HID_03a7, .class_tid = 3, .hdr_sig_id = 4, .flow_sig_id = 4096UL, @@ -25997,8 +40772,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { .field_sig = { .bits = BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR } }, - [1184] = { - .class_hid = BNXT_ULP_CLASS_HID_548a, + [1794] = { + .class_hid = BNXT_ULP_CLASS_HID_13e3, .class_tid = 3, .hdr_sig_id = 4, .flow_sig_id = 6144UL, @@ -26013,8 +40788,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR } }, - [1185] = { - .class_hid = BNXT_ULP_CLASS_HID_3356, + [1795] = { + .class_hid = BNXT_ULP_CLASS_HID_1047, .class_tid = 3, .hdr_sig_id = 4, .flow_sig_id = 12288UL, @@ -26029,8 +40804,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_SRC_PORT } }, - [1186] = { - .class_hid = BNXT_ULP_CLASS_HID_1ace, + [1796] = { + .class_hid = BNXT_ULP_CLASS_HID_0721, .class_tid = 3, .hdr_sig_id = 4, .flow_sig_id = 14336UL, @@ -26046,8 +40821,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_SRC_PORT } }, - [1187] = { - .class_hid = BNXT_ULP_CLASS_HID_1a9a, + [1797] = { + .class_hid = BNXT_ULP_CLASS_HID_19b7, .class_tid = 3, .hdr_sig_id = 4, .flow_sig_id = 20480UL, @@ -26062,8 +40837,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_DST_PORT } }, - [1188] = { - .class_hid = BNXT_ULP_CLASS_HID_4d46, + [1798] = { + .class_hid = BNXT_ULP_CLASS_HID_0911, .class_tid = 3, .hdr_sig_id = 4, .flow_sig_id = 22528UL, @@ -26079,8 +40854,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_DST_PORT } }, - [1189] = { - .class_hid = BNXT_ULP_CLASS_HID_2812, + [1799] = { + .class_hid = BNXT_ULP_CLASS_HID_0df5, .class_tid = 3, .hdr_sig_id = 4, .flow_sig_id = 28672UL, @@ -26096,8 +40871,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_DST_PORT } }, - [1190] = { - .class_hid = BNXT_ULP_CLASS_HID_338a, + [1800] = { + .class_hid = BNXT_ULP_CLASS_HID_1d31, .class_tid = 3, .hdr_sig_id = 4, .flow_sig_id = 30720UL, @@ -26114,8 +40889,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_DST_PORT } }, - [1191] = { - .class_hid = BNXT_ULP_CLASS_HID_06e6, + [1801] = { + .class_hid = BNXT_ULP_CLASS_HID_0245, .class_tid = 3, .hdr_sig_id = 5, .flow_sig_id = 16384UL, @@ -26129,8 +40904,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { .field_sig = { .bits = BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR } }, - [1192] = { - .class_hid = BNXT_ULP_CLASS_HID_546e, + [1802] = { + .class_hid = BNXT_ULP_CLASS_HID_1665, .class_tid = 3, .hdr_sig_id = 5, .flow_sig_id = 24576UL, @@ -26145,8 +40920,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR } }, - [1193] = { - .class_hid = BNXT_ULP_CLASS_HID_46ee, + [1803] = { + .class_hid = BNXT_ULP_CLASS_HID_8055d, .class_tid = 3, .hdr_sig_id = 5, .flow_sig_id = 49152UL, @@ -26161,8 +40936,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_SRC_PORT } }, - [1194] = { - .class_hid = BNXT_ULP_CLASS_HID_0d22, + [1804] = { + .class_hid = BNXT_ULP_CLASS_HID_80893, .class_tid = 3, .hdr_sig_id = 5, .flow_sig_id = 57344UL, @@ -26178,8 +40953,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_SRC_PORT } }, - [1195] = { - .class_hid = BNXT_ULP_CLASS_HID_26e2, + [1805] = { + .class_hid = BNXT_ULP_CLASS_HID_407d9, .class_tid = 3, .hdr_sig_id = 5, .flow_sig_id = 81920UL, @@ -26194,8 +40969,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_DST_PORT } }, - [1196] = { - .class_hid = BNXT_ULP_CLASS_HID_746a, + [1806] = { + .class_hid = BNXT_ULP_CLASS_HID_40b1f, .class_tid = 3, .hdr_sig_id = 5, .flow_sig_id = 90112UL, @@ -26211,8 +40986,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_DST_PORT } }, - [1197] = { - .class_hid = BNXT_ULP_CLASS_HID_1fa6, + [1807] = { + .class_hid = BNXT_ULP_CLASS_HID_c1ad1, .class_tid = 3, .hdr_sig_id = 5, .flow_sig_id = 114688UL, @@ -26228,8 +41003,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_DST_PORT } }, - [1198] = { - .class_hid = BNXT_ULP_CLASS_HID_2d2e, + [1808] = { + .class_hid = BNXT_ULP_CLASS_HID_c0e17, .class_tid = 3, .hdr_sig_id = 5, .flow_sig_id = 122880UL, @@ -26246,8 +41021,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_DST_PORT } }, - [1199] = { - .class_hid = BNXT_ULP_CLASS_HID_4ef2, + [1809] = { + .class_hid = BNXT_ULP_CLASS_HID_03d7, .class_tid = 3, .hdr_sig_id = 6, .flow_sig_id = 4096UL, @@ -26261,8 +41036,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { .field_sig = { .bits = BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR } }, - [1200] = { - .class_hid = BNXT_ULP_CLASS_HID_576a, + [1810] = { + .class_hid = BNXT_ULP_CLASS_HID_1393, .class_tid = 3, .hdr_sig_id = 6, .flow_sig_id = 6144UL, @@ -26277,8 +41052,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR } }, - [1201] = { - .class_hid = BNXT_ULP_CLASS_HID_30b6, + [1811] = { + .class_hid = BNXT_ULP_CLASS_HID_1037, .class_tid = 3, .hdr_sig_id = 6, .flow_sig_id = 12288UL, @@ -26293,8 +41068,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_SRC_PORT } }, - [1202] = { - .class_hid = BNXT_ULP_CLASS_HID_192e, + [1812] = { + .class_hid = BNXT_ULP_CLASS_HID_0751, .class_tid = 3, .hdr_sig_id = 6, .flow_sig_id = 14336UL, @@ -26310,8 +41085,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_SRC_PORT } }, - [1203] = { - .class_hid = BNXT_ULP_CLASS_HID_197a, + [1813] = { + .class_hid = BNXT_ULP_CLASS_HID_19c7, .class_tid = 3, .hdr_sig_id = 6, .flow_sig_id = 20480UL, @@ -26326,8 +41101,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_DST_PORT } }, - [1204] = { - .class_hid = BNXT_ULP_CLASS_HID_4ea6, + [1814] = { + .class_hid = BNXT_ULP_CLASS_HID_0961, .class_tid = 3, .hdr_sig_id = 6, .flow_sig_id = 22528UL, @@ -26343,8 +41118,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_DST_PORT } }, - [1205] = { - .class_hid = BNXT_ULP_CLASS_HID_2bf2, + [1815] = { + .class_hid = BNXT_ULP_CLASS_HID_0d85, .class_tid = 3, .hdr_sig_id = 6, .flow_sig_id = 28672UL, @@ -26360,8 +41135,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_DST_PORT } }, - [1206] = { - .class_hid = BNXT_ULP_CLASS_HID_306a, + [1816] = { + .class_hid = BNXT_ULP_CLASS_HID_1d41, .class_tid = 3, .hdr_sig_id = 6, .flow_sig_id = 30720UL, @@ -26378,8 +41153,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_DST_PORT } }, - [1207] = { - .class_hid = BNXT_ULP_CLASS_HID_06c6, + [1817] = { + .class_hid = BNXT_ULP_CLASS_HID_0235, .class_tid = 3, .hdr_sig_id = 7, .flow_sig_id = 16384UL, @@ -26393,8 +41168,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { .field_sig = { .bits = BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR } }, - [1208] = { - .class_hid = BNXT_ULP_CLASS_HID_544e, + [1818] = { + .class_hid = BNXT_ULP_CLASS_HID_1615, .class_tid = 3, .hdr_sig_id = 7, .flow_sig_id = 24576UL, @@ -26409,8 +41184,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR } }, - [1209] = { - .class_hid = BNXT_ULP_CLASS_HID_46ce, + [1819] = { + .class_hid = BNXT_ULP_CLASS_HID_8052d, .class_tid = 3, .hdr_sig_id = 7, .flow_sig_id = 49152UL, @@ -26425,8 +41200,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_SRC_PORT } }, - [1210] = { - .class_hid = BNXT_ULP_CLASS_HID_0d02, + [1820] = { + .class_hid = BNXT_ULP_CLASS_HID_808e3, .class_tid = 3, .hdr_sig_id = 7, .flow_sig_id = 57344UL, @@ -26442,8 +41217,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_SRC_PORT } }, - [1211] = { - .class_hid = BNXT_ULP_CLASS_HID_26c2, + [1821] = { + .class_hid = BNXT_ULP_CLASS_HID_407a9, .class_tid = 3, .hdr_sig_id = 7, .flow_sig_id = 81920UL, @@ -26458,8 +41233,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_DST_PORT } }, - [1212] = { - .class_hid = BNXT_ULP_CLASS_HID_744a, + [1822] = { + .class_hid = BNXT_ULP_CLASS_HID_40b6f, .class_tid = 3, .hdr_sig_id = 7, .flow_sig_id = 90112UL, @@ -26475,8 +41250,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_DST_PORT } }, - [1213] = { - .class_hid = BNXT_ULP_CLASS_HID_1f86, + [1823] = { + .class_hid = BNXT_ULP_CLASS_HID_c1aa1, .class_tid = 3, .hdr_sig_id = 7, .flow_sig_id = 114688UL, @@ -26492,8 +41267,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_DST_PORT } }, - [1214] = { - .class_hid = BNXT_ULP_CLASS_HID_2d0e, + [1824] = { + .class_hid = BNXT_ULP_CLASS_HID_c0e67, .class_tid = 3, .hdr_sig_id = 7, .flow_sig_id = 122880UL, @@ -26510,8 +41285,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_DST_PORT } }, - [1215] = { - .class_hid = BNXT_ULP_CLASS_HID_2e1c, + [1825] = { + .class_hid = BNXT_ULP_CLASS_HID_80f42, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 32768UL, @@ -26526,8 +41301,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { .field_sig = { .bits = BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR } }, - [1216] = { - .class_hid = BNXT_ULP_CLASS_HID_3a00, + [1826] = { + .class_hid = BNXT_ULP_CLASS_HID_819e2, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 32832UL, @@ -26543,8 +41318,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_OO_VLAN_VID | BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR } }, - [1217] = { - .class_hid = BNXT_ULP_CLASS_HID_46d0, + [1827] = { + .class_hid = BNXT_ULP_CLASS_HID_80552, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 49152UL, @@ -26560,8 +41335,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR } }, - [1218] = { - .class_hid = BNXT_ULP_CLASS_HID_52c4, + [1828] = { + .class_hid = BNXT_ULP_CLASS_HID_817f2, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 49216UL, @@ -26578,8 +41353,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR } }, - [1219] = { - .class_hid = BNXT_ULP_CLASS_HID_4e10, + [1829] = { + .class_hid = BNXT_ULP_CLASS_HID_c0cce, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 98304UL, @@ -26595,8 +41370,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT } }, - [1220] = { - .class_hid = BNXT_ULP_CLASS_HID_5a04, + [1830] = { + .class_hid = BNXT_ULP_CLASS_HID_c1f6e, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 98368UL, @@ -26613,8 +41388,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT } }, - [1221] = { - .class_hid = BNXT_ULP_CLASS_HID_1f98, + [1831] = { + .class_hid = BNXT_ULP_CLASS_HID_c1ade, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 114688UL, @@ -26631,8 +41406,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT } }, - [1222] = { - .class_hid = BNXT_ULP_CLASS_HID_72f8, + [1832] = { + .class_hid = BNXT_ULP_CLASS_HID_c157e, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 114752UL, @@ -26650,8 +41425,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT } }, - [1223] = { - .class_hid = BNXT_ULP_CLASS_HID_0a78, + [1833] = { + .class_hid = BNXT_ULP_CLASS_HID_a0d8c, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 163840UL, @@ -26667,8 +41442,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT } }, - [1224] = { - .class_hid = BNXT_ULP_CLASS_HID_166c, + [1834] = { + .class_hid = BNXT_ULP_CLASS_HID_a182c, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 163904UL, @@ -26685,8 +41460,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT } }, - [1225] = { - .class_hid = BNXT_ULP_CLASS_HID_233c, + [1835] = { + .class_hid = BNXT_ULP_CLASS_HID_a1b9c, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 180224UL, @@ -26703,8 +41478,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT } }, - [1226] = { - .class_hid = BNXT_ULP_CLASS_HID_0f20, + [1836] = { + .class_hid = BNXT_ULP_CLASS_HID_a163c, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 180288UL, @@ -26722,8 +41497,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT } }, - [1227] = { - .class_hid = BNXT_ULP_CLASS_HID_2a7c, + [1837] = { + .class_hid = BNXT_ULP_CLASS_HID_e0308, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 229376UL, @@ -26740,8 +41515,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT } }, - [1228] = { - .class_hid = BNXT_ULP_CLASS_HID_3660, + [1838] = { + .class_hid = BNXT_ULP_CLASS_HID_e1da8, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 229440UL, @@ -26759,8 +41534,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT } }, - [1229] = { - .class_hid = BNXT_ULP_CLASS_HID_4330, + [1839] = { + .class_hid = BNXT_ULP_CLASS_HID_e1918, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 245760UL, @@ -26778,8 +41553,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT } }, - [1230] = { - .class_hid = BNXT_ULP_CLASS_HID_2f24, + [1840] = { + .class_hid = BNXT_ULP_CLASS_HID_e0bda, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 245824UL, @@ -26798,8 +41573,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT } }, - [1231] = { - .class_hid = BNXT_ULP_CLASS_HID_5584, + [1841] = { + .class_hid = BNXT_ULP_CLASS_HID_20a88, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 131072UL, @@ -26814,8 +41589,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { .field_sig = { .bits = BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR } }, - [1232] = { - .class_hid = BNXT_ULP_CLASS_HID_2198, + [1842] = { + .class_hid = BNXT_ULP_CLASS_HID_20528, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 131136UL, @@ -26831,8 +41606,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_OO_VLAN_VID | BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR } }, - [1233] = { - .class_hid = BNXT_ULP_CLASS_HID_7588, + [1843] = { + .class_hid = BNXT_ULP_CLASS_HID_6080c, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 196608UL, @@ -26848,8 +41623,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR } }, - [1234] = { - .class_hid = BNXT_ULP_CLASS_HID_419c, + [1844] = { + .class_hid = BNXT_ULP_CLASS_HID_61aac, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 196672UL, @@ -26866,8 +41641,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR } }, - [1235] = { - .class_hid = BNXT_ULP_CLASS_HID_27758, + [1845] = { + .class_hid = BNXT_ULP_CLASS_HID_31a18, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 393216UL, @@ -26883,8 +41658,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT } }, - [1236] = { - .class_hid = BNXT_ULP_CLASS_HID_243ac, + [1846] = { + .class_hid = BNXT_ULP_CLASS_HID_314b8, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 393280UL, @@ -26901,8 +41676,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT } }, - [1237] = { - .class_hid = BNXT_ULP_CLASS_HID_20c10, + [1847] = { + .class_hid = BNXT_ULP_CLASS_HID_71f9c, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 458752UL, @@ -26919,8 +41694,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT } }, - [1238] = { - .class_hid = BNXT_ULP_CLASS_HID_21864, + [1848] = { + .class_hid = BNXT_ULP_CLASS_HID_70a5e, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 458816UL, @@ -26938,8 +41713,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT } }, - [1239] = { - .class_hid = BNXT_ULP_CLASS_HID_130c8, + [1849] = { + .class_hid = BNXT_ULP_CLASS_HID_282c0, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 655360UL, @@ -26955,8 +41730,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT } }, - [1240] = { - .class_hid = BNXT_ULP_CLASS_HID_11cdc, + [1850] = { + .class_hid = BNXT_ULP_CLASS_HID_29d60, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 655424UL, @@ -26973,8 +41748,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT } }, - [1241] = { - .class_hid = BNXT_ULP_CLASS_HID_150cc, + [1851] = { + .class_hid = BNXT_ULP_CLASS_HID_68044, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 720896UL, @@ -26991,8 +41766,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT } }, - [1242] = { - .class_hid = BNXT_ULP_CLASS_HID_13d20, + [1852] = { + .class_hid = BNXT_ULP_CLASS_HID_692e4, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 720960UL, @@ -27010,8 +41785,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT } }, - [1243] = { - .class_hid = BNXT_ULP_CLASS_HID_3529c, + [1853] = { + .class_hid = BNXT_ULP_CLASS_HID_39250, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 917504UL, @@ -27028,8 +41803,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT } }, - [1244] = { - .class_hid = BNXT_ULP_CLASS_HID_33ef0, + [1854] = { + .class_hid = BNXT_ULP_CLASS_HID_38c12, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 917568UL, @@ -27047,8 +41822,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT } }, - [1245] = { - .class_hid = BNXT_ULP_CLASS_HID_372e0, + [1855] = { + .class_hid = BNXT_ULP_CLASS_HID_797d4, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 983040UL, @@ -27066,8 +41841,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT } }, - [1246] = { - .class_hid = BNXT_ULP_CLASS_HID_35ef4, + [1856] = { + .class_hid = BNXT_ULP_CLASS_HID_78196, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 983104UL, @@ -27086,8 +41861,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT | BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT } }, - [1247] = { - .class_hid = BNXT_ULP_CLASS_HID_2dfc, + [1857] = { + .class_hid = BNXT_ULP_CLASS_HID_80f32, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 32768UL, @@ -27102,8 +41877,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { .field_sig = { .bits = BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR } }, - [1248] = { - .class_hid = BNXT_ULP_CLASS_HID_39e0, + [1858] = { + .class_hid = BNXT_ULP_CLASS_HID_81992, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 32832UL, @@ -27119,8 +41894,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_OO_VLAN_VID | BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR } }, - [1249] = { - .class_hid = BNXT_ULP_CLASS_HID_4530, + [1859] = { + .class_hid = BNXT_ULP_CLASS_HID_80522, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 49152UL, @@ -27136,8 +41911,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR } }, - [1250] = { - .class_hid = BNXT_ULP_CLASS_HID_5124, + [1860] = { + .class_hid = BNXT_ULP_CLASS_HID_81782, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 49216UL, @@ -27154,8 +41929,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_SRC_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR } }, - [1251] = { - .class_hid = BNXT_ULP_CLASS_HID_4df0, + [1861] = { + .class_hid = BNXT_ULP_CLASS_HID_c0cbe, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 98304UL, @@ -27171,8 +41946,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT } }, - [1252] = { - .class_hid = BNXT_ULP_CLASS_HID_59e4, + [1862] = { + .class_hid = BNXT_ULP_CLASS_HID_c1f1e, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 98368UL, @@ -27189,8 +41964,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT } }, - [1253] = { - .class_hid = BNXT_ULP_CLASS_HID_1c78, + [1863] = { + .class_hid = BNXT_ULP_CLASS_HID_c1aae, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 114688UL, @@ -27207,8 +41982,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT } }, - [1254] = { - .class_hid = BNXT_ULP_CLASS_HID_7118, + [1864] = { + .class_hid = BNXT_ULP_CLASS_HID_c150e, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 114752UL, @@ -27226,8 +42001,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT } }, - [1255] = { - .class_hid = BNXT_ULP_CLASS_HID_0998, + [1865] = { + .class_hid = BNXT_ULP_CLASS_HID_a0dfc, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 163840UL, @@ -27243,8 +42018,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT } }, - [1256] = { - .class_hid = BNXT_ULP_CLASS_HID_158c, + [1866] = { + .class_hid = BNXT_ULP_CLASS_HID_a185c, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 163904UL, @@ -27261,8 +42036,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT } }, - [1257] = { - .class_hid = BNXT_ULP_CLASS_HID_20dc, + [1867] = { + .class_hid = BNXT_ULP_CLASS_HID_a1bec, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 180224UL, @@ -27279,8 +42054,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT } }, - [1258] = { - .class_hid = BNXT_ULP_CLASS_HID_0cc0, + [1868] = { + .class_hid = BNXT_ULP_CLASS_HID_a164c, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 180288UL, @@ -27298,8 +42073,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT } }, - [1259] = { - .class_hid = BNXT_ULP_CLASS_HID_299c, + [1869] = { + .class_hid = BNXT_ULP_CLASS_HID_e0378, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 229376UL, @@ -27316,8 +42091,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT } }, - [1260] = { - .class_hid = BNXT_ULP_CLASS_HID_3580, + [1870] = { + .class_hid = BNXT_ULP_CLASS_HID_e1dd8, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 229440UL, @@ -27335,8 +42110,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT } }, - [1261] = { - .class_hid = BNXT_ULP_CLASS_HID_40d0, + [1871] = { + .class_hid = BNXT_ULP_CLASS_HID_e1968, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 245760UL, @@ -27354,8 +42129,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT } }, - [1262] = { - .class_hid = BNXT_ULP_CLASS_HID_2cc4, + [1872] = { + .class_hid = BNXT_ULP_CLASS_HID_e0baa, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 245824UL, @@ -27374,8 +42149,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT } }, - [1263] = { - .class_hid = BNXT_ULP_CLASS_HID_55a4, + [1873] = { + .class_hid = BNXT_ULP_CLASS_HID_20af8, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 131072UL, @@ -27390,8 +42165,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { .field_sig = { .bits = BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR } }, - [1264] = { - .class_hid = BNXT_ULP_CLASS_HID_21b8, + [1874] = { + .class_hid = BNXT_ULP_CLASS_HID_20558, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 131136UL, @@ -27407,8 +42182,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_OO_VLAN_VID | BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR } }, - [1265] = { - .class_hid = BNXT_ULP_CLASS_HID_75a8, + [1875] = { + .class_hid = BNXT_ULP_CLASS_HID_6087c, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 196608UL, @@ -27424,8 +42199,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR } }, - [1266] = { - .class_hid = BNXT_ULP_CLASS_HID_41bc, + [1876] = { + .class_hid = BNXT_ULP_CLASS_HID_61adc, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 196672UL, @@ -27442,8 +42217,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_SRC_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR } }, - [1267] = { - .class_hid = BNXT_ULP_CLASS_HID_27778, + [1877] = { + .class_hid = BNXT_ULP_CLASS_HID_31a68, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 393216UL, @@ -27459,8 +42234,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT } }, - [1268] = { - .class_hid = BNXT_ULP_CLASS_HID_2438c, + [1878] = { + .class_hid = BNXT_ULP_CLASS_HID_314c8, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 393280UL, @@ -27477,8 +42252,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT } }, - [1269] = { - .class_hid = BNXT_ULP_CLASS_HID_20c30, + [1879] = { + .class_hid = BNXT_ULP_CLASS_HID_71fec, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 458752UL, @@ -27495,8 +42270,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT } }, - [1270] = { - .class_hid = BNXT_ULP_CLASS_HID_21844, + [1880] = { + .class_hid = BNXT_ULP_CLASS_HID_70a2e, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 458816UL, @@ -27514,8 +42289,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT } }, - [1271] = { - .class_hid = BNXT_ULP_CLASS_HID_130e8, + [1881] = { + .class_hid = BNXT_ULP_CLASS_HID_282b0, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 655360UL, @@ -27531,8 +42306,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT } }, - [1272] = { - .class_hid = BNXT_ULP_CLASS_HID_11cfc, + [1882] = { + .class_hid = BNXT_ULP_CLASS_HID_29d10, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 655424UL, @@ -27549,8 +42324,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT } }, - [1273] = { - .class_hid = BNXT_ULP_CLASS_HID_150ec, + [1883] = { + .class_hid = BNXT_ULP_CLASS_HID_68034, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 720896UL, @@ -27567,8 +42342,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT } }, - [1274] = { - .class_hid = BNXT_ULP_CLASS_HID_13d00, + [1884] = { + .class_hid = BNXT_ULP_CLASS_HID_69294, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 720960UL, @@ -27586,8 +42361,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT } }, - [1275] = { - .class_hid = BNXT_ULP_CLASS_HID_352bc, + [1885] = { + .class_hid = BNXT_ULP_CLASS_HID_39220, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 917504UL, @@ -27604,8 +42379,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT } }, - [1276] = { - .class_hid = BNXT_ULP_CLASS_HID_33ed0, + [1886] = { + .class_hid = BNXT_ULP_CLASS_HID_38c62, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 917568UL, @@ -27623,8 +42398,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT } }, - [1277] = { - .class_hid = BNXT_ULP_CLASS_HID_372c0, + [1887] = { + .class_hid = BNXT_ULP_CLASS_HID_797a4, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 983040UL, @@ -27642,8 +42417,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT } }, - [1278] = { - .class_hid = BNXT_ULP_CLASS_HID_35ed4, + [1888] = { + .class_hid = BNXT_ULP_CLASS_HID_781e6, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 983104UL, @@ -27662,8 +42437,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT | BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT } }, - [1279] = { - .class_hid = BNXT_ULP_CLASS_HID_3866, + [1889] = { + .class_hid = BNXT_ULP_CLASS_HID_0f05, .class_tid = 3, .hdr_sig_id = 0, .flow_sig_id = 4UL, @@ -27677,8 +42452,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_0_BITMASK_O_ETH_DMAC | BNXT_ULP_HF_0_3_0_BITMASK_O_ETH_SMAC } }, - [1280] = { - .class_hid = BNXT_ULP_CLASS_HID_381e, + [1890] = { + .class_hid = BNXT_ULP_CLASS_HID_0f09, .class_tid = 3, .hdr_sig_id = 1, .flow_sig_id = 4UL, @@ -27692,8 +42467,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_1_BITMASK_O_ETH_DMAC | BNXT_ULP_HF_0_3_1_BITMASK_O_ETH_SMAC } }, - [1281] = { - .class_hid = BNXT_ULP_CLASS_HID_3860, + [1891] = { + .class_hid = BNXT_ULP_CLASS_HID_0f06, .class_tid = 3, .hdr_sig_id = 2, .flow_sig_id = 4UL, @@ -27708,8 +42483,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_2_BITMASK_O_ETH_DMAC | BNXT_ULP_HF_0_3_2_BITMASK_O_ETH_SMAC } }, - [1282] = { - .class_hid = BNXT_ULP_CLASS_HID_0454, + [1892] = { + .class_hid = BNXT_ULP_CLASS_HID_19a6, .class_tid = 3, .hdr_sig_id = 2, .flow_sig_id = 68UL, @@ -27725,8 +42500,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_2_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_2_BITMASK_OO_VLAN_VID } }, - [1283] = { - .class_hid = BNXT_ULP_CLASS_HID_3818, + [1893] = { + .class_hid = BNXT_ULP_CLASS_HID_0f0a, .class_tid = 3, .hdr_sig_id = 3, .flow_sig_id = 4UL, @@ -27741,8 +42516,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_3_BITMASK_O_ETH_DMAC | BNXT_ULP_HF_0_3_3_BITMASK_O_ETH_SMAC } }, - [1284] = { - .class_hid = BNXT_ULP_CLASS_HID_042c, + [1894] = { + .class_hid = BNXT_ULP_CLASS_HID_19aa, .class_tid = 3, .hdr_sig_id = 3, .flow_sig_id = 68UL, @@ -27758,8 +42533,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_3_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_3_BITMASK_OO_VLAN_VID } }, - [1285] = { - .class_hid = BNXT_ULP_CLASS_HID_3846, + [1895] = { + .class_hid = BNXT_ULP_CLASS_HID_0f15, .class_tid = 3, .hdr_sig_id = 4, .flow_sig_id = 4UL, @@ -27774,8 +42549,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_4_BITMASK_O_ETH_DMAC | BNXT_ULP_HF_0_3_4_BITMASK_O_ETH_SMAC } }, - [1286] = { - .class_hid = BNXT_ULP_CLASS_HID_387e, + [1896] = { + .class_hid = BNXT_ULP_CLASS_HID_0f19, .class_tid = 3, .hdr_sig_id = 5, .flow_sig_id = 4UL, @@ -27790,8 +42565,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_5_BITMASK_O_ETH_DMAC | BNXT_ULP_HF_0_3_5_BITMASK_O_ETH_SMAC } }, - [1287] = { - .class_hid = BNXT_ULP_CLASS_HID_3ba6, + [1897] = { + .class_hid = BNXT_ULP_CLASS_HID_0f65, .class_tid = 3, .hdr_sig_id = 6, .flow_sig_id = 4UL, @@ -27806,8 +42581,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_6_BITMASK_O_ETH_DMAC | BNXT_ULP_HF_0_3_6_BITMASK_O_ETH_SMAC } }, - [1288] = { - .class_hid = BNXT_ULP_CLASS_HID_385e, + [1898] = { + .class_hid = BNXT_ULP_CLASS_HID_0f69, .class_tid = 3, .hdr_sig_id = 7, .flow_sig_id = 4UL, @@ -27822,8 +42597,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_7_BITMASK_O_ETH_DMAC | BNXT_ULP_HF_0_3_7_BITMASK_O_ETH_SMAC } }, - [1289] = { - .class_hid = BNXT_ULP_CLASS_HID_3840, + [1899] = { + .class_hid = BNXT_ULP_CLASS_HID_0f16, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 4UL, @@ -27839,8 +42614,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_ETH_DMAC | BNXT_ULP_HF_0_3_8_BITMASK_O_ETH_SMAC } }, - [1290] = { - .class_hid = BNXT_ULP_CLASS_HID_0474, + [1900] = { + .class_hid = BNXT_ULP_CLASS_HID_19b6, .class_tid = 3, .hdr_sig_id = 8, .flow_sig_id = 68UL, @@ -27857,8 +42632,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_8_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_8_BITMASK_OO_VLAN_VID } }, - [1291] = { - .class_hid = BNXT_ULP_CLASS_HID_3878, + [1901] = { + .class_hid = BNXT_ULP_CLASS_HID_0f1a, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 4UL, @@ -27874,8 +42649,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_ETH_DMAC | BNXT_ULP_HF_0_3_9_BITMASK_O_ETH_SMAC } }, - [1292] = { - .class_hid = BNXT_ULP_CLASS_HID_044c, + [1902] = { + .class_hid = BNXT_ULP_CLASS_HID_19ba, .class_tid = 3, .hdr_sig_id = 9, .flow_sig_id = 68UL, @@ -27892,8 +42667,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_9_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_9_BITMASK_OO_VLAN_VID } }, - [1293] = { - .class_hid = BNXT_ULP_CLASS_HID_3ba0, + [1903] = { + .class_hid = BNXT_ULP_CLASS_HID_0f66, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 4UL, @@ -27909,8 +42684,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_ETH_DMAC | BNXT_ULP_HF_0_3_10_BITMASK_O_ETH_SMAC } }, - [1294] = { - .class_hid = BNXT_ULP_CLASS_HID_0794, + [1904] = { + .class_hid = BNXT_ULP_CLASS_HID_19c6, .class_tid = 3, .hdr_sig_id = 10, .flow_sig_id = 68UL, @@ -27927,8 +42702,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_10_BITMASK_O_ETH_SMAC | BNXT_ULP_HF_0_3_10_BITMASK_OO_VLAN_VID } }, - [1295] = { - .class_hid = BNXT_ULP_CLASS_HID_3858, + [1905] = { + .class_hid = BNXT_ULP_CLASS_HID_0f6a, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 4UL, @@ -27944,8 +42719,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_O_ETH_DMAC | BNXT_ULP_HF_0_3_11_BITMASK_O_ETH_SMAC } }, - [1296] = { - .class_hid = BNXT_ULP_CLASS_HID_046c, + [1906] = { + .class_hid = BNXT_ULP_CLASS_HID_19ca, .class_tid = 3, .hdr_sig_id = 11, .flow_sig_id = 68UL, @@ -27963,3 +42738,4 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF_0_3_11_BITMASK_OO_VLAN_VID } } }; + diff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_enum.h b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_enum.h index 739c546d9e..8afbc37e38 100644 --- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_enum.h +++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_enum.h @@ -1,66 +1,65 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2014-2021 Broadcom + * Copyright(c) 2014-2023 Broadcom * All rights reserved. */ -/* date: Wed Nov 24 17:15:38 2021 */ - #ifndef ULP_TEMPLATE_DB_H_ #define ULP_TEMPLATE_DB_H_ -#define BNXT_ULP_REGFILE_MAX_SZ 46 +#define BNXT_ULP_REGFILE_MAX_SZ 61 #define BNXT_ULP_MAX_NUM_DEVICES 4 #define BNXT_ULP_LOG2_MAX_NUM_DEV 2 -#define BNXT_ULP_GEN_TBL_MAX_SZ 18 -#define BNXT_ULP_CLASS_SIG_TBL_MAX_SZ 262144 -#define BNXT_ULP_CLASS_MATCH_LIST_MAX_SZ 1297 -#define BNXT_ULP_CLASS_HID_LOW_PRIME 6701 -#define BNXT_ULP_CLASS_HID_HIGH_PRIME 7907 -#define BNXT_ULP_CLASS_HID_SHFTR 28 +#define BNXT_ULP_GEN_TBL_MAX_SZ 36 +#define BNXT_ULP_CLASS_SIG_TBL_MAX_SZ 1048576 +#define BNXT_ULP_CLASS_MATCH_LIST_MAX_SZ 1907 +#define BNXT_ULP_CLASS_HID_LOW_PRIME 4049 +#define BNXT_ULP_CLASS_HID_HIGH_PRIME 7919 +#define BNXT_ULP_CLASS_HID_SHFTR 29 #define BNXT_ULP_CLASS_HID_SHFTL 28 -#define BNXT_ULP_CLASS_HID_MASK 262143 -#define BNXT_ULP_ACT_SIG_TBL_MAX_SZ 2048 -#define BNXT_ULP_ACT_MATCH_LIST_MAX_SZ 94 +#define BNXT_ULP_CLASS_HID_MASK 1048575 +#define BNXT_ULP_ACT_SIG_TBL_MAX_SZ 32768 +#define BNXT_ULP_ACT_MATCH_LIST_MAX_SZ 546 #define BNXT_ULP_ACT_HID_LOW_PRIME 7919 -#define BNXT_ULP_ACT_HID_HIGH_PRIME 3793 -#define BNXT_ULP_ACT_HID_SHFTR 27 -#define BNXT_ULP_ACT_HID_SHFTL 26 -#define BNXT_ULP_ACT_HID_MASK 2047 -#define BNXT_ULP_APP_RESOURCE_RESV_LIST_MAX_SZ 16 -#define BNXT_ULP_GLB_RESOURCE_TBL_MAX_SZ 132 -#define BNXT_ULP_APP_GLB_RESOURCE_TBL_MAX_SZ 144 -#define BNXT_ULP_RESOURCE_RESV_LIST_MAX_SZ 409 -#define BNXT_ULP_APP_CAP_TBL_MAX_SZ 12 +#define BNXT_ULP_ACT_HID_HIGH_PRIME 7919 +#define BNXT_ULP_ACT_HID_SHFTR 25 +#define BNXT_ULP_ACT_HID_SHFTL 27 +#define BNXT_ULP_ACT_HID_MASK 32767 +#define BNXT_ULP_APP_RESOURCE_RESV_LIST_MAX_SZ 46 +#define BNXT_ULP_GLB_RESOURCE_TBL_MAX_SZ 537 +#define BNXT_ULP_APP_GLB_RESOURCE_TBL_MAX_SZ 187 +#define BNXT_ULP_RESOURCE_RESV_LIST_MAX_SZ 970 +#define BNXT_ULP_APP_CAP_TBL_MAX_SZ 25 #define BNXT_ULP_COND_GOTO_REJECT 1023 #define BNXT_ULP_COND_GOTO_RF 0x10000 #define BNXT_ULP_GLB_FIELD_TBL_SHIFT 7 -#define BNXT_ULP_HDR_SIG_ID_SHIFT 4 +#define BNXT_ULP_HDR_SIG_ID_SHIFT 5 +#define BNXT_ULP_APP_ID_CONFIG 0 #define BNXT_ULP_APP_ID_SHIFT 4 -#define BNXT_ULP_GLB_FIELD_TBL_SIZE 7643 +#define BNXT_ULP_GLB_FIELD_TBL_SIZE 13805 #define ULP_WH_PLUS_CLASS_TMPL_LIST_SIZE 6 #define ULP_WH_PLUS_CLASS_TBL_LIST_SIZE 89 -#define ULP_WH_PLUS_CLASS_KEY_INFO_LIST_SIZE 600 +#define ULP_WH_PLUS_CLASS_KEY_INFO_LIST_SIZE 606 #define ULP_WH_PLUS_CLASS_IDENT_LIST_SIZE 26 #define ULP_WH_PLUS_CLASS_RESULT_FIELD_LIST_SIZE 618 #define ULP_WH_PLUS_CLASS_COND_LIST_SIZE 49 #define ULP_THOR_CLASS_TMPL_LIST_SIZE 6 -#define ULP_THOR_CLASS_TBL_LIST_SIZE 116 -#define ULP_THOR_CLASS_KEY_INFO_LIST_SIZE 2323 +#define ULP_THOR_CLASS_TBL_LIST_SIZE 124 +#define ULP_THOR_CLASS_KEY_INFO_LIST_SIZE 2514 #define ULP_THOR_CLASS_IDENT_LIST_SIZE 38 -#define ULP_THOR_CLASS_RESULT_FIELD_LIST_SIZE 1313 -#define ULP_THOR_CLASS_COND_LIST_SIZE 54 -#define ULP_WH_PLUS_ACT_TMPL_LIST_SIZE 7 -#define ULP_WH_PLUS_ACT_TBL_LIST_SIZE 37 +#define ULP_THOR_CLASS_RESULT_FIELD_LIST_SIZE 1517 +#define ULP_THOR_CLASS_COND_LIST_SIZE 55 +#define ULP_WH_PLUS_ACT_TMPL_LIST_SIZE 11 +#define ULP_WH_PLUS_ACT_TBL_LIST_SIZE 46 #define ULP_WH_PLUS_ACT_KEY_INFO_LIST_SIZE 2 #define ULP_WH_PLUS_ACT_IDENT_LIST_SIZE 1 -#define ULP_WH_PLUS_ACT_RESULT_FIELD_LIST_SIZE 536 -#define ULP_WH_PLUS_ACT_COND_LIST_SIZE 41 -#define ULP_THOR_ACT_TMPL_LIST_SIZE 7 -#define ULP_THOR_ACT_TBL_LIST_SIZE 36 -#define ULP_THOR_ACT_KEY_INFO_LIST_SIZE 16 -#define ULP_THOR_ACT_IDENT_LIST_SIZE 3 -#define ULP_THOR_ACT_RESULT_FIELD_LIST_SIZE 505 -#define ULP_THOR_ACT_COND_LIST_SIZE 27 +#define ULP_WH_PLUS_ACT_RESULT_FIELD_LIST_SIZE 616 +#define ULP_WH_PLUS_ACT_COND_LIST_SIZE 65 +#define ULP_THOR_ACT_TMPL_LIST_SIZE 11 +#define ULP_THOR_ACT_TBL_LIST_SIZE 96 +#define ULP_THOR_ACT_KEY_INFO_LIST_SIZE 34 +#define ULP_THOR_ACT_IDENT_LIST_SIZE 19 +#define ULP_THOR_ACT_RESULT_FIELD_LIST_SIZE 794 +#define ULP_THOR_ACT_COND_LIST_SIZE 75 enum bnxt_ulp_act_bit { BNXT_ULP_ACT_BIT_MARK = 0x0000000000000001, @@ -90,7 +89,18 @@ enum bnxt_ulp_act_bit { BNXT_ULP_ACT_BIT_SHARED = 0x0000000001000000, BNXT_ULP_ACT_BIT_SAMPLE = 0x0000000002000000, BNXT_ULP_ACT_BIT_SHARED_SAMPLE = 0x0000000004000000, - BNXT_ULP_ACT_BIT_LAST = 0x0000000008000000 + BNXT_ULP_ACT_BIT_QUEUE = 0x0000000008000000, + BNXT_ULP_ACT_BIT_DELETE = 0x0000000010000000, + BNXT_ULP_ACT_BIT_UPDATE = 0x0000000020000000, + BNXT_ULP_ACT_BIT_SHARED_METER = 0x0000000040000000, + BNXT_ULP_ACT_BIT_METER_PROFILE = 0x0000000080000000, + BNXT_ULP_ACT_BIT_GOTO_CHAIN = 0x0000000100000000, + BNXT_ULP_ACT_BIT_VF_TO_VF = 0x0000000200000000, + BNXT_ULP_ACT_BIT_IP_ENCAP = 0x0000000400000000, + BNXT_ULP_ACT_BIT_IP_DECAP = 0x0000000800000000, + BNXT_ULP_ACT_BIT_L2_ENCAP = 0x0000001000000000, + BNXT_ULP_ACT_BIT_L2_DECAP = 0x0000002000000000, + BNXT_ULP_ACT_BIT_LAST = 0x0000004000000000 }; enum bnxt_ulp_hdr_bit { @@ -112,10 +122,13 @@ enum bnxt_ulp_hdr_bit { BNXT_ULP_HDR_BIT_I_TCP = 0x0000000000008000, BNXT_ULP_HDR_BIT_I_UDP = 0x0000000000010000, BNXT_ULP_HDR_BIT_I_ICMP = 0x0000000000020000, - BNXT_ULP_HDR_BIT_F1 = 0x0000000000040000, - BNXT_ULP_HDR_BIT_F2 = 0x0000000000080000, - BNXT_ULP_HDR_BIT_SVIF_IGNORE = 0x0000000000100000, - BNXT_ULP_HDR_BIT_LAST = 0x0000000000200000 + BNXT_ULP_HDR_BIT_O_ECPRI = 0x0000000000040000, + BNXT_ULP_HDR_BIT_O_ROE = 0x0000000000080000, + BNXT_ULP_HDR_BIT_F1 = 0x0000000000100000, + BNXT_ULP_HDR_BIT_F2 = 0x0000000000200000, + BNXT_ULP_HDR_BIT_SVIF_IGNORE = 0x0000000000400000, + BNXT_ULP_HDR_BIT_O_SRV6 = 0x0000000000800000, + BNXT_ULP_HDR_BIT_LAST = 0x0000000001000000 }; enum bnxt_ulp_accept_opc { @@ -141,11 +154,11 @@ enum bnxt_ulp_cf_idx { BNXT_ULP_CF_IDX_NOT_USED = 0, BNXT_ULP_CF_IDX_MPLS_TAG_NUM = 1, BNXT_ULP_CF_IDX_O_VTAG_NUM = 2, - BNXT_ULP_CF_IDX_O_NO_VTAG = 3, + BNXT_ULP_CF_IDX_O_HAS_VTAG = 3, BNXT_ULP_CF_IDX_O_ONE_VTAG = 4, BNXT_ULP_CF_IDX_O_TWO_VTAGS = 5, BNXT_ULP_CF_IDX_I_VTAG_NUM = 6, - BNXT_ULP_CF_IDX_I_NO_VTAG = 7, + BNXT_ULP_CF_IDX_I_HAS_VTAG = 7, BNXT_ULP_CF_IDX_I_ONE_VTAG = 8, BNXT_ULP_CF_IDX_I_TWO_VTAGS = 9, BNXT_ULP_CF_IDX_INCOMING_IF = 10, @@ -214,7 +227,17 @@ enum bnxt_ulp_cf_idx { BNXT_ULP_CF_IDX_II_VLAN_FB_VID = 73, BNXT_ULP_CF_IDX_SOCKET_DIRECT = 74, BNXT_ULP_CF_IDX_SOCKET_DIRECT_VPORT = 75, - BNXT_ULP_CF_IDX_LAST = 76 + BNXT_ULP_CF_IDX_TUNNEL_SPORT = 76, + BNXT_ULP_CF_IDX_VF_META_FID = 77, + BNXT_ULP_CF_IDX_DEV_ACT_PORT_ID = 78, + BNXT_ULP_CF_IDX_O_VLAN_NO_IGNORE = 79, + BNXT_ULP_CF_IDX_I_VLAN_NO_IGNORE = 80, + BNXT_ULP_CF_IDX_HA_SUPPORT_DISABLED = 81, + BNXT_ULP_CF_IDX_CHAIN_ID_METADATA = 82, + BNXT_ULP_CF_IDX_SRV6_UPAR_ID = 83, + BNXT_ULP_CF_IDX_SRV6_T_ID = 84, + BNXT_ULP_CF_IDX_GENERIC_SIZE = 85, + BNXT_ULP_CF_IDX_LAST = 86 }; enum bnxt_ulp_cond_list_opc { @@ -242,7 +265,9 @@ enum bnxt_ulp_cond_opc { BNXT_ULP_COND_OPC_EXT_MEM_NOT_SET = 13, BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET = 14, BNXT_ULP_COND_OPC_ENC_HDR_BIT_NOT_SET = 15, - BNXT_ULP_COND_OPC_LAST = 16 + BNXT_ULP_COND_OPC_ACT_PROP_IS_SET = 16, + BNXT_ULP_COND_OPC_ACT_PROP_NOT_SET = 17, + BNXT_ULP_COND_OPC_LAST = 18 }; enum bnxt_ulp_critical_resource { @@ -297,15 +322,30 @@ enum bnxt_ulp_enc_field { BNXT_ULP_ENC_FIELD_VXLAN_RSVD0 = 23, BNXT_ULP_ENC_FIELD_VXLAN_VNI = 24, BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 = 25, - BNXT_ULP_ENC_FIELD_LAST = 26 + BNXT_ULP_ENC_FIELD_SRV6_NEXT_HDR = 26, + BNXT_ULP_ENC_FIELD_SRV6_HDR_LEN = 27, + BNXT_ULP_ENC_FIELD_SRV6_ROUTING_TYPE = 28, + BNXT_ULP_ENC_FIELD_SRV6_SEG_LEFT = 29, + BNXT_ULP_ENC_FIELD_SRV6_LAST_ENTRY = 30, + BNXT_ULP_ENC_FIELD_SRV6_FLAGS = 31, + BNXT_ULP_ENC_FIELD_SRV6_TAG = 32, + BNXT_ULP_ENC_FIELD_SRV6_SEG_LIST0 = 33, + BNXT_ULP_ENC_FIELD_SRV6_SEG_LIST1 = 34, + BNXT_ULP_ENC_FIELD_SRV6_SEG_LIST2 = 35, + BNXT_ULP_ENC_FIELD_SRV6_SEG_LIST3 = 36, + BNXT_ULP_ENC_FIELD_GENERIC_SIZE = 37, + BNXT_ULP_ENC_FIELD_GENERIC_RSVD = 38, + BNXT_ULP_ENC_FIELD_LAST = 39 }; enum bnxt_ulp_fdb_opc { BNXT_ULP_FDB_OPC_PUSH_FID = 0, BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE = 1, BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE = 2, - BNXT_ULP_FDB_OPC_NOP = 3, - BNXT_ULP_FDB_OPC_LAST = 4 + BNXT_ULP_FDB_OPC_DELETE_RID_REGFILE = 3, + BNXT_ULP_FDB_OPC_CLEAR_RID_REGFILE = 4, + BNXT_ULP_FDB_OPC_NOP = 5, + BNXT_ULP_FDB_OPC_LAST = 6 }; enum bnxt_ulp_fdb_type { @@ -364,7 +404,9 @@ enum bnxt_ulp_func_opc { BNXT_ULP_FUNC_OPC_RSS_CONFIG = 8, BNXT_ULP_FUNC_OPC_GET_PARENT_MAC_ADDR = 9, BNXT_ULP_FUNC_OPC_ALLOC_L2_CTX_ID = 10, - BNXT_ULP_FUNC_OPC_LAST = 11 + BNXT_ULP_FUNC_OPC_TUNNEL_DST_PORT_ALLOC = 11, + BNXT_ULP_FUNC_OPC_TUNNEL_DST_PORT_FREE = 12, + BNXT_ULP_FUNC_OPC_LAST = 13 }; enum bnxt_ulp_func_src { @@ -391,71 +433,101 @@ enum bnxt_ulp_generic_tbl_opc { enum bnxt_ulp_glb_rf_idx { BNXT_ULP_GLB_RF_IDX_NOT_USED = 0, BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID = 1, - BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR = 2, - BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID = 3, - BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID = 4, - BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR = 5, - BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0 = 6, - BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1 = 7, - BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2 = 8, - BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3 = 9, - BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4 = 10, - BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_5 = 11, - BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_6 = 12, - BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_7 = 13, - BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0 = 14, - BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1 = 15, - BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2 = 16, - BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_3 = 17, - BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_4 = 18, - BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0 = 19, - BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_1 = 20, - BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_2 = 21, - BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_3 = 22, - BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_4 = 23, - BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_5 = 24, - BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_6 = 25, - BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_7 = 26, - BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_0 = 27, - BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_1 = 28, - BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_2 = 29, - BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_3 = 30, - BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_4 = 31, - BNXT_ULP_GLB_RF_IDX_GLB_METADATA_PROF_0 = 32, - BNXT_ULP_GLB_RF_IDX_GLB_METADATA_PROF_1 = 33, - BNXT_ULP_GLB_RF_IDX_GLB_VFR_PROF_FUNC_0 = 34, - BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_0 = 35, - BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_0 = 36, - BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_0 = 37, - BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_1 = 38, - BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_2 = 39, - BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_3 = 40, - BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_0 = 41, - BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_1 = 42, - BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_PROFILE_ID_0 = 43, - BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_PROFILE_ID_1 = 44, - BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_0 = 45, - BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_1 = 46, - BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_2 = 47, - BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_3 = 48, - BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_4 = 49, - BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_5 = 50, - BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_6 = 51, - BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_7 = 52, - BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_8 = 53, - BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_9 = 54, - BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_10 = 55, - BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_KEY_ID_0 = 56, - BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_KEY_ID_1 = 57, - BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_0 = 58, - BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_1 = 59, - BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_2 = 60, - BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_3 = 61, - BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_4 = 62, - BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_0 = 63, - BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_1 = 64, - BNXT_ULP_GLB_RF_IDX_GRE_PROF_FUNC_ID = 65, - BNXT_ULP_GLB_RF_IDX_LAST = 66 + BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID_0 = 2, + BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID_1 = 3, + BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID_2 = 4, + BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR = 5, + BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID = 6, + BNXT_ULP_GLB_RF_IDX_GLB_L2_CNTXT_ID_0 = 7, + BNXT_ULP_GLB_RF_IDX_GLB_L2_CNTXT_ID_1 = 8, + BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID = 9, + BNXT_ULP_GLB_RF_IDX_VF_2_VFR_PROF_FUNC_ID = 10, + BNXT_ULP_GLB_RF_IDX_ANY_2_VF_PROF_FUNC_ID = 11, + BNXT_ULP_GLB_RF_IDX_GLB_MODIFY_PTR = 12, + BNXT_ULP_GLB_RF_IDX_GLB_DROP_AREC_PTR = 13, + BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR = 14, + BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0 = 15, + BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1 = 16, + BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2 = 17, + BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3 = 18, + BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4 = 19, + BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_5 = 20, + BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_6 = 21, + BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_7 = 22, + BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_8 = 23, + BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_9 = 24, + BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0 = 25, + BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1 = 26, + BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2 = 27, + BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_3 = 28, + BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_4 = 29, + BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_5 = 30, + BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_6 = 31, + BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_7 = 32, + BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_8 = 33, + BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0 = 34, + BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_1 = 35, + BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_2 = 36, + BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_3 = 37, + BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_4 = 38, + BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_5 = 39, + BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_6 = 40, + BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_7 = 41, + BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_8 = 42, + BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_9 = 43, + BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_0 = 44, + BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_1 = 45, + BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_2 = 46, + BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_3 = 47, + BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_4 = 48, + BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_5 = 49, + BNXT_ULP_GLB_RF_IDX_GLB_METADATA_PROF_0 = 50, + BNXT_ULP_GLB_RF_IDX_GLB_METADATA_PROF_1 = 51, + BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_0 = 52, + BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_1 = 53, + BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_0 = 54, + BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_1 = 55, + BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_0 = 56, + BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_1 = 57, + BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_2 = 58, + BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_3 = 59, + BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_0 = 60, + BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_1 = 61, + BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_2 = 62, + BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_3 = 63, + BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_PROFILE_ID_0 = 64, + BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_PROFILE_ID_1 = 65, + BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_0 = 66, + BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_1 = 67, + BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_2 = 68, + BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_3 = 69, + BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_4 = 70, + BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_5 = 71, + BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_6 = 72, + BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_7 = 73, + BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_8 = 74, + BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_9 = 75, + BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_10 = 76, + BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_KEY_ID_0 = 77, + BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_KEY_ID_1 = 78, + BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_0 = 79, + BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_1 = 80, + BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_2 = 81, + BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_3 = 82, + BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_4 = 83, + BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_0 = 84, + BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_1 = 85, + BNXT_ULP_GLB_RF_IDX_GRE_PROF_FUNC_ID = 86, + BNXT_ULP_GLB_RF_IDX_RECYCLE_PROF_FUNC_ID = 87, + BNXT_ULP_GLB_RF_IDX_GLB_ECPRI_UPAR_ID = 88, + BNXT_ULP_GLB_RF_IDX_GLB_ECPRI_PROF_FUNC_ID = 89, + BNXT_ULP_GLB_RF_IDX_LAST = 90 +}; + +enum bnxt_ulp_global_register_tbl_opc { + BNXT_ULP_GLOBAL_REGISTER_TBL_OPC_NOT_USED = 0, + BNXT_ULP_GLOBAL_REGISTER_TBL_OPC_WR_REGFILE = 1, + BNXT_ULP_GLOBAL_REGISTER_TBL_OPC_LAST = 2 }; enum bnxt_ulp_hdr_type { @@ -482,7 +554,8 @@ enum bnxt_ulp_index_tbl_opc { BNXT_ULP_INDEX_TBL_OPC_RD_REGFILE = 4, BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_GLB_REGFILE = 5, BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE = 6, - BNXT_ULP_INDEX_TBL_OPC_LAST = 7 + BNXT_ULP_INDEX_TBL_OPC_UPDATE_REGFILE = 7, + BNXT_ULP_INDEX_TBL_OPC_LAST = 8 }; enum bnxt_ulp_mark_db_opc { @@ -516,14 +589,25 @@ enum bnxt_ulp_port_table { BNXT_ULP_PORT_TABLE_PHY_PORT_SPIF = 14, BNXT_ULP_PORT_TABLE_PHY_PORT_PARIF = 15, BNXT_ULP_PORT_TABLE_PHY_PORT_VPORT = 16, - BNXT_ULP_PORT_TABLE_LAST = 17 + BNXT_ULP_PORT_TABLE_PORT_IS_PF = 17, + BNXT_ULP_PORT_TABLE_VF_FUNC_METADATA = 18, + BNXT_ULP_PORT_TABLE_LAST = 19 }; enum bnxt_ulp_pri_opc { BNXT_ULP_PRI_OPC_NOT_USED = 0, BNXT_ULP_PRI_OPC_CONST = 1, BNXT_ULP_PRI_OPC_APP_PRI = 2, - BNXT_ULP_PRI_OPC_LAST = 3 + BNXT_ULP_PRI_OPC_APP_PRI_OR_CONST = 3, + BNXT_ULP_PRI_OPC_LAST = 4 +}; + +enum bnxt_ulp_ref_cnt_opc { + BNXT_ULP_REF_CNT_OPC_DEFAULT = 0, + BNXT_ULP_REF_CNT_OPC_NOP = 1, + BNXT_ULP_REF_CNT_OPC_DEC = 2, + BNXT_ULP_REF_CNT_OPC_INC = 3, + BNXT_ULP_REF_CNT_OPC_LAST = 4 }; enum bnxt_ulp_rf_idx { @@ -573,13 +657,22 @@ enum bnxt_ulp_rf_idx { BNXT_ULP_RF_IDX_SOCK_DIR_PARIF = 43, BNXT_ULP_RF_IDX_SOCK_DIR_ACT_PTR = 44, BNXT_ULP_RF_IDX_SOCK_DIR_PARENT_MAC = 45, - BNXT_ULP_RF_IDX_LAST = 46 -}; - -enum bnxt_ulp_shared_session { - BNXT_ULP_SHARED_SESSION_NO = 0, - BNXT_ULP_SHARED_SESSION_YES = 1, - BNXT_ULP_SHARED_SESSION_LAST = 2 + BNXT_ULP_RF_IDX_RSS_VNIC = 46, + BNXT_ULP_RF_IDX_PORT_IS_PF = 47, + BNXT_ULP_RF_IDX_METER_PROFILE_PTR_0 = 48, + BNXT_ULP_RF_IDX_METER_PTR_0 = 49, + BNXT_ULP_RF_IDX_REF_CNT = 50, + BNXT_ULP_RF_IDX_RF_0 = 51, + BNXT_ULP_RF_IDX_RF_1 = 52, + BNXT_ULP_RF_IDX_RF_2 = 53, + BNXT_ULP_RF_IDX_RF_3 = 54, + BNXT_ULP_RF_IDX_RF_4 = 55, + BNXT_ULP_RF_IDX_RF_5 = 56, + BNXT_ULP_RF_IDX_RF_6 = 57, + BNXT_ULP_RF_IDX_RF_7 = 58, + BNXT_ULP_RF_IDX_VF_FUNC_METADATA = 59, + BNXT_ULP_RF_IDX_CHAIN_ID_METADATA = 60, + BNXT_ULP_RF_IDX_LAST = 61 }; enum bnxt_ulp_tcam_tbl_opc { @@ -598,11 +691,22 @@ enum bnxt_ulp_template_type { BNXT_ULP_TEMPLATE_TYPE_LAST = 2 }; +enum bnxt_ulp_vnic_tbl_opc { + BNXT_ULP_VNIC_TBL_OPC_NOT_USED = 0, + BNXT_ULP_VNIC_TBL_OPC_ALLOC_WR_REGFILE = 1, + BNXT_ULP_VNIC_TBL_OPC_LAST = 2 +}; + enum bnxt_ulp_app_cap { BNXT_ULP_APP_CAP_SHARED_EN = 0x00000001, BNXT_ULP_APP_CAP_HOT_UPGRADE_EN = 0x00000002, BNXT_ULP_APP_CAP_UNICAST_ONLY = 0x00000004, - BNXT_ULP_APP_CAP_SOCKET_DIRECT = 0x00000008 + BNXT_ULP_APP_CAP_SOCKET_DIRECT = 0x00000008, + BNXT_ULP_APP_CAP_IP_TOS_PROTO_SUPPORT = 0x00000010, + BNXT_ULP_APP_CAP_BC_MC_SUPPORT = 0x00000020, + BNXT_ULP_APP_CAP_CUST_VXLAN = 0x00000040, + BNXT_ULP_APP_CAP_HA_DYNAMIC = 0x00000080, + BNXT_ULP_APP_CAP_SRV6 = 0x00000100 }; enum bnxt_ulp_fdb_resource_flags { @@ -628,7 +732,9 @@ enum bnxt_ulp_resource_func { BNXT_ULP_RESOURCE_FUNC_HW_FID = 0x85, BNXT_ULP_RESOURCE_FUNC_PARENT_FLOW = 0x86, BNXT_ULP_RESOURCE_FUNC_CHILD_FLOW = 0x87, - BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE = 0x88 + BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE = 0x88, + BNXT_ULP_RESOURCE_FUNC_VNIC_TABLE = 0x89, + BNXT_ULP_RESOURCE_FUNC_GLOBAL_REGISTER_TABLE = 0x8a }; enum bnxt_ulp_resource_sub_type { @@ -646,7 +752,30 @@ enum bnxt_ulp_resource_sub_type { BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_TUNNEL_CACHE = 5, BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SOURCE_PROPERTY_CACHE = 6, BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_VXLAN_ENCAP_REC_CACHE = 7, - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SOCKET_DIRECT_CACHE = 8 + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SOCKET_DIRECT_CACHE = 8, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_VXLAN_ENCAP_IPV6_REC_CACHE = 9, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SOURCE_PROPERTY_IPV6_CACHE = 10, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_OUTER_TUNNEL_CACHE = 11, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_METER_TBL_CACHE = 12, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_METER_PROFILE_TBL_CACHE = 13, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_GLOBAL_REGISTER_TBL = 14, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_CHAIN_ID_CACHE = 15, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_ENCAP_REC_CACHE = 16, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SRV6_ENCAP_REC_CACHE = 17, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_RSS_PARAMS = 18, + BNXT_ULP_RESOURCE_SUB_TYPE_VNIC_TABLE_RSS = 0, + BNXT_ULP_RESOURCE_SUB_TYPE_VNIC_TABLE_QUEUE = 1, + BNXT_ULP_RESOURCE_SUB_TYPE_GLOBAL_REGISTER_CUST_VXLAN = 0, + BNXT_ULP_RESOURCE_SUB_TYPE_GLOBAL_REGISTER_CUST_ECPRI = 1 +}; + +enum bnxt_ulp_session_type { + BNXT_ULP_SESSION_TYPE_DEFAULT = 0x00, + BNXT_ULP_SESSION_TYPE_SHARED = 0x01, + BNXT_ULP_SESSION_TYPE_SHARED_WC = 0x02, + BNXT_ULP_SESSION_TYPE_SHARED_OWC = 0x04, + BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA = 0x08, + BNXT_ULP_SESSION_TYPE_LAST = 0x10 }; enum bnxt_ulp_act_prop_sz { @@ -664,8 +793,8 @@ enum bnxt_ulp_act_prop_sz { BNXT_ULP_ACT_PROP_SZ_MARK = 4, BNXT_ULP_ACT_PROP_SZ_COUNT = 4, BNXT_ULP_ACT_PROP_SZ_METER = 4, - BNXT_ULP_ACT_PROP_SZ_SET_MAC_SRC = 8, - BNXT_ULP_ACT_PROP_SZ_SET_MAC_DST = 8, + BNXT_ULP_ACT_PROP_SZ_SET_MAC_SRC = 6, + BNXT_ULP_ACT_PROP_SZ_SET_MAC_DST = 6, BNXT_ULP_ACT_PROP_SZ_PUSH_VLAN = 2, BNXT_ULP_ACT_PROP_SZ_SET_VLAN_PCP = 1, BNXT_ULP_ACT_PROP_SZ_SET_VLAN_VID = 2, @@ -696,6 +825,28 @@ enum bnxt_ulp_act_prop_sz { BNXT_ULP_ACT_PROP_SZ_RSS_LEVEL = 4, BNXT_ULP_ACT_PROP_SZ_RSS_KEY_LEN = 4, BNXT_ULP_ACT_PROP_SZ_RSS_KEY = 40, + BNXT_ULP_ACT_PROP_SZ_RSS_QUEUE_NUM = 2, + BNXT_ULP_ACT_PROP_SZ_RSS_QUEUE = 32, + BNXT_ULP_ACT_PROP_SZ_QUEUE_INDEX = 2, + BNXT_ULP_ACT_PROP_SZ_METER_PROF_ID_UPDATE = 1, + BNXT_ULP_ACT_PROP_SZ_METER_PROF_ID = 4, + BNXT_ULP_ACT_PROP_SZ_METER_PROF_CIR = 3, + BNXT_ULP_ACT_PROP_SZ_METER_PROF_EIR = 3, + BNXT_ULP_ACT_PROP_SZ_METER_PROF_CBS = 2, + BNXT_ULP_ACT_PROP_SZ_METER_PROF_EBS = 2, + BNXT_ULP_ACT_PROP_SZ_METER_PROF_RFC2698 = 1, + BNXT_ULP_ACT_PROP_SZ_METER_PROF_PM = 1, + BNXT_ULP_ACT_PROP_SZ_METER_PROF_EBND = 1, + BNXT_ULP_ACT_PROP_SZ_METER_PROF_CBND = 1, + BNXT_ULP_ACT_PROP_SZ_METER_PROF_EBSM = 1, + BNXT_ULP_ACT_PROP_SZ_METER_PROF_CBSM = 1, + BNXT_ULP_ACT_PROP_SZ_METER_PROF_CF = 1, + BNXT_ULP_ACT_PROP_SZ_METER_INST_ID = 4, + BNXT_ULP_ACT_PROP_SZ_METER_INST_ECN_RMP_EN_UPDATE = 1, + BNXT_ULP_ACT_PROP_SZ_METER_INST_ECN_RMP_EN = 1, + BNXT_ULP_ACT_PROP_SZ_METER_INST_MTR_VAL_UPDATE = 1, + BNXT_ULP_ACT_PROP_SZ_METER_INST_MTR_VAL = 1, + BNXT_ULP_ACT_PROP_SZ_GOTO_CHAINID = 2, BNXT_ULP_ACT_PROP_SZ_LAST = 4 }; @@ -715,38 +866,60 @@ enum bnxt_ulp_act_prop_idx { BNXT_ULP_ACT_PROP_IDX_COUNT = 48, BNXT_ULP_ACT_PROP_IDX_METER = 52, BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC = 56, - BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST = 64, - BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN = 72, - BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP = 74, - BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID = 75, - BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC = 77, - BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST = 81, - BNXT_ULP_ACT_PROP_IDX_SET_IPV6_SRC = 85, - BNXT_ULP_ACT_PROP_IDX_SET_IPV6_DST = 101, - BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC = 117, - BNXT_ULP_ACT_PROP_IDX_SET_TP_DST = 119, - BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_0 = 121, - BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_1 = 125, - BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_2 = 129, - BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_3 = 133, - BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_4 = 137, - BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_5 = 141, - BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_6 = 145, - BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_7 = 149, - BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC = 153, - BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC = 159, - BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG = 165, - BNXT_ULP_ACT_PROP_IDX_ENCAP_IP = 173, - BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC = 205, - BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP = 221, - BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN = 225, - BNXT_ULP_ACT_PROP_IDX_JUMP = 257, - BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE = 261, - BNXT_ULP_ACT_PROP_IDX_RSS_TYPES = 269, - BNXT_ULP_ACT_PROP_IDX_RSS_LEVEL = 277, - BNXT_ULP_ACT_PROP_IDX_RSS_KEY_LEN = 281, - BNXT_ULP_ACT_PROP_IDX_RSS_KEY = 285, - BNXT_ULP_ACT_PROP_IDX_LAST = 325 + BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST = 62, + BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN = 68, + BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP = 70, + BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID = 71, + BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC = 73, + BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST = 77, + BNXT_ULP_ACT_PROP_IDX_SET_IPV6_SRC = 81, + BNXT_ULP_ACT_PROP_IDX_SET_IPV6_DST = 97, + BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC = 113, + BNXT_ULP_ACT_PROP_IDX_SET_TP_DST = 115, + BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_0 = 117, + BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_1 = 121, + BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_2 = 125, + BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_3 = 129, + BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_4 = 133, + BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_5 = 137, + BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_6 = 141, + BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_7 = 145, + BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC = 149, + BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC = 155, + BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG = 161, + BNXT_ULP_ACT_PROP_IDX_ENCAP_IP = 169, + BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC = 201, + BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP = 217, + BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN = 221, + BNXT_ULP_ACT_PROP_IDX_JUMP = 253, + BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE = 257, + BNXT_ULP_ACT_PROP_IDX_RSS_TYPES = 265, + BNXT_ULP_ACT_PROP_IDX_RSS_LEVEL = 273, + BNXT_ULP_ACT_PROP_IDX_RSS_KEY_LEN = 277, + BNXT_ULP_ACT_PROP_IDX_RSS_KEY = 281, + BNXT_ULP_ACT_PROP_IDX_RSS_QUEUE_NUM = 321, + BNXT_ULP_ACT_PROP_IDX_RSS_QUEUE = 323, + BNXT_ULP_ACT_PROP_IDX_QUEUE_INDEX = 355, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_ID_UPDATE = 357, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_ID = 358, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_CIR = 362, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_EIR = 365, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_CBS = 368, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_EBS = 370, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_RFC2698 = 372, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_PM = 373, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_EBND = 374, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_CBND = 375, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_EBSM = 376, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_CBSM = 377, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_CF = 378, + BNXT_ULP_ACT_PROP_IDX_METER_INST_ID = 379, + BNXT_ULP_ACT_PROP_IDX_METER_INST_ECN_RMP_EN_UPDATE = 383, + BNXT_ULP_ACT_PROP_IDX_METER_INST_ECN_RMP_EN = 384, + BNXT_ULP_ACT_PROP_IDX_METER_INST_MTR_VAL_UPDATE = 385, + BNXT_ULP_ACT_PROP_IDX_METER_INST_MTR_VAL = 386, + BNXT_ULP_ACT_PROP_IDX_GOTO_CHAINID = 387, + BNXT_ULP_ACT_PROP_IDX_LAST = 389 }; enum ulp_wp_sym { @@ -905,6 +1078,11 @@ enum ulp_wp_sym { ULP_WP_SYM_L4_HDR_IS_UDP_TCP_IGNORE = 0, ULP_WP_SYM_L4_HDR_IS_UDP_TCP_NO = 0, ULP_WP_SYM_L4_HDR_IS_UDP_TCP_YES = 1, + ULP_WP_SYM_EM_WM_OPCODE_OP_NORMAL = 0, + ULP_WP_SYM_EM_WM_OPCODE_OP_RFS_FAST = 0, + ULP_WP_SYM_EM_WM_OPCODE_OP_FAST = 0, + ULP_WP_SYM_EM_WM_OPCODE_OP_RFS_ACT = 0, + ULP_WP_SYM_EM_WM_OPCODE_OP_RECYCLE = 0, ULP_WP_SYM_POP_VLAN_NO = 0, ULP_WP_SYM_POP_VLAN_YES = 1, ULP_WP_SYM_VLAN_DEL_RPT_DISABLED = 0, @@ -980,7 +1158,15 @@ enum ulp_wp_sym { ULP_WP_SYM_VF_FUNC_PARIF = 15, ULP_WP_SYM_NO = 0, ULP_WP_SYM_YES = 1, - ULP_WP_SYM_RECYCLE_DST = 0x800 + ULP_WP_SYM_RECYCLE_DST = 0x800, + ULP_WP_SYM_VF_2_VFR_META_VAL = 0, + ULP_WP_SYM_VF_2_VF_META_VAL = 0, + ULP_WP_SYM_VF_2_VFR_META_MASK = 0, + ULP_WP_SYM_META_PROFILE_0 = 0, + ULP_WP_SYM_CHAIN_META_VAL = 0, + ULP_WP_SYM_L2_ECPRI_ETYPE = 0, + ULP_WP_SYM_L4_ECPRI_ETYPE = 0, + ULP_WP_SYM_L2_ROE_ETYPE = 0 }; enum ulp_thor_sym { @@ -1139,6 +1325,11 @@ enum ulp_thor_sym { ULP_THOR_SYM_L4_HDR_IS_UDP_TCP_IGNORE = 0, ULP_THOR_SYM_L4_HDR_IS_UDP_TCP_NO = 0, ULP_THOR_SYM_L4_HDR_IS_UDP_TCP_YES = 1, + ULP_THOR_SYM_EM_WM_OPCODE_OP_NORMAL = 0, + ULP_THOR_SYM_EM_WM_OPCODE_OP_RFS_FAST = 1, + ULP_THOR_SYM_EM_WM_OPCODE_OP_FAST = 2, + ULP_THOR_SYM_EM_WM_OPCODE_OP_RFS_ACT = 3, + ULP_THOR_SYM_EM_WM_OPCODE_OP_RECYCLE = 4, ULP_THOR_SYM_POP_VLAN_NO = 0, ULP_THOR_SYM_POP_VLAN_YES = 1, ULP_THOR_SYM_VLAN_DEL_RPT_DISABLED = 0, @@ -1214,1402 +1405,2472 @@ enum ulp_thor_sym { ULP_THOR_SYM_VF_FUNC_PARIF = 15, ULP_THOR_SYM_NO = 0, ULP_THOR_SYM_YES = 1, - ULP_THOR_SYM_RECYCLE_DST = 0x800 + ULP_THOR_SYM_RECYCLE_DST = 1039, + ULP_THOR_SYM_VF_2_VFR_META_VAL = 8192, + ULP_THOR_SYM_VF_2_VF_META_VAL = 4096, + ULP_THOR_SYM_VF_2_VFR_META_MASK = 61440, + ULP_THOR_SYM_META_PROFILE_0 = 0, + ULP_THOR_SYM_CHAIN_META_VAL = 12288, + ULP_THOR_SYM_L2_ECPRI_ETYPE = 44798, + ULP_THOR_SYM_L4_ECPRI_ETYPE = 2048, + ULP_THOR_SYM_L2_ROE_ETYPE = 64573 }; enum bnxt_ulp_class_hid { - BNXT_ULP_CLASS_HID_55dd = 0x55dd, - BNXT_ULP_CLASS_HID_1df1 = 0x1df1, - BNXT_ULP_CLASS_HID_3e55 = 0x3e55, - BNXT_ULP_CLASS_HID_0649 = 0x0649, - BNXT_ULP_CLASS_HID_1011 = 0x1011, - BNXT_ULP_CLASS_HID_40e9 = 0x40e9, - BNXT_ULP_CLASS_HID_3e99 = 0x3e99, - BNXT_ULP_CLASS_HID_06ad = 0x06ad, - BNXT_ULP_CLASS_HID_38c7 = 0x38c7, - BNXT_ULP_CLASS_HID_00fb = 0x00fb, - BNXT_ULP_CLASS_HID_24d3 = 0x24d3, - BNXT_ULP_CLASS_HID_559b = 0x559b, - BNXT_ULP_CLASS_HID_5003 = 0x5003, - BNXT_ULP_CLASS_HID_1837 = 0x1837, - BNXT_ULP_CLASS_HID_3bef = 0x3bef, - BNXT_ULP_CLASS_HID_0403 = 0x0403, - BNXT_ULP_CLASS_HID_3d3f = 0x3d3f, - BNXT_ULP_CLASS_HID_0543 = 0x0543, - BNXT_ULP_CLASS_HID_292b = 0x292b, - BNXT_ULP_CLASS_HID_59e3 = 0x59e3, - BNXT_ULP_CLASS_HID_5d3b = 0x5d3b, - BNXT_ULP_CLASS_HID_254f = 0x254f, - BNXT_ULP_CLASS_HID_4917 = 0x4917, - BNXT_ULP_CLASS_HID_113b = 0x113b, - BNXT_ULP_CLASS_HID_55fd = 0x55fd, - BNXT_ULP_CLASS_HID_1dd1 = 0x1dd1, - BNXT_ULP_CLASS_HID_3e75 = 0x3e75, - BNXT_ULP_CLASS_HID_0669 = 0x0669, - BNXT_ULP_CLASS_HID_1ba1 = 0x1ba1, - BNXT_ULP_CLASS_HID_4c69 = 0x4c69, - BNXT_ULP_CLASS_HID_0439 = 0x0439, - BNXT_ULP_CLASS_HID_34e1 = 0x34e1, - BNXT_ULP_CLASS_HID_0465 = 0x0465, - BNXT_ULP_CLASS_HID_352d = 0x352d, - BNXT_ULP_CLASS_HID_55b1 = 0x55b1, - BNXT_ULP_CLASS_HID_1da5 = 0x1da5, - BNXT_ULP_CLASS_HID_32fd = 0x32fd, - BNXT_ULP_CLASS_HID_63a5 = 0x63a5, - BNXT_ULP_CLASS_HID_1b75 = 0x1b75, - BNXT_ULP_CLASS_HID_4c3d = 0x4c3d, - BNXT_ULP_CLASS_HID_1031 = 0x1031, - BNXT_ULP_CLASS_HID_40c9 = 0x40c9, - BNXT_ULP_CLASS_HID_3eb9 = 0x3eb9, - BNXT_ULP_CLASS_HID_068d = 0x068d, - BNXT_ULP_CLASS_HID_5039 = 0x5039, - BNXT_ULP_CLASS_HID_180d = 0x180d, - BNXT_ULP_CLASS_HID_15fd = 0x15fd, - BNXT_ULP_CLASS_HID_46b5 = 0x46b5, - BNXT_ULP_CLASS_HID_303d = 0x303d, - BNXT_ULP_CLASS_HID_60f5 = 0x60f5, - BNXT_ULP_CLASS_HID_5ea5 = 0x5ea5, - BNXT_ULP_CLASS_HID_2689 = 0x2689, - BNXT_ULP_CLASS_HID_0771 = 0x0771, - BNXT_ULP_CLASS_HID_3809 = 0x3809, - BNXT_ULP_CLASS_HID_35f9 = 0x35f9, - BNXT_ULP_CLASS_HID_66b1 = 0x66b1, - BNXT_ULP_CLASS_HID_559d = 0x559d, - BNXT_ULP_CLASS_HID_1db1 = 0x1db1, - BNXT_ULP_CLASS_HID_3e15 = 0x3e15, - BNXT_ULP_CLASS_HID_0609 = 0x0609, - BNXT_ULP_CLASS_HID_1bc1 = 0x1bc1, - BNXT_ULP_CLASS_HID_4c09 = 0x4c09, - BNXT_ULP_CLASS_HID_0459 = 0x0459, - BNXT_ULP_CLASS_HID_3481 = 0x3481, - BNXT_ULP_CLASS_HID_0405 = 0x0405, - BNXT_ULP_CLASS_HID_354d = 0x354d, - BNXT_ULP_CLASS_HID_55d1 = 0x55d1, - BNXT_ULP_CLASS_HID_1dc5 = 0x1dc5, - BNXT_ULP_CLASS_HID_329d = 0x329d, - BNXT_ULP_CLASS_HID_63c5 = 0x63c5, - BNXT_ULP_CLASS_HID_1b15 = 0x1b15, - BNXT_ULP_CLASS_HID_4c5d = 0x4c5d, - BNXT_ULP_CLASS_HID_1051 = 0x1051, - BNXT_ULP_CLASS_HID_40a9 = 0x40a9, - BNXT_ULP_CLASS_HID_3ed9 = 0x3ed9, - BNXT_ULP_CLASS_HID_06ed = 0x06ed, - BNXT_ULP_CLASS_HID_5059 = 0x5059, - BNXT_ULP_CLASS_HID_186d = 0x186d, - BNXT_ULP_CLASS_HID_159d = 0x159d, - BNXT_ULP_CLASS_HID_46d5 = 0x46d5, - BNXT_ULP_CLASS_HID_305d = 0x305d, - BNXT_ULP_CLASS_HID_6095 = 0x6095, - BNXT_ULP_CLASS_HID_5ec5 = 0x5ec5, - BNXT_ULP_CLASS_HID_26e9 = 0x26e9, - BNXT_ULP_CLASS_HID_0711 = 0x0711, - BNXT_ULP_CLASS_HID_3869 = 0x3869, - BNXT_ULP_CLASS_HID_3599 = 0x3599, - BNXT_ULP_CLASS_HID_66d1 = 0x66d1, - BNXT_ULP_CLASS_HID_38e7 = 0x38e7, - BNXT_ULP_CLASS_HID_00db = 0x00db, - BNXT_ULP_CLASS_HID_24f3 = 0x24f3, - BNXT_ULP_CLASS_HID_55bb = 0x55bb, - BNXT_ULP_CLASS_HID_5023 = 0x5023, - BNXT_ULP_CLASS_HID_1817 = 0x1817, - BNXT_ULP_CLASS_HID_3bcf = 0x3bcf, - BNXT_ULP_CLASS_HID_0423 = 0x0423, - BNXT_ULP_CLASS_HID_58e3 = 0x58e3, - BNXT_ULP_CLASS_HID_20d7 = 0x20d7, - BNXT_ULP_CLASS_HID_448f = 0x448f, - BNXT_ULP_CLASS_HID_0ce3 = 0x0ce3, - BNXT_ULP_CLASS_HID_076b = 0x076b, - BNXT_ULP_CLASS_HID_3813 = 0x3813, - BNXT_ULP_CLASS_HID_5bcb = 0x5bcb, - BNXT_ULP_CLASS_HID_243f = 0x243f, - BNXT_ULP_CLASS_HID_144b = 0x144b, - BNXT_ULP_CLASS_HID_4573 = 0x4573, - BNXT_ULP_CLASS_HID_0057 = 0x0057, - BNXT_ULP_CLASS_HID_311f = 0x311f, - BNXT_ULP_CLASS_HID_2b87 = 0x2b87, - BNXT_ULP_CLASS_HID_5c4f = 0x5c4f, - BNXT_ULP_CLASS_HID_1793 = 0x1793, - BNXT_ULP_CLASS_HID_485b = 0x485b, - BNXT_ULP_CLASS_HID_3447 = 0x3447, - BNXT_ULP_CLASS_HID_650f = 0x650f, - BNXT_ULP_CLASS_HID_2053 = 0x2053, - BNXT_ULP_CLASS_HID_511b = 0x511b, - BNXT_ULP_CLASS_HID_4b83 = 0x4b83, - BNXT_ULP_CLASS_HID_13f7 = 0x13f7, - BNXT_ULP_CLASS_HID_37af = 0x37af, - BNXT_ULP_CLASS_HID_6857 = 0x6857, - BNXT_ULP_CLASS_HID_3d1f = 0x3d1f, - BNXT_ULP_CLASS_HID_0563 = 0x0563, - BNXT_ULP_CLASS_HID_290b = 0x290b, - BNXT_ULP_CLASS_HID_59c3 = 0x59c3, - BNXT_ULP_CLASS_HID_5d1b = 0x5d1b, - BNXT_ULP_CLASS_HID_256f = 0x256f, - BNXT_ULP_CLASS_HID_4937 = 0x4937, - BNXT_ULP_CLASS_HID_111b = 0x111b, - BNXT_ULP_CLASS_HID_25f4b = 0x25f4b, - BNXT_ULP_CLASS_HID_2275f = 0x2275f, - BNXT_ULP_CLASS_HID_24b67 = 0x24b67, - BNXT_ULP_CLASS_HID_2134b = 0x2134b, - BNXT_ULP_CLASS_HID_21683 = 0x21683, - BNXT_ULP_CLASS_HID_2475b = 0x2475b, - BNXT_ULP_CLASS_HID_202bf = 0x202bf, - BNXT_ULP_CLASS_HID_23377 = 0x23377, - BNXT_ULP_CLASS_HID_119db = 0x119db, - BNXT_ULP_CLASS_HID_14a93 = 0x14a93, - BNXT_ULP_CLASS_HID_105f7 = 0x105f7, - BNXT_ULP_CLASS_HID_1368f = 0x1368f, - BNXT_ULP_CLASS_HID_139c7 = 0x139c7, - BNXT_ULP_CLASS_HID_1022b = 0x1022b, - BNXT_ULP_CLASS_HID_125f3 = 0x125f3, - BNXT_ULP_CLASS_HID_1568b = 0x1568b, - BNXT_ULP_CLASS_HID_33c37 = 0x33c37, - BNXT_ULP_CLASS_HID_3041b = 0x3041b, - BNXT_ULP_CLASS_HID_32823 = 0x32823, - BNXT_ULP_CLASS_HID_358fb = 0x358fb, - BNXT_ULP_CLASS_HID_35c33 = 0x35c33, - BNXT_ULP_CLASS_HID_32407 = 0x32407, - BNXT_ULP_CLASS_HID_3482f = 0x3482f, - BNXT_ULP_CLASS_HID_31033 = 0x31033, - BNXT_ULP_CLASS_HID_3887 = 0x3887, - BNXT_ULP_CLASS_HID_00bb = 0x00bb, - BNXT_ULP_CLASS_HID_2493 = 0x2493, - BNXT_ULP_CLASS_HID_55db = 0x55db, - BNXT_ULP_CLASS_HID_5043 = 0x5043, - BNXT_ULP_CLASS_HID_1877 = 0x1877, - BNXT_ULP_CLASS_HID_3baf = 0x3baf, - BNXT_ULP_CLASS_HID_0443 = 0x0443, - BNXT_ULP_CLASS_HID_5883 = 0x5883, - BNXT_ULP_CLASS_HID_20b7 = 0x20b7, - BNXT_ULP_CLASS_HID_44ef = 0x44ef, - BNXT_ULP_CLASS_HID_0c83 = 0x0c83, - BNXT_ULP_CLASS_HID_070b = 0x070b, - BNXT_ULP_CLASS_HID_3873 = 0x3873, - BNXT_ULP_CLASS_HID_5bab = 0x5bab, - BNXT_ULP_CLASS_HID_245f = 0x245f, - BNXT_ULP_CLASS_HID_142b = 0x142b, - BNXT_ULP_CLASS_HID_4513 = 0x4513, - BNXT_ULP_CLASS_HID_0037 = 0x0037, - BNXT_ULP_CLASS_HID_317f = 0x317f, - BNXT_ULP_CLASS_HID_2be7 = 0x2be7, - BNXT_ULP_CLASS_HID_5c2f = 0x5c2f, - BNXT_ULP_CLASS_HID_17f3 = 0x17f3, - BNXT_ULP_CLASS_HID_483b = 0x483b, - BNXT_ULP_CLASS_HID_3427 = 0x3427, - BNXT_ULP_CLASS_HID_656f = 0x656f, - BNXT_ULP_CLASS_HID_2033 = 0x2033, - BNXT_ULP_CLASS_HID_517b = 0x517b, - BNXT_ULP_CLASS_HID_4be3 = 0x4be3, - BNXT_ULP_CLASS_HID_1397 = 0x1397, - BNXT_ULP_CLASS_HID_37cf = 0x37cf, - BNXT_ULP_CLASS_HID_6837 = 0x6837, - BNXT_ULP_CLASS_HID_3d7f = 0x3d7f, - BNXT_ULP_CLASS_HID_0503 = 0x0503, - BNXT_ULP_CLASS_HID_296b = 0x296b, - BNXT_ULP_CLASS_HID_59a3 = 0x59a3, - BNXT_ULP_CLASS_HID_5d7b = 0x5d7b, - BNXT_ULP_CLASS_HID_250f = 0x250f, - BNXT_ULP_CLASS_HID_4957 = 0x4957, - BNXT_ULP_CLASS_HID_117b = 0x117b, - BNXT_ULP_CLASS_HID_25f2b = 0x25f2b, - BNXT_ULP_CLASS_HID_2273f = 0x2273f, - BNXT_ULP_CLASS_HID_24b07 = 0x24b07, - BNXT_ULP_CLASS_HID_2132b = 0x2132b, - BNXT_ULP_CLASS_HID_216e3 = 0x216e3, - BNXT_ULP_CLASS_HID_2473b = 0x2473b, - BNXT_ULP_CLASS_HID_202df = 0x202df, - BNXT_ULP_CLASS_HID_23317 = 0x23317, - BNXT_ULP_CLASS_HID_119bb = 0x119bb, - BNXT_ULP_CLASS_HID_14af3 = 0x14af3, - BNXT_ULP_CLASS_HID_10597 = 0x10597, - BNXT_ULP_CLASS_HID_136ef = 0x136ef, - BNXT_ULP_CLASS_HID_139a7 = 0x139a7, - BNXT_ULP_CLASS_HID_1024b = 0x1024b, - BNXT_ULP_CLASS_HID_12593 = 0x12593, - BNXT_ULP_CLASS_HID_156eb = 0x156eb, - BNXT_ULP_CLASS_HID_33c57 = 0x33c57, - BNXT_ULP_CLASS_HID_3047b = 0x3047b, - BNXT_ULP_CLASS_HID_32843 = 0x32843, - BNXT_ULP_CLASS_HID_3589b = 0x3589b, - BNXT_ULP_CLASS_HID_35c53 = 0x35c53, - BNXT_ULP_CLASS_HID_32467 = 0x32467, - BNXT_ULP_CLASS_HID_3484f = 0x3484f, - BNXT_ULP_CLASS_HID_31053 = 0x31053, - BNXT_ULP_CLASS_HID_5ce1 = 0x5ce1, - BNXT_ULP_CLASS_HID_4579 = 0x4579, - BNXT_ULP_CLASS_HID_1735 = 0x1735, - BNXT_ULP_CLASS_HID_45bd = 0x45bd, - BNXT_ULP_CLASS_HID_3feb = 0x3feb, - BNXT_ULP_CLASS_HID_2bf7 = 0x2bf7, - BNXT_ULP_CLASS_HID_5727 = 0x5727, - BNXT_ULP_CLASS_HID_4333 = 0x4333, - BNXT_ULP_CLASS_HID_4453 = 0x4453, - BNXT_ULP_CLASS_HID_304f = 0x304f, - BNXT_ULP_CLASS_HID_645f = 0x645f, - BNXT_ULP_CLASS_HID_504b = 0x504b, - BNXT_ULP_CLASS_HID_5cc1 = 0x5cc1, - BNXT_ULP_CLASS_HID_4559 = 0x4559, - BNXT_ULP_CLASS_HID_2285 = 0x2285, - BNXT_ULP_CLASS_HID_0b1d = 0x0b1d, - BNXT_ULP_CLASS_HID_0b49 = 0x0b49, - BNXT_ULP_CLASS_HID_5c95 = 0x5c95, - BNXT_ULP_CLASS_HID_39c1 = 0x39c1, - BNXT_ULP_CLASS_HID_2259 = 0x2259, - BNXT_ULP_CLASS_HID_1715 = 0x1715, - BNXT_ULP_CLASS_HID_459d = 0x459d, - BNXT_ULP_CLASS_HID_571d = 0x571d, - BNXT_ULP_CLASS_HID_1cd1 = 0x1cd1, - BNXT_ULP_CLASS_HID_3711 = 0x3711, - BNXT_ULP_CLASS_HID_6599 = 0x6599, - BNXT_ULP_CLASS_HID_0e55 = 0x0e55, - BNXT_ULP_CLASS_HID_3cdd = 0x3cdd, - BNXT_ULP_CLASS_HID_5ca1 = 0x5ca1, - BNXT_ULP_CLASS_HID_4539 = 0x4539, - BNXT_ULP_CLASS_HID_22e5 = 0x22e5, - BNXT_ULP_CLASS_HID_0b7d = 0x0b7d, - BNXT_ULP_CLASS_HID_0b29 = 0x0b29, - BNXT_ULP_CLASS_HID_5cf5 = 0x5cf5, - BNXT_ULP_CLASS_HID_39a1 = 0x39a1, - BNXT_ULP_CLASS_HID_2239 = 0x2239, - BNXT_ULP_CLASS_HID_1775 = 0x1775, - BNXT_ULP_CLASS_HID_45fd = 0x45fd, - BNXT_ULP_CLASS_HID_577d = 0x577d, - BNXT_ULP_CLASS_HID_1cb1 = 0x1cb1, - BNXT_ULP_CLASS_HID_3771 = 0x3771, - BNXT_ULP_CLASS_HID_65f9 = 0x65f9, - BNXT_ULP_CLASS_HID_0e35 = 0x0e35, - BNXT_ULP_CLASS_HID_3cbd = 0x3cbd, - BNXT_ULP_CLASS_HID_3fcb = 0x3fcb, - BNXT_ULP_CLASS_HID_2bd7 = 0x2bd7, - BNXT_ULP_CLASS_HID_5707 = 0x5707, - BNXT_ULP_CLASS_HID_4313 = 0x4313, - BNXT_ULP_CLASS_HID_5fc7 = 0x5fc7, - BNXT_ULP_CLASS_HID_4bd3 = 0x4bd3, - BNXT_ULP_CLASS_HID_0e4f = 0x0e4f, - BNXT_ULP_CLASS_HID_632f = 0x632f, - BNXT_ULP_CLASS_HID_1baf = 0x1baf, - BNXT_ULP_CLASS_HID_07bb = 0x07bb, - BNXT_ULP_CLASS_HID_32eb = 0x32eb, - BNXT_ULP_CLASS_HID_1ef7 = 0x1ef7, - BNXT_ULP_CLASS_HID_3bab = 0x3bab, - BNXT_ULP_CLASS_HID_27b7 = 0x27b7, - BNXT_ULP_CLASS_HID_52e7 = 0x52e7, - BNXT_ULP_CLASS_HID_3ef3 = 0x3ef3, - BNXT_ULP_CLASS_HID_4473 = 0x4473, - BNXT_ULP_CLASS_HID_306f = 0x306f, - BNXT_ULP_CLASS_HID_647f = 0x647f, - BNXT_ULP_CLASS_HID_506b = 0x506b, - BNXT_ULP_CLASS_HID_266af = 0x266af, - BNXT_ULP_CLASS_HID_2525b = 0x2525b, - BNXT_ULP_CLASS_HID_21de7 = 0x21de7, - BNXT_ULP_CLASS_HID_20993 = 0x20993, - BNXT_ULP_CLASS_HID_1213f = 0x1213f, - BNXT_ULP_CLASS_HID_10d2b = 0x10d2b, - BNXT_ULP_CLASS_HID_1413b = 0x1413b, - BNXT_ULP_CLASS_HID_12cd7 = 0x12cd7, - BNXT_ULP_CLASS_HID_3436b = 0x3436b, - BNXT_ULP_CLASS_HID_32f07 = 0x32f07, - BNXT_ULP_CLASS_HID_36317 = 0x36317, - BNXT_ULP_CLASS_HID_34f03 = 0x34f03, - BNXT_ULP_CLASS_HID_3fab = 0x3fab, - BNXT_ULP_CLASS_HID_2bb7 = 0x2bb7, - BNXT_ULP_CLASS_HID_5767 = 0x5767, - BNXT_ULP_CLASS_HID_4373 = 0x4373, - BNXT_ULP_CLASS_HID_5fa7 = 0x5fa7, - BNXT_ULP_CLASS_HID_4bb3 = 0x4bb3, - BNXT_ULP_CLASS_HID_0e2f = 0x0e2f, - BNXT_ULP_CLASS_HID_634f = 0x634f, - BNXT_ULP_CLASS_HID_1bcf = 0x1bcf, - BNXT_ULP_CLASS_HID_07db = 0x07db, - BNXT_ULP_CLASS_HID_328b = 0x328b, - BNXT_ULP_CLASS_HID_1e97 = 0x1e97, - BNXT_ULP_CLASS_HID_3bcb = 0x3bcb, - BNXT_ULP_CLASS_HID_27d7 = 0x27d7, - BNXT_ULP_CLASS_HID_5287 = 0x5287, - BNXT_ULP_CLASS_HID_3e93 = 0x3e93, - BNXT_ULP_CLASS_HID_4413 = 0x4413, - BNXT_ULP_CLASS_HID_300f = 0x300f, - BNXT_ULP_CLASS_HID_641f = 0x641f, - BNXT_ULP_CLASS_HID_500b = 0x500b, - BNXT_ULP_CLASS_HID_266cf = 0x266cf, - BNXT_ULP_CLASS_HID_2523b = 0x2523b, - BNXT_ULP_CLASS_HID_21d87 = 0x21d87, - BNXT_ULP_CLASS_HID_209f3 = 0x209f3, - BNXT_ULP_CLASS_HID_1215f = 0x1215f, - BNXT_ULP_CLASS_HID_10d4b = 0x10d4b, - BNXT_ULP_CLASS_HID_1415b = 0x1415b, - BNXT_ULP_CLASS_HID_12cb7 = 0x12cb7, - BNXT_ULP_CLASS_HID_3430b = 0x3430b, - BNXT_ULP_CLASS_HID_32f67 = 0x32f67, - BNXT_ULP_CLASS_HID_36377 = 0x36377, - BNXT_ULP_CLASS_HID_34f63 = 0x34f63, - BNXT_ULP_CLASS_HID_29b5 = 0x29b5, - BNXT_ULP_CLASS_HID_29ad = 0x29ad, - BNXT_ULP_CLASS_HID_29b7 = 0x29b7, - BNXT_ULP_CLASS_HID_1583 = 0x1583, - BNXT_ULP_CLASS_HID_29af = 0x29af, - BNXT_ULP_CLASS_HID_159b = 0x159b, - BNXT_ULP_CLASS_HID_2995 = 0x2995, - BNXT_ULP_CLASS_HID_298d = 0x298d, - BNXT_ULP_CLASS_HID_29f5 = 0x29f5, - BNXT_ULP_CLASS_HID_29ed = 0x29ed, - BNXT_ULP_CLASS_HID_2997 = 0x2997, - BNXT_ULP_CLASS_HID_15a3 = 0x15a3, - BNXT_ULP_CLASS_HID_298f = 0x298f, - BNXT_ULP_CLASS_HID_15bb = 0x15bb, - BNXT_ULP_CLASS_HID_29f7 = 0x29f7, - BNXT_ULP_CLASS_HID_15c3 = 0x15c3, - BNXT_ULP_CLASS_HID_29ef = 0x29ef, - BNXT_ULP_CLASS_HID_15db = 0x15db, - BNXT_ULP_CLASS_HID_1151 = 0x1151, - BNXT_ULP_CLASS_HID_315d = 0x315d, - BNXT_ULP_CLASS_HID_3612 = 0x3612, - BNXT_ULP_CLASS_HID_66da = 0x66da, - BNXT_ULP_CLASS_HID_243ca = 0x243ca, - BNXT_ULP_CLASS_HID_20d8e = 0x20d8e, - BNXT_ULP_CLASS_HID_2e082 = 0x2e082, - BNXT_ULP_CLASS_HID_2ab46 = 0x2ab46, - BNXT_ULP_CLASS_HID_25226 = 0x25226, - BNXT_ULP_CLASS_HID_25cea = 0x25cea, - BNXT_ULP_CLASS_HID_2c82a = 0x2c82a, - BNXT_ULP_CLASS_HID_2f9a2 = 0x2f9a2, - BNXT_ULP_CLASS_HID_23b56 = 0x23b56, - BNXT_ULP_CLASS_HID_205da = 0x205da, - BNXT_ULP_CLASS_HID_2d8ce = 0x2d8ce, - BNXT_ULP_CLASS_HID_2a2d2 = 0x2a2d2, - BNXT_ULP_CLASS_HID_24a72 = 0x24a72, - BNXT_ULP_CLASS_HID_25476 = 0x25476, - BNXT_ULP_CLASS_HID_2c076 = 0x2c076, - BNXT_ULP_CLASS_HID_2f1ee = 0x2f1ee, - BNXT_ULP_CLASS_HID_20bb6 = 0x20bb6, - BNXT_ULP_CLASS_HID_23d2e = 0x23d2e, - BNXT_ULP_CLASS_HID_2a96e = 0x2a96e, - BNXT_ULP_CLASS_HID_2dae6 = 0x2dae6, - BNXT_ULP_CLASS_HID_25af2 = 0x25af2, - BNXT_ULP_CLASS_HID_24c6a = 0x24c6a, - BNXT_ULP_CLASS_HID_2c7aa = 0x2c7aa, - BNXT_ULP_CLASS_HID_2c26e = 0x2c26e, - BNXT_ULP_CLASS_HID_203e2 = 0x203e2, - BNXT_ULP_CLASS_HID_2357a = 0x2357a, - BNXT_ULP_CLASS_HID_2a0fa = 0x2a0fa, - BNXT_ULP_CLASS_HID_2d272 = 0x2d272, - BNXT_ULP_CLASS_HID_2527e = 0x2527e, - BNXT_ULP_CLASS_HID_243f6 = 0x243f6, - BNXT_ULP_CLASS_HID_2fff6 = 0x2fff6, - BNXT_ULP_CLASS_HID_2e16e = 0x2e16e, - BNXT_ULP_CLASS_HID_2422d = 0x2422d, - BNXT_ULP_CLASS_HID_20c69 = 0x20c69, - BNXT_ULP_CLASS_HID_2e165 = 0x2e165, - BNXT_ULP_CLASS_HID_2aaa1 = 0x2aaa1, - BNXT_ULP_CLASS_HID_253c1 = 0x253c1, - BNXT_ULP_CLASS_HID_25d0d = 0x25d0d, - BNXT_ULP_CLASS_HID_2c9cd = 0x2c9cd, - BNXT_ULP_CLASS_HID_2f845 = 0x2f845, - BNXT_ULP_CLASS_HID_25afd = 0x25afd, - BNXT_ULP_CLASS_HID_22439 = 0x22439, - BNXT_ULP_CLASS_HID_290f9 = 0x290f9, - BNXT_ULP_CLASS_HID_2c371 = 0x2c371, - BNXT_ULP_CLASS_HID_24355 = 0x24355, - BNXT_ULP_CLASS_HID_275dd = 0x275dd, - BNXT_ULP_CLASS_HID_2e19d = 0x2e19d, - BNXT_ULP_CLASS_HID_2d015 = 0x2d015, - BNXT_ULP_CLASS_HID_2560d = 0x2560d, - BNXT_ULP_CLASS_HID_21049 = 0x21049, - BNXT_ULP_CLASS_HID_28c09 = 0x28c09, - BNXT_ULP_CLASS_HID_2be89 = 0x2be89, - BNXT_ULP_CLASS_HID_267a9 = 0x267a9, - BNXT_ULP_CLASS_HID_261ed = 0x261ed, - BNXT_ULP_CLASS_HID_2ddad = 0x2ddad, - BNXT_ULP_CLASS_HID_2cc2d = 0x2cc2d, - BNXT_ULP_CLASS_HID_26edd = 0x26edd, - BNXT_ULP_CLASS_HID_22819 = 0x22819, - BNXT_ULP_CLASS_HID_2a4d9 = 0x2a4d9, - BNXT_ULP_CLASS_HID_2d759 = 0x2d759, - BNXT_ULP_CLASS_HID_2573d = 0x2573d, - BNXT_ULP_CLASS_HID_279bd = 0x279bd, - BNXT_ULP_CLASS_HID_2f27d = 0x2f27d, - BNXT_ULP_CLASS_HID_2e4fd = 0x2e4fd, - BNXT_ULP_CLASS_HID_24fbe = 0x24fbe, - BNXT_ULP_CLASS_HID_201fa = 0x201fa, - BNXT_ULP_CLASS_HID_2ecf6 = 0x2ecf6, - BNXT_ULP_CLASS_HID_2a732 = 0x2a732, - BNXT_ULP_CLASS_HID_25e52 = 0x25e52, - BNXT_ULP_CLASS_HID_2509e = 0x2509e, - BNXT_ULP_CLASS_HID_2c45e = 0x2c45e, - BNXT_ULP_CLASS_HID_2f5d6 = 0x2f5d6, - BNXT_ULP_CLASS_HID_23722 = 0x23722, - BNXT_ULP_CLASS_HID_209ae = 0x209ae, - BNXT_ULP_CLASS_HID_2d4ba = 0x2d4ba, - BNXT_ULP_CLASS_HID_2aea6 = 0x2aea6, - BNXT_ULP_CLASS_HID_24606 = 0x24606, - BNXT_ULP_CLASS_HID_25802 = 0x25802, - BNXT_ULP_CLASS_HID_2cc02 = 0x2cc02, - BNXT_ULP_CLASS_HID_2fd9a = 0x2fd9a, - BNXT_ULP_CLASS_HID_207c2 = 0x207c2, - BNXT_ULP_CLASS_HID_2315a = 0x2315a, - BNXT_ULP_CLASS_HID_2a51a = 0x2a51a, - BNXT_ULP_CLASS_HID_2d692 = 0x2d692, - BNXT_ULP_CLASS_HID_25686 = 0x25686, - BNXT_ULP_CLASS_HID_2401e = 0x2401e, - BNXT_ULP_CLASS_HID_2cbde = 0x2cbde, - BNXT_ULP_CLASS_HID_2ce1a = 0x2ce1a, - BNXT_ULP_CLASS_HID_20f96 = 0x20f96, - BNXT_ULP_CLASS_HID_2390e = 0x2390e, - BNXT_ULP_CLASS_HID_2ac8e = 0x2ac8e, - BNXT_ULP_CLASS_HID_2de06 = 0x2de06, - BNXT_ULP_CLASS_HID_25e0a = 0x25e0a, - BNXT_ULP_CLASS_HID_24f82 = 0x24f82, - BNXT_ULP_CLASS_HID_2f382 = 0x2f382, - BNXT_ULP_CLASS_HID_2ed1a = 0x2ed1a, - BNXT_ULP_CLASS_HID_2576e = 0x2576e, - BNXT_ULP_CLASS_HID_229aa = 0x229aa, - BNXT_ULP_CLASS_HID_29d6a = 0x29d6a, - BNXT_ULP_CLASS_HID_2cee2 = 0x2cee2, - BNXT_ULP_CLASS_HID_24ec6 = 0x24ec6, - BNXT_ULP_CLASS_HID_2784e = 0x2784e, - BNXT_ULP_CLASS_HID_2ec0e = 0x2ec0e, - BNXT_ULP_CLASS_HID_2dd86 = 0x2dd86, - BNXT_ULP_CLASS_HID_25f22 = 0x25f22, - BNXT_ULP_CLASS_HID_2112e = 0x2112e, - BNXT_ULP_CLASS_HID_2852e = 0x2852e, - BNXT_ULP_CLASS_HID_2b6a6 = 0x2b6a6, - BNXT_ULP_CLASS_HID_26d86 = 0x26d86, - BNXT_ULP_CLASS_HID_26002 = 0x26002, - BNXT_ULP_CLASS_HID_2eb82 = 0x2eb82, - BNXT_ULP_CLASS_HID_2c50a = 0x2c50a, - BNXT_ULP_CLASS_HID_22f82 = 0x22f82, - BNXT_ULP_CLASS_HID_2590a = 0x2590a, - BNXT_ULP_CLASS_HID_2ccca = 0x2ccca, - BNXT_ULP_CLASS_HID_28706 = 0x28706, - BNXT_ULP_CLASS_HID_27e46 = 0x27e46, - BNXT_ULP_CLASS_HID_26fce = 0x26fce, - BNXT_ULP_CLASS_HID_2d38e = 0x2d38e, - BNXT_ULP_CLASS_HID_2d5ca = 0x2d5ca, - BNXT_ULP_CLASS_HID_21706 = 0x21706, - BNXT_ULP_CLASS_HID_2408e = 0x2408e, - BNXT_ULP_CLASS_HID_2b48e = 0x2b48e, - BNXT_ULP_CLASS_HID_28e8a = 0x28e8a, - BNXT_ULP_CLASS_HID_2660a = 0x2660a, - BNXT_ULP_CLASS_HID_25782 = 0x25782, - BNXT_ULP_CLASS_HID_2db02 = 0x2db02, - BNXT_ULP_CLASS_HID_2dd8e = 0x2dd8e, - BNXT_ULP_CLASS_HID_25b9e = 0x25b9e, - BNXT_ULP_CLASS_HID_21dda = 0x21dda, - BNXT_ULP_CLASS_HID_2819a = 0x2819a, - BNXT_ULP_CLASS_HID_2b31a = 0x2b31a, - BNXT_ULP_CLASS_HID_26a3a = 0x26a3a, - BNXT_ULP_CLASS_HID_26c7e = 0x26c7e, - BNXT_ULP_CLASS_HID_2d03e = 0x2d03e, - BNXT_ULP_CLASS_HID_2c1be = 0x2c1be, - BNXT_ULP_CLASS_HID_2430a = 0x2430a, - BNXT_ULP_CLASS_HID_2058e = 0x2058e, - BNXT_ULP_CLASS_HID_2890e = 0x2890e, - BNXT_ULP_CLASS_HID_2ba8e = 0x2ba8e, - BNXT_ULP_CLASS_HID_251ae = 0x251ae, - BNXT_ULP_CLASS_HID_2542a = 0x2542a, - BNXT_ULP_CLASS_HID_2dfaa = 0x2dfaa, - BNXT_ULP_CLASS_HID_2c93a = 0x2c93a, - BNXT_ULP_CLASS_HID_213ca = 0x213ca, - BNXT_ULP_CLASS_HID_24d5a = 0x24d5a, - BNXT_ULP_CLASS_HID_2b11a = 0x2b11a, - BNXT_ULP_CLASS_HID_28b4e = 0x28b4e, - BNXT_ULP_CLASS_HID_2624e = 0x2624e, - BNXT_ULP_CLASS_HID_253de = 0x253de, - BNXT_ULP_CLASS_HID_2c79e = 0x2c79e, - BNXT_ULP_CLASS_HID_2d9da = 0x2d9da, - BNXT_ULP_CLASS_HID_21b1e = 0x21b1e, - BNXT_ULP_CLASS_HID_2350e = 0x2350e, - BNXT_ULP_CLASS_HID_2b88e = 0x2b88e, - BNXT_ULP_CLASS_HID_2ea0e = 0x2ea0e, - BNXT_ULP_CLASS_HID_26a0a = 0x26a0a, - BNXT_ULP_CLASS_HID_25b8a = 0x25b8a, - BNXT_ULP_CLASS_HID_2cf0a = 0x2cf0a, - BNXT_ULP_CLASS_HID_2c18e = 0x2c18e, - BNXT_ULP_CLASS_HID_2634e = 0x2634e, - BNXT_ULP_CLASS_HID_2258a = 0x2258a, - BNXT_ULP_CLASS_HID_2a94a = 0x2a94a, - BNXT_ULP_CLASS_HID_2daca = 0x2daca, - BNXT_ULP_CLASS_HID_25aae = 0x25aae, - BNXT_ULP_CLASS_HID_2742e = 0x2742e, - BNXT_ULP_CLASS_HID_2ffee = 0x2ffee, - BNXT_ULP_CLASS_HID_2e96e = 0x2e96e, - BNXT_ULP_CLASS_HID_26b0a = 0x26b0a, - BNXT_ULP_CLASS_HID_22d0e = 0x22d0e, - BNXT_ULP_CLASS_HID_2910e = 0x2910e, - BNXT_ULP_CLASS_HID_2c28e = 0x2c28e, - BNXT_ULP_CLASS_HID_2422a = 0x2422a, - BNXT_ULP_CLASS_HID_273aa = 0x273aa, - BNXT_ULP_CLASS_HID_2e7aa = 0x2e7aa, - BNXT_ULP_CLASS_HID_2d12a = 0x2d12a, - BNXT_ULP_CLASS_HID_23b8a = 0x23b8a, - BNXT_ULP_CLASS_HID_2550a = 0x2550a, - BNXT_ULP_CLASS_HID_2d8ca = 0x2d8ca, - BNXT_ULP_CLASS_HID_2930e = 0x2930e, - BNXT_ULP_CLASS_HID_24a0e = 0x24a0e, - BNXT_ULP_CLASS_HID_24c4a = 0x24c4a, - BNXT_ULP_CLASS_HID_2ef4e = 0x2ef4e, - BNXT_ULP_CLASS_HID_2e18a = 0x2e18a, - BNXT_ULP_CLASS_HID_2230e = 0x2230e, - BNXT_ULP_CLASS_HID_25c8e = 0x25c8e, - BNXT_ULP_CLASS_HID_2c08e = 0x2c08e, - BNXT_ULP_CLASS_HID_29a8a = 0x29a8a, - BNXT_ULP_CLASS_HID_2718a = 0x2718a, - BNXT_ULP_CLASS_HID_2630a = 0x2630a, - BNXT_ULP_CLASS_HID_2d70a = 0x2d70a, - BNXT_ULP_CLASS_HID_2e90e = 0x2e90e, - BNXT_ULP_CLASS_HID_24e91 = 0x24e91, - BNXT_ULP_CLASS_HID_200d5 = 0x200d5, - BNXT_ULP_CLASS_HID_2edd9 = 0x2edd9, - BNXT_ULP_CLASS_HID_2a61d = 0x2a61d, - BNXT_ULP_CLASS_HID_25f7d = 0x25f7d, - BNXT_ULP_CLASS_HID_251b1 = 0x251b1, - BNXT_ULP_CLASS_HID_2c571 = 0x2c571, - BNXT_ULP_CLASS_HID_2f4f9 = 0x2f4f9, - BNXT_ULP_CLASS_HID_25641 = 0x25641, - BNXT_ULP_CLASS_HID_22885 = 0x22885, - BNXT_ULP_CLASS_HID_29c45 = 0x29c45, - BNXT_ULP_CLASS_HID_2cfcd = 0x2cfcd, - BNXT_ULP_CLASS_HID_24fe9 = 0x24fe9, - BNXT_ULP_CLASS_HID_27961 = 0x27961, - BNXT_ULP_CLASS_HID_2ed21 = 0x2ed21, - BNXT_ULP_CLASS_HID_2dca9 = 0x2dca9, - BNXT_ULP_CLASS_HID_25ab1 = 0x25ab1, - BNXT_ULP_CLASS_HID_21cf5 = 0x21cf5, - BNXT_ULP_CLASS_HID_280b5 = 0x280b5, - BNXT_ULP_CLASS_HID_2b235 = 0x2b235, - BNXT_ULP_CLASS_HID_26b15 = 0x26b15, - BNXT_ULP_CLASS_HID_26d51 = 0x26d51, - BNXT_ULP_CLASS_HID_2d111 = 0x2d111, - BNXT_ULP_CLASS_HID_2c091 = 0x2c091, - BNXT_ULP_CLASS_HID_26261 = 0x26261, - BNXT_ULP_CLASS_HID_224a5 = 0x224a5, - BNXT_ULP_CLASS_HID_2a865 = 0x2a865, - BNXT_ULP_CLASS_HID_2dbe5 = 0x2dbe5, - BNXT_ULP_CLASS_HID_25b81 = 0x25b81, - BNXT_ULP_CLASS_HID_27501 = 0x27501, - BNXT_ULP_CLASS_HID_2fec1 = 0x2fec1, - BNXT_ULP_CLASS_HID_2e841 = 0x2e841, - BNXT_ULP_CLASS_HID_24085 = 0x24085, - BNXT_ULP_CLASS_HID_21ac5 = 0x21ac5, - BNXT_ULP_CLASS_HID_28e85 = 0x28e85, - BNXT_ULP_CLASS_HID_2b80d = 0x2b80d, - BNXT_ULP_CLASS_HID_2516d = 0x2516d, - BNXT_ULP_CLASS_HID_26ba5 = 0x26ba5, - BNXT_ULP_CLASS_HID_2df65 = 0x2df65, - BNXT_ULP_CLASS_HID_2ceed = 0x2ceed, - BNXT_ULP_CLASS_HID_26845 = 0x26845, - BNXT_ULP_CLASS_HID_22285 = 0x22285, - BNXT_ULP_CLASS_HID_29645 = 0x29645, - BNXT_ULP_CLASS_HID_2c1cd = 0x2c1cd, - BNXT_ULP_CLASS_HID_2418d = 0x2418d, - BNXT_ULP_CLASS_HID_27365 = 0x27365, - BNXT_ULP_CLASS_HID_2e725 = 0x2e725, - BNXT_ULP_CLASS_HID_2d6ad = 0x2d6ad, - BNXT_ULP_CLASS_HID_25ca5 = 0x25ca5, - BNXT_ULP_CLASS_HID_216e5 = 0x216e5, - BNXT_ULP_CLASS_HID_29aa5 = 0x29aa5, - BNXT_ULP_CLASS_HID_2b425 = 0x2b425, - BNXT_ULP_CLASS_HID_26d05 = 0x26d05, - BNXT_ULP_CLASS_HID_26745 = 0x26745, - BNXT_ULP_CLASS_HID_2eb05 = 0x2eb05, - BNXT_ULP_CLASS_HID_2da85 = 0x2da85, - BNXT_ULP_CLASS_HID_20cc5 = 0x20cc5, - BNXT_ULP_CLASS_HID_23ea5 = 0x23ea5, - BNXT_ULP_CLASS_HID_2a265 = 0x2a265, - BNXT_ULP_CLASS_HID_2dde5 = 0x2dde5, - BNXT_ULP_CLASS_HID_25da5 = 0x25da5, - BNXT_ULP_CLASS_HID_24f05 = 0x24f05, - BNXT_ULP_CLASS_HID_2f0c5 = 0x2f0c5, - BNXT_ULP_CLASS_HID_2e245 = 0x2e245, - BNXT_ULP_CLASS_HID_24d8b = 0x24d8b, - BNXT_ULP_CLASS_HID_207cf = 0x207cf, - BNXT_ULP_CLASS_HID_28b8f = 0x28b8f, - BNXT_ULP_CLASS_HID_2a517 = 0x2a517, - BNXT_ULP_CLASS_HID_25277 = 0x25277, - BNXT_ULP_CLASS_HID_254ab = 0x254ab, - BNXT_ULP_CLASS_HID_2d86b = 0x2d86b, - BNXT_ULP_CLASS_HID_2cbf3 = 0x2cbf3, - BNXT_ULP_CLASS_HID_2554b = 0x2554b, - BNXT_ULP_CLASS_HID_22f8f = 0x22f8f, - BNXT_ULP_CLASS_HID_2934f = 0x2934f, - BNXT_ULP_CLASS_HID_2c2c7 = 0x2c2c7, - BNXT_ULP_CLASS_HID_242e3 = 0x242e3, - BNXT_ULP_CLASS_HID_27c6b = 0x27c6b, - BNXT_ULP_CLASS_HID_2e02b = 0x2e02b, - BNXT_ULP_CLASS_HID_2d3a3 = 0x2d3a3, - BNXT_ULP_CLASS_HID_259a3 = 0x259a3, - BNXT_ULP_CLASS_HID_213e7 = 0x213e7, - BNXT_ULP_CLASS_HID_287a7 = 0x287a7, - BNXT_ULP_CLASS_HID_2b137 = 0x2b137, - BNXT_ULP_CLASS_HID_26e17 = 0x26e17, - BNXT_ULP_CLASS_HID_26043 = 0x26043, - BNXT_ULP_CLASS_HID_2d403 = 0x2d403, - BNXT_ULP_CLASS_HID_2c793 = 0x2c793, - BNXT_ULP_CLASS_HID_20827 = 0x20827, - BNXT_ULP_CLASS_HID_23ba7 = 0x23ba7, - BNXT_ULP_CLASS_HID_2af67 = 0x2af67, - BNXT_ULP_CLASS_HID_2dee7 = 0x2dee7, - BNXT_ULP_CLASS_HID_25e83 = 0x25e83, - BNXT_ULP_CLASS_HID_24803 = 0x24803, - BNXT_ULP_CLASS_HID_2fdc3 = 0x2fdc3, - BNXT_ULP_CLASS_HID_2ef43 = 0x2ef43, - BNXT_ULP_CLASS_HID_247bf = 0x247bf, - BNXT_ULP_CLASS_HID_219ff = 0x219ff, - BNXT_ULP_CLASS_HID_28dbf = 0x28dbf, - BNXT_ULP_CLASS_HID_2bf07 = 0x2bf07, - BNXT_ULP_CLASS_HID_25467 = 0x25467, - BNXT_ULP_CLASS_HID_26e5f = 0x26e5f, - BNXT_ULP_CLASS_HID_2d21f = 0x2d21f, - BNXT_ULP_CLASS_HID_2cde7 = 0x2cde7, - BNXT_ULP_CLASS_HID_26f6f = 0x26f6f, - BNXT_ULP_CLASS_HID_221af = 0x221af, - BNXT_ULP_CLASS_HID_2956f = 0x2956f, - BNXT_ULP_CLASS_HID_2c4c7 = 0x2c4c7, - BNXT_ULP_CLASS_HID_24487 = 0x24487, - BNXT_ULP_CLASS_HID_2760f = 0x2760f, - BNXT_ULP_CLASS_HID_2fbcf = 0x2fbcf, - BNXT_ULP_CLASS_HID_2d5a7 = 0x2d5a7, - BNXT_ULP_CLASS_HID_25357 = 0x25357, - BNXT_ULP_CLASS_HID_21597 = 0x21597, - BNXT_ULP_CLASS_HID_29957 = 0x29957, - BNXT_ULP_CLASS_HID_2cb27 = 0x2cb27, - BNXT_ULP_CLASS_HID_248f7 = 0x248f7, - BNXT_ULP_CLASS_HID_27a77 = 0x27a77, - BNXT_ULP_CLASS_HID_2ee37 = 0x2ee37, - BNXT_ULP_CLASS_HID_2d987 = 0x2d987, - BNXT_ULP_CLASS_HID_203c7 = 0x203c7, - BNXT_ULP_CLASS_HID_23d47 = 0x23d47, - BNXT_ULP_CLASS_HID_2a107 = 0x2a107, - BNXT_ULP_CLASS_HID_2d0e7 = 0x2d0e7, - BNXT_ULP_CLASS_HID_250a7 = 0x250a7, - BNXT_ULP_CLASS_HID_24227 = 0x24227, - BNXT_ULP_CLASS_HID_2f7e7 = 0x2f7e7, - BNXT_ULP_CLASS_HID_2c827 = 0x2c827, - BNXT_ULP_CLASS_HID_25422 = 0x25422, - BNXT_ULP_CLASS_HID_21a66 = 0x21a66, - BNXT_ULP_CLASS_HID_2f76a = 0x2f76a, - BNXT_ULP_CLASS_HID_2bcae = 0x2bcae, - BNXT_ULP_CLASS_HID_245ce = 0x245ce, - BNXT_ULP_CLASS_HID_24b02 = 0x24b02, - BNXT_ULP_CLASS_HID_2dfc2 = 0x2dfc2, - BNXT_ULP_CLASS_HID_2ee4a = 0x2ee4a, - BNXT_ULP_CLASS_HID_22cbe = 0x22cbe, - BNXT_ULP_CLASS_HID_21232 = 0x21232, - BNXT_ULP_CLASS_HID_2cf26 = 0x2cf26, - BNXT_ULP_CLASS_HID_2b53a = 0x2b53a, - BNXT_ULP_CLASS_HID_25d9a = 0x25d9a, - BNXT_ULP_CLASS_HID_2439e = 0x2439e, - BNXT_ULP_CLASS_HID_2d79e = 0x2d79e, - BNXT_ULP_CLASS_HID_2e606 = 0x2e606, - BNXT_ULP_CLASS_HID_21c5e = 0x21c5e, - BNXT_ULP_CLASS_HID_22ac6 = 0x22ac6, - BNXT_ULP_CLASS_HID_2be86 = 0x2be86, - BNXT_ULP_CLASS_HID_2cd0e = 0x2cd0e, - BNXT_ULP_CLASS_HID_24d1a = 0x24d1a, - BNXT_ULP_CLASS_HID_25b82 = 0x25b82, - BNXT_ULP_CLASS_HID_2d042 = 0x2d042, - BNXT_ULP_CLASS_HID_2d586 = 0x2d586, - BNXT_ULP_CLASS_HID_2140a = 0x2140a, - BNXT_ULP_CLASS_HID_22292 = 0x22292, - BNXT_ULP_CLASS_HID_2b712 = 0x2b712, - BNXT_ULP_CLASS_HID_2c59a = 0x2c59a, - BNXT_ULP_CLASS_HID_24596 = 0x24596, - BNXT_ULP_CLASS_HID_2541e = 0x2541e, - BNXT_ULP_CLASS_HID_2e81e = 0x2e81e, - BNXT_ULP_CLASS_HID_2f686 = 0x2f686, - BNXT_ULP_CLASS_HID_24cf2 = 0x24cf2, - BNXT_ULP_CLASS_HID_23236 = 0x23236, - BNXT_ULP_CLASS_HID_286f6 = 0x286f6, - BNXT_ULP_CLASS_HID_2d57e = 0x2d57e, - BNXT_ULP_CLASS_HID_2555a = 0x2555a, - BNXT_ULP_CLASS_HID_263d2 = 0x263d2, - BNXT_ULP_CLASS_HID_2f792 = 0x2f792, - BNXT_ULP_CLASS_HID_2c61a = 0x2c61a, - BNXT_ULP_CLASS_HID_244be = 0x244be, - BNXT_ULP_CLASS_HID_20ab2 = 0x20ab2, - BNXT_ULP_CLASS_HID_29eb2 = 0x29eb2, - BNXT_ULP_CLASS_HID_2ad3a = 0x2ad3a, - BNXT_ULP_CLASS_HID_2761a = 0x2761a, - BNXT_ULP_CLASS_HID_27b9e = 0x27b9e, - BNXT_ULP_CLASS_HID_2f01e = 0x2f01e, - BNXT_ULP_CLASS_HID_2de96 = 0x2de96, - BNXT_ULP_CLASS_HID_2341e = 0x2341e, - BNXT_ULP_CLASS_HID_24296 = 0x24296, - BNXT_ULP_CLASS_HID_2d756 = 0x2d756, - BNXT_ULP_CLASS_HID_29c9a = 0x29c9a, - BNXT_ULP_CLASS_HID_265da = 0x265da, - BNXT_ULP_CLASS_HID_27452 = 0x27452, - BNXT_ULP_CLASS_HID_2c812 = 0x2c812, - BNXT_ULP_CLASS_HID_2ce56 = 0x2ce56, - BNXT_ULP_CLASS_HID_20c9a = 0x20c9a, - BNXT_ULP_CLASS_HID_25b12 = 0x25b12, - BNXT_ULP_CLASS_HID_2af12 = 0x2af12, - BNXT_ULP_CLASS_HID_29516 = 0x29516, - BNXT_ULP_CLASS_HID_27d96 = 0x27d96, - BNXT_ULP_CLASS_HID_24c1e = 0x24c1e, - BNXT_ULP_CLASS_HID_2c09e = 0x2c09e, - BNXT_ULP_CLASS_HID_2c612 = 0x2c612, - BNXT_ULP_CLASS_HID_24002 = 0x24002, - BNXT_ULP_CLASS_HID_20646 = 0x20646, - BNXT_ULP_CLASS_HID_29a06 = 0x29a06, - BNXT_ULP_CLASS_HID_2a886 = 0x2a886, - BNXT_ULP_CLASS_HID_271a6 = 0x271a6, - BNXT_ULP_CLASS_HID_277e2 = 0x277e2, - BNXT_ULP_CLASS_HID_2cba2 = 0x2cba2, - BNXT_ULP_CLASS_HID_2da22 = 0x2da22, - BNXT_ULP_CLASS_HID_25896 = 0x25896, - BNXT_ULP_CLASS_HID_21e12 = 0x21e12, - BNXT_ULP_CLASS_HID_29292 = 0x29292, - BNXT_ULP_CLASS_HID_2a112 = 0x2a112, - BNXT_ULP_CLASS_HID_24a32 = 0x24a32, - BNXT_ULP_CLASS_HID_24fb6 = 0x24fb6, - BNXT_ULP_CLASS_HID_2c436 = 0x2c436, - BNXT_ULP_CLASS_HID_2d2a6 = 0x2d2a6, - BNXT_ULP_CLASS_HID_20856 = 0x20856, - BNXT_ULP_CLASS_HID_256c6 = 0x256c6, - BNXT_ULP_CLASS_HID_2aa86 = 0x2aa86, - BNXT_ULP_CLASS_HID_290d2 = 0x290d2, - BNXT_ULP_CLASS_HID_279d2 = 0x279d2, - BNXT_ULP_CLASS_HID_24842 = 0x24842, - BNXT_ULP_CLASS_HID_2dc02 = 0x2dc02, - BNXT_ULP_CLASS_HID_2c246 = 0x2c246, - BNXT_ULP_CLASS_HID_20082 = 0x20082, - BNXT_ULP_CLASS_HID_22e92 = 0x22e92, - BNXT_ULP_CLASS_HID_2a312 = 0x2a312, - BNXT_ULP_CLASS_HID_2f192 = 0x2f192, - BNXT_ULP_CLASS_HID_27196 = 0x27196, - BNXT_ULP_CLASS_HID_24016 = 0x24016, - BNXT_ULP_CLASS_HID_2d496 = 0x2d496, - BNXT_ULP_CLASS_HID_2da12 = 0x2da12, - BNXT_ULP_CLASS_HID_278d2 = 0x278d2, - BNXT_ULP_CLASS_HID_23e16 = 0x23e16, - BNXT_ULP_CLASS_HID_2b2d6 = 0x2b2d6, - BNXT_ULP_CLASS_HID_2c156 = 0x2c156, - BNXT_ULP_CLASS_HID_24132 = 0x24132, - BNXT_ULP_CLASS_HID_26fb2 = 0x26fb2, - BNXT_ULP_CLASS_HID_2e472 = 0x2e472, - BNXT_ULP_CLASS_HID_2f2f2 = 0x2f2f2, - BNXT_ULP_CLASS_HID_27096 = 0x27096, - BNXT_ULP_CLASS_HID_23692 = 0x23692, - BNXT_ULP_CLASS_HID_28a92 = 0x28a92, - BNXT_ULP_CLASS_HID_2d912 = 0x2d912, - BNXT_ULP_CLASS_HID_259b6 = 0x259b6, - BNXT_ULP_CLASS_HID_26836 = 0x26836, - BNXT_ULP_CLASS_HID_2fc36 = 0x2fc36, - BNXT_ULP_CLASS_HID_2cab6 = 0x2cab6, - BNXT_ULP_CLASS_HID_22016 = 0x22016, - BNXT_ULP_CLASS_HID_24e96 = 0x24e96, - BNXT_ULP_CLASS_HID_2c356 = 0x2c356, - BNXT_ULP_CLASS_HID_28892 = 0x28892, - BNXT_ULP_CLASS_HID_25192 = 0x25192, - BNXT_ULP_CLASS_HID_257d6 = 0x257d6, - BNXT_ULP_CLASS_HID_2f4d2 = 0x2f4d2, - BNXT_ULP_CLASS_HID_2fa16 = 0x2fa16, - BNXT_ULP_CLASS_HID_23892 = 0x23892, - BNXT_ULP_CLASS_HID_24712 = 0x24712, - BNXT_ULP_CLASS_HID_2db12 = 0x2db12, - BNXT_ULP_CLASS_HID_28116 = 0x28116, - BNXT_ULP_CLASS_HID_26a16 = 0x26a16, - BNXT_ULP_CLASS_HID_27896 = 0x27896, - BNXT_ULP_CLASS_HID_2cc96 = 0x2cc96, - BNXT_ULP_CLASS_HID_2f292 = 0x2f292, - BNXT_ULP_CLASS_HID_24b05 = 0x24b05, - BNXT_ULP_CLASS_HID_20541 = 0x20541, - BNXT_ULP_CLASS_HID_2e84d = 0x2e84d, - BNXT_ULP_CLASS_HID_2a389 = 0x2a389, - BNXT_ULP_CLASS_HID_25ae9 = 0x25ae9, - BNXT_ULP_CLASS_HID_25425 = 0x25425, - BNXT_ULP_CLASS_HID_2c0e5 = 0x2c0e5, - BNXT_ULP_CLASS_HID_2f16d = 0x2f16d, - BNXT_ULP_CLASS_HID_253d5 = 0x253d5, - BNXT_ULP_CLASS_HID_22d11 = 0x22d11, - BNXT_ULP_CLASS_HID_299d1 = 0x299d1, - BNXT_ULP_CLASS_HID_2ca59 = 0x2ca59, - BNXT_ULP_CLASS_HID_24a7d = 0x24a7d, - BNXT_ULP_CLASS_HID_27cf5 = 0x27cf5, - BNXT_ULP_CLASS_HID_2e8b5 = 0x2e8b5, - BNXT_ULP_CLASS_HID_2d93d = 0x2d93d, - BNXT_ULP_CLASS_HID_25f25 = 0x25f25, - BNXT_ULP_CLASS_HID_21961 = 0x21961, - BNXT_ULP_CLASS_HID_28521 = 0x28521, - BNXT_ULP_CLASS_HID_2b7a1 = 0x2b7a1, - BNXT_ULP_CLASS_HID_26e81 = 0x26e81, - BNXT_ULP_CLASS_HID_268c5 = 0x268c5, - BNXT_ULP_CLASS_HID_2d485 = 0x2d485, - BNXT_ULP_CLASS_HID_2c505 = 0x2c505, - BNXT_ULP_CLASS_HID_267f5 = 0x267f5, - BNXT_ULP_CLASS_HID_22131 = 0x22131, - BNXT_ULP_CLASS_HID_2adf1 = 0x2adf1, - BNXT_ULP_CLASS_HID_2de71 = 0x2de71, - BNXT_ULP_CLASS_HID_25e15 = 0x25e15, - BNXT_ULP_CLASS_HID_27095 = 0x27095, - BNXT_ULP_CLASS_HID_2fb55 = 0x2fb55, - BNXT_ULP_CLASS_HID_2edd5 = 0x2edd5, - BNXT_ULP_CLASS_HID_24511 = 0x24511, - BNXT_ULP_CLASS_HID_21f51 = 0x21f51, - BNXT_ULP_CLASS_HID_28b11 = 0x28b11, - BNXT_ULP_CLASS_HID_2bd99 = 0x2bd99, - BNXT_ULP_CLASS_HID_254f9 = 0x254f9, - BNXT_ULP_CLASS_HID_26e31 = 0x26e31, - BNXT_ULP_CLASS_HID_2daf1 = 0x2daf1, - BNXT_ULP_CLASS_HID_2cb79 = 0x2cb79, - BNXT_ULP_CLASS_HID_26dd1 = 0x26dd1, - BNXT_ULP_CLASS_HID_22711 = 0x22711, - BNXT_ULP_CLASS_HID_293d1 = 0x293d1, - BNXT_ULP_CLASS_HID_2c459 = 0x2c459, - BNXT_ULP_CLASS_HID_24419 = 0x24419, - BNXT_ULP_CLASS_HID_276f1 = 0x276f1, - BNXT_ULP_CLASS_HID_2e2b1 = 0x2e2b1, - BNXT_ULP_CLASS_HID_2d339 = 0x2d339, - BNXT_ULP_CLASS_HID_25931 = 0x25931, - BNXT_ULP_CLASS_HID_21371 = 0x21371, - BNXT_ULP_CLASS_HID_29f31 = 0x29f31, - BNXT_ULP_CLASS_HID_2b1b1 = 0x2b1b1, - BNXT_ULP_CLASS_HID_26891 = 0x26891, - BNXT_ULP_CLASS_HID_262d1 = 0x262d1, - BNXT_ULP_CLASS_HID_2ee91 = 0x2ee91, - BNXT_ULP_CLASS_HID_2df11 = 0x2df11, - BNXT_ULP_CLASS_HID_20951 = 0x20951, - BNXT_ULP_CLASS_HID_23b31 = 0x23b31, - BNXT_ULP_CLASS_HID_2a7f1 = 0x2a7f1, - BNXT_ULP_CLASS_HID_2d871 = 0x2d871, - BNXT_ULP_CLASS_HID_25831 = 0x25831, - BNXT_ULP_CLASS_HID_24a91 = 0x24a91, - BNXT_ULP_CLASS_HID_2f551 = 0x2f551, - BNXT_ULP_CLASS_HID_2e7d1 = 0x2e7d1, - BNXT_ULP_CLASS_HID_2481f = 0x2481f, - BNXT_ULP_CLASS_HID_2025b = 0x2025b, - BNXT_ULP_CLASS_HID_28e1b = 0x28e1b, - BNXT_ULP_CLASS_HID_2a083 = 0x2a083, - BNXT_ULP_CLASS_HID_257e3 = 0x257e3, - BNXT_ULP_CLASS_HID_2513f = 0x2513f, - BNXT_ULP_CLASS_HID_2ddff = 0x2ddff, - BNXT_ULP_CLASS_HID_2ce67 = 0x2ce67, - BNXT_ULP_CLASS_HID_250df = 0x250df, - BNXT_ULP_CLASS_HID_22a1b = 0x22a1b, - BNXT_ULP_CLASS_HID_296db = 0x296db, - BNXT_ULP_CLASS_HID_2c753 = 0x2c753, - BNXT_ULP_CLASS_HID_24777 = 0x24777, - BNXT_ULP_CLASS_HID_279ff = 0x279ff, - BNXT_ULP_CLASS_HID_2e5bf = 0x2e5bf, - BNXT_ULP_CLASS_HID_2d637 = 0x2d637, - BNXT_ULP_CLASS_HID_25c37 = 0x25c37, - BNXT_ULP_CLASS_HID_21673 = 0x21673, - BNXT_ULP_CLASS_HID_28233 = 0x28233, - BNXT_ULP_CLASS_HID_2b4a3 = 0x2b4a3, - BNXT_ULP_CLASS_HID_26b83 = 0x26b83, - BNXT_ULP_CLASS_HID_265d7 = 0x265d7, - BNXT_ULP_CLASS_HID_2d197 = 0x2d197, - BNXT_ULP_CLASS_HID_2c207 = 0x2c207, - BNXT_ULP_CLASS_HID_20db3 = 0x20db3, - BNXT_ULP_CLASS_HID_23e33 = 0x23e33, - BNXT_ULP_CLASS_HID_2aaf3 = 0x2aaf3, - BNXT_ULP_CLASS_HID_2db73 = 0x2db73, - BNXT_ULP_CLASS_HID_25b17 = 0x25b17, - BNXT_ULP_CLASS_HID_24d97 = 0x24d97, - BNXT_ULP_CLASS_HID_2f857 = 0x2f857, - BNXT_ULP_CLASS_HID_2ead7 = 0x2ead7, - BNXT_ULP_CLASS_HID_2422b = 0x2422b, - BNXT_ULP_CLASS_HID_21c6b = 0x21c6b, - BNXT_ULP_CLASS_HID_2882b = 0x2882b, - BNXT_ULP_CLASS_HID_2ba93 = 0x2ba93, - BNXT_ULP_CLASS_HID_251f3 = 0x251f3, - BNXT_ULP_CLASS_HID_26bcb = 0x26bcb, - BNXT_ULP_CLASS_HID_2d78b = 0x2d78b, - BNXT_ULP_CLASS_HID_2c873 = 0x2c873, - BNXT_ULP_CLASS_HID_26afb = 0x26afb, - BNXT_ULP_CLASS_HID_2243b = 0x2243b, - BNXT_ULP_CLASS_HID_290fb = 0x290fb, - BNXT_ULP_CLASS_HID_2c153 = 0x2c153, - BNXT_ULP_CLASS_HID_24113 = 0x24113, - BNXT_ULP_CLASS_HID_2739b = 0x2739b, - BNXT_ULP_CLASS_HID_2fe5b = 0x2fe5b, - BNXT_ULP_CLASS_HID_2d033 = 0x2d033, - BNXT_ULP_CLASS_HID_256c3 = 0x256c3, - BNXT_ULP_CLASS_HID_21003 = 0x21003, - BNXT_ULP_CLASS_HID_29cc3 = 0x29cc3, - BNXT_ULP_CLASS_HID_2ceb3 = 0x2ceb3, - BNXT_ULP_CLASS_HID_24d63 = 0x24d63, - BNXT_ULP_CLASS_HID_27fe3 = 0x27fe3, - BNXT_ULP_CLASS_HID_2eba3 = 0x2eba3, - BNXT_ULP_CLASS_HID_2dc13 = 0x2dc13, - BNXT_ULP_CLASS_HID_20653 = 0x20653, - BNXT_ULP_CLASS_HID_238d3 = 0x238d3, - BNXT_ULP_CLASS_HID_2a493 = 0x2a493, - BNXT_ULP_CLASS_HID_2d573 = 0x2d573, - BNXT_ULP_CLASS_HID_25533 = 0x25533, - BNXT_ULP_CLASS_HID_247b3 = 0x247b3, - BNXT_ULP_CLASS_HID_2f273 = 0x2f273, - BNXT_ULP_CLASS_HID_2cdb3 = 0x2cdb3, - BNXT_ULP_CLASS_HID_25c7d = 0x25c7d, - BNXT_ULP_CLASS_HID_21239 = 0x21239, - BNXT_ULP_CLASS_HID_2ff35 = 0x2ff35, - BNXT_ULP_CLASS_HID_2b4f1 = 0x2b4f1, - BNXT_ULP_CLASS_HID_24d91 = 0x24d91, - BNXT_ULP_CLASS_HID_2435d = 0x2435d, - BNXT_ULP_CLASS_HID_2d79d = 0x2d79d, - BNXT_ULP_CLASS_HID_2e615 = 0x2e615, - BNXT_ULP_CLASS_HID_244ad = 0x244ad, - BNXT_ULP_CLASS_HID_23a69 = 0x23a69, - BNXT_ULP_CLASS_HID_28ea9 = 0x28ea9, - BNXT_ULP_CLASS_HID_2dd21 = 0x2dd21, - BNXT_ULP_CLASS_HID_25d05 = 0x25d05, - BNXT_ULP_CLASS_HID_26b8d = 0x26b8d, - BNXT_ULP_CLASS_HID_2ffcd = 0x2ffcd, - BNXT_ULP_CLASS_HID_2ce45 = 0x2ce45, - BNXT_ULP_CLASS_HID_2485d = 0x2485d, - BNXT_ULP_CLASS_HID_20e19 = 0x20e19, - BNXT_ULP_CLASS_HID_29259 = 0x29259, - BNXT_ULP_CLASS_HID_2a0d9 = 0x2a0d9, - BNXT_ULP_CLASS_HID_279f9 = 0x279f9, - BNXT_ULP_CLASS_HID_27fbd = 0x27fbd, - BNXT_ULP_CLASS_HID_2c3fd = 0x2c3fd, - BNXT_ULP_CLASS_HID_2d27d = 0x2d27d, - BNXT_ULP_CLASS_HID_2708d = 0x2708d, - BNXT_ULP_CLASS_HID_23649 = 0x23649, - BNXT_ULP_CLASS_HID_2ba89 = 0x2ba89, - BNXT_ULP_CLASS_HID_2c909 = 0x2c909, - BNXT_ULP_CLASS_HID_2496d = 0x2496d, - BNXT_ULP_CLASS_HID_267ed = 0x267ed, - BNXT_ULP_CLASS_HID_2ec2d = 0x2ec2d, - BNXT_ULP_CLASS_HID_2faad = 0x2faad, - BNXT_ULP_CLASS_HID_34c6 = 0x34c6, - BNXT_ULP_CLASS_HID_0c22 = 0x0c22, - BNXT_ULP_CLASS_HID_1cbe = 0x1cbe, - BNXT_ULP_CLASS_HID_179a = 0x179a, - BNXT_ULP_CLASS_HID_59be = 0x59be, - BNXT_ULP_CLASS_HID_515a = 0x515a, - BNXT_ULP_CLASS_HID_1c72 = 0x1c72, - BNXT_ULP_CLASS_HID_171e = 0x171e, - BNXT_ULP_CLASS_HID_19c8 = 0x19c8, - BNXT_ULP_CLASS_HID_112c = 0x112c, - BNXT_ULP_CLASS_HID_4d68 = 0x4d68, - BNXT_ULP_CLASS_HID_444c = 0x444c, - BNXT_ULP_CLASS_HID_0e8c = 0x0e8c, - BNXT_ULP_CLASS_HID_09e0 = 0x09e0, - BNXT_ULP_CLASS_HID_1af0 = 0x1af0, - BNXT_ULP_CLASS_HID_15d4 = 0x15d4, - BNXT_ULP_CLASS_HID_1dd0 = 0x1dd0, - BNXT_ULP_CLASS_HID_14f4 = 0x14f4, - BNXT_ULP_CLASS_HID_70b0 = 0x70b0, - BNXT_ULP_CLASS_HID_4854 = 0x4854, - BNXT_ULP_CLASS_HID_3dd4 = 0x3dd4, - BNXT_ULP_CLASS_HID_34f8 = 0x34f8, - BNXT_ULP_CLASS_HID_09e8 = 0x09e8, - BNXT_ULP_CLASS_HID_008c = 0x008c, - BNXT_ULP_CLASS_HID_34e6 = 0x34e6, - BNXT_ULP_CLASS_HID_0c02 = 0x0c02, - BNXT_ULP_CLASS_HID_1c9e = 0x1c9e, - BNXT_ULP_CLASS_HID_17ba = 0x17ba, - BNXT_ULP_CLASS_HID_429e = 0x429e, - BNXT_ULP_CLASS_HID_5dba = 0x5dba, - BNXT_ULP_CLASS_HID_2a16 = 0x2a16, - BNXT_ULP_CLASS_HID_2532 = 0x2532, - BNXT_ULP_CLASS_HID_2da2 = 0x2da2, - BNXT_ULP_CLASS_HID_24fe = 0x24fe, - BNXT_ULP_CLASS_HID_355a = 0x355a, - BNXT_ULP_CLASS_HID_0c76 = 0x0c76, - BNXT_ULP_CLASS_HID_13e6 = 0x13e6, - BNXT_ULP_CLASS_HID_7276 = 0x7276, - BNXT_ULP_CLASS_HID_42d2 = 0x42d2, - BNXT_ULP_CLASS_HID_5dee = 0x5dee, - BNXT_ULP_CLASS_HID_59de = 0x59de, - BNXT_ULP_CLASS_HID_513a = 0x513a, - BNXT_ULP_CLASS_HID_1c12 = 0x1c12, - BNXT_ULP_CLASS_HID_177e = 0x177e, - BNXT_ULP_CLASS_HID_0e92 = 0x0e92, - BNXT_ULP_CLASS_HID_09fe = 0x09fe, - BNXT_ULP_CLASS_HID_5c1a = 0x5c1a, - BNXT_ULP_CLASS_HID_5746 = 0x5746, - BNXT_ULP_CLASS_HID_79da = 0x79da, - BNXT_ULP_CLASS_HID_7106 = 0x7106, - BNXT_ULP_CLASS_HID_3c1e = 0x3c1e, - BNXT_ULP_CLASS_HID_377a = 0x377a, - BNXT_ULP_CLASS_HID_2e9e = 0x2e9e, - BNXT_ULP_CLASS_HID_29fa = 0x29fa, - BNXT_ULP_CLASS_HID_14d2 = 0x14d2, - BNXT_ULP_CLASS_HID_7742 = 0x7742, - BNXT_ULP_CLASS_HID_3706 = 0x3706, - BNXT_ULP_CLASS_HID_0fe2 = 0x0fe2, - BNXT_ULP_CLASS_HID_1f7e = 0x1f7e, - BNXT_ULP_CLASS_HID_145a = 0x145a, - BNXT_ULP_CLASS_HID_417e = 0x417e, - BNXT_ULP_CLASS_HID_5e5a = 0x5e5a, - BNXT_ULP_CLASS_HID_29f6 = 0x29f6, - BNXT_ULP_CLASS_HID_26d2 = 0x26d2, - BNXT_ULP_CLASS_HID_2e42 = 0x2e42, - BNXT_ULP_CLASS_HID_271e = 0x271e, - BNXT_ULP_CLASS_HID_36ba = 0x36ba, - BNXT_ULP_CLASS_HID_0f96 = 0x0f96, - BNXT_ULP_CLASS_HID_1006 = 0x1006, - BNXT_ULP_CLASS_HID_7196 = 0x7196, - BNXT_ULP_CLASS_HID_4132 = 0x4132, - BNXT_ULP_CLASS_HID_5e0e = 0x5e0e, - BNXT_ULP_CLASS_HID_59fe = 0x59fe, - BNXT_ULP_CLASS_HID_511a = 0x511a, - BNXT_ULP_CLASS_HID_1c32 = 0x1c32, - BNXT_ULP_CLASS_HID_175e = 0x175e, - BNXT_ULP_CLASS_HID_0eb2 = 0x0eb2, - BNXT_ULP_CLASS_HID_09de = 0x09de, - BNXT_ULP_CLASS_HID_5c3a = 0x5c3a, - BNXT_ULP_CLASS_HID_5766 = 0x5766, - BNXT_ULP_CLASS_HID_79fa = 0x79fa, - BNXT_ULP_CLASS_HID_7126 = 0x7126, - BNXT_ULP_CLASS_HID_3c3e = 0x3c3e, - BNXT_ULP_CLASS_HID_375a = 0x375a, - BNXT_ULP_CLASS_HID_2ebe = 0x2ebe, - BNXT_ULP_CLASS_HID_29da = 0x29da, - BNXT_ULP_CLASS_HID_14f2 = 0x14f2, - BNXT_ULP_CLASS_HID_7762 = 0x7762, - BNXT_ULP_CLASS_HID_19e8 = 0x19e8, - BNXT_ULP_CLASS_HID_110c = 0x110c, - BNXT_ULP_CLASS_HID_4d48 = 0x4d48, - BNXT_ULP_CLASS_HID_446c = 0x446c, - BNXT_ULP_CLASS_HID_0eac = 0x0eac, - BNXT_ULP_CLASS_HID_09c0 = 0x09c0, - BNXT_ULP_CLASS_HID_1ad0 = 0x1ad0, - BNXT_ULP_CLASS_HID_15f4 = 0x15f4, - BNXT_ULP_CLASS_HID_39ec = 0x39ec, - BNXT_ULP_CLASS_HID_3100 = 0x3100, - BNXT_ULP_CLASS_HID_0210 = 0x0210, - BNXT_ULP_CLASS_HID_1d34 = 0x1d34, - BNXT_ULP_CLASS_HID_2ea0 = 0x2ea0, - BNXT_ULP_CLASS_HID_29c4 = 0x29c4, - BNXT_ULP_CLASS_HID_3ad4 = 0x3ad4, - BNXT_ULP_CLASS_HID_35e8 = 0x35e8, - BNXT_ULP_CLASS_HID_5d80 = 0x5d80, - BNXT_ULP_CLASS_HID_54a4 = 0x54a4, - BNXT_ULP_CLASS_HID_29b4 = 0x29b4, - BNXT_ULP_CLASS_HID_20c8 = 0x20c8, - BNXT_ULP_CLASS_HID_7244 = 0x7244, - BNXT_ULP_CLASS_HID_4d98 = 0x4d98, - BNXT_ULP_CLASS_HID_5e68 = 0x5e68, - BNXT_ULP_CLASS_HID_598c = 0x598c, - BNXT_ULP_CLASS_HID_1248 = 0x1248, - BNXT_ULP_CLASS_HID_74d8 = 0x74d8, - BNXT_ULP_CLASS_HID_49a8 = 0x49a8, - BNXT_ULP_CLASS_HID_40cc = 0x40cc, - BNXT_ULP_CLASS_HID_0b0c = 0x0b0c, - BNXT_ULP_CLASS_HID_0220 = 0x0220, - BNXT_ULP_CLASS_HID_1730 = 0x1730, - BNXT_ULP_CLASS_HID_7980 = 0x7980, - BNXT_ULP_CLASS_HID_1db0 = 0x1db0, - BNXT_ULP_CLASS_HID_1494 = 0x1494, - BNXT_ULP_CLASS_HID_70d0 = 0x70d0, - BNXT_ULP_CLASS_HID_4834 = 0x4834, - BNXT_ULP_CLASS_HID_3db4 = 0x3db4, - BNXT_ULP_CLASS_HID_3498 = 0x3498, - BNXT_ULP_CLASS_HID_0988 = 0x0988, - BNXT_ULP_CLASS_HID_00ec = 0x00ec, - BNXT_ULP_CLASS_HID_23f44 = 0x23f44, - BNXT_ULP_CLASS_HID_236a8 = 0x236a8, - BNXT_ULP_CLASS_HID_20b58 = 0x20b58, - BNXT_ULP_CLASS_HID_202bc = 0x202bc, - BNXT_ULP_CLASS_HID_25f48 = 0x25f48, - BNXT_ULP_CLASS_HID_256ac = 0x256ac, - BNXT_ULP_CLASS_HID_22b5c = 0x22b5c, - BNXT_ULP_CLASS_HID_22280 = 0x22280, - BNXT_ULP_CLASS_HID_14000 = 0x14000, - BNXT_ULP_CLASS_HID_15b64 = 0x15b64, - BNXT_ULP_CLASS_HID_12c14 = 0x12c14, - BNXT_ULP_CLASS_HID_12778 = 0x12778, - BNXT_ULP_CLASS_HID_118f8 = 0x118f8, - BNXT_ULP_CLASS_HID_113dc = 0x113dc, - BNXT_ULP_CLASS_HID_14c18 = 0x14c18, - BNXT_ULP_CLASS_HID_1477c = 0x1477c, - BNXT_ULP_CLASS_HID_31a88 = 0x31a88, - BNXT_ULP_CLASS_HID_315ec = 0x315ec, - BNXT_ULP_CLASS_HID_34e28 = 0x34e28, - BNXT_ULP_CLASS_HID_3490c = 0x3490c, - BNXT_ULP_CLASS_HID_33a8c = 0x33a8c, - BNXT_ULP_CLASS_HID_335f0 = 0x335f0, - BNXT_ULP_CLASS_HID_306e0 = 0x306e0, - BNXT_ULP_CLASS_HID_301c4 = 0x301c4, - BNXT_ULP_CLASS_HID_1a08 = 0x1a08, - BNXT_ULP_CLASS_HID_12ec = 0x12ec, - BNXT_ULP_CLASS_HID_4ea8 = 0x4ea8, - BNXT_ULP_CLASS_HID_478c = 0x478c, - BNXT_ULP_CLASS_HID_0d4c = 0x0d4c, - BNXT_ULP_CLASS_HID_0a20 = 0x0a20, - BNXT_ULP_CLASS_HID_1930 = 0x1930, - BNXT_ULP_CLASS_HID_1614 = 0x1614, - BNXT_ULP_CLASS_HID_3a0c = 0x3a0c, - BNXT_ULP_CLASS_HID_32e0 = 0x32e0, - BNXT_ULP_CLASS_HID_01f0 = 0x01f0, - BNXT_ULP_CLASS_HID_1ed4 = 0x1ed4, - BNXT_ULP_CLASS_HID_2d40 = 0x2d40, - BNXT_ULP_CLASS_HID_2a24 = 0x2a24, - BNXT_ULP_CLASS_HID_3934 = 0x3934, - BNXT_ULP_CLASS_HID_3608 = 0x3608, - BNXT_ULP_CLASS_HID_5e60 = 0x5e60, - BNXT_ULP_CLASS_HID_5744 = 0x5744, - BNXT_ULP_CLASS_HID_2a54 = 0x2a54, - BNXT_ULP_CLASS_HID_2328 = 0x2328, - BNXT_ULP_CLASS_HID_71a4 = 0x71a4, - BNXT_ULP_CLASS_HID_4e78 = 0x4e78, - BNXT_ULP_CLASS_HID_5d88 = 0x5d88, - BNXT_ULP_CLASS_HID_5a6c = 0x5a6c, - BNXT_ULP_CLASS_HID_11a8 = 0x11a8, - BNXT_ULP_CLASS_HID_7738 = 0x7738, - BNXT_ULP_CLASS_HID_4a48 = 0x4a48, - BNXT_ULP_CLASS_HID_432c = 0x432c, - BNXT_ULP_CLASS_HID_08ec = 0x08ec, - BNXT_ULP_CLASS_HID_01c0 = 0x01c0, - BNXT_ULP_CLASS_HID_14d0 = 0x14d0, - BNXT_ULP_CLASS_HID_7a60 = 0x7a60, - BNXT_ULP_CLASS_HID_1d90 = 0x1d90, - BNXT_ULP_CLASS_HID_14b4 = 0x14b4, - BNXT_ULP_CLASS_HID_70f0 = 0x70f0, - BNXT_ULP_CLASS_HID_4814 = 0x4814, - BNXT_ULP_CLASS_HID_3d94 = 0x3d94, - BNXT_ULP_CLASS_HID_34b8 = 0x34b8, - BNXT_ULP_CLASS_HID_09a8 = 0x09a8, - BNXT_ULP_CLASS_HID_00cc = 0x00cc, - BNXT_ULP_CLASS_HID_23f64 = 0x23f64, - BNXT_ULP_CLASS_HID_23688 = 0x23688, - BNXT_ULP_CLASS_HID_20b78 = 0x20b78, - BNXT_ULP_CLASS_HID_2029c = 0x2029c, - BNXT_ULP_CLASS_HID_25f68 = 0x25f68, - BNXT_ULP_CLASS_HID_2568c = 0x2568c, - BNXT_ULP_CLASS_HID_22b7c = 0x22b7c, - BNXT_ULP_CLASS_HID_222a0 = 0x222a0, - BNXT_ULP_CLASS_HID_14020 = 0x14020, - BNXT_ULP_CLASS_HID_15b44 = 0x15b44, - BNXT_ULP_CLASS_HID_12c34 = 0x12c34, - BNXT_ULP_CLASS_HID_12758 = 0x12758, - BNXT_ULP_CLASS_HID_118d8 = 0x118d8, - BNXT_ULP_CLASS_HID_113fc = 0x113fc, - BNXT_ULP_CLASS_HID_14c38 = 0x14c38, - BNXT_ULP_CLASS_HID_1475c = 0x1475c, - BNXT_ULP_CLASS_HID_31aa8 = 0x31aa8, - BNXT_ULP_CLASS_HID_315cc = 0x315cc, - BNXT_ULP_CLASS_HID_34e08 = 0x34e08, - BNXT_ULP_CLASS_HID_3492c = 0x3492c, - BNXT_ULP_CLASS_HID_33aac = 0x33aac, - BNXT_ULP_CLASS_HID_335d0 = 0x335d0, - BNXT_ULP_CLASS_HID_306c0 = 0x306c0, - BNXT_ULP_CLASS_HID_301e4 = 0x301e4, - BNXT_ULP_CLASS_HID_4d32 = 0x4d32, - BNXT_ULP_CLASS_HID_54aa = 0x54aa, - BNXT_ULP_CLASS_HID_0686 = 0x0686, - BNXT_ULP_CLASS_HID_540e = 0x540e, - BNXT_ULP_CLASS_HID_2e3c = 0x2e3c, - BNXT_ULP_CLASS_HID_3a20 = 0x3a20, - BNXT_ULP_CLASS_HID_46f0 = 0x46f0, - BNXT_ULP_CLASS_HID_52e4 = 0x52e4, - BNXT_ULP_CLASS_HID_55e4 = 0x55e4, - BNXT_ULP_CLASS_HID_21f8 = 0x21f8, - BNXT_ULP_CLASS_HID_75e8 = 0x75e8, - BNXT_ULP_CLASS_HID_41fc = 0x41fc, - BNXT_ULP_CLASS_HID_4d12 = 0x4d12, - BNXT_ULP_CLASS_HID_548a = 0x548a, - BNXT_ULP_CLASS_HID_3356 = 0x3356, - BNXT_ULP_CLASS_HID_1ace = 0x1ace, - BNXT_ULP_CLASS_HID_1a9a = 0x1a9a, - BNXT_ULP_CLASS_HID_4d46 = 0x4d46, - BNXT_ULP_CLASS_HID_2812 = 0x2812, - BNXT_ULP_CLASS_HID_338a = 0x338a, - BNXT_ULP_CLASS_HID_06e6 = 0x06e6, - BNXT_ULP_CLASS_HID_546e = 0x546e, - BNXT_ULP_CLASS_HID_46ee = 0x46ee, - BNXT_ULP_CLASS_HID_0d22 = 0x0d22, - BNXT_ULP_CLASS_HID_26e2 = 0x26e2, - BNXT_ULP_CLASS_HID_746a = 0x746a, - BNXT_ULP_CLASS_HID_1fa6 = 0x1fa6, - BNXT_ULP_CLASS_HID_2d2e = 0x2d2e, - BNXT_ULP_CLASS_HID_4ef2 = 0x4ef2, - BNXT_ULP_CLASS_HID_576a = 0x576a, - BNXT_ULP_CLASS_HID_30b6 = 0x30b6, - BNXT_ULP_CLASS_HID_192e = 0x192e, - BNXT_ULP_CLASS_HID_197a = 0x197a, - BNXT_ULP_CLASS_HID_4ea6 = 0x4ea6, - BNXT_ULP_CLASS_HID_2bf2 = 0x2bf2, - BNXT_ULP_CLASS_HID_306a = 0x306a, - BNXT_ULP_CLASS_HID_06c6 = 0x06c6, - BNXT_ULP_CLASS_HID_544e = 0x544e, - BNXT_ULP_CLASS_HID_46ce = 0x46ce, - BNXT_ULP_CLASS_HID_0d02 = 0x0d02, - BNXT_ULP_CLASS_HID_26c2 = 0x26c2, - BNXT_ULP_CLASS_HID_744a = 0x744a, - BNXT_ULP_CLASS_HID_1f86 = 0x1f86, - BNXT_ULP_CLASS_HID_2d0e = 0x2d0e, - BNXT_ULP_CLASS_HID_2e1c = 0x2e1c, - BNXT_ULP_CLASS_HID_3a00 = 0x3a00, - BNXT_ULP_CLASS_HID_46d0 = 0x46d0, - BNXT_ULP_CLASS_HID_52c4 = 0x52c4, - BNXT_ULP_CLASS_HID_4e10 = 0x4e10, - BNXT_ULP_CLASS_HID_5a04 = 0x5a04, - BNXT_ULP_CLASS_HID_1f98 = 0x1f98, - BNXT_ULP_CLASS_HID_72f8 = 0x72f8, - BNXT_ULP_CLASS_HID_0a78 = 0x0a78, - BNXT_ULP_CLASS_HID_166c = 0x166c, - BNXT_ULP_CLASS_HID_233c = 0x233c, - BNXT_ULP_CLASS_HID_0f20 = 0x0f20, - BNXT_ULP_CLASS_HID_2a7c = 0x2a7c, - BNXT_ULP_CLASS_HID_3660 = 0x3660, - BNXT_ULP_CLASS_HID_4330 = 0x4330, - BNXT_ULP_CLASS_HID_2f24 = 0x2f24, - BNXT_ULP_CLASS_HID_5584 = 0x5584, - BNXT_ULP_CLASS_HID_2198 = 0x2198, - BNXT_ULP_CLASS_HID_7588 = 0x7588, - BNXT_ULP_CLASS_HID_419c = 0x419c, - BNXT_ULP_CLASS_HID_27758 = 0x27758, - BNXT_ULP_CLASS_HID_243ac = 0x243ac, - BNXT_ULP_CLASS_HID_20c10 = 0x20c10, - BNXT_ULP_CLASS_HID_21864 = 0x21864, - BNXT_ULP_CLASS_HID_130c8 = 0x130c8, - BNXT_ULP_CLASS_HID_11cdc = 0x11cdc, - BNXT_ULP_CLASS_HID_150cc = 0x150cc, - BNXT_ULP_CLASS_HID_13d20 = 0x13d20, - BNXT_ULP_CLASS_HID_3529c = 0x3529c, - BNXT_ULP_CLASS_HID_33ef0 = 0x33ef0, - BNXT_ULP_CLASS_HID_372e0 = 0x372e0, - BNXT_ULP_CLASS_HID_35ef4 = 0x35ef4, - BNXT_ULP_CLASS_HID_2dfc = 0x2dfc, - BNXT_ULP_CLASS_HID_39e0 = 0x39e0, - BNXT_ULP_CLASS_HID_4530 = 0x4530, - BNXT_ULP_CLASS_HID_5124 = 0x5124, - BNXT_ULP_CLASS_HID_4df0 = 0x4df0, - BNXT_ULP_CLASS_HID_59e4 = 0x59e4, - BNXT_ULP_CLASS_HID_1c78 = 0x1c78, - BNXT_ULP_CLASS_HID_7118 = 0x7118, - BNXT_ULP_CLASS_HID_0998 = 0x0998, - BNXT_ULP_CLASS_HID_158c = 0x158c, - BNXT_ULP_CLASS_HID_20dc = 0x20dc, - BNXT_ULP_CLASS_HID_0cc0 = 0x0cc0, - BNXT_ULP_CLASS_HID_299c = 0x299c, - BNXT_ULP_CLASS_HID_3580 = 0x3580, - BNXT_ULP_CLASS_HID_40d0 = 0x40d0, - BNXT_ULP_CLASS_HID_2cc4 = 0x2cc4, - BNXT_ULP_CLASS_HID_55a4 = 0x55a4, - BNXT_ULP_CLASS_HID_21b8 = 0x21b8, - BNXT_ULP_CLASS_HID_75a8 = 0x75a8, - BNXT_ULP_CLASS_HID_41bc = 0x41bc, - BNXT_ULP_CLASS_HID_27778 = 0x27778, - BNXT_ULP_CLASS_HID_2438c = 0x2438c, - BNXT_ULP_CLASS_HID_20c30 = 0x20c30, - BNXT_ULP_CLASS_HID_21844 = 0x21844, - BNXT_ULP_CLASS_HID_130e8 = 0x130e8, - BNXT_ULP_CLASS_HID_11cfc = 0x11cfc, - BNXT_ULP_CLASS_HID_150ec = 0x150ec, - BNXT_ULP_CLASS_HID_13d00 = 0x13d00, - BNXT_ULP_CLASS_HID_352bc = 0x352bc, - BNXT_ULP_CLASS_HID_33ed0 = 0x33ed0, - BNXT_ULP_CLASS_HID_372c0 = 0x372c0, - BNXT_ULP_CLASS_HID_35ed4 = 0x35ed4, - BNXT_ULP_CLASS_HID_3866 = 0x3866, - BNXT_ULP_CLASS_HID_381e = 0x381e, - BNXT_ULP_CLASS_HID_3860 = 0x3860, - BNXT_ULP_CLASS_HID_0454 = 0x0454, - BNXT_ULP_CLASS_HID_3818 = 0x3818, - BNXT_ULP_CLASS_HID_042c = 0x042c, - BNXT_ULP_CLASS_HID_3846 = 0x3846, - BNXT_ULP_CLASS_HID_387e = 0x387e, - BNXT_ULP_CLASS_HID_3ba6 = 0x3ba6, - BNXT_ULP_CLASS_HID_385e = 0x385e, - BNXT_ULP_CLASS_HID_3840 = 0x3840, - BNXT_ULP_CLASS_HID_0474 = 0x0474, - BNXT_ULP_CLASS_HID_3878 = 0x3878, - BNXT_ULP_CLASS_HID_044c = 0x044c, - BNXT_ULP_CLASS_HID_3ba0 = 0x3ba0, - BNXT_ULP_CLASS_HID_0794 = 0x0794, - BNXT_ULP_CLASS_HID_3858 = 0x3858, - BNXT_ULP_CLASS_HID_046c = 0x046c + BNXT_ULP_CLASS_HID_00b8 = 0x00b8, + BNXT_ULP_CLASS_HID_0cc2 = 0x0cc2, + BNXT_ULP_CLASS_HID_10e4 = 0x10e4, + BNXT_ULP_CLASS_HID_1d0e = 0x1d0e, + BNXT_ULP_CLASS_HID_0286 = 0x0286, + BNXT_ULP_CLASS_HID_0e98 = 0x0e98, + BNXT_ULP_CLASS_HID_1666 = 0x1666, + BNXT_ULP_CLASS_HID_02de = 0x02de, + BNXT_ULP_CLASS_HID_81d25 = 0x81d25, + BNXT_ULP_CLASS_HID_809ad = 0x809ad, + BNXT_ULP_CLASS_HID_80ae3 = 0x80ae3, + BNXT_ULP_CLASS_HID_8170d = 0x8170d, + BNXT_ULP_CLASS_HID_80773 = 0x80773, + BNXT_ULP_CLASS_HID_8139d = 0x8139d, + BNXT_ULP_CLASS_HID_814d3 = 0x814d3, + BNXT_ULP_CLASS_HID_8015b = 0x8015b, + BNXT_ULP_CLASS_HID_21977 = 0x21977, + BNXT_ULP_CLASS_HID_205ef = 0x205ef, + BNXT_ULP_CLASS_HID_20735 = 0x20735, + BNXT_ULP_CLASS_HID_2134f = 0x2134f, + BNXT_ULP_CLASS_HID_61beb = 0x61beb, + BNXT_ULP_CLASS_HID_60863 = 0x60863, + BNXT_ULP_CLASS_HID_609a9 = 0x609a9, + BNXT_ULP_CLASS_HID_615c3 = 0x615c3, + BNXT_ULP_CLASS_HID_00a8 = 0x00a8, + BNXT_ULP_CLASS_HID_0cd2 = 0x0cd2, + BNXT_ULP_CLASS_HID_10f4 = 0x10f4, + BNXT_ULP_CLASS_HID_1d1e = 0x1d1e, + BNXT_ULP_CLASS_HID_1488 = 0x1488, + BNXT_ULP_CLASS_HID_0110 = 0x0110, + BNXT_ULP_CLASS_HID_0532 = 0x0532, + BNXT_ULP_CLASS_HID_115c = 0x115c, + BNXT_ULP_CLASS_HID_0ab8 = 0x0ab8, + BNXT_ULP_CLASS_HID_16a2 = 0x16a2, + BNXT_ULP_CLASS_HID_1ac4 = 0x1ac4, + BNXT_ULP_CLASS_HID_074c = 0x074c, + BNXT_ULP_CLASS_HID_1e98 = 0x1e98, + BNXT_ULP_CLASS_HID_0ae0 = 0x0ae0, + BNXT_ULP_CLASS_HID_0f02 = 0x0f02, + BNXT_ULP_CLASS_HID_1b2c = 0x1b2c, + BNXT_ULP_CLASS_HID_0296 = 0x0296, + BNXT_ULP_CLASS_HID_0e88 = 0x0e88, + BNXT_ULP_CLASS_HID_1676 = 0x1676, + BNXT_ULP_CLASS_HID_02ce = 0x02ce, + BNXT_ULP_CLASS_HID_8076e = 0x8076e, + BNXT_ULP_CLASS_HID_81380 = 0x81380, + BNXT_ULP_CLASS_HID_81b4e = 0x81b4e, + BNXT_ULP_CLASS_HID_807c6 = 0x807c6, + BNXT_ULP_CLASS_HID_404ea = 0x404ea, + BNXT_ULP_CLASS_HID_4110c = 0x4110c, + BNXT_ULP_CLASS_HID_418ca = 0x418ca, + BNXT_ULP_CLASS_HID_40542 = 0x40542, + BNXT_ULP_CLASS_HID_c09e2 = 0xc09e2, + BNXT_ULP_CLASS_HID_c1604 = 0xc1604, + BNXT_ULP_CLASS_HID_c1dc2 = 0xc1dc2, + BNXT_ULP_CLASS_HID_c0a5a = 0xc0a5a, + BNXT_ULP_CLASS_HID_0098 = 0x0098, + BNXT_ULP_CLASS_HID_0ce2 = 0x0ce2, + BNXT_ULP_CLASS_HID_10c4 = 0x10c4, + BNXT_ULP_CLASS_HID_1d2e = 0x1d2e, + BNXT_ULP_CLASS_HID_14b8 = 0x14b8, + BNXT_ULP_CLASS_HID_0120 = 0x0120, + BNXT_ULP_CLASS_HID_0502 = 0x0502, + BNXT_ULP_CLASS_HID_116c = 0x116c, + BNXT_ULP_CLASS_HID_0a88 = 0x0a88, + BNXT_ULP_CLASS_HID_1692 = 0x1692, + BNXT_ULP_CLASS_HID_1af4 = 0x1af4, + BNXT_ULP_CLASS_HID_077c = 0x077c, + BNXT_ULP_CLASS_HID_1ea8 = 0x1ea8, + BNXT_ULP_CLASS_HID_0ad0 = 0x0ad0, + BNXT_ULP_CLASS_HID_0f32 = 0x0f32, + BNXT_ULP_CLASS_HID_1b1c = 0x1b1c, + BNXT_ULP_CLASS_HID_02a6 = 0x02a6, + BNXT_ULP_CLASS_HID_0eb8 = 0x0eb8, + BNXT_ULP_CLASS_HID_1646 = 0x1646, + BNXT_ULP_CLASS_HID_02fe = 0x02fe, + BNXT_ULP_CLASS_HID_8075e = 0x8075e, + BNXT_ULP_CLASS_HID_813b0 = 0x813b0, + BNXT_ULP_CLASS_HID_81b7e = 0x81b7e, + BNXT_ULP_CLASS_HID_807f6 = 0x807f6, + BNXT_ULP_CLASS_HID_404da = 0x404da, + BNXT_ULP_CLASS_HID_4113c = 0x4113c, + BNXT_ULP_CLASS_HID_418fa = 0x418fa, + BNXT_ULP_CLASS_HID_40572 = 0x40572, + BNXT_ULP_CLASS_HID_c09d2 = 0xc09d2, + BNXT_ULP_CLASS_HID_c1634 = 0xc1634, + BNXT_ULP_CLASS_HID_c1df2 = 0xc1df2, + BNXT_ULP_CLASS_HID_c0a6a = 0xc0a6a, + BNXT_ULP_CLASS_HID_81d35 = 0x81d35, + BNXT_ULP_CLASS_HID_809bd = 0x809bd, + BNXT_ULP_CLASS_HID_80af3 = 0x80af3, + BNXT_ULP_CLASS_HID_8171d = 0x8171d, + BNXT_ULP_CLASS_HID_80763 = 0x80763, + BNXT_ULP_CLASS_HID_8138d = 0x8138d, + BNXT_ULP_CLASS_HID_814c3 = 0x814c3, + BNXT_ULP_CLASS_HID_8014b = 0x8014b, + BNXT_ULP_CLASS_HID_c001f = 0xc001f, + BNXT_ULP_CLASS_HID_c0c39 = 0xc0c39, + BNXT_ULP_CLASS_HID_c0d7f = 0xc0d7f, + BNXT_ULP_CLASS_HID_c1999 = 0xc1999, + BNXT_ULP_CLASS_HID_c09ef = 0xc09ef, + BNXT_ULP_CLASS_HID_c1609 = 0xc1609, + BNXT_ULP_CLASS_HID_c174f = 0xc174f, + BNXT_ULP_CLASS_HID_c03d7 = 0xc03d7, + BNXT_ULP_CLASS_HID_a1e73 = 0xa1e73, + BNXT_ULP_CLASS_HID_a0afb = 0xa0afb, + BNXT_ULP_CLASS_HID_a0c31 = 0xa0c31, + BNXT_ULP_CLASS_HID_a185b = 0xa185b, + BNXT_ULP_CLASS_HID_a08a1 = 0xa08a1, + BNXT_ULP_CLASS_HID_a14cb = 0xa14cb, + BNXT_ULP_CLASS_HID_a1601 = 0xa1601, + BNXT_ULP_CLASS_HID_a0289 = 0xa0289, + BNXT_ULP_CLASS_HID_e015d = 0xe015d, + BNXT_ULP_CLASS_HID_e0d47 = 0xe0d47, + BNXT_ULP_CLASS_HID_e0ebd = 0xe0ebd, + BNXT_ULP_CLASS_HID_e1aa7 = 0xe1aa7, + BNXT_ULP_CLASS_HID_e0b2d = 0xe0b2d, + BNXT_ULP_CLASS_HID_e1757 = 0xe1757, + BNXT_ULP_CLASS_HID_e188d = 0xe188d, + BNXT_ULP_CLASS_HID_e0515 = 0xe0515, + BNXT_ULP_CLASS_HID_21967 = 0x21967, + BNXT_ULP_CLASS_HID_205ff = 0x205ff, + BNXT_ULP_CLASS_HID_20725 = 0x20725, + BNXT_ULP_CLASS_HID_2135f = 0x2135f, + BNXT_ULP_CLASS_HID_61bfb = 0x61bfb, + BNXT_ULP_CLASS_HID_60873 = 0x60873, + BNXT_ULP_CLASS_HID_609b9 = 0x609b9, + BNXT_ULP_CLASS_HID_615d3 = 0x615d3, + BNXT_ULP_CLASS_HID_30a55 = 0x30a55, + BNXT_ULP_CLASS_HID_3164f = 0x3164f, + BNXT_ULP_CLASS_HID_317b5 = 0x317b5, + BNXT_ULP_CLASS_HID_3040d = 0x3040d, + BNXT_ULP_CLASS_HID_70ca9 = 0x70ca9, + BNXT_ULP_CLASS_HID_718c3 = 0x718c3, + BNXT_ULP_CLASS_HID_71a09 = 0x71a09, + BNXT_ULP_CLASS_HID_70681 = 0x70681, + BNXT_ULP_CLASS_HID_2821d = 0x2821d, + BNXT_ULP_CLASS_HID_28e37 = 0x28e37, + BNXT_ULP_CLASS_HID_28f7d = 0x28f7d, + BNXT_ULP_CLASS_HID_29b97 = 0x29b97, + BNXT_ULP_CLASS_HID_68491 = 0x68491, + BNXT_ULP_CLASS_HID_6908b = 0x6908b, + BNXT_ULP_CLASS_HID_691f1 = 0x691f1, + BNXT_ULP_CLASS_HID_69deb = 0x69deb, + BNXT_ULP_CLASS_HID_3926d = 0x3926d, + BNXT_ULP_CLASS_HID_39e87 = 0x39e87, + BNXT_ULP_CLASS_HID_38023 = 0x38023, + BNXT_ULP_CLASS_HID_38c45 = 0x38c45, + BNXT_ULP_CLASS_HID_794e1 = 0x794e1, + BNXT_ULP_CLASS_HID_78179 = 0x78179, + BNXT_ULP_CLASS_HID_782a7 = 0x782a7, + BNXT_ULP_CLASS_HID_78ed9 = 0x78ed9, + BNXT_ULP_CLASS_HID_81d05 = 0x81d05, + BNXT_ULP_CLASS_HID_8098d = 0x8098d, + BNXT_ULP_CLASS_HID_80ac3 = 0x80ac3, + BNXT_ULP_CLASS_HID_8172d = 0x8172d, + BNXT_ULP_CLASS_HID_80753 = 0x80753, + BNXT_ULP_CLASS_HID_813bd = 0x813bd, + BNXT_ULP_CLASS_HID_814f3 = 0x814f3, + BNXT_ULP_CLASS_HID_8017b = 0x8017b, + BNXT_ULP_CLASS_HID_c002f = 0xc002f, + BNXT_ULP_CLASS_HID_c0c09 = 0xc0c09, + BNXT_ULP_CLASS_HID_c0d4f = 0xc0d4f, + BNXT_ULP_CLASS_HID_c19a9 = 0xc19a9, + BNXT_ULP_CLASS_HID_c09df = 0xc09df, + BNXT_ULP_CLASS_HID_c1639 = 0xc1639, + BNXT_ULP_CLASS_HID_c177f = 0xc177f, + BNXT_ULP_CLASS_HID_c03e7 = 0xc03e7, + BNXT_ULP_CLASS_HID_a1e43 = 0xa1e43, + BNXT_ULP_CLASS_HID_a0acb = 0xa0acb, + BNXT_ULP_CLASS_HID_a0c01 = 0xa0c01, + BNXT_ULP_CLASS_HID_a186b = 0xa186b, + BNXT_ULP_CLASS_HID_a0891 = 0xa0891, + BNXT_ULP_CLASS_HID_a14fb = 0xa14fb, + BNXT_ULP_CLASS_HID_a1631 = 0xa1631, + BNXT_ULP_CLASS_HID_a02b9 = 0xa02b9, + BNXT_ULP_CLASS_HID_e016d = 0xe016d, + BNXT_ULP_CLASS_HID_e0d77 = 0xe0d77, + BNXT_ULP_CLASS_HID_e0e8d = 0xe0e8d, + BNXT_ULP_CLASS_HID_e1a97 = 0xe1a97, + BNXT_ULP_CLASS_HID_e0b1d = 0xe0b1d, + BNXT_ULP_CLASS_HID_e1767 = 0xe1767, + BNXT_ULP_CLASS_HID_e18bd = 0xe18bd, + BNXT_ULP_CLASS_HID_e0525 = 0xe0525, + BNXT_ULP_CLASS_HID_21957 = 0x21957, + BNXT_ULP_CLASS_HID_205cf = 0x205cf, + BNXT_ULP_CLASS_HID_20715 = 0x20715, + BNXT_ULP_CLASS_HID_2136f = 0x2136f, + BNXT_ULP_CLASS_HID_61bcb = 0x61bcb, + BNXT_ULP_CLASS_HID_60843 = 0x60843, + BNXT_ULP_CLASS_HID_60989 = 0x60989, + BNXT_ULP_CLASS_HID_615e3 = 0x615e3, + BNXT_ULP_CLASS_HID_30a65 = 0x30a65, + BNXT_ULP_CLASS_HID_3167f = 0x3167f, + BNXT_ULP_CLASS_HID_31785 = 0x31785, + BNXT_ULP_CLASS_HID_3043d = 0x3043d, + BNXT_ULP_CLASS_HID_70c99 = 0x70c99, + BNXT_ULP_CLASS_HID_718f3 = 0x718f3, + BNXT_ULP_CLASS_HID_71a39 = 0x71a39, + BNXT_ULP_CLASS_HID_706b1 = 0x706b1, + BNXT_ULP_CLASS_HID_2822d = 0x2822d, + BNXT_ULP_CLASS_HID_28e07 = 0x28e07, + BNXT_ULP_CLASS_HID_28f4d = 0x28f4d, + BNXT_ULP_CLASS_HID_29ba7 = 0x29ba7, + BNXT_ULP_CLASS_HID_684a1 = 0x684a1, + BNXT_ULP_CLASS_HID_690bb = 0x690bb, + BNXT_ULP_CLASS_HID_691c1 = 0x691c1, + BNXT_ULP_CLASS_HID_69ddb = 0x69ddb, + BNXT_ULP_CLASS_HID_3925d = 0x3925d, + BNXT_ULP_CLASS_HID_39eb7 = 0x39eb7, + BNXT_ULP_CLASS_HID_38013 = 0x38013, + BNXT_ULP_CLASS_HID_38c75 = 0x38c75, + BNXT_ULP_CLASS_HID_794d1 = 0x794d1, + BNXT_ULP_CLASS_HID_78149 = 0x78149, + BNXT_ULP_CLASS_HID_78297 = 0x78297, + BNXT_ULP_CLASS_HID_78ee9 = 0x78ee9, + BNXT_ULP_CLASS_HID_0816 = 0x0816, + BNXT_ULP_CLASS_HID_1852 = 0x1852, + BNXT_ULP_CLASS_HID_09f4 = 0x09f4, + BNXT_ULP_CLASS_HID_1dd4 = 0x1dd4, + BNXT_ULP_CLASS_HID_804f1 = 0x804f1, + BNXT_ULP_CLASS_HID_81251 = 0x81251, + BNXT_ULP_CLASS_HID_80ee1 = 0x80ee1, + BNXT_ULP_CLASS_HID_81c41 = 0x81c41, + BNXT_ULP_CLASS_HID_2013b = 0x2013b, + BNXT_ULP_CLASS_HID_20e9b = 0x20e9b, + BNXT_ULP_CLASS_HID_603bf = 0x603bf, + BNXT_ULP_CLASS_HID_6111f = 0x6111f, + BNXT_ULP_CLASS_HID_0806 = 0x0806, + BNXT_ULP_CLASS_HID_1842 = 0x1842, + BNXT_ULP_CLASS_HID_1be6 = 0x1be6, + BNXT_ULP_CLASS_HID_0c80 = 0x0c80, + BNXT_ULP_CLASS_HID_1216 = 0x1216, + BNXT_ULP_CLASS_HID_02b0 = 0x02b0, + BNXT_ULP_CLASS_HID_0654 = 0x0654, + BNXT_ULP_CLASS_HID_1690 = 0x1690, + BNXT_ULP_CLASS_HID_09e4 = 0x09e4, + BNXT_ULP_CLASS_HID_1dc4 = 0x1dc4, + BNXT_ULP_CLASS_HID_80efc = 0x80efc, + BNXT_ULP_CLASS_HID_80332 = 0x80332, + BNXT_ULP_CLASS_HID_40c78 = 0x40c78, + BNXT_ULP_CLASS_HID_400be = 0x400be, + BNXT_ULP_CLASS_HID_c1170 = 0xc1170, + BNXT_ULP_CLASS_HID_c05b6 = 0xc05b6, + BNXT_ULP_CLASS_HID_0836 = 0x0836, + BNXT_ULP_CLASS_HID_1872 = 0x1872, + BNXT_ULP_CLASS_HID_1bd6 = 0x1bd6, + BNXT_ULP_CLASS_HID_0cb0 = 0x0cb0, + BNXT_ULP_CLASS_HID_1226 = 0x1226, + BNXT_ULP_CLASS_HID_0280 = 0x0280, + BNXT_ULP_CLASS_HID_0664 = 0x0664, + BNXT_ULP_CLASS_HID_16a0 = 0x16a0, + BNXT_ULP_CLASS_HID_09d4 = 0x09d4, + BNXT_ULP_CLASS_HID_1df4 = 0x1df4, + BNXT_ULP_CLASS_HID_80ecc = 0x80ecc, + BNXT_ULP_CLASS_HID_80302 = 0x80302, + BNXT_ULP_CLASS_HID_40c48 = 0x40c48, + BNXT_ULP_CLASS_HID_4008e = 0x4008e, + BNXT_ULP_CLASS_HID_c1140 = 0xc1140, + BNXT_ULP_CLASS_HID_c0586 = 0xc0586, + BNXT_ULP_CLASS_HID_804e1 = 0x804e1, + BNXT_ULP_CLASS_HID_81241 = 0x81241, + BNXT_ULP_CLASS_HID_80ef1 = 0x80ef1, + BNXT_ULP_CLASS_HID_81c51 = 0x81c51, + BNXT_ULP_CLASS_HID_c076d = 0xc076d, + BNXT_ULP_CLASS_HID_c14cd = 0xc14cd, + BNXT_ULP_CLASS_HID_c117d = 0xc117d, + BNXT_ULP_CLASS_HID_c1edd = 0xc1edd, + BNXT_ULP_CLASS_HID_a062f = 0xa062f, + BNXT_ULP_CLASS_HID_a138f = 0xa138f, + BNXT_ULP_CLASS_HID_a103f = 0xa103f, + BNXT_ULP_CLASS_HID_a1d9f = 0xa1d9f, + BNXT_ULP_CLASS_HID_e08ab = 0xe08ab, + BNXT_ULP_CLASS_HID_e160b = 0xe160b, + BNXT_ULP_CLASS_HID_e12bb = 0xe12bb, + BNXT_ULP_CLASS_HID_e0079 = 0xe0079, + BNXT_ULP_CLASS_HID_2012b = 0x2012b, + BNXT_ULP_CLASS_HID_20e8b = 0x20e8b, + BNXT_ULP_CLASS_HID_603af = 0x603af, + BNXT_ULP_CLASS_HID_6110f = 0x6110f, + BNXT_ULP_CLASS_HID_311bb = 0x311bb, + BNXT_ULP_CLASS_HID_31f1b = 0x31f1b, + BNXT_ULP_CLASS_HID_7143f = 0x7143f, + BNXT_ULP_CLASS_HID_701fd = 0x701fd, + BNXT_ULP_CLASS_HID_28963 = 0x28963, + BNXT_ULP_CLASS_HID_296c3 = 0x296c3, + BNXT_ULP_CLASS_HID_68be7 = 0x68be7, + BNXT_ULP_CLASS_HID_69947 = 0x69947, + BNXT_ULP_CLASS_HID_399f3 = 0x399f3, + BNXT_ULP_CLASS_HID_387b1 = 0x387b1, + BNXT_ULP_CLASS_HID_79c77 = 0x79c77, + BNXT_ULP_CLASS_HID_78a35 = 0x78a35, + BNXT_ULP_CLASS_HID_804d1 = 0x804d1, + BNXT_ULP_CLASS_HID_81271 = 0x81271, + BNXT_ULP_CLASS_HID_80ec1 = 0x80ec1, + BNXT_ULP_CLASS_HID_81c61 = 0x81c61, + BNXT_ULP_CLASS_HID_c075d = 0xc075d, + BNXT_ULP_CLASS_HID_c14fd = 0xc14fd, + BNXT_ULP_CLASS_HID_c114d = 0xc114d, + BNXT_ULP_CLASS_HID_c1eed = 0xc1eed, + BNXT_ULP_CLASS_HID_a061f = 0xa061f, + BNXT_ULP_CLASS_HID_a13bf = 0xa13bf, + BNXT_ULP_CLASS_HID_a100f = 0xa100f, + BNXT_ULP_CLASS_HID_a1daf = 0xa1daf, + BNXT_ULP_CLASS_HID_e089b = 0xe089b, + BNXT_ULP_CLASS_HID_e163b = 0xe163b, + BNXT_ULP_CLASS_HID_e128b = 0xe128b, + BNXT_ULP_CLASS_HID_e0049 = 0xe0049, + BNXT_ULP_CLASS_HID_2011b = 0x2011b, + BNXT_ULP_CLASS_HID_20ebb = 0x20ebb, + BNXT_ULP_CLASS_HID_6039f = 0x6039f, + BNXT_ULP_CLASS_HID_6113f = 0x6113f, + BNXT_ULP_CLASS_HID_3118b = 0x3118b, + BNXT_ULP_CLASS_HID_31f2b = 0x31f2b, + BNXT_ULP_CLASS_HID_7140f = 0x7140f, + BNXT_ULP_CLASS_HID_701cd = 0x701cd, + BNXT_ULP_CLASS_HID_28953 = 0x28953, + BNXT_ULP_CLASS_HID_296f3 = 0x296f3, + BNXT_ULP_CLASS_HID_68bd7 = 0x68bd7, + BNXT_ULP_CLASS_HID_69977 = 0x69977, + BNXT_ULP_CLASS_HID_399c3 = 0x399c3, + BNXT_ULP_CLASS_HID_38781 = 0x38781, + BNXT_ULP_CLASS_HID_79c47 = 0x79c47, + BNXT_ULP_CLASS_HID_78a05 = 0x78a05, + BNXT_ULP_CLASS_HID_04a4 = 0x04a4, + BNXT_ULP_CLASS_HID_04a8 = 0x04a8, + BNXT_ULP_CLASS_HID_04a5 = 0x04a5, + BNXT_ULP_CLASS_HID_1205 = 0x1205, + BNXT_ULP_CLASS_HID_04a9 = 0x04a9, + BNXT_ULP_CLASS_HID_1209 = 0x1209, + BNXT_ULP_CLASS_HID_04b4 = 0x04b4, + BNXT_ULP_CLASS_HID_04b8 = 0x04b8, + BNXT_ULP_CLASS_HID_0484 = 0x0484, + BNXT_ULP_CLASS_HID_0488 = 0x0488, + BNXT_ULP_CLASS_HID_04b5 = 0x04b5, + BNXT_ULP_CLASS_HID_1215 = 0x1215, + BNXT_ULP_CLASS_HID_04b9 = 0x04b9, + BNXT_ULP_CLASS_HID_1219 = 0x1219, + BNXT_ULP_CLASS_HID_0485 = 0x0485, + BNXT_ULP_CLASS_HID_1225 = 0x1225, + BNXT_ULP_CLASS_HID_0489 = 0x0489, + BNXT_ULP_CLASS_HID_1229 = 0x1229, + BNXT_ULP_CLASS_HID_0226 = 0x0226, + BNXT_ULP_CLASS_HID_4045a = 0x4045a, + BNXT_ULP_CLASS_HID_0daa = 0x0daa, + BNXT_ULP_CLASS_HID_11b0 = 0x11b0, + BNXT_ULP_CLASS_HID_403f8 = 0x403f8, + BNXT_ULP_CLASS_HID_4161e = 0x4161e, + BNXT_ULP_CLASS_HID_40439 = 0x40439, + BNXT_ULP_CLASS_HID_41405 = 0x41405, + BNXT_ULP_CLASS_HID_51449 = 0x51449, + BNXT_ULP_CLASS_HID_50b33 = 0x50b33, + BNXT_ULP_CLASS_HID_48c01 = 0x48c01, + BNXT_ULP_CLASS_HID_483eb = 0x483eb, + BNXT_ULP_CLASS_HID_5833f = 0x5833f, + BNXT_ULP_CLASS_HID_5937b = 0x5937b, + BNXT_ULP_CLASS_HID_41875 = 0x41875, + BNXT_ULP_CLASS_HID_40f5f = 0x40f5f, + BNXT_ULP_CLASS_HID_50f23 = 0x50f23, + BNXT_ULP_CLASS_HID_51f6f = 0x51f6f, + BNXT_ULP_CLASS_HID_4875b = 0x4875b, + BNXT_ULP_CLASS_HID_49727 = 0x49727, + BNXT_ULP_CLASS_HID_5976b = 0x5976b, + BNXT_ULP_CLASS_HID_58655 = 0x58655, + BNXT_ULP_CLASS_HID_4125f = 0x4125f, + BNXT_ULP_CLASS_HID_401f9 = 0x401f9, + BNXT_ULP_CLASS_HID_501cd = 0x501cd, + BNXT_ULP_CLASS_HID_51149 = 0x51149, + BNXT_ULP_CLASS_HID_49a67 = 0x49a67, + BNXT_ULP_CLASS_HID_489c1 = 0x489c1, + BNXT_ULP_CLASS_HID_58955 = 0x58955, + BNXT_ULP_CLASS_HID_59951 = 0x59951, + BNXT_ULP_CLASS_HID_40569 = 0x40569, + BNXT_ULP_CLASS_HID_41575 = 0x41575, + BNXT_ULP_CLASS_HID_51579 = 0x51579, + BNXT_ULP_CLASS_HID_50463 = 0x50463, + BNXT_ULP_CLASS_HID_48d71 = 0x48d71, + BNXT_ULP_CLASS_HID_49d7d = 0x49d7d, + BNXT_ULP_CLASS_HID_59d41 = 0x59d41, + BNXT_ULP_CLASS_HID_58c6b = 0x58c6b, + BNXT_ULP_CLASS_HID_10255 = 0x10255, + BNXT_ULP_CLASS_HID_11675 = 0x11675, + BNXT_ULP_CLASS_HID_14649 = 0x14649, + BNXT_ULP_CLASS_HID_15a69 = 0x15a69, + BNXT_ULP_CLASS_HID_1205b = 0x1205b, + BNXT_ULP_CLASS_HID_1347b = 0x1347b, + BNXT_ULP_CLASS_HID_16bbf = 0x16bbf, + BNXT_ULP_CLASS_HID_1785f = 0x1785f, + BNXT_ULP_CLASS_HID_11551 = 0x11551, + BNXT_ULP_CLASS_HID_10897 = 0x10897, + BNXT_ULP_CLASS_HID_15955 = 0x15955, + BNXT_ULP_CLASS_HID_14c8b = 0x14c8b, + BNXT_ULP_CLASS_HID_13b47 = 0x13b47, + BNXT_ULP_CLASS_HID_12e85 = 0x12e85, + BNXT_ULP_CLASS_HID_17f5b = 0x17f5b, + BNXT_ULP_CLASS_HID_17299 = 0x17299, + BNXT_ULP_CLASS_HID_10fe7 = 0x10fe7, + BNXT_ULP_CLASS_HID_10325 = 0x10325, + BNXT_ULP_CLASS_HID_153cb = 0x153cb, + BNXT_ULP_CLASS_HID_14709 = 0x14709, + BNXT_ULP_CLASS_HID_12dc5 = 0x12dc5, + BNXT_ULP_CLASS_HID_1212b = 0x1212b, + BNXT_ULP_CLASS_HID_171c9 = 0x171c9, + BNXT_ULP_CLASS_HID_1650f = 0x1650f, + BNXT_ULP_CLASS_HID_10201 = 0x10201, + BNXT_ULP_CLASS_HID_116c1 = 0x116c1, + BNXT_ULP_CLASS_HID_14605 = 0x14605, + BNXT_ULP_CLASS_HID_15a05 = 0x15a05, + BNXT_ULP_CLASS_HID_12007 = 0x12007, + BNXT_ULP_CLASS_HID_13407 = 0x13407, + BNXT_ULP_CLASS_HID_1640b = 0x1640b, + BNXT_ULP_CLASS_HID_1780b = 0x1780b, + BNXT_ULP_CLASS_HID_404b0 = 0x404b0, + BNXT_ULP_CLASS_HID_4148c = 0x4148c, + BNXT_ULP_CLASS_HID_514c0 = 0x514c0, + BNXT_ULP_CLASS_HID_50bba = 0x50bba, + BNXT_ULP_CLASS_HID_48c88 = 0x48c88, + BNXT_ULP_CLASS_HID_48362 = 0x48362, + BNXT_ULP_CLASS_HID_583b6 = 0x583b6, + BNXT_ULP_CLASS_HID_593f2 = 0x593f2, + BNXT_ULP_CLASS_HID_41f54 = 0x41f54, + BNXT_ULP_CLASS_HID_40fce = 0x40fce, + BNXT_ULP_CLASS_HID_50e02 = 0x50e02, + BNXT_ULP_CLASS_HID_51e5e = 0x51e5e, + BNXT_ULP_CLASS_HID_487ca = 0x487ca, + BNXT_ULP_CLASS_HID_49606 = 0x49606, + BNXT_ULP_CLASS_HID_5965a = 0x5965a, + BNXT_ULP_CLASS_HID_58514 = 0x58514, + BNXT_ULP_CLASS_HID_412c2 = 0x412c2, + BNXT_ULP_CLASS_HID_401ac = 0x401ac, + BNXT_ULP_CLASS_HID_501e0 = 0x501e0, + BNXT_ULP_CLASS_HID_511cc = 0x511cc, + BNXT_ULP_CLASS_HID_4990a = 0x4990a, + BNXT_ULP_CLASS_HID_489e4 = 0x489e4, + BNXT_ULP_CLASS_HID_589c8 = 0x589c8, + BNXT_ULP_CLASS_HID_59804 = 0x59804, + BNXT_ULP_CLASS_HID_40404 = 0x40404, + BNXT_ULP_CLASS_HID_41440 = 0x41440, + BNXT_ULP_CLASS_HID_51484 = 0x51484, + BNXT_ULP_CLASS_HID_50b0e = 0x50b0e, + BNXT_ULP_CLASS_HID_48c4c = 0x48c4c, + BNXT_ULP_CLASS_HID_48306 = 0x48306, + BNXT_ULP_CLASS_HID_5830a = 0x5830a, + BNXT_ULP_CLASS_HID_59346 = 0x59346, + BNXT_ULP_CLASS_HID_102cc = 0x102cc, + BNXT_ULP_CLASS_HID_116ec = 0x116ec, + BNXT_ULP_CLASS_HID_146d0 = 0x146d0, + BNXT_ULP_CLASS_HID_15af0 = 0x15af0, + BNXT_ULP_CLASS_HID_120c2 = 0x120c2, + BNXT_ULP_CLASS_HID_134e2 = 0x134e2, + BNXT_ULP_CLASS_HID_16b26 = 0x16b26, + BNXT_ULP_CLASS_HID_178c6 = 0x178c6, + BNXT_ULP_CLASS_HID_115c6 = 0x115c6, + BNXT_ULP_CLASS_HID_10804 = 0x10804, + BNXT_ULP_CLASS_HID_15822 = 0x15822, + BNXT_ULP_CLASS_HID_14c60 = 0x14c60, + BNXT_ULP_CLASS_HID_13bd4 = 0x13bd4, + BNXT_ULP_CLASS_HID_12e12 = 0x12e12, + BNXT_ULP_CLASS_HID_17e30 = 0x17e30, + BNXT_ULP_CLASS_HID_17276 = 0x17276, + BNXT_ULP_CLASS_HID_11f1a = 0x11f1a, + BNXT_ULP_CLASS_HID_11358 = 0x11358, + BNXT_ULP_CLASS_HID_14398 = 0x14398, + BNXT_ULP_CLASS_HID_157b8 = 0x157b8, + BNXT_ULP_CLASS_HID_13d68 = 0x13d68, + BNXT_ULP_CLASS_HID_131aa = 0x131aa, + BNXT_ULP_CLASS_HID_16192 = 0x16192, + BNXT_ULP_CLASS_HID_175b2 = 0x175b2, + BNXT_ULP_CLASS_HID_112b2 = 0x112b2, + BNXT_ULP_CLASS_HID_106f0 = 0x106f0, + BNXT_ULP_CLASS_HID_15692 = 0x15692, + BNXT_ULP_CLASS_HID_14ad0 = 0x14ad0, + BNXT_ULP_CLASS_HID_13080 = 0x13080, + BNXT_ULP_CLASS_HID_124c2 = 0x124c2, + BNXT_ULP_CLASS_HID_174e0 = 0x174e0, + BNXT_ULP_CLASS_HID_16f22 = 0x16f22, + BNXT_ULP_CLASS_HID_4025b = 0x4025b, + BNXT_ULP_CLASS_HID_41267 = 0x41267, + BNXT_ULP_CLASS_HID_5122b = 0x5122b, + BNXT_ULP_CLASS_HID_50d51 = 0x50d51, + BNXT_ULP_CLASS_HID_48a63 = 0x48a63, + BNXT_ULP_CLASS_HID_48589 = 0x48589, + BNXT_ULP_CLASS_HID_5855d = 0x5855d, + BNXT_ULP_CLASS_HID_59519 = 0x59519, + BNXT_ULP_CLASS_HID_41e17 = 0x41e17, + BNXT_ULP_CLASS_HID_4093d = 0x4093d, + BNXT_ULP_CLASS_HID_50941 = 0x50941, + BNXT_ULP_CLASS_HID_5190d = 0x5190d, + BNXT_ULP_CLASS_HID_48139 = 0x48139, + BNXT_ULP_CLASS_HID_49145 = 0x49145, + BNXT_ULP_CLASS_HID_59109 = 0x59109, + BNXT_ULP_CLASS_HID_58037 = 0x58037, + BNXT_ULP_CLASS_HID_4143d = 0x4143d, + BNXT_ULP_CLASS_HID_4079b = 0x4079b, + BNXT_ULP_CLASS_HID_507af = 0x507af, + BNXT_ULP_CLASS_HID_5172b = 0x5172b, + BNXT_ULP_CLASS_HID_49c05 = 0x49c05, + BNXT_ULP_CLASS_HID_48fa3 = 0x48fa3, + BNXT_ULP_CLASS_HID_58f37 = 0x58f37, + BNXT_ULP_CLASS_HID_59f33 = 0x59f33, + BNXT_ULP_CLASS_HID_4030b = 0x4030b, + BNXT_ULP_CLASS_HID_41317 = 0x41317, + BNXT_ULP_CLASS_HID_5131b = 0x5131b, + BNXT_ULP_CLASS_HID_50201 = 0x50201, + BNXT_ULP_CLASS_HID_48b13 = 0x48b13, + BNXT_ULP_CLASS_HID_49b1f = 0x49b1f, + BNXT_ULP_CLASS_HID_59b23 = 0x59b23, + BNXT_ULP_CLASS_HID_58a09 = 0x58a09, + BNXT_ULP_CLASS_HID_419bf = 0x419bf, + BNXT_ULP_CLASS_HID_40925 = 0x40925, + BNXT_ULP_CLASS_HID_508e9 = 0x508e9, + BNXT_ULP_CLASS_HID_518b5 = 0x518b5, + BNXT_ULP_CLASS_HID_48121 = 0x48121, + BNXT_ULP_CLASS_HID_490ed = 0x490ed, + BNXT_ULP_CLASS_HID_590b1 = 0x590b1, + BNXT_ULP_CLASS_HID_583ff = 0x583ff, + BNXT_ULP_CLASS_HID_41475 = 0x41475, + BNXT_ULP_CLASS_HID_40473 = 0x40473, + BNXT_ULP_CLASS_HID_50427 = 0x50427, + BNXT_ULP_CLASS_HID_51763 = 0x51763, + BNXT_ULP_CLASS_HID_49c3d = 0x49c3d, + BNXT_ULP_CLASS_HID_48c3b = 0x48c3b, + BNXT_ULP_CLASS_HID_58f6f = 0x58f6f, + BNXT_ULP_CLASS_HID_59f2b = 0x59f2b, + BNXT_ULP_CLASS_HID_40333 = 0x40333, + BNXT_ULP_CLASS_HID_412bf = 0x412bf, + BNXT_ULP_CLASS_HID_512a3 = 0x512a3, + BNXT_ULP_CLASS_HID_50229 = 0x50229, + BNXT_ULP_CLASS_HID_48abb = 0x48abb, + BNXT_ULP_CLASS_HID_49aa7 = 0x49aa7, + BNXT_ULP_CLASS_HID_59a2b = 0x59a2b, + BNXT_ULP_CLASS_HID_595b1 = 0x595b1, + BNXT_ULP_CLASS_HID_41e2f = 0x41e2f, + BNXT_ULP_CLASS_HID_40e35 = 0x40e35, + BNXT_ULP_CLASS_HID_50939 = 0x50939, + BNXT_ULP_CLASS_HID_51925 = 0x51925, + BNXT_ULP_CLASS_HID_48631 = 0x48631, + BNXT_ULP_CLASS_HID_4913d = 0x4913d, + BNXT_ULP_CLASS_HID_59121 = 0x59121, + BNXT_ULP_CLASS_HID_5812f = 0x5812f, + BNXT_ULP_CLASS_HID_41429 = 0x41429, + BNXT_ULP_CLASS_HID_40747 = 0x40747, + BNXT_ULP_CLASS_HID_5070b = 0x5070b, + BNXT_ULP_CLASS_HID_51727 = 0x51727, + BNXT_ULP_CLASS_HID_49fe1 = 0x49fe1, + BNXT_ULP_CLASS_HID_48f0f = 0x48f0f, + BNXT_ULP_CLASS_HID_58f23 = 0x58f23, + BNXT_ULP_CLASS_HID_59eef = 0x59eef, + BNXT_ULP_CLASS_HID_40347 = 0x40347, + BNXT_ULP_CLASS_HID_41303 = 0x41303, + BNXT_ULP_CLASS_HID_51247 = 0x51247, + BNXT_ULP_CLASS_HID_5026d = 0x5026d, + BNXT_ULP_CLASS_HID_48b0f = 0x48b0f, + BNXT_ULP_CLASS_HID_49a4b = 0x49a4b, + BNXT_ULP_CLASS_HID_59a0f = 0x59a0f, + BNXT_ULP_CLASS_HID_58a05 = 0x58a05, + BNXT_ULP_CLASS_HID_41983 = 0x41983, + BNXT_ULP_CLASS_HID_40929 = 0x40929, + BNXT_ULP_CLASS_HID_5092d = 0x5092d, + BNXT_ULP_CLASS_HID_518a9 = 0x518a9, + BNXT_ULP_CLASS_HID_48125 = 0x48125, + BNXT_ULP_CLASS_HID_49121 = 0x49121, + BNXT_ULP_CLASS_HID_59085 = 0x59085, + BNXT_ULP_CLASS_HID_58023 = 0x58023, + BNXT_ULP_CLASS_HID_41509 = 0x41509, + BNXT_ULP_CLASS_HID_40407 = 0x40407, + BNXT_ULP_CLASS_HID_5040b = 0x5040b, + BNXT_ULP_CLASS_HID_51407 = 0x51407, + BNXT_ULP_CLASS_HID_49d21 = 0x49d21, + BNXT_ULP_CLASS_HID_48c0f = 0x48c0f, + BNXT_ULP_CLASS_HID_58c03 = 0x58c03, + BNXT_ULP_CLASS_HID_59f0f = 0x59f0f, + BNXT_ULP_CLASS_HID_402ef = 0x402ef, + BNXT_ULP_CLASS_HID_412ab = 0x412ab, + BNXT_ULP_CLASS_HID_5126f = 0x5126f, + BNXT_ULP_CLASS_HID_50de5 = 0x50de5, + BNXT_ULP_CLASS_HID_48aa7 = 0x48aa7, + BNXT_ULP_CLASS_HID_485ed = 0x485ed, + BNXT_ULP_CLASS_HID_585e1 = 0x585e1, + BNXT_ULP_CLASS_HID_595ad = 0x595ad, + BNXT_ULP_CLASS_HID_41e6b = 0x41e6b, + BNXT_ULP_CLASS_HID_40961 = 0x40961, + BNXT_ULP_CLASS_HID_50925 = 0x50925, + BNXT_ULP_CLASS_HID_51961 = 0x51961, + BNXT_ULP_CLASS_HID_4816d = 0x4816d, + BNXT_ULP_CLASS_HID_49129 = 0x49129, + BNXT_ULP_CLASS_HID_5916d = 0x5916d, + BNXT_ULP_CLASS_HID_5806b = 0x5806b, + BNXT_ULP_CLASS_HID_414a1 = 0x414a1, + BNXT_ULP_CLASS_HID_4042f = 0x4042f, + BNXT_ULP_CLASS_HID_507a3 = 0x507a3, + BNXT_ULP_CLASS_HID_517af = 0x517af, + BNXT_ULP_CLASS_HID_49c29 = 0x49c29, + BNXT_ULP_CLASS_HID_48fa7 = 0x48fa7, + BNXT_ULP_CLASS_HID_58fab = 0x58fab, + BNXT_ULP_CLASS_HID_59f27 = 0x59f27, + BNXT_ULP_CLASS_HID_4032f = 0x4032f, + BNXT_ULP_CLASS_HID_4132b = 0x4132b, + BNXT_ULP_CLASS_HID_5132f = 0x5132f, + BNXT_ULP_CLASS_HID_50225 = 0x50225, + BNXT_ULP_CLASS_HID_48b27 = 0x48b27, + BNXT_ULP_CLASS_HID_49b23 = 0x49b23, + BNXT_ULP_CLASS_HID_59b27 = 0x59b27, + BNXT_ULP_CLASS_HID_58a2d = 0x58a2d, + BNXT_ULP_CLASS_HID_10437 = 0x10437, + BNXT_ULP_CLASS_HID_11017 = 0x11017, + BNXT_ULP_CLASS_HID_1402b = 0x1402b, + BNXT_ULP_CLASS_HID_15c0b = 0x15c0b, + BNXT_ULP_CLASS_HID_12639 = 0x12639, + BNXT_ULP_CLASS_HID_13219 = 0x13219, + BNXT_ULP_CLASS_HID_16ddd = 0x16ddd, + BNXT_ULP_CLASS_HID_17e3d = 0x17e3d, + BNXT_ULP_CLASS_HID_11333 = 0x11333, + BNXT_ULP_CLASS_HID_10ef5 = 0x10ef5, + BNXT_ULP_CLASS_HID_15f37 = 0x15f37, + BNXT_ULP_CLASS_HID_14ae9 = 0x14ae9, + BNXT_ULP_CLASS_HID_13d25 = 0x13d25, + BNXT_ULP_CLASS_HID_128e7 = 0x128e7, + BNXT_ULP_CLASS_HID_17939 = 0x17939, + BNXT_ULP_CLASS_HID_174fb = 0x174fb, + BNXT_ULP_CLASS_HID_10985 = 0x10985, + BNXT_ULP_CLASS_HID_10547 = 0x10547, + BNXT_ULP_CLASS_HID_155a9 = 0x155a9, + BNXT_ULP_CLASS_HID_1416b = 0x1416b, + BNXT_ULP_CLASS_HID_12ba7 = 0x12ba7, + BNXT_ULP_CLASS_HID_12749 = 0x12749, + BNXT_ULP_CLASS_HID_177ab = 0x177ab, + BNXT_ULP_CLASS_HID_1636d = 0x1636d, + BNXT_ULP_CLASS_HID_10463 = 0x10463, + BNXT_ULP_CLASS_HID_110a3 = 0x110a3, + BNXT_ULP_CLASS_HID_14067 = 0x14067, + BNXT_ULP_CLASS_HID_15c67 = 0x15c67, + BNXT_ULP_CLASS_HID_12665 = 0x12665, + BNXT_ULP_CLASS_HID_13265 = 0x13265, + BNXT_ULP_CLASS_HID_16269 = 0x16269, + BNXT_ULP_CLASS_HID_17e69 = 0x17e69, + BNXT_ULP_CLASS_HID_1133d = 0x1133d, + BNXT_ULP_CLASS_HID_10eff = 0x10eff, + BNXT_ULP_CLASS_HID_15ed9 = 0x15ed9, + BNXT_ULP_CLASS_HID_14a9b = 0x14a9b, + BNXT_ULP_CLASS_HID_13d2f = 0x13d2f, + BNXT_ULP_CLASS_HID_128e9 = 0x128e9, + BNXT_ULP_CLASS_HID_178cb = 0x178cb, + BNXT_ULP_CLASS_HID_1748d = 0x1748d, + BNXT_ULP_CLASS_HID_109fb = 0x109fb, + BNXT_ULP_CLASS_HID_105bd = 0x105bd, + BNXT_ULP_CLASS_HID_155bf = 0x155bf, + BNXT_ULP_CLASS_HID_14179 = 0x14179, + BNXT_ULP_CLASS_HID_12bed = 0x12bed, + BNXT_ULP_CLASS_HID_127af = 0x127af, + BNXT_ULP_CLASS_HID_177a9 = 0x177a9, + BNXT_ULP_CLASS_HID_1636b = 0x1636b, + BNXT_ULP_CLASS_HID_1046d = 0x1046d, + BNXT_ULP_CLASS_HID_1104d = 0x1104d, + BNXT_ULP_CLASS_HID_14009 = 0x14009, + BNXT_ULP_CLASS_HID_15c69 = 0x15c69, + BNXT_ULP_CLASS_HID_1260f = 0x1260f, + BNXT_ULP_CLASS_HID_1326f = 0x1326f, + BNXT_ULP_CLASS_HID_1622b = 0x1622b, + BNXT_ULP_CLASS_HID_17e0b = 0x17e0b, + BNXT_ULP_CLASS_HID_11369 = 0x11369, + BNXT_ULP_CLASS_HID_10f2b = 0x10f2b, + BNXT_ULP_CLASS_HID_15f6d = 0x15f6d, + BNXT_ULP_CLASS_HID_14b2f = 0x14b2f, + BNXT_ULP_CLASS_HID_13d6b = 0x13d6b, + BNXT_ULP_CLASS_HID_1292d = 0x1292d, + BNXT_ULP_CLASS_HID_1792f = 0x1792f, + BNXT_ULP_CLASS_HID_174e9 = 0x174e9, + BNXT_ULP_CLASS_HID_119e1 = 0x119e1, + BNXT_ULP_CLASS_HID_115a3 = 0x115a3, + BNXT_ULP_CLASS_HID_14563 = 0x14563, + BNXT_ULP_CLASS_HID_15143 = 0x15143, + BNXT_ULP_CLASS_HID_13b93 = 0x13b93, + BNXT_ULP_CLASS_HID_13751 = 0x13751, + BNXT_ULP_CLASS_HID_16769 = 0x16769, + BNXT_ULP_CLASS_HID_17349 = 0x17349, + BNXT_ULP_CLASS_HID_114ab = 0x114ab, + BNXT_ULP_CLASS_HID_10061 = 0x10061, + BNXT_ULP_CLASS_HID_15063 = 0x15063, + BNXT_ULP_CLASS_HID_14c21 = 0x14c21, + BNXT_ULP_CLASS_HID_13671 = 0x13671, + BNXT_ULP_CLASS_HID_12233 = 0x12233, + BNXT_ULP_CLASS_HID_17271 = 0x17271, + BNXT_ULP_CLASS_HID_16e33 = 0x16e33, + BNXT_ULP_CLASS_HID_102c1 = 0x102c1, + BNXT_ULP_CLASS_HID_11f21 = 0x11f21, + BNXT_ULP_CLASS_HID_14ee1 = 0x14ee1, + BNXT_ULP_CLASS_HID_15ac1 = 0x15ac1, + BNXT_ULP_CLASS_HID_12cc3 = 0x12cc3, + BNXT_ULP_CLASS_HID_13923 = 0x13923, + BNXT_ULP_CLASS_HID_168e3 = 0x168e3, + BNXT_ULP_CLASS_HID_164a9 = 0x164a9, + BNXT_ULP_CLASS_HID_11e29 = 0x11e29, + BNXT_ULP_CLASS_HID_115eb = 0x115eb, + BNXT_ULP_CLASS_HID_145a3 = 0x145a3, + BNXT_ULP_CLASS_HID_151a3 = 0x151a3, + BNXT_ULP_CLASS_HID_1382b = 0x1382b, + BNXT_ULP_CLASS_HID_137e1 = 0x137e1, + BNXT_ULP_CLASS_HID_167a1 = 0x167a1, + BNXT_ULP_CLASS_HID_173a1 = 0x173a1, + BNXT_ULP_CLASS_HID_11449 = 0x11449, + BNXT_ULP_CLASS_HID_1000b = 0x1000b, + BNXT_ULP_CLASS_HID_15069 = 0x15069, + BNXT_ULP_CLASS_HID_14c2b = 0x14c2b, + BNXT_ULP_CLASS_HID_1367b = 0x1367b, + BNXT_ULP_CLASS_HID_12239 = 0x12239, + BNXT_ULP_CLASS_HID_1721b = 0x1721b, + BNXT_ULP_CLASS_HID_169d9 = 0x169d9, + BNXT_ULP_CLASS_HID_1033b = 0x1033b, + BNXT_ULP_CLASS_HID_11f3b = 0x11f3b, + BNXT_ULP_CLASS_HID_14f2b = 0x14f2b, + BNXT_ULP_CLASS_HID_15b2b = 0x15b2b, + BNXT_ULP_CLASS_HID_12d39 = 0x12d39, + BNXT_ULP_CLASS_HID_13939 = 0x13939, + BNXT_ULP_CLASS_HID_168f9 = 0x168f9, + BNXT_ULP_CLASS_HID_164bb = 0x164bb, + BNXT_ULP_CLASS_HID_119cb = 0x119cb, + BNXT_ULP_CLASS_HID_11589 = 0x11589, + BNXT_ULP_CLASS_HID_14549 = 0x14549, + BNXT_ULP_CLASS_HID_151a9 = 0x151a9, + BNXT_ULP_CLASS_HID_13bc9 = 0x13bc9, + BNXT_ULP_CLASS_HID_1378b = 0x1378b, + BNXT_ULP_CLASS_HID_1674b = 0x1674b, + BNXT_ULP_CLASS_HID_173ab = 0x173ab, + BNXT_ULP_CLASS_HID_114a9 = 0x114a9, + BNXT_ULP_CLASS_HID_1006b = 0x1006b, + BNXT_ULP_CLASS_HID_150a9 = 0x150a9, + BNXT_ULP_CLASS_HID_14c6b = 0x14c6b, + BNXT_ULP_CLASS_HID_136ab = 0x136ab, + BNXT_ULP_CLASS_HID_12269 = 0x12269, + BNXT_ULP_CLASS_HID_172ab = 0x172ab, + BNXT_ULP_CLASS_HID_16e69 = 0x16e69, + BNXT_ULP_CLASS_HID_402d2 = 0x402d2, + BNXT_ULP_CLASS_HID_412ee = 0x412ee, + BNXT_ULP_CLASS_HID_512a2 = 0x512a2, + BNXT_ULP_CLASS_HID_50dd8 = 0x50dd8, + BNXT_ULP_CLASS_HID_48aea = 0x48aea, + BNXT_ULP_CLASS_HID_48500 = 0x48500, + BNXT_ULP_CLASS_HID_585d4 = 0x585d4, + BNXT_ULP_CLASS_HID_59590 = 0x59590, + BNXT_ULP_CLASS_HID_41936 = 0x41936, + BNXT_ULP_CLASS_HID_409ac = 0x409ac, + BNXT_ULP_CLASS_HID_50860 = 0x50860, + BNXT_ULP_CLASS_HID_5183c = 0x5183c, + BNXT_ULP_CLASS_HID_481a8 = 0x481a8, + BNXT_ULP_CLASS_HID_49064 = 0x49064, + BNXT_ULP_CLASS_HID_59038 = 0x59038, + BNXT_ULP_CLASS_HID_58376 = 0x58376, + BNXT_ULP_CLASS_HID_414a0 = 0x414a0, + BNXT_ULP_CLASS_HID_407ce = 0x407ce, + BNXT_ULP_CLASS_HID_50782 = 0x50782, + BNXT_ULP_CLASS_HID_517ae = 0x517ae, + BNXT_ULP_CLASS_HID_49f68 = 0x49f68, + BNXT_ULP_CLASS_HID_48f86 = 0x48f86, + BNXT_ULP_CLASS_HID_58faa = 0x58faa, + BNXT_ULP_CLASS_HID_59e66 = 0x59e66, + BNXT_ULP_CLASS_HID_40266 = 0x40266, + BNXT_ULP_CLASS_HID_41222 = 0x41222, + BNXT_ULP_CLASS_HID_512e6 = 0x512e6, + BNXT_ULP_CLASS_HID_50d6c = 0x50d6c, + BNXT_ULP_CLASS_HID_48a2e = 0x48a2e, + BNXT_ULP_CLASS_HID_48564 = 0x48564, + BNXT_ULP_CLASS_HID_58568 = 0x58568, + BNXT_ULP_CLASS_HID_59524 = 0x59524, + BNXT_ULP_CLASS_HID_419d8 = 0x419d8, + BNXT_ULP_CLASS_HID_4087e = 0x4087e, + BNXT_ULP_CLASS_HID_5080a = 0x5080a, + BNXT_ULP_CLASS_HID_518ce = 0x518ce, + BNXT_ULP_CLASS_HID_4807a = 0x4807a, + BNXT_ULP_CLASS_HID_4900e = 0x4900e, + BNXT_ULP_CLASS_HID_590ca = 0x590ca, + BNXT_ULP_CLASS_HID_58378 = 0x58378, + BNXT_ULP_CLASS_HID_414be = 0x414be, + BNXT_ULP_CLASS_HID_4073c = 0x4073c, + BNXT_ULP_CLASS_HID_507e8 = 0x507e8, + BNXT_ULP_CLASS_HID_517ac = 0x517ac, + BNXT_ULP_CLASS_HID_49f7e = 0x49f7e, + BNXT_ULP_CLASS_HID_48fec = 0x48fec, + BNXT_ULP_CLASS_HID_58fa8 = 0x58fa8, + BNXT_ULP_CLASS_HID_59e7c = 0x59e7c, + BNXT_ULP_CLASS_HID_40208 = 0x40208, + BNXT_ULP_CLASS_HID_412cc = 0x412cc, + BNXT_ULP_CLASS_HID_51288 = 0x51288, + BNXT_ULP_CLASS_HID_50d2e = 0x50d2e, + BNXT_ULP_CLASS_HID_48ac8 = 0x48ac8, + BNXT_ULP_CLASS_HID_4856e = 0x4856e, + BNXT_ULP_CLASS_HID_5852a = 0x5852a, + BNXT_ULP_CLASS_HID_595ce = 0x595ce, + BNXT_ULP_CLASS_HID_4196c = 0x4196c, + BNXT_ULP_CLASS_HID_409aa = 0x409aa, + BNXT_ULP_CLASS_HID_5086e = 0x5086e, + BNXT_ULP_CLASS_HID_5182a = 0x5182a, + BNXT_ULP_CLASS_HID_481ae = 0x481ae, + BNXT_ULP_CLASS_HID_4906a = 0x4906a, + BNXT_ULP_CLASS_HID_5902e = 0x5902e, + BNXT_ULP_CLASS_HID_580ac = 0x580ac, + BNXT_ULP_CLASS_HID_40766 = 0x40766, + BNXT_ULP_CLASS_HID_41726 = 0x41726, + BNXT_ULP_CLASS_HID_517f6 = 0x517f6, + BNXT_ULP_CLASS_HID_5066c = 0x5066c, + BNXT_ULP_CLASS_HID_48f3e = 0x48f3e, + BNXT_ULP_CLASS_HID_49ffe = 0x49ffe, + BNXT_ULP_CLASS_HID_59f8e = 0x59f8e, + BNXT_ULP_CLASS_HID_58e24 = 0x58e24, + BNXT_ULP_CLASS_HID_4126e = 0x4126e, + BNXT_ULP_CLASS_HID_402e4 = 0x402e4, + BNXT_ULP_CLASS_HID_502b4 = 0x502b4, + BNXT_ULP_CLASS_HID_51d74 = 0x51d74, + BNXT_ULP_CLASS_HID_49a26 = 0x49a26, + BNXT_ULP_CLASS_HID_48abc = 0x48abc, + BNXT_ULP_CLASS_HID_5956c = 0x5956c, + BNXT_ULP_CLASS_HID_585ee = 0x585ee, + BNXT_ULP_CLASS_HID_409e4 = 0x409e4, + BNXT_ULP_CLASS_HID_419a4 = 0x419a4, + BNXT_ULP_CLASS_HID_51844 = 0x51844, + BNXT_ULP_CLASS_HID_508e6 = 0x508e6, + BNXT_ULP_CLASS_HID_4918c = 0x4918c, + BNXT_ULP_CLASS_HID_4802e = 0x4802e, + BNXT_ULP_CLASS_HID_580ee = 0x580ee, + BNXT_ULP_CLASS_HID_590ae = 0x590ae, + BNXT_ULP_CLASS_HID_404ae = 0x404ae, + BNXT_ULP_CLASS_HID_41766 = 0x41766, + BNXT_ULP_CLASS_HID_5172e = 0x5172e, + BNXT_ULP_CLASS_HID_507a4 = 0x507a4, + BNXT_ULP_CLASS_HID_48f66 = 0x48f66, + BNXT_ULP_CLASS_HID_49f2e = 0x49f2e, + BNXT_ULP_CLASS_HID_59fe6 = 0x59fe6, + BNXT_ULP_CLASS_HID_58e6c = 0x58e6c, + BNXT_ULP_CLASS_HID_4126c = 0x4126c, + BNXT_ULP_CLASS_HID_4028e = 0x4028e, + BNXT_ULP_CLASS_HID_50d5e = 0x50d5e, + BNXT_ULP_CLASS_HID_51d1e = 0x51d1e, + BNXT_ULP_CLASS_HID_49a2c = 0x49a2c, + BNXT_ULP_CLASS_HID_4954e = 0x4954e, + BNXT_ULP_CLASS_HID_5951e = 0x5951e, + BNXT_ULP_CLASS_HID_5858c = 0x5858c, + BNXT_ULP_CLASS_HID_409fe = 0x409fe, + BNXT_ULP_CLASS_HID_419ee = 0x419ee, + BNXT_ULP_CLASS_HID_519ae = 0x519ae, + BNXT_ULP_CLASS_HID_508fc = 0x508fc, + BNXT_ULP_CLASS_HID_491ee = 0x491ee, + BNXT_ULP_CLASS_HID_4802c = 0x4802c, + BNXT_ULP_CLASS_HID_580fc = 0x580fc, + BNXT_ULP_CLASS_HID_590bc = 0x590bc, + BNXT_ULP_CLASS_HID_4074c = 0x4074c, + BNXT_ULP_CLASS_HID_4170c = 0x4170c, + BNXT_ULP_CLASS_HID_5172c = 0x5172c, + BNXT_ULP_CLASS_HID_5064e = 0x5064e, + BNXT_ULP_CLASS_HID_48f0c = 0x48f0c, + BNXT_ULP_CLASS_HID_49fcc = 0x49fcc, + BNXT_ULP_CLASS_HID_59fec = 0x59fec, + BNXT_ULP_CLASS_HID_58e0e = 0x58e0e, + BNXT_ULP_CLASS_HID_413ac = 0x413ac, + BNXT_ULP_CLASS_HID_402ee = 0x402ee, + BNXT_ULP_CLASS_HID_502ae = 0x502ae, + BNXT_ULP_CLASS_HID_512ae = 0x512ae, + BNXT_ULP_CLASS_HID_49a6c = 0x49a6c, + BNXT_ULP_CLASS_HID_48aae = 0x48aae, + BNXT_ULP_CLASS_HID_58aae = 0x58aae, + BNXT_ULP_CLASS_HID_585ec = 0x585ec, + BNXT_ULP_CLASS_HID_104ae = 0x104ae, + BNXT_ULP_CLASS_HID_1108e = 0x1108e, + BNXT_ULP_CLASS_HID_140b2 = 0x140b2, + BNXT_ULP_CLASS_HID_15c92 = 0x15c92, + BNXT_ULP_CLASS_HID_126a0 = 0x126a0, + BNXT_ULP_CLASS_HID_13280 = 0x13280, + BNXT_ULP_CLASS_HID_16d44 = 0x16d44, + BNXT_ULP_CLASS_HID_17ea4 = 0x17ea4, + BNXT_ULP_CLASS_HID_113a4 = 0x113a4, + BNXT_ULP_CLASS_HID_10e66 = 0x10e66, + BNXT_ULP_CLASS_HID_15e40 = 0x15e40, + BNXT_ULP_CLASS_HID_14a02 = 0x14a02, + BNXT_ULP_CLASS_HID_13db6 = 0x13db6, + BNXT_ULP_CLASS_HID_12870 = 0x12870, + BNXT_ULP_CLASS_HID_17852 = 0x17852, + BNXT_ULP_CLASS_HID_17414 = 0x17414, + BNXT_ULP_CLASS_HID_11978 = 0x11978, + BNXT_ULP_CLASS_HID_1153a = 0x1153a, + BNXT_ULP_CLASS_HID_145fa = 0x145fa, + BNXT_ULP_CLASS_HID_151da = 0x151da, + BNXT_ULP_CLASS_HID_13b0a = 0x13b0a, + BNXT_ULP_CLASS_HID_137c8 = 0x137c8, + BNXT_ULP_CLASS_HID_167f0 = 0x167f0, + BNXT_ULP_CLASS_HID_173d0 = 0x173d0, + BNXT_ULP_CLASS_HID_114d0 = 0x114d0, + BNXT_ULP_CLASS_HID_10092 = 0x10092, + BNXT_ULP_CLASS_HID_150f0 = 0x150f0, + BNXT_ULP_CLASS_HID_14cb2 = 0x14cb2, + BNXT_ULP_CLASS_HID_136e2 = 0x136e2, + BNXT_ULP_CLASS_HID_122a0 = 0x122a0, + BNXT_ULP_CLASS_HID_17282 = 0x17282, + BNXT_ULP_CLASS_HID_16940 = 0x16940, + BNXT_ULP_CLASS_HID_11b90 = 0x11b90, + BNXT_ULP_CLASS_HID_11654 = 0x11654, + BNXT_ULP_CLASS_HID_14618 = 0x14618, + BNXT_ULP_CLASS_HID_15278 = 0x15278, + BNXT_ULP_CLASS_HID_12404 = 0x12404, + BNXT_ULP_CLASS_HID_13064 = 0x13064, + BNXT_ULP_CLASS_HID_16028 = 0x16028, + BNXT_ULP_CLASS_HID_17c08 = 0x17c08, + BNXT_ULP_CLASS_HID_11100 = 0x11100, + BNXT_ULP_CLASS_HID_10dc4 = 0x10dc4, + BNXT_ULP_CLASS_HID_15d24 = 0x15d24, + BNXT_ULP_CLASS_HID_149d0 = 0x149d0, + BNXT_ULP_CLASS_HID_13314 = 0x13314, + BNXT_ULP_CLASS_HID_12fd4 = 0x12fd4, + BNXT_ULP_CLASS_HID_17f20 = 0x17f20, + BNXT_ULP_CLASS_HID_16be0 = 0x16be0, + BNXT_ULP_CLASS_HID_11cd8 = 0x11cd8, + BNXT_ULP_CLASS_HID_10880 = 0x10880, + BNXT_ULP_CLASS_HID_158e0 = 0x158e0, + BNXT_ULP_CLASS_HID_154a0 = 0x154a0, + BNXT_ULP_CLASS_HID_13ed0 = 0x13ed0, + BNXT_ULP_CLASS_HID_12a90 = 0x12a90, + BNXT_ULP_CLASS_HID_16550 = 0x16550, + BNXT_ULP_CLASS_HID_176b0 = 0x176b0, + BNXT_ULP_CLASS_HID_10bb0 = 0x10bb0, + BNXT_ULP_CLASS_HID_10670 = 0x10670, + BNXT_ULP_CLASS_HID_15650 = 0x15650, + BNXT_ULP_CLASS_HID_14210 = 0x14210, + BNXT_ULP_CLASS_HID_13440 = 0x13440, + BNXT_ULP_CLASS_HID_12000 = 0x12000, + BNXT_ULP_CLASS_HID_17060 = 0x17060, + BNXT_ULP_CLASS_HID_16c20 = 0x16c20, + BNXT_ULP_CLASS_HID_11511 = 0x11511, + BNXT_ULP_CLASS_HID_101d3 = 0x101d3, + BNXT_ULP_CLASS_HID_15135 = 0x15135, + BNXT_ULP_CLASS_HID_14df7 = 0x14df7, + BNXT_ULP_CLASS_HID_13723 = 0x13723, + BNXT_ULP_CLASS_HID_123e5 = 0x123e5, + BNXT_ULP_CLASS_HID_173c7 = 0x173c7, + BNXT_ULP_CLASS_HID_16f89 = 0x16f89, + BNXT_ULP_CLASS_HID_10081 = 0x10081, + BNXT_ULP_CLASS_HID_11ce1 = 0x11ce1, + BNXT_ULP_CLASS_HID_14ca5 = 0x14ca5, + BNXT_ULP_CLASS_HID_15885 = 0x15885, + BNXT_ULP_CLASS_HID_12293 = 0x12293, + BNXT_ULP_CLASS_HID_13ef3 = 0x13ef3, + BNXT_ULP_CLASS_HID_16eb7 = 0x16eb7, + BNXT_ULP_CLASS_HID_16561 = 0x16561, + BNXT_ULP_CLASS_HID_10e59 = 0x10e59, + BNXT_ULP_CLASS_HID_11bb9 = 0x11bb9, + BNXT_ULP_CLASS_HID_14a61 = 0x14a61, + BNXT_ULP_CLASS_HID_14623 = 0x14623, + BNXT_ULP_CLASS_HID_1286b = 0x1286b, + BNXT_ULP_CLASS_HID_12411 = 0x12411, + BNXT_ULP_CLASS_HID_17473 = 0x17473, + BNXT_ULP_CLASS_HID_16031 = 0x16031, + BNXT_ULP_CLASS_HID_10531 = 0x10531, + BNXT_ULP_CLASS_HID_11111 = 0x11111, + BNXT_ULP_CLASS_HID_141d1 = 0x141d1, + BNXT_ULP_CLASS_HID_15d31 = 0x15d31, + BNXT_ULP_CLASS_HID_127c3 = 0x127c3, + BNXT_ULP_CLASS_HID_13323 = 0x13323, + BNXT_ULP_CLASS_HID_163e3 = 0x163e3, + BNXT_ULP_CLASS_HID_17fc3 = 0x17fc3, + BNXT_ULP_CLASS_HID_108f5 = 0x108f5, + BNXT_ULP_CLASS_HID_104b9 = 0x104b9, + BNXT_ULP_CLASS_HID_15499 = 0x15499, + BNXT_ULP_CLASS_HID_1435d = 0x1435d, + BNXT_ULP_CLASS_HID_12a89 = 0x12a89, + BNXT_ULP_CLASS_HID_12149 = 0x12149, + BNXT_ULP_CLASS_HID_176ad = 0x176ad, + BNXT_ULP_CLASS_HID_16d6d = 0x16d6d, + BNXT_ULP_CLASS_HID_10665 = 0x10665, + BNXT_ULP_CLASS_HID_11245 = 0x11245, + BNXT_ULP_CLASS_HID_14271 = 0x14271, + BNXT_ULP_CLASS_HID_15e51 = 0x15e51, + BNXT_ULP_CLASS_HID_12061 = 0x12061, + BNXT_ULP_CLASS_HID_13c41 = 0x13c41, + BNXT_ULP_CLASS_HID_16c05 = 0x16c05, + BNXT_ULP_CLASS_HID_17865 = 0x17865, + BNXT_ULP_CLASS_HID_10d21 = 0x10d21, + BNXT_ULP_CLASS_HID_11901 = 0x11901, + BNXT_ULP_CLASS_HID_149c1 = 0x149c1, + BNXT_ULP_CLASS_HID_14589 = 0x14589, + BNXT_ULP_CLASS_HID_12f31 = 0x12f31, + BNXT_ULP_CLASS_HID_13b11 = 0x13b11, + BNXT_ULP_CLASS_HID_16bd9 = 0x16bd9, + BNXT_ULP_CLASS_HID_16799 = 0x16799, + BNXT_ULP_CLASS_HID_11831 = 0x11831, + BNXT_ULP_CLASS_HID_114f1 = 0x114f1, + BNXT_ULP_CLASS_HID_144b1 = 0x144b1, + BNXT_ULP_CLASS_HID_15091 = 0x15091, + BNXT_ULP_CLASS_HID_13ac1 = 0x13ac1, + BNXT_ULP_CLASS_HID_13681 = 0x13681, + BNXT_ULP_CLASS_HID_166b1 = 0x166b1, + BNXT_ULP_CLASS_HID_17291 = 0x17291, + BNXT_ULP_CLASS_HID_4007d = 0x4007d, + BNXT_ULP_CLASS_HID_41041 = 0x41041, + BNXT_ULP_CLASS_HID_5100d = 0x5100d, + BNXT_ULP_CLASS_HID_50f77 = 0x50f77, + BNXT_ULP_CLASS_HID_48845 = 0x48845, + BNXT_ULP_CLASS_HID_487af = 0x487af, + BNXT_ULP_CLASS_HID_5877b = 0x5877b, + BNXT_ULP_CLASS_HID_5973f = 0x5973f, + BNXT_ULP_CLASS_HID_41c31 = 0x41c31, + BNXT_ULP_CLASS_HID_40b1b = 0x40b1b, + BNXT_ULP_CLASS_HID_50b67 = 0x50b67, + BNXT_ULP_CLASS_HID_51b2b = 0x51b2b, + BNXT_ULP_CLASS_HID_4831f = 0x4831f, + BNXT_ULP_CLASS_HID_49363 = 0x49363, + BNXT_ULP_CLASS_HID_5932f = 0x5932f, + BNXT_ULP_CLASS_HID_58211 = 0x58211, + BNXT_ULP_CLASS_HID_4161b = 0x4161b, + BNXT_ULP_CLASS_HID_405bd = 0x405bd, + BNXT_ULP_CLASS_HID_50589 = 0x50589, + BNXT_ULP_CLASS_HID_5150d = 0x5150d, + BNXT_ULP_CLASS_HID_49e23 = 0x49e23, + BNXT_ULP_CLASS_HID_48d85 = 0x48d85, + BNXT_ULP_CLASS_HID_58d11 = 0x58d11, + BNXT_ULP_CLASS_HID_59d15 = 0x59d15, + BNXT_ULP_CLASS_HID_4012d = 0x4012d, + BNXT_ULP_CLASS_HID_41131 = 0x41131, + BNXT_ULP_CLASS_HID_5113d = 0x5113d, + BNXT_ULP_CLASS_HID_50027 = 0x50027, + BNXT_ULP_CLASS_HID_48935 = 0x48935, + BNXT_ULP_CLASS_HID_49939 = 0x49939, + BNXT_ULP_CLASS_HID_59905 = 0x59905, + BNXT_ULP_CLASS_HID_5882f = 0x5882f, + BNXT_ULP_CLASS_HID_41b99 = 0x41b99, + BNXT_ULP_CLASS_HID_40b03 = 0x40b03, + BNXT_ULP_CLASS_HID_50acf = 0x50acf, + BNXT_ULP_CLASS_HID_51a93 = 0x51a93, + BNXT_ULP_CLASS_HID_48307 = 0x48307, + BNXT_ULP_CLASS_HID_492cb = 0x492cb, + BNXT_ULP_CLASS_HID_59297 = 0x59297, + BNXT_ULP_CLASS_HID_581d9 = 0x581d9, + BNXT_ULP_CLASS_HID_41653 = 0x41653, + BNXT_ULP_CLASS_HID_40655 = 0x40655, + BNXT_ULP_CLASS_HID_50601 = 0x50601, + BNXT_ULP_CLASS_HID_51545 = 0x51545, + BNXT_ULP_CLASS_HID_49e1b = 0x49e1b, + BNXT_ULP_CLASS_HID_48e1d = 0x48e1d, + BNXT_ULP_CLASS_HID_58d49 = 0x58d49, + BNXT_ULP_CLASS_HID_59d0d = 0x59d0d, + BNXT_ULP_CLASS_HID_40115 = 0x40115, + BNXT_ULP_CLASS_HID_41099 = 0x41099, + BNXT_ULP_CLASS_HID_51085 = 0x51085, + BNXT_ULP_CLASS_HID_5000f = 0x5000f, + BNXT_ULP_CLASS_HID_4889d = 0x4889d, + BNXT_ULP_CLASS_HID_49881 = 0x49881, + BNXT_ULP_CLASS_HID_5980d = 0x5980d, + BNXT_ULP_CLASS_HID_59797 = 0x59797, + BNXT_ULP_CLASS_HID_41c09 = 0x41c09, + BNXT_ULP_CLASS_HID_40c13 = 0x40c13, + BNXT_ULP_CLASS_HID_50b1f = 0x50b1f, + BNXT_ULP_CLASS_HID_51b03 = 0x51b03, + BNXT_ULP_CLASS_HID_48417 = 0x48417, + BNXT_ULP_CLASS_HID_4931b = 0x4931b, + BNXT_ULP_CLASS_HID_59307 = 0x59307, + BNXT_ULP_CLASS_HID_58309 = 0x58309, + BNXT_ULP_CLASS_HID_4160f = 0x4160f, + BNXT_ULP_CLASS_HID_40561 = 0x40561, + BNXT_ULP_CLASS_HID_5052d = 0x5052d, + BNXT_ULP_CLASS_HID_51501 = 0x51501, + BNXT_ULP_CLASS_HID_49dc7 = 0x49dc7, + BNXT_ULP_CLASS_HID_48d29 = 0x48d29, + BNXT_ULP_CLASS_HID_58d05 = 0x58d05, + BNXT_ULP_CLASS_HID_59cc9 = 0x59cc9, + BNXT_ULP_CLASS_HID_40161 = 0x40161, + BNXT_ULP_CLASS_HID_41125 = 0x41125, + BNXT_ULP_CLASS_HID_51061 = 0x51061, + BNXT_ULP_CLASS_HID_5004b = 0x5004b, + BNXT_ULP_CLASS_HID_48929 = 0x48929, + BNXT_ULP_CLASS_HID_4986d = 0x4986d, + BNXT_ULP_CLASS_HID_59829 = 0x59829, + BNXT_ULP_CLASS_HID_58823 = 0x58823, + BNXT_ULP_CLASS_HID_41ba5 = 0x41ba5, + BNXT_ULP_CLASS_HID_40b0f = 0x40b0f, + BNXT_ULP_CLASS_HID_50b0b = 0x50b0b, + BNXT_ULP_CLASS_HID_51a8f = 0x51a8f, + BNXT_ULP_CLASS_HID_48303 = 0x48303, + BNXT_ULP_CLASS_HID_49307 = 0x49307, + BNXT_ULP_CLASS_HID_592a3 = 0x592a3, + BNXT_ULP_CLASS_HID_58205 = 0x58205, + BNXT_ULP_CLASS_HID_4172f = 0x4172f, + BNXT_ULP_CLASS_HID_40621 = 0x40621, + BNXT_ULP_CLASS_HID_5062d = 0x5062d, + BNXT_ULP_CLASS_HID_51621 = 0x51621, + BNXT_ULP_CLASS_HID_49f07 = 0x49f07, + BNXT_ULP_CLASS_HID_48e29 = 0x48e29, + BNXT_ULP_CLASS_HID_58e25 = 0x58e25, + BNXT_ULP_CLASS_HID_59d29 = 0x59d29, + BNXT_ULP_CLASS_HID_400c9 = 0x400c9, + BNXT_ULP_CLASS_HID_4108d = 0x4108d, + BNXT_ULP_CLASS_HID_51049 = 0x51049, + BNXT_ULP_CLASS_HID_50fc3 = 0x50fc3, + BNXT_ULP_CLASS_HID_48881 = 0x48881, + BNXT_ULP_CLASS_HID_487cb = 0x487cb, + BNXT_ULP_CLASS_HID_587c7 = 0x587c7, + BNXT_ULP_CLASS_HID_5978b = 0x5978b, + BNXT_ULP_CLASS_HID_41c4d = 0x41c4d, + BNXT_ULP_CLASS_HID_40b47 = 0x40b47, + BNXT_ULP_CLASS_HID_50b03 = 0x50b03, + BNXT_ULP_CLASS_HID_51b47 = 0x51b47, + BNXT_ULP_CLASS_HID_4834b = 0x4834b, + BNXT_ULP_CLASS_HID_4930f = 0x4930f, + BNXT_ULP_CLASS_HID_5934b = 0x5934b, + BNXT_ULP_CLASS_HID_5824d = 0x5824d, + BNXT_ULP_CLASS_HID_41687 = 0x41687, + BNXT_ULP_CLASS_HID_40609 = 0x40609, + BNXT_ULP_CLASS_HID_50585 = 0x50585, + BNXT_ULP_CLASS_HID_51589 = 0x51589, + BNXT_ULP_CLASS_HID_49e0f = 0x49e0f, + BNXT_ULP_CLASS_HID_48d81 = 0x48d81, + BNXT_ULP_CLASS_HID_58d8d = 0x58d8d, + BNXT_ULP_CLASS_HID_59d01 = 0x59d01, + BNXT_ULP_CLASS_HID_40109 = 0x40109, + BNXT_ULP_CLASS_HID_4110d = 0x4110d, + BNXT_ULP_CLASS_HID_51109 = 0x51109, + BNXT_ULP_CLASS_HID_50003 = 0x50003, + BNXT_ULP_CLASS_HID_48901 = 0x48901, + BNXT_ULP_CLASS_HID_49905 = 0x49905, + BNXT_ULP_CLASS_HID_59901 = 0x59901, + BNXT_ULP_CLASS_HID_5880b = 0x5880b, + BNXT_ULP_CLASS_HID_10619 = 0x10619, + BNXT_ULP_CLASS_HID_11239 = 0x11239, + BNXT_ULP_CLASS_HID_14205 = 0x14205, + BNXT_ULP_CLASS_HID_15e25 = 0x15e25, + BNXT_ULP_CLASS_HID_12417 = 0x12417, + BNXT_ULP_CLASS_HID_13037 = 0x13037, + BNXT_ULP_CLASS_HID_16ff3 = 0x16ff3, + BNXT_ULP_CLASS_HID_17c13 = 0x17c13, + BNXT_ULP_CLASS_HID_1111d = 0x1111d, + BNXT_ULP_CLASS_HID_10cdb = 0x10cdb, + BNXT_ULP_CLASS_HID_15d19 = 0x15d19, + BNXT_ULP_CLASS_HID_148c7 = 0x148c7, + BNXT_ULP_CLASS_HID_13f0b = 0x13f0b, + BNXT_ULP_CLASS_HID_12ac9 = 0x12ac9, + BNXT_ULP_CLASS_HID_17b17 = 0x17b17, + BNXT_ULP_CLASS_HID_176d5 = 0x176d5, + BNXT_ULP_CLASS_HID_10bab = 0x10bab, + BNXT_ULP_CLASS_HID_10769 = 0x10769, + BNXT_ULP_CLASS_HID_15787 = 0x15787, + BNXT_ULP_CLASS_HID_14345 = 0x14345, + BNXT_ULP_CLASS_HID_12989 = 0x12989, + BNXT_ULP_CLASS_HID_12567 = 0x12567, + BNXT_ULP_CLASS_HID_17585 = 0x17585, + BNXT_ULP_CLASS_HID_16143 = 0x16143, + BNXT_ULP_CLASS_HID_1064d = 0x1064d, + BNXT_ULP_CLASS_HID_1128d = 0x1128d, + BNXT_ULP_CLASS_HID_14249 = 0x14249, + BNXT_ULP_CLASS_HID_15e49 = 0x15e49, + BNXT_ULP_CLASS_HID_1244b = 0x1244b, + BNXT_ULP_CLASS_HID_1304b = 0x1304b, + BNXT_ULP_CLASS_HID_16047 = 0x16047, + BNXT_ULP_CLASS_HID_17c47 = 0x17c47, + BNXT_ULP_CLASS_HID_11113 = 0x11113, + BNXT_ULP_CLASS_HID_10cd1 = 0x10cd1, + BNXT_ULP_CLASS_HID_15cf7 = 0x15cf7, + BNXT_ULP_CLASS_HID_148b5 = 0x148b5, + BNXT_ULP_CLASS_HID_13f01 = 0x13f01, + BNXT_ULP_CLASS_HID_12ac7 = 0x12ac7, + BNXT_ULP_CLASS_HID_17ae5 = 0x17ae5, + BNXT_ULP_CLASS_HID_176a3 = 0x176a3, + BNXT_ULP_CLASS_HID_10bd5 = 0x10bd5, + BNXT_ULP_CLASS_HID_10793 = 0x10793, + BNXT_ULP_CLASS_HID_15791 = 0x15791, + BNXT_ULP_CLASS_HID_14357 = 0x14357, + BNXT_ULP_CLASS_HID_129c3 = 0x129c3, + BNXT_ULP_CLASS_HID_12581 = 0x12581, + BNXT_ULP_CLASS_HID_17587 = 0x17587, + BNXT_ULP_CLASS_HID_16145 = 0x16145, + BNXT_ULP_CLASS_HID_10643 = 0x10643, + BNXT_ULP_CLASS_HID_11263 = 0x11263, + BNXT_ULP_CLASS_HID_14227 = 0x14227, + BNXT_ULP_CLASS_HID_15e47 = 0x15e47, + BNXT_ULP_CLASS_HID_12421 = 0x12421, + BNXT_ULP_CLASS_HID_13041 = 0x13041, + BNXT_ULP_CLASS_HID_16005 = 0x16005, + BNXT_ULP_CLASS_HID_17c25 = 0x17c25, + BNXT_ULP_CLASS_HID_11147 = 0x11147, + BNXT_ULP_CLASS_HID_10d05 = 0x10d05, + BNXT_ULP_CLASS_HID_15d43 = 0x15d43, + BNXT_ULP_CLASS_HID_14901 = 0x14901, + BNXT_ULP_CLASS_HID_13f45 = 0x13f45, + BNXT_ULP_CLASS_HID_12b03 = 0x12b03, + BNXT_ULP_CLASS_HID_17b01 = 0x17b01, + BNXT_ULP_CLASS_HID_176c7 = 0x176c7, + BNXT_ULP_CLASS_HID_11bcf = 0x11bcf, + BNXT_ULP_CLASS_HID_1178d = 0x1178d, + BNXT_ULP_CLASS_HID_1474d = 0x1474d, + BNXT_ULP_CLASS_HID_1536d = 0x1536d, + BNXT_ULP_CLASS_HID_139bd = 0x139bd, + BNXT_ULP_CLASS_HID_1357f = 0x1357f, + BNXT_ULP_CLASS_HID_16547 = 0x16547, + BNXT_ULP_CLASS_HID_17167 = 0x17167, + BNXT_ULP_CLASS_HID_11685 = 0x11685, + BNXT_ULP_CLASS_HID_1024f = 0x1024f, + BNXT_ULP_CLASS_HID_1524d = 0x1524d, + BNXT_ULP_CLASS_HID_14e0f = 0x14e0f, + BNXT_ULP_CLASS_HID_1345f = 0x1345f, + BNXT_ULP_CLASS_HID_1201d = 0x1201d, + BNXT_ULP_CLASS_HID_1705f = 0x1705f, + BNXT_ULP_CLASS_HID_16c1d = 0x16c1d, + BNXT_ULP_CLASS_HID_100ef = 0x100ef, + BNXT_ULP_CLASS_HID_11d0f = 0x11d0f, + BNXT_ULP_CLASS_HID_14ccf = 0x14ccf, + BNXT_ULP_CLASS_HID_158ef = 0x158ef, + BNXT_ULP_CLASS_HID_12eed = 0x12eed, + BNXT_ULP_CLASS_HID_13b0d = 0x13b0d, + BNXT_ULP_CLASS_HID_16acd = 0x16acd, + BNXT_ULP_CLASS_HID_16687 = 0x16687, + BNXT_ULP_CLASS_HID_11c07 = 0x11c07, + BNXT_ULP_CLASS_HID_117c5 = 0x117c5, + BNXT_ULP_CLASS_HID_1478d = 0x1478d, + BNXT_ULP_CLASS_HID_1538d = 0x1538d, + BNXT_ULP_CLASS_HID_13a05 = 0x13a05, + BNXT_ULP_CLASS_HID_135cf = 0x135cf, + BNXT_ULP_CLASS_HID_1658f = 0x1658f, + BNXT_ULP_CLASS_HID_1718f = 0x1718f, + BNXT_ULP_CLASS_HID_11667 = 0x11667, + BNXT_ULP_CLASS_HID_10225 = 0x10225, + BNXT_ULP_CLASS_HID_15247 = 0x15247, + BNXT_ULP_CLASS_HID_14e05 = 0x14e05, + BNXT_ULP_CLASS_HID_13455 = 0x13455, + BNXT_ULP_CLASS_HID_12017 = 0x12017, + BNXT_ULP_CLASS_HID_17035 = 0x17035, + BNXT_ULP_CLASS_HID_16bf7 = 0x16bf7, + BNXT_ULP_CLASS_HID_10115 = 0x10115, + BNXT_ULP_CLASS_HID_11d15 = 0x11d15, + BNXT_ULP_CLASS_HID_14d05 = 0x14d05, + BNXT_ULP_CLASS_HID_15905 = 0x15905, + BNXT_ULP_CLASS_HID_12f17 = 0x12f17, + BNXT_ULP_CLASS_HID_13b17 = 0x13b17, + BNXT_ULP_CLASS_HID_16ad7 = 0x16ad7, + BNXT_ULP_CLASS_HID_16695 = 0x16695, + BNXT_ULP_CLASS_HID_11be5 = 0x11be5, + BNXT_ULP_CLASS_HID_117a7 = 0x117a7, + BNXT_ULP_CLASS_HID_14767 = 0x14767, + BNXT_ULP_CLASS_HID_15387 = 0x15387, + BNXT_ULP_CLASS_HID_139e7 = 0x139e7, + BNXT_ULP_CLASS_HID_135a5 = 0x135a5, + BNXT_ULP_CLASS_HID_16565 = 0x16565, + BNXT_ULP_CLASS_HID_17185 = 0x17185, + BNXT_ULP_CLASS_HID_11687 = 0x11687, + BNXT_ULP_CLASS_HID_10245 = 0x10245, + BNXT_ULP_CLASS_HID_15287 = 0x15287, + BNXT_ULP_CLASS_HID_14e45 = 0x14e45, + BNXT_ULP_CLASS_HID_13485 = 0x13485, + BNXT_ULP_CLASS_HID_12047 = 0x12047, + BNXT_ULP_CLASS_HID_17085 = 0x17085, + BNXT_ULP_CLASS_HID_16c47 = 0x16c47, + BNXT_ULP_CLASS_HID_400f4 = 0x400f4, + BNXT_ULP_CLASS_HID_410c8 = 0x410c8, + BNXT_ULP_CLASS_HID_51084 = 0x51084, + BNXT_ULP_CLASS_HID_50ffe = 0x50ffe, + BNXT_ULP_CLASS_HID_488cc = 0x488cc, + BNXT_ULP_CLASS_HID_48726 = 0x48726, + BNXT_ULP_CLASS_HID_587f2 = 0x587f2, + BNXT_ULP_CLASS_HID_597b6 = 0x597b6, + BNXT_ULP_CLASS_HID_41b10 = 0x41b10, + BNXT_ULP_CLASS_HID_40b8a = 0x40b8a, + BNXT_ULP_CLASS_HID_50a46 = 0x50a46, + BNXT_ULP_CLASS_HID_51a1a = 0x51a1a, + BNXT_ULP_CLASS_HID_4838e = 0x4838e, + BNXT_ULP_CLASS_HID_49242 = 0x49242, + BNXT_ULP_CLASS_HID_5921e = 0x5921e, + BNXT_ULP_CLASS_HID_58150 = 0x58150, + BNXT_ULP_CLASS_HID_41686 = 0x41686, + BNXT_ULP_CLASS_HID_405e8 = 0x405e8, + BNXT_ULP_CLASS_HID_505a4 = 0x505a4, + BNXT_ULP_CLASS_HID_51588 = 0x51588, + BNXT_ULP_CLASS_HID_49d4e = 0x49d4e, + BNXT_ULP_CLASS_HID_48da0 = 0x48da0, + BNXT_ULP_CLASS_HID_58d8c = 0x58d8c, + BNXT_ULP_CLASS_HID_59c40 = 0x59c40, + BNXT_ULP_CLASS_HID_40040 = 0x40040, + BNXT_ULP_CLASS_HID_41004 = 0x41004, + BNXT_ULP_CLASS_HID_510c0 = 0x510c0, + BNXT_ULP_CLASS_HID_50f4a = 0x50f4a, + BNXT_ULP_CLASS_HID_48808 = 0x48808, + BNXT_ULP_CLASS_HID_48742 = 0x48742, + BNXT_ULP_CLASS_HID_5874e = 0x5874e, + BNXT_ULP_CLASS_HID_59702 = 0x59702, + BNXT_ULP_CLASS_HID_41bfe = 0x41bfe, + BNXT_ULP_CLASS_HID_40a58 = 0x40a58, + BNXT_ULP_CLASS_HID_50a2c = 0x50a2c, + BNXT_ULP_CLASS_HID_51ae8 = 0x51ae8, + BNXT_ULP_CLASS_HID_4825c = 0x4825c, + BNXT_ULP_CLASS_HID_49228 = 0x49228, + BNXT_ULP_CLASS_HID_592ec = 0x592ec, + BNXT_ULP_CLASS_HID_5815e = 0x5815e, + BNXT_ULP_CLASS_HID_41698 = 0x41698, + BNXT_ULP_CLASS_HID_4051a = 0x4051a, + BNXT_ULP_CLASS_HID_505ce = 0x505ce, + BNXT_ULP_CLASS_HID_5158a = 0x5158a, + BNXT_ULP_CLASS_HID_49d58 = 0x49d58, + BNXT_ULP_CLASS_HID_48dca = 0x48dca, + BNXT_ULP_CLASS_HID_58d8e = 0x58d8e, + BNXT_ULP_CLASS_HID_59c5a = 0x59c5a, + BNXT_ULP_CLASS_HID_4002e = 0x4002e, + BNXT_ULP_CLASS_HID_410ea = 0x410ea, + BNXT_ULP_CLASS_HID_510ae = 0x510ae, + BNXT_ULP_CLASS_HID_50f08 = 0x50f08, + BNXT_ULP_CLASS_HID_488ee = 0x488ee, + BNXT_ULP_CLASS_HID_48748 = 0x48748, + BNXT_ULP_CLASS_HID_5870c = 0x5870c, + BNXT_ULP_CLASS_HID_597e8 = 0x597e8, + BNXT_ULP_CLASS_HID_41b4a = 0x41b4a, + BNXT_ULP_CLASS_HID_40b8c = 0x40b8c, + BNXT_ULP_CLASS_HID_50a48 = 0x50a48, + BNXT_ULP_CLASS_HID_51a0c = 0x51a0c, + BNXT_ULP_CLASS_HID_48388 = 0x48388, + BNXT_ULP_CLASS_HID_4924c = 0x4924c, + BNXT_ULP_CLASS_HID_59208 = 0x59208, + BNXT_ULP_CLASS_HID_5828a = 0x5828a, + BNXT_ULP_CLASS_HID_40540 = 0x40540, + BNXT_ULP_CLASS_HID_41500 = 0x41500, + BNXT_ULP_CLASS_HID_515d0 = 0x515d0, + BNXT_ULP_CLASS_HID_5044a = 0x5044a, + BNXT_ULP_CLASS_HID_48d18 = 0x48d18, + BNXT_ULP_CLASS_HID_49dd8 = 0x49dd8, + BNXT_ULP_CLASS_HID_59da8 = 0x59da8, + BNXT_ULP_CLASS_HID_58c02 = 0x58c02, + BNXT_ULP_CLASS_HID_41048 = 0x41048, + BNXT_ULP_CLASS_HID_400c2 = 0x400c2, + BNXT_ULP_CLASS_HID_50092 = 0x50092, + BNXT_ULP_CLASS_HID_51f52 = 0x51f52, + BNXT_ULP_CLASS_HID_49800 = 0x49800, + BNXT_ULP_CLASS_HID_4889a = 0x4889a, + BNXT_ULP_CLASS_HID_5974a = 0x5974a, + BNXT_ULP_CLASS_HID_587c8 = 0x587c8, + BNXT_ULP_CLASS_HID_40bc2 = 0x40bc2, + BNXT_ULP_CLASS_HID_41b82 = 0x41b82, + BNXT_ULP_CLASS_HID_51a62 = 0x51a62, + BNXT_ULP_CLASS_HID_50ac0 = 0x50ac0, + BNXT_ULP_CLASS_HID_493aa = 0x493aa, + BNXT_ULP_CLASS_HID_48208 = 0x48208, + BNXT_ULP_CLASS_HID_582c8 = 0x582c8, + BNXT_ULP_CLASS_HID_59288 = 0x59288, + BNXT_ULP_CLASS_HID_40688 = 0x40688, + BNXT_ULP_CLASS_HID_41540 = 0x41540, + BNXT_ULP_CLASS_HID_51508 = 0x51508, + BNXT_ULP_CLASS_HID_50582 = 0x50582, + BNXT_ULP_CLASS_HID_48d40 = 0x48d40, + BNXT_ULP_CLASS_HID_49d08 = 0x49d08, + BNXT_ULP_CLASS_HID_59dc0 = 0x59dc0, + BNXT_ULP_CLASS_HID_58c4a = 0x58c4a, + BNXT_ULP_CLASS_HID_4104a = 0x4104a, + BNXT_ULP_CLASS_HID_400a8 = 0x400a8, + BNXT_ULP_CLASS_HID_50f78 = 0x50f78, + BNXT_ULP_CLASS_HID_51f38 = 0x51f38, + BNXT_ULP_CLASS_HID_4980a = 0x4980a, + BNXT_ULP_CLASS_HID_49768 = 0x49768, + BNXT_ULP_CLASS_HID_59738 = 0x59738, + BNXT_ULP_CLASS_HID_587aa = 0x587aa, + BNXT_ULP_CLASS_HID_40bd8 = 0x40bd8, + BNXT_ULP_CLASS_HID_41bc8 = 0x41bc8, + BNXT_ULP_CLASS_HID_51b88 = 0x51b88, + BNXT_ULP_CLASS_HID_50ada = 0x50ada, + BNXT_ULP_CLASS_HID_493c8 = 0x493c8, + BNXT_ULP_CLASS_HID_4820a = 0x4820a, + BNXT_ULP_CLASS_HID_582da = 0x582da, + BNXT_ULP_CLASS_HID_5929a = 0x5929a, + BNXT_ULP_CLASS_HID_4056a = 0x4056a, + BNXT_ULP_CLASS_HID_4152a = 0x4152a, + BNXT_ULP_CLASS_HID_5150a = 0x5150a, + BNXT_ULP_CLASS_HID_50468 = 0x50468, + BNXT_ULP_CLASS_HID_48d2a = 0x48d2a, + BNXT_ULP_CLASS_HID_49dea = 0x49dea, + BNXT_ULP_CLASS_HID_59dca = 0x59dca, + BNXT_ULP_CLASS_HID_58c28 = 0x58c28, + BNXT_ULP_CLASS_HID_4118a = 0x4118a, + BNXT_ULP_CLASS_HID_400c8 = 0x400c8, + BNXT_ULP_CLASS_HID_50088 = 0x50088, + BNXT_ULP_CLASS_HID_51088 = 0x51088, + BNXT_ULP_CLASS_HID_4984a = 0x4984a, + BNXT_ULP_CLASS_HID_48888 = 0x48888, + BNXT_ULP_CLASS_HID_58888 = 0x58888, + BNXT_ULP_CLASS_HID_587ca = 0x587ca, + BNXT_ULP_CLASS_HID_10690 = 0x10690, + BNXT_ULP_CLASS_HID_112b0 = 0x112b0, + BNXT_ULP_CLASS_HID_1428c = 0x1428c, + BNXT_ULP_CLASS_HID_15eac = 0x15eac, + BNXT_ULP_CLASS_HID_1249e = 0x1249e, + BNXT_ULP_CLASS_HID_130be = 0x130be, + BNXT_ULP_CLASS_HID_16f7a = 0x16f7a, + BNXT_ULP_CLASS_HID_17c9a = 0x17c9a, + BNXT_ULP_CLASS_HID_1119a = 0x1119a, + BNXT_ULP_CLASS_HID_10c58 = 0x10c58, + BNXT_ULP_CLASS_HID_15c7e = 0x15c7e, + BNXT_ULP_CLASS_HID_1483c = 0x1483c, + BNXT_ULP_CLASS_HID_13f88 = 0x13f88, + BNXT_ULP_CLASS_HID_12a4e = 0x12a4e, + BNXT_ULP_CLASS_HID_17a6c = 0x17a6c, + BNXT_ULP_CLASS_HID_1762a = 0x1762a, + BNXT_ULP_CLASS_HID_11b46 = 0x11b46, + BNXT_ULP_CLASS_HID_11704 = 0x11704, + BNXT_ULP_CLASS_HID_147c4 = 0x147c4, + BNXT_ULP_CLASS_HID_153e4 = 0x153e4, + BNXT_ULP_CLASS_HID_13934 = 0x13934, + BNXT_ULP_CLASS_HID_135f6 = 0x135f6, + BNXT_ULP_CLASS_HID_165ce = 0x165ce, + BNXT_ULP_CLASS_HID_171ee = 0x171ee, + BNXT_ULP_CLASS_HID_116ee = 0x116ee, + BNXT_ULP_CLASS_HID_102ac = 0x102ac, + BNXT_ULP_CLASS_HID_152ce = 0x152ce, + BNXT_ULP_CLASS_HID_14e8c = 0x14e8c, + BNXT_ULP_CLASS_HID_134dc = 0x134dc, + BNXT_ULP_CLASS_HID_1209e = 0x1209e, + BNXT_ULP_CLASS_HID_170bc = 0x170bc, + BNXT_ULP_CLASS_HID_16b7e = 0x16b7e, + BNXT_ULP_CLASS_HID_119ae = 0x119ae, + BNXT_ULP_CLASS_HID_1146a = 0x1146a, + BNXT_ULP_CLASS_HID_14426 = 0x14426, + BNXT_ULP_CLASS_HID_15046 = 0x15046, + BNXT_ULP_CLASS_HID_1263a = 0x1263a, + BNXT_ULP_CLASS_HID_1325a = 0x1325a, + BNXT_ULP_CLASS_HID_16216 = 0x16216, + BNXT_ULP_CLASS_HID_17e36 = 0x17e36, + BNXT_ULP_CLASS_HID_1133e = 0x1133e, + BNXT_ULP_CLASS_HID_10ffa = 0x10ffa, + BNXT_ULP_CLASS_HID_15f1a = 0x15f1a, + BNXT_ULP_CLASS_HID_14bee = 0x14bee, + BNXT_ULP_CLASS_HID_1312a = 0x1312a, + BNXT_ULP_CLASS_HID_12dea = 0x12dea, + BNXT_ULP_CLASS_HID_17d1e = 0x17d1e, + BNXT_ULP_CLASS_HID_169de = 0x169de, + BNXT_ULP_CLASS_HID_11ee6 = 0x11ee6, + BNXT_ULP_CLASS_HID_10abe = 0x10abe, + BNXT_ULP_CLASS_HID_15ade = 0x15ade, + BNXT_ULP_CLASS_HID_1569e = 0x1569e, + BNXT_ULP_CLASS_HID_13cee = 0x13cee, + BNXT_ULP_CLASS_HID_128ae = 0x128ae, + BNXT_ULP_CLASS_HID_1676e = 0x1676e, + BNXT_ULP_CLASS_HID_1748e = 0x1748e, + BNXT_ULP_CLASS_HID_1098e = 0x1098e, + BNXT_ULP_CLASS_HID_1044e = 0x1044e, + BNXT_ULP_CLASS_HID_1546e = 0x1546e, + BNXT_ULP_CLASS_HID_1402e = 0x1402e, + BNXT_ULP_CLASS_HID_1367e = 0x1367e, + BNXT_ULP_CLASS_HID_1223e = 0x1223e, + BNXT_ULP_CLASS_HID_1725e = 0x1725e, + BNXT_ULP_CLASS_HID_16e1e = 0x16e1e, + BNXT_ULP_CLASS_HID_1172f = 0x1172f, + BNXT_ULP_CLASS_HID_103ed = 0x103ed, + BNXT_ULP_CLASS_HID_1530b = 0x1530b, + BNXT_ULP_CLASS_HID_14fc9 = 0x14fc9, + BNXT_ULP_CLASS_HID_1351d = 0x1351d, + BNXT_ULP_CLASS_HID_121db = 0x121db, + BNXT_ULP_CLASS_HID_171f9 = 0x171f9, + BNXT_ULP_CLASS_HID_16db7 = 0x16db7, + BNXT_ULP_CLASS_HID_102bf = 0x102bf, + BNXT_ULP_CLASS_HID_11edf = 0x11edf, + BNXT_ULP_CLASS_HID_14e9b = 0x14e9b, + BNXT_ULP_CLASS_HID_15abb = 0x15abb, + BNXT_ULP_CLASS_HID_120ad = 0x120ad, + BNXT_ULP_CLASS_HID_13ccd = 0x13ccd, + BNXT_ULP_CLASS_HID_16c89 = 0x16c89, + BNXT_ULP_CLASS_HID_1675f = 0x1675f, + BNXT_ULP_CLASS_HID_10c67 = 0x10c67, + BNXT_ULP_CLASS_HID_11987 = 0x11987, + BNXT_ULP_CLASS_HID_1485f = 0x1485f, + BNXT_ULP_CLASS_HID_1441d = 0x1441d, + BNXT_ULP_CLASS_HID_12a55 = 0x12a55, + BNXT_ULP_CLASS_HID_1262f = 0x1262f, + BNXT_ULP_CLASS_HID_1764d = 0x1764d, + BNXT_ULP_CLASS_HID_1620f = 0x1620f, + BNXT_ULP_CLASS_HID_1070f = 0x1070f, + BNXT_ULP_CLASS_HID_1132f = 0x1132f, + BNXT_ULP_CLASS_HID_143ef = 0x143ef, + BNXT_ULP_CLASS_HID_15f0f = 0x15f0f, + BNXT_ULP_CLASS_HID_125fd = 0x125fd, + BNXT_ULP_CLASS_HID_1311d = 0x1311d, + BNXT_ULP_CLASS_HID_161dd = 0x161dd, + BNXT_ULP_CLASS_HID_17dfd = 0x17dfd, + BNXT_ULP_CLASS_HID_10acb = 0x10acb, + BNXT_ULP_CLASS_HID_10687 = 0x10687, + BNXT_ULP_CLASS_HID_156a7 = 0x156a7, + BNXT_ULP_CLASS_HID_14163 = 0x14163, + BNXT_ULP_CLASS_HID_128b7 = 0x128b7, + BNXT_ULP_CLASS_HID_12377 = 0x12377, + BNXT_ULP_CLASS_HID_17493 = 0x17493, + BNXT_ULP_CLASS_HID_16f53 = 0x16f53, + BNXT_ULP_CLASS_HID_1045b = 0x1045b, + BNXT_ULP_CLASS_HID_1107b = 0x1107b, + BNXT_ULP_CLASS_HID_1404f = 0x1404f, + BNXT_ULP_CLASS_HID_15c6f = 0x15c6f, + BNXT_ULP_CLASS_HID_1225f = 0x1225f, + BNXT_ULP_CLASS_HID_13e7f = 0x13e7f, + BNXT_ULP_CLASS_HID_16e3b = 0x16e3b, + BNXT_ULP_CLASS_HID_17a5b = 0x17a5b, + BNXT_ULP_CLASS_HID_10f1f = 0x10f1f, + BNXT_ULP_CLASS_HID_11b3f = 0x11b3f, + BNXT_ULP_CLASS_HID_14bff = 0x14bff, + BNXT_ULP_CLASS_HID_147b7 = 0x147b7, + BNXT_ULP_CLASS_HID_12d0f = 0x12d0f, + BNXT_ULP_CLASS_HID_1392f = 0x1392f, + BNXT_ULP_CLASS_HID_169e7 = 0x169e7, + BNXT_ULP_CLASS_HID_165a7 = 0x165a7, + BNXT_ULP_CLASS_HID_11a0f = 0x11a0f, + BNXT_ULP_CLASS_HID_116cf = 0x116cf, + BNXT_ULP_CLASS_HID_1468f = 0x1468f, + BNXT_ULP_CLASS_HID_152af = 0x152af, + BNXT_ULP_CLASS_HID_138ff = 0x138ff, + BNXT_ULP_CLASS_HID_134bf = 0x134bf, + BNXT_ULP_CLASS_HID_1648f = 0x1648f, + BNXT_ULP_CLASS_HID_170af = 0x170af, + BNXT_ULP_CLASS_HID_40c38 = 0x40c38, + BNXT_ULP_CLASS_HID_41c04 = 0x41c04, + BNXT_ULP_CLASS_HID_51c48 = 0x51c48, + BNXT_ULP_CLASS_HID_50332 = 0x50332, + BNXT_ULP_CLASS_HID_48400 = 0x48400, + BNXT_ULP_CLASS_HID_48bea = 0x48bea, + BNXT_ULP_CLASS_HID_58b3e = 0x58b3e, + BNXT_ULP_CLASS_HID_59b7a = 0x59b7a, + BNXT_ULP_CLASS_HID_417dc = 0x417dc, + BNXT_ULP_CLASS_HID_40746 = 0x40746, + BNXT_ULP_CLASS_HID_5068a = 0x5068a, + BNXT_ULP_CLASS_HID_516d6 = 0x516d6, + BNXT_ULP_CLASS_HID_48f42 = 0x48f42, + BNXT_ULP_CLASS_HID_49e8e = 0x49e8e, + BNXT_ULP_CLASS_HID_59ed2 = 0x59ed2, + BNXT_ULP_CLASS_HID_58d9c = 0x58d9c, + BNXT_ULP_CLASS_HID_41a4a = 0x41a4a, + BNXT_ULP_CLASS_HID_40924 = 0x40924, + BNXT_ULP_CLASS_HID_50968 = 0x50968, + BNXT_ULP_CLASS_HID_51944 = 0x51944, + BNXT_ULP_CLASS_HID_49182 = 0x49182, + BNXT_ULP_CLASS_HID_4816c = 0x4816c, + BNXT_ULP_CLASS_HID_58140 = 0x58140, + BNXT_ULP_CLASS_HID_5908c = 0x5908c, + BNXT_ULP_CLASS_HID_40c8c = 0x40c8c, + BNXT_ULP_CLASS_HID_41cc8 = 0x41cc8, + BNXT_ULP_CLASS_HID_51c0c = 0x51c0c, + BNXT_ULP_CLASS_HID_50386 = 0x50386, + BNXT_ULP_CLASS_HID_484c4 = 0x484c4, + BNXT_ULP_CLASS_HID_48b8e = 0x48b8e, + BNXT_ULP_CLASS_HID_58b82 = 0x58b82, + BNXT_ULP_CLASS_HID_59bce = 0x59bce, + BNXT_ULP_CLASS_HID_10a54 = 0x10a54, + BNXT_ULP_CLASS_HID_11e74 = 0x11e74, + BNXT_ULP_CLASS_HID_14e48 = 0x14e48, + BNXT_ULP_CLASS_HID_15268 = 0x15268, + BNXT_ULP_CLASS_HID_1285a = 0x1285a, + BNXT_ULP_CLASS_HID_13c7a = 0x13c7a, + BNXT_ULP_CLASS_HID_163be = 0x163be, + BNXT_ULP_CLASS_HID_1705e = 0x1705e, + BNXT_ULP_CLASS_HID_11d5e = 0x11d5e, + BNXT_ULP_CLASS_HID_1009c = 0x1009c, + BNXT_ULP_CLASS_HID_150ba = 0x150ba, + BNXT_ULP_CLASS_HID_144f8 = 0x144f8, + BNXT_ULP_CLASS_HID_1334c = 0x1334c, + BNXT_ULP_CLASS_HID_1268a = 0x1268a, + BNXT_ULP_CLASS_HID_176a8 = 0x176a8, + BNXT_ULP_CLASS_HID_17aee = 0x17aee, + BNXT_ULP_CLASS_HID_11782 = 0x11782, + BNXT_ULP_CLASS_HID_11bc0 = 0x11bc0, + BNXT_ULP_CLASS_HID_14b00 = 0x14b00, + BNXT_ULP_CLASS_HID_15f20 = 0x15f20, + BNXT_ULP_CLASS_HID_135f0 = 0x135f0, + BNXT_ULP_CLASS_HID_13932 = 0x13932, + BNXT_ULP_CLASS_HID_1690a = 0x1690a, + BNXT_ULP_CLASS_HID_17d2a = 0x17d2a, + BNXT_ULP_CLASS_HID_11a2a = 0x11a2a, + BNXT_ULP_CLASS_HID_10e68 = 0x10e68, + BNXT_ULP_CLASS_HID_15e0a = 0x15e0a, + BNXT_ULP_CLASS_HID_14248 = 0x14248, + BNXT_ULP_CLASS_HID_13818 = 0x13818, + BNXT_ULP_CLASS_HID_12c5a = 0x12c5a, + BNXT_ULP_CLASS_HID_17c78 = 0x17c78, + BNXT_ULP_CLASS_HID_167ba = 0x167ba, + BNXT_ULP_CLASS_HID_1f91 = 0x1f91, + BNXT_ULP_CLASS_HID_0763 = 0x0763, + BNXT_ULP_CLASS_HID_0f7b = 0x0f7b, + BNXT_ULP_CLASS_HID_16af = 0x16af, + BNXT_ULP_CLASS_HID_1daf = 0x1daf, + BNXT_ULP_CLASS_HID_0539 = 0x0539, + BNXT_ULP_CLASS_HID_01ed = 0x01ed, + BNXT_ULP_CLASS_HID_097f = 0x097f, + BNXT_ULP_CLASS_HID_81ab8 = 0x81ab8, + BNXT_ULP_CLASS_HID_8020e = 0x8020e, + BNXT_ULP_CLASS_HID_815d8 = 0x815d8, + BNXT_ULP_CLASS_HID_81cae = 0x81cae, + BNXT_ULP_CLASS_HID_810a8 = 0x810a8, + BNXT_ULP_CLASS_HID_8183e = 0x8183e, + BNXT_ULP_CLASS_HID_8036a = 0x8036a, + BNXT_ULP_CLASS_HID_80af8 = 0x80af8, + BNXT_ULP_CLASS_HID_206fe = 0x206fe, + BNXT_ULP_CLASS_HID_20e4c = 0x20e4c, + BNXT_ULP_CLASS_HID_2111e = 0x2111e, + BNXT_ULP_CLASS_HID_218ec = 0x218ec, + BNXT_ULP_CLASS_HID_60472 = 0x60472, + BNXT_ULP_CLASS_HID_603c0 = 0x603c0, + BNXT_ULP_CLASS_HID_61692 = 0x61692, + BNXT_ULP_CLASS_HID_61e60 = 0x61e60, + BNXT_ULP_CLASS_HID_1f81 = 0x1f81, + BNXT_ULP_CLASS_HID_0773 = 0x0773, + BNXT_ULP_CLASS_HID_0f6b = 0x0f6b, + BNXT_ULP_CLASS_HID_16bf = 0x16bf, + BNXT_ULP_CLASS_HID_03cf = 0x03cf, + BNXT_ULP_CLASS_HID_0ab1 = 0x0ab1, + BNXT_ULP_CLASS_HID_130b = 0x130b, + BNXT_ULP_CLASS_HID_1afd = 0x1afd, + BNXT_ULP_CLASS_HID_1591 = 0x1591, + BNXT_ULP_CLASS_HID_1d03 = 0x1d03, + BNXT_ULP_CLASS_HID_057b = 0x057b, + BNXT_ULP_CLASS_HID_0ced = 0x0ced, + BNXT_ULP_CLASS_HID_19df = 0x19df, + BNXT_ULP_CLASS_HID_0141 = 0x0141, + BNXT_ULP_CLASS_HID_08b9 = 0x08b9, + BNXT_ULP_CLASS_HID_108d = 0x108d, + BNXT_ULP_CLASS_HID_1dbf = 0x1dbf, + BNXT_ULP_CLASS_HID_0529 = 0x0529, + BNXT_ULP_CLASS_HID_01fd = 0x01fd, + BNXT_ULP_CLASS_HID_096f = 0x096f, + BNXT_ULP_CLASS_HID_810b7 = 0x810b7, + BNXT_ULP_CLASS_HID_81821 = 0x81821, + BNXT_ULP_CLASS_HID_804f5 = 0x804f5, + BNXT_ULP_CLASS_HID_80c67 = 0x80c67, + BNXT_ULP_CLASS_HID_41333 = 0x41333, + BNXT_ULP_CLASS_HID_41aad = 0x41aad, + BNXT_ULP_CLASS_HID_40771 = 0x40771, + BNXT_ULP_CLASS_HID_40ee3 = 0x40ee3, + BNXT_ULP_CLASS_HID_c16cb = 0xc16cb, + BNXT_ULP_CLASS_HID_c1da5 = 0xc1da5, + BNXT_ULP_CLASS_HID_c1a09 = 0xc1a09, + BNXT_ULP_CLASS_HID_c01fb = 0xc01fb, + BNXT_ULP_CLASS_HID_1ff1 = 0x1ff1, + BNXT_ULP_CLASS_HID_0703 = 0x0703, + BNXT_ULP_CLASS_HID_0f1b = 0x0f1b, + BNXT_ULP_CLASS_HID_16cf = 0x16cf, + BNXT_ULP_CLASS_HID_03bf = 0x03bf, + BNXT_ULP_CLASS_HID_0ac1 = 0x0ac1, + BNXT_ULP_CLASS_HID_137b = 0x137b, + BNXT_ULP_CLASS_HID_1a8d = 0x1a8d, + BNXT_ULP_CLASS_HID_15e1 = 0x15e1, + BNXT_ULP_CLASS_HID_1d73 = 0x1d73, + BNXT_ULP_CLASS_HID_050b = 0x050b, + BNXT_ULP_CLASS_HID_0c9d = 0x0c9d, + BNXT_ULP_CLASS_HID_19af = 0x19af, + BNXT_ULP_CLASS_HID_0131 = 0x0131, + BNXT_ULP_CLASS_HID_08c9 = 0x08c9, + BNXT_ULP_CLASS_HID_10fd = 0x10fd, + BNXT_ULP_CLASS_HID_1dcf = 0x1dcf, + BNXT_ULP_CLASS_HID_0559 = 0x0559, + BNXT_ULP_CLASS_HID_018d = 0x018d, + BNXT_ULP_CLASS_HID_091f = 0x091f, + BNXT_ULP_CLASS_HID_810c7 = 0x810c7, + BNXT_ULP_CLASS_HID_81851 = 0x81851, + BNXT_ULP_CLASS_HID_80485 = 0x80485, + BNXT_ULP_CLASS_HID_80c17 = 0x80c17, + BNXT_ULP_CLASS_HID_41343 = 0x41343, + BNXT_ULP_CLASS_HID_41add = 0x41add, + BNXT_ULP_CLASS_HID_40701 = 0x40701, + BNXT_ULP_CLASS_HID_40e93 = 0x40e93, + BNXT_ULP_CLASS_HID_c16bb = 0xc16bb, + BNXT_ULP_CLASS_HID_c1dd5 = 0xc1dd5, + BNXT_ULP_CLASS_HID_c1a79 = 0xc1a79, + BNXT_ULP_CLASS_HID_c018b = 0xc018b, + BNXT_ULP_CLASS_HID_81aa8 = 0x81aa8, + BNXT_ULP_CLASS_HID_8021e = 0x8021e, + BNXT_ULP_CLASS_HID_815c8 = 0x815c8, + BNXT_ULP_CLASS_HID_81cbe = 0x81cbe, + BNXT_ULP_CLASS_HID_810b8 = 0x810b8, + BNXT_ULP_CLASS_HID_8182e = 0x8182e, + BNXT_ULP_CLASS_HID_8037a = 0x8037a, + BNXT_ULP_CLASS_HID_80ae8 = 0x80ae8, + BNXT_ULP_CLASS_HID_c1834 = 0xc1834, + BNXT_ULP_CLASS_HID_c079a = 0xc079a, + BNXT_ULP_CLASS_HID_c0af6 = 0xc0af6, + BNXT_ULP_CLASS_HID_c123a = 0xc123a, + BNXT_ULP_CLASS_HID_c16c4 = 0xc16c4, + BNXT_ULP_CLASS_HID_c1daa = 0xc1daa, + BNXT_ULP_CLASS_HID_c0086 = 0xc0086, + BNXT_ULP_CLASS_HID_c0874 = 0xc0874, + BNXT_ULP_CLASS_HID_a19ea = 0xa19ea, + BNXT_ULP_CLASS_HID_a0158 = 0xa0158, + BNXT_ULP_CLASS_HID_a0bb4 = 0xa0bb4, + BNXT_ULP_CLASS_HID_a13f8 = 0xa13f8, + BNXT_ULP_CLASS_HID_a17fa = 0xa17fa, + BNXT_ULP_CLASS_HID_a1f68 = 0xa1f68, + BNXT_ULP_CLASS_HID_a0244 = 0xa0244, + BNXT_ULP_CLASS_HID_a092a = 0xa092a, + BNXT_ULP_CLASS_HID_e1f76 = 0xe1f76, + BNXT_ULP_CLASS_HID_e06e4 = 0xe06e4, + BNXT_ULP_CLASS_HID_e0930 = 0xe0930, + BNXT_ULP_CLASS_HID_e1104 = 0xe1104, + BNXT_ULP_CLASS_HID_e1506 = 0xe1506, + BNXT_ULP_CLASS_HID_e1cf4 = 0xe1cf4, + BNXT_ULP_CLASS_HID_e07c0 = 0xe07c0, + BNXT_ULP_CLASS_HID_e0eb6 = 0xe0eb6, + BNXT_ULP_CLASS_HID_206ee = 0x206ee, + BNXT_ULP_CLASS_HID_20e5c = 0x20e5c, + BNXT_ULP_CLASS_HID_2110e = 0x2110e, + BNXT_ULP_CLASS_HID_218fc = 0x218fc, + BNXT_ULP_CLASS_HID_60462 = 0x60462, + BNXT_ULP_CLASS_HID_603d0 = 0x603d0, + BNXT_ULP_CLASS_HID_61682 = 0x61682, + BNXT_ULP_CLASS_HID_61e70 = 0x61e70, + BNXT_ULP_CLASS_HID_3167e = 0x3167e, + BNXT_ULP_CLASS_HID_31dec = 0x31dec, + BNXT_ULP_CLASS_HID_30030 = 0x30030, + BNXT_ULP_CLASS_HID_30fae = 0x30fae, + BNXT_ULP_CLASS_HID_70b14 = 0x70b14, + BNXT_ULP_CLASS_HID_71360 = 0x71360, + BNXT_ULP_CLASS_HID_705b4 = 0x705b4, + BNXT_ULP_CLASS_HID_70d22 = 0x70d22, + BNXT_ULP_CLASS_HID_29e26 = 0x29e26, + BNXT_ULP_CLASS_HID_28594 = 0x28594, + BNXT_ULP_CLASS_HID_288f8 = 0x288f8, + BNXT_ULP_CLASS_HID_29034 = 0x29034, + BNXT_ULP_CLASS_HID_693ba = 0x693ba, + BNXT_ULP_CLASS_HID_69b28 = 0x69b28, + BNXT_ULP_CLASS_HID_68e7c = 0x68e7c, + BNXT_ULP_CLASS_HID_69648 = 0x69648, + BNXT_ULP_CLASS_HID_38de8 = 0x38de8, + BNXT_ULP_CLASS_HID_39524 = 0x39524, + BNXT_ULP_CLASS_HID_39808 = 0x39808, + BNXT_ULP_CLASS_HID_387e6 = 0x387e6, + BNXT_ULP_CLASS_HID_7836c = 0x7836c, + BNXT_ULP_CLASS_HID_78ada = 0x78ada, + BNXT_ULP_CLASS_HID_79d8c = 0x79d8c, + BNXT_ULP_CLASS_HID_7857a = 0x7857a, + BNXT_ULP_CLASS_HID_81ad8 = 0x81ad8, + BNXT_ULP_CLASS_HID_8026e = 0x8026e, + BNXT_ULP_CLASS_HID_815b8 = 0x815b8, + BNXT_ULP_CLASS_HID_81cce = 0x81cce, + BNXT_ULP_CLASS_HID_810c8 = 0x810c8, + BNXT_ULP_CLASS_HID_8185e = 0x8185e, + BNXT_ULP_CLASS_HID_8030a = 0x8030a, + BNXT_ULP_CLASS_HID_80a98 = 0x80a98, + BNXT_ULP_CLASS_HID_c1844 = 0xc1844, + BNXT_ULP_CLASS_HID_c07ea = 0xc07ea, + BNXT_ULP_CLASS_HID_c0a86 = 0xc0a86, + BNXT_ULP_CLASS_HID_c124a = 0xc124a, + BNXT_ULP_CLASS_HID_c16b4 = 0xc16b4, + BNXT_ULP_CLASS_HID_c1dda = 0xc1dda, + BNXT_ULP_CLASS_HID_c00f6 = 0xc00f6, + BNXT_ULP_CLASS_HID_c0804 = 0xc0804, + BNXT_ULP_CLASS_HID_a199a = 0xa199a, + BNXT_ULP_CLASS_HID_a0128 = 0xa0128, + BNXT_ULP_CLASS_HID_a0bc4 = 0xa0bc4, + BNXT_ULP_CLASS_HID_a1388 = 0xa1388, + BNXT_ULP_CLASS_HID_a178a = 0xa178a, + BNXT_ULP_CLASS_HID_a1f18 = 0xa1f18, + BNXT_ULP_CLASS_HID_a0234 = 0xa0234, + BNXT_ULP_CLASS_HID_a095a = 0xa095a, + BNXT_ULP_CLASS_HID_e1f06 = 0xe1f06, + BNXT_ULP_CLASS_HID_e0694 = 0xe0694, + BNXT_ULP_CLASS_HID_e0940 = 0xe0940, + BNXT_ULP_CLASS_HID_e1174 = 0xe1174, + BNXT_ULP_CLASS_HID_e1576 = 0xe1576, + BNXT_ULP_CLASS_HID_e1c84 = 0xe1c84, + BNXT_ULP_CLASS_HID_e07b0 = 0xe07b0, + BNXT_ULP_CLASS_HID_e0ec6 = 0xe0ec6, + BNXT_ULP_CLASS_HID_2069e = 0x2069e, + BNXT_ULP_CLASS_HID_20e2c = 0x20e2c, + BNXT_ULP_CLASS_HID_2117e = 0x2117e, + BNXT_ULP_CLASS_HID_2188c = 0x2188c, + BNXT_ULP_CLASS_HID_60412 = 0x60412, + BNXT_ULP_CLASS_HID_603a0 = 0x603a0, + BNXT_ULP_CLASS_HID_616f2 = 0x616f2, + BNXT_ULP_CLASS_HID_61e00 = 0x61e00, + BNXT_ULP_CLASS_HID_3160e = 0x3160e, + BNXT_ULP_CLASS_HID_31d9c = 0x31d9c, + BNXT_ULP_CLASS_HID_30040 = 0x30040, + BNXT_ULP_CLASS_HID_30fde = 0x30fde, + BNXT_ULP_CLASS_HID_70b64 = 0x70b64, + BNXT_ULP_CLASS_HID_71310 = 0x71310, + BNXT_ULP_CLASS_HID_705c4 = 0x705c4, + BNXT_ULP_CLASS_HID_70d52 = 0x70d52, + BNXT_ULP_CLASS_HID_29e56 = 0x29e56, + BNXT_ULP_CLASS_HID_285e4 = 0x285e4, + BNXT_ULP_CLASS_HID_28888 = 0x28888, + BNXT_ULP_CLASS_HID_29044 = 0x29044, + BNXT_ULP_CLASS_HID_693ca = 0x693ca, + BNXT_ULP_CLASS_HID_69b58 = 0x69b58, + BNXT_ULP_CLASS_HID_68e0c = 0x68e0c, + BNXT_ULP_CLASS_HID_69638 = 0x69638, + BNXT_ULP_CLASS_HID_38d98 = 0x38d98, + BNXT_ULP_CLASS_HID_39554 = 0x39554, + BNXT_ULP_CLASS_HID_39878 = 0x39878, + BNXT_ULP_CLASS_HID_38796 = 0x38796, + BNXT_ULP_CLASS_HID_7831c = 0x7831c, + BNXT_ULP_CLASS_HID_78aaa = 0x78aaa, + BNXT_ULP_CLASS_HID_79dfc = 0x79dfc, + BNXT_ULP_CLASS_HID_7850a = 0x7850a, + BNXT_ULP_CLASS_HID_03b7 = 0x03b7, + BNXT_ULP_CLASS_HID_13f3 = 0x13f3, + BNXT_ULP_CLASS_HID_0255 = 0x0255, + BNXT_ULP_CLASS_HID_1675 = 0x1675, + BNXT_ULP_CLASS_HID_80f52 = 0x80f52, + BNXT_ULP_CLASS_HID_819f2 = 0x819f2, + BNXT_ULP_CLASS_HID_80542 = 0x80542, + BNXT_ULP_CLASS_HID_817e2 = 0x817e2, + BNXT_ULP_CLASS_HID_20a98 = 0x20a98, + BNXT_ULP_CLASS_HID_20538 = 0x20538, + BNXT_ULP_CLASS_HID_6081c = 0x6081c, + BNXT_ULP_CLASS_HID_61abc = 0x61abc, + BNXT_ULP_CLASS_HID_03a7 = 0x03a7, + BNXT_ULP_CLASS_HID_13e3 = 0x13e3, + BNXT_ULP_CLASS_HID_1047 = 0x1047, + BNXT_ULP_CLASS_HID_0721 = 0x0721, + BNXT_ULP_CLASS_HID_19b7 = 0x19b7, + BNXT_ULP_CLASS_HID_0911 = 0x0911, + BNXT_ULP_CLASS_HID_0df5 = 0x0df5, + BNXT_ULP_CLASS_HID_1d31 = 0x1d31, + BNXT_ULP_CLASS_HID_0245 = 0x0245, + BNXT_ULP_CLASS_HID_1665 = 0x1665, + BNXT_ULP_CLASS_HID_8055d = 0x8055d, + BNXT_ULP_CLASS_HID_80893 = 0x80893, + BNXT_ULP_CLASS_HID_407d9 = 0x407d9, + BNXT_ULP_CLASS_HID_40b1f = 0x40b1f, + BNXT_ULP_CLASS_HID_c1ad1 = 0xc1ad1, + BNXT_ULP_CLASS_HID_c0e17 = 0xc0e17, + BNXT_ULP_CLASS_HID_03d7 = 0x03d7, + BNXT_ULP_CLASS_HID_1393 = 0x1393, + BNXT_ULP_CLASS_HID_1037 = 0x1037, + BNXT_ULP_CLASS_HID_0751 = 0x0751, + BNXT_ULP_CLASS_HID_19c7 = 0x19c7, + BNXT_ULP_CLASS_HID_0961 = 0x0961, + BNXT_ULP_CLASS_HID_0d85 = 0x0d85, + BNXT_ULP_CLASS_HID_1d41 = 0x1d41, + BNXT_ULP_CLASS_HID_0235 = 0x0235, + BNXT_ULP_CLASS_HID_1615 = 0x1615, + BNXT_ULP_CLASS_HID_8052d = 0x8052d, + BNXT_ULP_CLASS_HID_808e3 = 0x808e3, + BNXT_ULP_CLASS_HID_407a9 = 0x407a9, + BNXT_ULP_CLASS_HID_40b6f = 0x40b6f, + BNXT_ULP_CLASS_HID_c1aa1 = 0xc1aa1, + BNXT_ULP_CLASS_HID_c0e67 = 0xc0e67, + BNXT_ULP_CLASS_HID_80f42 = 0x80f42, + BNXT_ULP_CLASS_HID_819e2 = 0x819e2, + BNXT_ULP_CLASS_HID_80552 = 0x80552, + BNXT_ULP_CLASS_HID_817f2 = 0x817f2, + BNXT_ULP_CLASS_HID_c0cce = 0xc0cce, + BNXT_ULP_CLASS_HID_c1f6e = 0xc1f6e, + BNXT_ULP_CLASS_HID_c1ade = 0xc1ade, + BNXT_ULP_CLASS_HID_c157e = 0xc157e, + BNXT_ULP_CLASS_HID_a0d8c = 0xa0d8c, + BNXT_ULP_CLASS_HID_a182c = 0xa182c, + BNXT_ULP_CLASS_HID_a1b9c = 0xa1b9c, + BNXT_ULP_CLASS_HID_a163c = 0xa163c, + BNXT_ULP_CLASS_HID_e0308 = 0xe0308, + BNXT_ULP_CLASS_HID_e1da8 = 0xe1da8, + BNXT_ULP_CLASS_HID_e1918 = 0xe1918, + BNXT_ULP_CLASS_HID_e0bda = 0xe0bda, + BNXT_ULP_CLASS_HID_20a88 = 0x20a88, + BNXT_ULP_CLASS_HID_20528 = 0x20528, + BNXT_ULP_CLASS_HID_6080c = 0x6080c, + BNXT_ULP_CLASS_HID_61aac = 0x61aac, + BNXT_ULP_CLASS_HID_31a18 = 0x31a18, + BNXT_ULP_CLASS_HID_314b8 = 0x314b8, + BNXT_ULP_CLASS_HID_71f9c = 0x71f9c, + BNXT_ULP_CLASS_HID_70a5e = 0x70a5e, + BNXT_ULP_CLASS_HID_282c0 = 0x282c0, + BNXT_ULP_CLASS_HID_29d60 = 0x29d60, + BNXT_ULP_CLASS_HID_68044 = 0x68044, + BNXT_ULP_CLASS_HID_692e4 = 0x692e4, + BNXT_ULP_CLASS_HID_39250 = 0x39250, + BNXT_ULP_CLASS_HID_38c12 = 0x38c12, + BNXT_ULP_CLASS_HID_797d4 = 0x797d4, + BNXT_ULP_CLASS_HID_78196 = 0x78196, + BNXT_ULP_CLASS_HID_80f32 = 0x80f32, + BNXT_ULP_CLASS_HID_81992 = 0x81992, + BNXT_ULP_CLASS_HID_80522 = 0x80522, + BNXT_ULP_CLASS_HID_81782 = 0x81782, + BNXT_ULP_CLASS_HID_c0cbe = 0xc0cbe, + BNXT_ULP_CLASS_HID_c1f1e = 0xc1f1e, + BNXT_ULP_CLASS_HID_c1aae = 0xc1aae, + BNXT_ULP_CLASS_HID_c150e = 0xc150e, + BNXT_ULP_CLASS_HID_a0dfc = 0xa0dfc, + BNXT_ULP_CLASS_HID_a185c = 0xa185c, + BNXT_ULP_CLASS_HID_a1bec = 0xa1bec, + BNXT_ULP_CLASS_HID_a164c = 0xa164c, + BNXT_ULP_CLASS_HID_e0378 = 0xe0378, + BNXT_ULP_CLASS_HID_e1dd8 = 0xe1dd8, + BNXT_ULP_CLASS_HID_e1968 = 0xe1968, + BNXT_ULP_CLASS_HID_e0baa = 0xe0baa, + BNXT_ULP_CLASS_HID_20af8 = 0x20af8, + BNXT_ULP_CLASS_HID_20558 = 0x20558, + BNXT_ULP_CLASS_HID_6087c = 0x6087c, + BNXT_ULP_CLASS_HID_61adc = 0x61adc, + BNXT_ULP_CLASS_HID_31a68 = 0x31a68, + BNXT_ULP_CLASS_HID_314c8 = 0x314c8, + BNXT_ULP_CLASS_HID_71fec = 0x71fec, + BNXT_ULP_CLASS_HID_70a2e = 0x70a2e, + BNXT_ULP_CLASS_HID_282b0 = 0x282b0, + BNXT_ULP_CLASS_HID_29d10 = 0x29d10, + BNXT_ULP_CLASS_HID_68034 = 0x68034, + BNXT_ULP_CLASS_HID_69294 = 0x69294, + BNXT_ULP_CLASS_HID_39220 = 0x39220, + BNXT_ULP_CLASS_HID_38c62 = 0x38c62, + BNXT_ULP_CLASS_HID_797a4 = 0x797a4, + BNXT_ULP_CLASS_HID_781e6 = 0x781e6, + BNXT_ULP_CLASS_HID_0f05 = 0x0f05, + BNXT_ULP_CLASS_HID_0f09 = 0x0f09, + BNXT_ULP_CLASS_HID_0f06 = 0x0f06, + BNXT_ULP_CLASS_HID_19a6 = 0x19a6, + BNXT_ULP_CLASS_HID_0f0a = 0x0f0a, + BNXT_ULP_CLASS_HID_19aa = 0x19aa, + BNXT_ULP_CLASS_HID_0f15 = 0x0f15, + BNXT_ULP_CLASS_HID_0f19 = 0x0f19, + BNXT_ULP_CLASS_HID_0f65 = 0x0f65, + BNXT_ULP_CLASS_HID_0f69 = 0x0f69, + BNXT_ULP_CLASS_HID_0f16 = 0x0f16, + BNXT_ULP_CLASS_HID_19b6 = 0x19b6, + BNXT_ULP_CLASS_HID_0f1a = 0x0f1a, + BNXT_ULP_CLASS_HID_19ba = 0x19ba, + BNXT_ULP_CLASS_HID_0f66 = 0x0f66, + BNXT_ULP_CLASS_HID_19c6 = 0x19c6, + BNXT_ULP_CLASS_HID_0f6a = 0x0f6a, + BNXT_ULP_CLASS_HID_19ca = 0x19ca }; enum bnxt_ulp_act_hid { BNXT_ULP_ACT_HID_0000 = 0x0000, - BNXT_ULP_ACT_HID_0001 = 0x0001, - BNXT_ULP_ACT_HID_0400 = 0x0400, - BNXT_ULP_ACT_HID_01ab = 0x01ab, + BNXT_ULP_ACT_HID_0008 = 0x0008, + BNXT_ULP_ACT_HID_2000 = 0x2000, + BNXT_ULP_ACT_HID_1988 = 0x1988, + BNXT_ULP_ACT_HID_0080 = 0x0080, + BNXT_ULP_ACT_HID_3988 = 0x3988, + BNXT_ULP_ACT_HID_1a08 = 0x1a08, BNXT_ULP_ACT_HID_0010 = 0x0010, - BNXT_ULP_ACT_HID_05ab = 0x05ab, - BNXT_ULP_ACT_HID_01bb = 0x01bb, - BNXT_ULP_ACT_HID_0002 = 0x0002, - BNXT_ULP_ACT_HID_0003 = 0x0003, - BNXT_ULP_ACT_HID_0402 = 0x0402, - BNXT_ULP_ACT_HID_01ad = 0x01ad, - BNXT_ULP_ACT_HID_0012 = 0x0012, - BNXT_ULP_ACT_HID_05ad = 0x05ad, - BNXT_ULP_ACT_HID_01bd = 0x01bd, - BNXT_ULP_ACT_HID_0613 = 0x0613, - BNXT_ULP_ACT_HID_02a9 = 0x02a9, - BNXT_ULP_ACT_HID_0054 = 0x0054, + BNXT_ULP_ACT_HID_0040 = 0x0040, + BNXT_ULP_ACT_HID_0050 = 0x0050, + BNXT_ULP_ACT_HID_0018 = 0x0018, + BNXT_ULP_ACT_HID_2010 = 0x2010, + BNXT_ULP_ACT_HID_1998 = 0x1998, + BNXT_ULP_ACT_HID_0090 = 0x0090, + BNXT_ULP_ACT_HID_3998 = 0x3998, + BNXT_ULP_ACT_HID_1a18 = 0x1a18, + BNXT_ULP_ACT_HID_32ea = 0x32ea, + BNXT_ULP_ACT_HID_32f2 = 0x32f2, + BNXT_ULP_ACT_HID_52ea = 0x52ea, + BNXT_ULP_ACT_HID_4c72 = 0x4c72, + BNXT_ULP_ACT_HID_336a = 0x336a, + BNXT_ULP_ACT_HID_6c72 = 0x6c72, + BNXT_ULP_ACT_HID_4cf2 = 0x4cf2, + BNXT_ULP_ACT_HID_32fa = 0x32fa, + BNXT_ULP_ACT_HID_3302 = 0x3302, + BNXT_ULP_ACT_HID_52fa = 0x52fa, + BNXT_ULP_ACT_HID_4c82 = 0x4c82, + BNXT_ULP_ACT_HID_337a = 0x337a, + BNXT_ULP_ACT_HID_6c82 = 0x6c82, + BNXT_ULP_ACT_HID_4d02 = 0x4d02, + BNXT_ULP_ACT_HID_0808 = 0x0808, + BNXT_ULP_ACT_HID_1008 = 0x1008, + BNXT_ULP_ACT_HID_1808 = 0x1808, + BNXT_ULP_ACT_HID_0818 = 0x0818, + BNXT_ULP_ACT_HID_1018 = 0x1018, + BNXT_ULP_ACT_HID_1818 = 0x1818, + BNXT_ULP_ACT_HID_0880 = 0x0880, + BNXT_ULP_ACT_HID_1080 = 0x1080, + BNXT_ULP_ACT_HID_1880 = 0x1880, + BNXT_ULP_ACT_HID_0890 = 0x0890, + BNXT_ULP_ACT_HID_1090 = 0x1090, + BNXT_ULP_ACT_HID_1890 = 0x1890, + BNXT_ULP_ACT_HID_3af2 = 0x3af2, + BNXT_ULP_ACT_HID_42f2 = 0x42f2, + BNXT_ULP_ACT_HID_4af2 = 0x4af2, + BNXT_ULP_ACT_HID_3b02 = 0x3b02, + BNXT_ULP_ACT_HID_4302 = 0x4302, + BNXT_ULP_ACT_HID_4b02 = 0x4b02, + BNXT_ULP_ACT_HID_3b6a = 0x3b6a, + BNXT_ULP_ACT_HID_436a = 0x436a, + BNXT_ULP_ACT_HID_4b6a = 0x4b6a, + BNXT_ULP_ACT_HID_3b7a = 0x3b7a, + BNXT_ULP_ACT_HID_437a = 0x437a, + BNXT_ULP_ACT_HID_4b7a = 0x4b7a, + BNXT_ULP_ACT_HID_640d = 0x640d, + BNXT_ULP_ACT_HID_641d = 0x641d, + BNXT_ULP_ACT_HID_071a = 0x071a, + BNXT_ULP_ACT_HID_0800 = 0x0800, + BNXT_ULP_ACT_HID_1000 = 0x1000, + BNXT_ULP_ACT_HID_1800 = 0x1800, + BNXT_ULP_ACT_HID_0810 = 0x0810, + BNXT_ULP_ACT_HID_1010 = 0x1010, + BNXT_ULP_ACT_HID_1810 = 0x1810, + BNXT_ULP_ACT_HID_1110 = 0x1110, + BNXT_ULP_ACT_HID_4420 = 0x4420, + BNXT_ULP_ACT_HID_2220 = 0x2220, + BNXT_ULP_ACT_HID_0c84 = 0x0c84, + BNXT_ULP_ACT_HID_3f94 = 0x3f94, + BNXT_ULP_ACT_HID_3330 = 0x3330, + BNXT_ULP_ACT_HID_50a4 = 0x50a4, + BNXT_ULP_ACT_HID_1910 = 0x1910, + BNXT_ULP_ACT_HID_4c20 = 0x4c20, + BNXT_ULP_ACT_HID_2a20 = 0x2a20, + BNXT_ULP_ACT_HID_1484 = 0x1484, + BNXT_ULP_ACT_HID_4794 = 0x4794, + BNXT_ULP_ACT_HID_3b30 = 0x3b30, + BNXT_ULP_ACT_HID_58a4 = 0x58a4, + BNXT_ULP_ACT_HID_2110 = 0x2110, + BNXT_ULP_ACT_HID_5420 = 0x5420, + BNXT_ULP_ACT_HID_3220 = 0x3220, + BNXT_ULP_ACT_HID_1c84 = 0x1c84, + BNXT_ULP_ACT_HID_4f94 = 0x4f94, + BNXT_ULP_ACT_HID_4330 = 0x4330, + BNXT_ULP_ACT_HID_60a4 = 0x60a4, + BNXT_ULP_ACT_HID_2910 = 0x2910, + BNXT_ULP_ACT_HID_5c20 = 0x5c20, + BNXT_ULP_ACT_HID_3a20 = 0x3a20, + BNXT_ULP_ACT_HID_2484 = 0x2484, + BNXT_ULP_ACT_HID_5794 = 0x5794, + BNXT_ULP_ACT_HID_4b30 = 0x4b30, + BNXT_ULP_ACT_HID_68a4 = 0x68a4, + BNXT_ULP_ACT_HID_1120 = 0x1120, + BNXT_ULP_ACT_HID_4430 = 0x4430, + BNXT_ULP_ACT_HID_2230 = 0x2230, + BNXT_ULP_ACT_HID_0c94 = 0x0c94, + BNXT_ULP_ACT_HID_3fa4 = 0x3fa4, + BNXT_ULP_ACT_HID_3340 = 0x3340, + BNXT_ULP_ACT_HID_50b4 = 0x50b4, + BNXT_ULP_ACT_HID_1920 = 0x1920, + BNXT_ULP_ACT_HID_4c30 = 0x4c30, + BNXT_ULP_ACT_HID_2a30 = 0x2a30, + BNXT_ULP_ACT_HID_1494 = 0x1494, + BNXT_ULP_ACT_HID_47a4 = 0x47a4, + BNXT_ULP_ACT_HID_3b40 = 0x3b40, + BNXT_ULP_ACT_HID_58b4 = 0x58b4, + BNXT_ULP_ACT_HID_2120 = 0x2120, + BNXT_ULP_ACT_HID_5430 = 0x5430, + BNXT_ULP_ACT_HID_3230 = 0x3230, + BNXT_ULP_ACT_HID_1c94 = 0x1c94, + BNXT_ULP_ACT_HID_4fa4 = 0x4fa4, + BNXT_ULP_ACT_HID_4340 = 0x4340, + BNXT_ULP_ACT_HID_60b4 = 0x60b4, + BNXT_ULP_ACT_HID_2920 = 0x2920, + BNXT_ULP_ACT_HID_5c30 = 0x5c30, + BNXT_ULP_ACT_HID_3a30 = 0x3a30, + BNXT_ULP_ACT_HID_2494 = 0x2494, + BNXT_ULP_ACT_HID_57a4 = 0x57a4, + BNXT_ULP_ACT_HID_4b40 = 0x4b40, + BNXT_ULP_ACT_HID_68b4 = 0x68b4, + BNXT_ULP_ACT_HID_2a98 = 0x2a98, + BNXT_ULP_ACT_HID_5da8 = 0x5da8, + BNXT_ULP_ACT_HID_3ba8 = 0x3ba8, + BNXT_ULP_ACT_HID_260c = 0x260c, + BNXT_ULP_ACT_HID_591c = 0x591c, + BNXT_ULP_ACT_HID_6a2c = 0x6a2c, + BNXT_ULP_ACT_HID_2aa8 = 0x2aa8, + BNXT_ULP_ACT_HID_5db8 = 0x5db8, + BNXT_ULP_ACT_HID_3bb8 = 0x3bb8, + BNXT_ULP_ACT_HID_261c = 0x261c, + BNXT_ULP_ACT_HID_592c = 0x592c, + BNXT_ULP_ACT_HID_6a3c = 0x6a3c, + BNXT_ULP_ACT_HID_3298 = 0x3298, + BNXT_ULP_ACT_HID_65a8 = 0x65a8, + BNXT_ULP_ACT_HID_43a8 = 0x43a8, + BNXT_ULP_ACT_HID_2e0c = 0x2e0c, + BNXT_ULP_ACT_HID_611c = 0x611c, + BNXT_ULP_ACT_HID_722c = 0x722c, + BNXT_ULP_ACT_HID_32a8 = 0x32a8, + BNXT_ULP_ACT_HID_65b8 = 0x65b8, + BNXT_ULP_ACT_HID_43b8 = 0x43b8, + BNXT_ULP_ACT_HID_2e1c = 0x2e1c, + BNXT_ULP_ACT_HID_612c = 0x612c, + BNXT_ULP_ACT_HID_723c = 0x723c, + BNXT_ULP_ACT_HID_3a98 = 0x3a98, + BNXT_ULP_ACT_HID_6da8 = 0x6da8, + BNXT_ULP_ACT_HID_4ba8 = 0x4ba8, + BNXT_ULP_ACT_HID_360c = 0x360c, + BNXT_ULP_ACT_HID_691c = 0x691c, + BNXT_ULP_ACT_HID_7a2c = 0x7a2c, + BNXT_ULP_ACT_HID_3aa8 = 0x3aa8, + BNXT_ULP_ACT_HID_6db8 = 0x6db8, + BNXT_ULP_ACT_HID_4bb8 = 0x4bb8, + BNXT_ULP_ACT_HID_361c = 0x361c, + BNXT_ULP_ACT_HID_692c = 0x692c, + BNXT_ULP_ACT_HID_7a3c = 0x7a3c, + BNXT_ULP_ACT_HID_4298 = 0x4298, + BNXT_ULP_ACT_HID_75a8 = 0x75a8, + BNXT_ULP_ACT_HID_53a8 = 0x53a8, + BNXT_ULP_ACT_HID_3e0c = 0x3e0c, + BNXT_ULP_ACT_HID_711c = 0x711c, + BNXT_ULP_ACT_HID_0670 = 0x0670, + BNXT_ULP_ACT_HID_42a8 = 0x42a8, + BNXT_ULP_ACT_HID_75b8 = 0x75b8, + BNXT_ULP_ACT_HID_53b8 = 0x53b8, + BNXT_ULP_ACT_HID_3e1c = 0x3e1c, + BNXT_ULP_ACT_HID_712c = 0x712c, + BNXT_ULP_ACT_HID_0680 = 0x0680, + BNXT_ULP_ACT_HID_3aea = 0x3aea, + BNXT_ULP_ACT_HID_42ea = 0x42ea, + BNXT_ULP_ACT_HID_4aea = 0x4aea, + BNXT_ULP_ACT_HID_3afa = 0x3afa, + BNXT_ULP_ACT_HID_42fa = 0x42fa, + BNXT_ULP_ACT_HID_4afa = 0x4afa, + BNXT_ULP_ACT_HID_43fa = 0x43fa, + BNXT_ULP_ACT_HID_770a = 0x770a, + BNXT_ULP_ACT_HID_550a = 0x550a, + BNXT_ULP_ACT_HID_3f6e = 0x3f6e, + BNXT_ULP_ACT_HID_727e = 0x727e, + BNXT_ULP_ACT_HID_661a = 0x661a, + BNXT_ULP_ACT_HID_07d2 = 0x07d2, + BNXT_ULP_ACT_HID_4bfa = 0x4bfa, + BNXT_ULP_ACT_HID_034e = 0x034e, + BNXT_ULP_ACT_HID_5d0a = 0x5d0a, + BNXT_ULP_ACT_HID_476e = 0x476e, + BNXT_ULP_ACT_HID_7a7e = 0x7a7e, + BNXT_ULP_ACT_HID_6e1a = 0x6e1a, + BNXT_ULP_ACT_HID_0fd2 = 0x0fd2, + BNXT_ULP_ACT_HID_53fa = 0x53fa, + BNXT_ULP_ACT_HID_0b4e = 0x0b4e, + BNXT_ULP_ACT_HID_650a = 0x650a, + BNXT_ULP_ACT_HID_4f6e = 0x4f6e, + BNXT_ULP_ACT_HID_06c2 = 0x06c2, + BNXT_ULP_ACT_HID_761a = 0x761a, + BNXT_ULP_ACT_HID_17d2 = 0x17d2, + BNXT_ULP_ACT_HID_5bfa = 0x5bfa, + BNXT_ULP_ACT_HID_134e = 0x134e, + BNXT_ULP_ACT_HID_6d0a = 0x6d0a, + BNXT_ULP_ACT_HID_576e = 0x576e, + BNXT_ULP_ACT_HID_0ec2 = 0x0ec2, + BNXT_ULP_ACT_HID_025e = 0x025e, + BNXT_ULP_ACT_HID_1fd2 = 0x1fd2, + BNXT_ULP_ACT_HID_440a = 0x440a, + BNXT_ULP_ACT_HID_771a = 0x771a, + BNXT_ULP_ACT_HID_551a = 0x551a, + BNXT_ULP_ACT_HID_3f7e = 0x3f7e, + BNXT_ULP_ACT_HID_728e = 0x728e, + BNXT_ULP_ACT_HID_662a = 0x662a, + BNXT_ULP_ACT_HID_07e2 = 0x07e2, + BNXT_ULP_ACT_HID_4c0a = 0x4c0a, + BNXT_ULP_ACT_HID_035e = 0x035e, + BNXT_ULP_ACT_HID_5d1a = 0x5d1a, + BNXT_ULP_ACT_HID_477e = 0x477e, + BNXT_ULP_ACT_HID_7a8e = 0x7a8e, + BNXT_ULP_ACT_HID_6e2a = 0x6e2a, + BNXT_ULP_ACT_HID_0fe2 = 0x0fe2, + BNXT_ULP_ACT_HID_540a = 0x540a, + BNXT_ULP_ACT_HID_0b5e = 0x0b5e, + BNXT_ULP_ACT_HID_651a = 0x651a, + BNXT_ULP_ACT_HID_4f7e = 0x4f7e, + BNXT_ULP_ACT_HID_06d2 = 0x06d2, + BNXT_ULP_ACT_HID_762a = 0x762a, + BNXT_ULP_ACT_HID_17e2 = 0x17e2, + BNXT_ULP_ACT_HID_5c0a = 0x5c0a, + BNXT_ULP_ACT_HID_135e = 0x135e, + BNXT_ULP_ACT_HID_6d1a = 0x6d1a, + BNXT_ULP_ACT_HID_577e = 0x577e, + BNXT_ULP_ACT_HID_0ed2 = 0x0ed2, + BNXT_ULP_ACT_HID_026e = 0x026e, + BNXT_ULP_ACT_HID_1fe2 = 0x1fe2, + BNXT_ULP_ACT_HID_5d82 = 0x5d82, + BNXT_ULP_ACT_HID_14d6 = 0x14d6, + BNXT_ULP_ACT_HID_6e92 = 0x6e92, + BNXT_ULP_ACT_HID_58f6 = 0x58f6, + BNXT_ULP_ACT_HID_104a = 0x104a, + BNXT_ULP_ACT_HID_215a = 0x215a, + BNXT_ULP_ACT_HID_5d92 = 0x5d92, + BNXT_ULP_ACT_HID_14e6 = 0x14e6, + BNXT_ULP_ACT_HID_6ea2 = 0x6ea2, + BNXT_ULP_ACT_HID_5906 = 0x5906, + BNXT_ULP_ACT_HID_105a = 0x105a, + BNXT_ULP_ACT_HID_216a = 0x216a, + BNXT_ULP_ACT_HID_6582 = 0x6582, + BNXT_ULP_ACT_HID_1cd6 = 0x1cd6, + BNXT_ULP_ACT_HID_7692 = 0x7692, + BNXT_ULP_ACT_HID_60f6 = 0x60f6, + BNXT_ULP_ACT_HID_184a = 0x184a, + BNXT_ULP_ACT_HID_295a = 0x295a, + BNXT_ULP_ACT_HID_6592 = 0x6592, + BNXT_ULP_ACT_HID_1ce6 = 0x1ce6, + BNXT_ULP_ACT_HID_76a2 = 0x76a2, + BNXT_ULP_ACT_HID_6106 = 0x6106, + BNXT_ULP_ACT_HID_185a = 0x185a, + BNXT_ULP_ACT_HID_296a = 0x296a, + BNXT_ULP_ACT_HID_6d82 = 0x6d82, + BNXT_ULP_ACT_HID_24d6 = 0x24d6, + BNXT_ULP_ACT_HID_02d6 = 0x02d6, + BNXT_ULP_ACT_HID_68f6 = 0x68f6, + BNXT_ULP_ACT_HID_204a = 0x204a, + BNXT_ULP_ACT_HID_315a = 0x315a, + BNXT_ULP_ACT_HID_6d92 = 0x6d92, + BNXT_ULP_ACT_HID_24e6 = 0x24e6, + BNXT_ULP_ACT_HID_02e6 = 0x02e6, + BNXT_ULP_ACT_HID_6906 = 0x6906, + BNXT_ULP_ACT_HID_205a = 0x205a, + BNXT_ULP_ACT_HID_316a = 0x316a, + BNXT_ULP_ACT_HID_7582 = 0x7582, + BNXT_ULP_ACT_HID_2cd6 = 0x2cd6, + BNXT_ULP_ACT_HID_0ad6 = 0x0ad6, + BNXT_ULP_ACT_HID_70f6 = 0x70f6, + BNXT_ULP_ACT_HID_284a = 0x284a, + BNXT_ULP_ACT_HID_395a = 0x395a, + BNXT_ULP_ACT_HID_7592 = 0x7592, + BNXT_ULP_ACT_HID_2ce6 = 0x2ce6, + BNXT_ULP_ACT_HID_0ae6 = 0x0ae6, + BNXT_ULP_ACT_HID_7106 = 0x7106, + BNXT_ULP_ACT_HID_285a = 0x285a, + BNXT_ULP_ACT_HID_396a = 0x396a, + BNXT_ULP_ACT_HID_0020 = 0x0020, + BNXT_ULP_ACT_HID_0030 = 0x0030, + BNXT_ULP_ACT_HID_65d4 = 0x65d4, + BNXT_ULP_ACT_HID_65e4 = 0x65e4, + BNXT_ULP_ACT_HID_330a = 0x330a, + BNXT_ULP_ACT_HID_331a = 0x331a, + BNXT_ULP_ACT_HID_1cfe = 0x1cfe, + BNXT_ULP_ACT_HID_1d0e = 0x1d0e, + BNXT_ULP_ACT_HID_1474 = 0x1474, + BNXT_ULP_ACT_HID_4838 = 0x4838, + BNXT_ULP_ACT_HID_6458 = 0x6458, + BNXT_ULP_ACT_HID_1c68 = 0x1c68, + BNXT_ULP_ACT_HID_6c34 = 0x6c34, + BNXT_ULP_ACT_HID_5d08 = 0x5d08, + BNXT_ULP_ACT_HID_5d10 = 0x5d10, + BNXT_ULP_ACT_HID_5d20 = 0x5d20, + BNXT_ULP_ACT_HID_2e18 = 0x2e18, + BNXT_ULP_ACT_HID_29d4 = 0x29d4, + BNXT_ULP_ACT_HID_7690 = 0x7690, + BNXT_ULP_ACT_HID_47a0 = 0x47a0, + BNXT_ULP_ACT_HID_435c = 0x435c, + BNXT_ULP_ACT_HID_5d18 = 0x5d18, + BNXT_ULP_ACT_HID_2e28 = 0x2e28, + BNXT_ULP_ACT_HID_29e4 = 0x29e4, + BNXT_ULP_ACT_HID_76a0 = 0x76a0, + BNXT_ULP_ACT_HID_47b0 = 0x47b0, + BNXT_ULP_ACT_HID_436c = 0x436c, + BNXT_ULP_ACT_HID_1436 = 0x1436, + BNXT_ULP_ACT_HID_143e = 0x143e, + BNXT_ULP_ACT_HID_144e = 0x144e, + BNXT_ULP_ACT_HID_6102 = 0x6102, + BNXT_ULP_ACT_HID_5cbe = 0x5cbe, + BNXT_ULP_ACT_HID_2dbe = 0x2dbe, + BNXT_ULP_ACT_HID_7a8a = 0x7a8a, + BNXT_ULP_ACT_HID_7646 = 0x7646, + BNXT_ULP_ACT_HID_1446 = 0x1446, + BNXT_ULP_ACT_HID_6112 = 0x6112, + BNXT_ULP_ACT_HID_5cce = 0x5cce, + BNXT_ULP_ACT_HID_2dce = 0x2dce, + BNXT_ULP_ACT_HID_7a9a = 0x7a9a, + BNXT_ULP_ACT_HID_7656 = 0x7656, + BNXT_ULP_ACT_HID_6508 = 0x6508, + BNXT_ULP_ACT_HID_6d08 = 0x6d08, + BNXT_ULP_ACT_HID_7508 = 0x7508, + BNXT_ULP_ACT_HID_6518 = 0x6518, + BNXT_ULP_ACT_HID_6d18 = 0x6d18, + BNXT_ULP_ACT_HID_7518 = 0x7518, + BNXT_ULP_ACT_HID_6e18 = 0x6e18, + BNXT_ULP_ACT_HID_256c = 0x256c, + BNXT_ULP_ACT_HID_036c = 0x036c, + BNXT_ULP_ACT_HID_698c = 0x698c, + BNXT_ULP_ACT_HID_20e0 = 0x20e0, + BNXT_ULP_ACT_HID_31f0 = 0x31f0, + BNXT_ULP_ACT_HID_7618 = 0x7618, + BNXT_ULP_ACT_HID_2d6c = 0x2d6c, + BNXT_ULP_ACT_HID_0b6c = 0x0b6c, + BNXT_ULP_ACT_HID_718c = 0x718c, + BNXT_ULP_ACT_HID_28e0 = 0x28e0, + BNXT_ULP_ACT_HID_39f0 = 0x39f0, + BNXT_ULP_ACT_HID_025c = 0x025c, + BNXT_ULP_ACT_HID_356c = 0x356c, + BNXT_ULP_ACT_HID_136c = 0x136c, + BNXT_ULP_ACT_HID_798c = 0x798c, + BNXT_ULP_ACT_HID_30e0 = 0x30e0, + BNXT_ULP_ACT_HID_41f0 = 0x41f0, + BNXT_ULP_ACT_HID_0a5c = 0x0a5c, + BNXT_ULP_ACT_HID_3d6c = 0x3d6c, + BNXT_ULP_ACT_HID_1b6c = 0x1b6c, + BNXT_ULP_ACT_HID_05d0 = 0x05d0, + BNXT_ULP_ACT_HID_38e0 = 0x38e0, + BNXT_ULP_ACT_HID_49f0 = 0x49f0, + BNXT_ULP_ACT_HID_6e28 = 0x6e28, + BNXT_ULP_ACT_HID_257c = 0x257c, + BNXT_ULP_ACT_HID_037c = 0x037c, + BNXT_ULP_ACT_HID_699c = 0x699c, + BNXT_ULP_ACT_HID_20f0 = 0x20f0, + BNXT_ULP_ACT_HID_3200 = 0x3200, + BNXT_ULP_ACT_HID_7628 = 0x7628, + BNXT_ULP_ACT_HID_2d7c = 0x2d7c, + BNXT_ULP_ACT_HID_0b7c = 0x0b7c, + BNXT_ULP_ACT_HID_719c = 0x719c, + BNXT_ULP_ACT_HID_28f0 = 0x28f0, + BNXT_ULP_ACT_HID_3a00 = 0x3a00, + BNXT_ULP_ACT_HID_026c = 0x026c, + BNXT_ULP_ACT_HID_357c = 0x357c, + BNXT_ULP_ACT_HID_137c = 0x137c, + BNXT_ULP_ACT_HID_799c = 0x799c, + BNXT_ULP_ACT_HID_30f0 = 0x30f0, + BNXT_ULP_ACT_HID_4200 = 0x4200, + BNXT_ULP_ACT_HID_0a6c = 0x0a6c, + BNXT_ULP_ACT_HID_3d7c = 0x3d7c, + BNXT_ULP_ACT_HID_1b7c = 0x1b7c, + BNXT_ULP_ACT_HID_05e0 = 0x05e0, + BNXT_ULP_ACT_HID_38f0 = 0x38f0, + BNXT_ULP_ACT_HID_4a00 = 0x4a00, + BNXT_ULP_ACT_HID_0be4 = 0x0be4, + BNXT_ULP_ACT_HID_3ef4 = 0x3ef4, + BNXT_ULP_ACT_HID_1cf4 = 0x1cf4, + BNXT_ULP_ACT_HID_0758 = 0x0758, + BNXT_ULP_ACT_HID_3a68 = 0x3a68, + BNXT_ULP_ACT_HID_4b78 = 0x4b78, + BNXT_ULP_ACT_HID_0bf4 = 0x0bf4, + BNXT_ULP_ACT_HID_3f04 = 0x3f04, + BNXT_ULP_ACT_HID_1d04 = 0x1d04, + BNXT_ULP_ACT_HID_0768 = 0x0768, + BNXT_ULP_ACT_HID_3a78 = 0x3a78, + BNXT_ULP_ACT_HID_4b88 = 0x4b88, + BNXT_ULP_ACT_HID_46f4 = 0x46f4, + BNXT_ULP_ACT_HID_24f4 = 0x24f4, + BNXT_ULP_ACT_HID_0f58 = 0x0f58, + BNXT_ULP_ACT_HID_13e4 = 0x13e4, + BNXT_ULP_ACT_HID_4268 = 0x4268, + BNXT_ULP_ACT_HID_5378 = 0x5378, + BNXT_ULP_ACT_HID_13f4 = 0x13f4, + BNXT_ULP_ACT_HID_4704 = 0x4704, + BNXT_ULP_ACT_HID_2504 = 0x2504, + BNXT_ULP_ACT_HID_0f68 = 0x0f68, + BNXT_ULP_ACT_HID_4278 = 0x4278, + BNXT_ULP_ACT_HID_5388 = 0x5388, + BNXT_ULP_ACT_HID_1be4 = 0x1be4, + BNXT_ULP_ACT_HID_4ef4 = 0x4ef4, + BNXT_ULP_ACT_HID_2cf4 = 0x2cf4, + BNXT_ULP_ACT_HID_1758 = 0x1758, + BNXT_ULP_ACT_HID_4a68 = 0x4a68, + BNXT_ULP_ACT_HID_5b78 = 0x5b78, + BNXT_ULP_ACT_HID_1bf4 = 0x1bf4, + BNXT_ULP_ACT_HID_4f04 = 0x4f04, + BNXT_ULP_ACT_HID_2d04 = 0x2d04, + BNXT_ULP_ACT_HID_1768 = 0x1768, + BNXT_ULP_ACT_HID_4a78 = 0x4a78, + BNXT_ULP_ACT_HID_5b88 = 0x5b88, + BNXT_ULP_ACT_HID_23e4 = 0x23e4, + BNXT_ULP_ACT_HID_56f4 = 0x56f4, + BNXT_ULP_ACT_HID_34f4 = 0x34f4, + BNXT_ULP_ACT_HID_1f58 = 0x1f58, + BNXT_ULP_ACT_HID_5268 = 0x5268, + BNXT_ULP_ACT_HID_6378 = 0x6378, + BNXT_ULP_ACT_HID_23f4 = 0x23f4, + BNXT_ULP_ACT_HID_5704 = 0x5704, + BNXT_ULP_ACT_HID_3504 = 0x3504, + BNXT_ULP_ACT_HID_1f68 = 0x1f68, + BNXT_ULP_ACT_HID_5278 = 0x5278, + BNXT_ULP_ACT_HID_6388 = 0x6388, + BNXT_ULP_ACT_HID_1c36 = 0x1c36, + BNXT_ULP_ACT_HID_2436 = 0x2436, + BNXT_ULP_ACT_HID_2c36 = 0x2c36, + BNXT_ULP_ACT_HID_1c46 = 0x1c46, + BNXT_ULP_ACT_HID_2446 = 0x2446, + BNXT_ULP_ACT_HID_2c46 = 0x2c46, + BNXT_ULP_ACT_HID_2546 = 0x2546, + BNXT_ULP_ACT_HID_5856 = 0x5856, + BNXT_ULP_ACT_HID_3656 = 0x3656, + BNXT_ULP_ACT_HID_20ba = 0x20ba, + BNXT_ULP_ACT_HID_53ca = 0x53ca, + BNXT_ULP_ACT_HID_64da = 0x64da, + BNXT_ULP_ACT_HID_2d46 = 0x2d46, + BNXT_ULP_ACT_HID_6056 = 0x6056, + BNXT_ULP_ACT_HID_3e56 = 0x3e56, + BNXT_ULP_ACT_HID_28ba = 0x28ba, + BNXT_ULP_ACT_HID_5bca = 0x5bca, + BNXT_ULP_ACT_HID_6cda = 0x6cda, + BNXT_ULP_ACT_HID_3546 = 0x3546, + BNXT_ULP_ACT_HID_6856 = 0x6856, + BNXT_ULP_ACT_HID_4656 = 0x4656, + BNXT_ULP_ACT_HID_30ba = 0x30ba, + BNXT_ULP_ACT_HID_63ca = 0x63ca, + BNXT_ULP_ACT_HID_74da = 0x74da, + BNXT_ULP_ACT_HID_3d46 = 0x3d46, + BNXT_ULP_ACT_HID_7056 = 0x7056, + BNXT_ULP_ACT_HID_4e56 = 0x4e56, + BNXT_ULP_ACT_HID_38ba = 0x38ba, + BNXT_ULP_ACT_HID_6bca = 0x6bca, + BNXT_ULP_ACT_HID_011e = 0x011e, + BNXT_ULP_ACT_HID_2556 = 0x2556, + BNXT_ULP_ACT_HID_5866 = 0x5866, + BNXT_ULP_ACT_HID_3666 = 0x3666, + BNXT_ULP_ACT_HID_20ca = 0x20ca, + BNXT_ULP_ACT_HID_53da = 0x53da, + BNXT_ULP_ACT_HID_64ea = 0x64ea, + BNXT_ULP_ACT_HID_2d56 = 0x2d56, + BNXT_ULP_ACT_HID_6066 = 0x6066, + BNXT_ULP_ACT_HID_3e66 = 0x3e66, + BNXT_ULP_ACT_HID_28ca = 0x28ca, + BNXT_ULP_ACT_HID_5bda = 0x5bda, + BNXT_ULP_ACT_HID_6cea = 0x6cea, + BNXT_ULP_ACT_HID_3556 = 0x3556, + BNXT_ULP_ACT_HID_6866 = 0x6866, + BNXT_ULP_ACT_HID_4666 = 0x4666, + BNXT_ULP_ACT_HID_30ca = 0x30ca, + BNXT_ULP_ACT_HID_63da = 0x63da, + BNXT_ULP_ACT_HID_74ea = 0x74ea, + BNXT_ULP_ACT_HID_3d56 = 0x3d56, + BNXT_ULP_ACT_HID_7066 = 0x7066, + BNXT_ULP_ACT_HID_4e66 = 0x4e66, + BNXT_ULP_ACT_HID_38ca = 0x38ca, + BNXT_ULP_ACT_HID_6bda = 0x6bda, + BNXT_ULP_ACT_HID_012e = 0x012e, + BNXT_ULP_ACT_HID_3ece = 0x3ece, + BNXT_ULP_ACT_HID_71de = 0x71de, + BNXT_ULP_ACT_HID_4fde = 0x4fde, + BNXT_ULP_ACT_HID_3a42 = 0x3a42, + BNXT_ULP_ACT_HID_6d52 = 0x6d52, + BNXT_ULP_ACT_HID_02a6 = 0x02a6, + BNXT_ULP_ACT_HID_3ede = 0x3ede, + BNXT_ULP_ACT_HID_71ee = 0x71ee, + BNXT_ULP_ACT_HID_4fee = 0x4fee, + BNXT_ULP_ACT_HID_3a52 = 0x3a52, + BNXT_ULP_ACT_HID_6d62 = 0x6d62, + BNXT_ULP_ACT_HID_02b6 = 0x02b6, + BNXT_ULP_ACT_HID_79de = 0x79de, + BNXT_ULP_ACT_HID_57de = 0x57de, + BNXT_ULP_ACT_HID_4242 = 0x4242, + BNXT_ULP_ACT_HID_46ce = 0x46ce, + BNXT_ULP_ACT_HID_7552 = 0x7552, + BNXT_ULP_ACT_HID_0aa6 = 0x0aa6, + BNXT_ULP_ACT_HID_46de = 0x46de, + BNXT_ULP_ACT_HID_79ee = 0x79ee, + BNXT_ULP_ACT_HID_57ee = 0x57ee, + BNXT_ULP_ACT_HID_4252 = 0x4252, + BNXT_ULP_ACT_HID_7562 = 0x7562, + BNXT_ULP_ACT_HID_0ab6 = 0x0ab6, + BNXT_ULP_ACT_HID_4ece = 0x4ece, BNXT_ULP_ACT_HID_0622 = 0x0622, - BNXT_ULP_ACT_HID_0454 = 0x0454, - BNXT_ULP_ACT_HID_0064 = 0x0064, - BNXT_ULP_ACT_HID_0614 = 0x0614, - BNXT_ULP_ACT_HID_0615 = 0x0615, - BNXT_ULP_ACT_HID_02ab = 0x02ab, - BNXT_ULP_ACT_HID_0056 = 0x0056, - BNXT_ULP_ACT_HID_0624 = 0x0624, - BNXT_ULP_ACT_HID_0456 = 0x0456, - BNXT_ULP_ACT_HID_0066 = 0x0066, - BNXT_ULP_ACT_HID_048d = 0x048d, - BNXT_ULP_ACT_HID_048f = 0x048f, - BNXT_ULP_ACT_HID_04bc = 0x04bc, - BNXT_ULP_ACT_HID_00a9 = 0x00a9, - BNXT_ULP_ACT_HID_020f = 0x020f, - BNXT_ULP_ACT_HID_0153 = 0x0153, - BNXT_ULP_ACT_HID_04a9 = 0x04a9, - BNXT_ULP_ACT_HID_01fc = 0x01fc, - BNXT_ULP_ACT_HID_04be = 0x04be, - BNXT_ULP_ACT_HID_00ab = 0x00ab, - BNXT_ULP_ACT_HID_0211 = 0x0211, - BNXT_ULP_ACT_HID_0155 = 0x0155, - BNXT_ULP_ACT_HID_04ab = 0x04ab, - BNXT_ULP_ACT_HID_01fe = 0x01fe, - BNXT_ULP_ACT_HID_0667 = 0x0667, - BNXT_ULP_ACT_HID_0254 = 0x0254, - BNXT_ULP_ACT_HID_03ba = 0x03ba, - BNXT_ULP_ACT_HID_02fe = 0x02fe, - BNXT_ULP_ACT_HID_0654 = 0x0654, - BNXT_ULP_ACT_HID_03a7 = 0x03a7, - BNXT_ULP_ACT_HID_0669 = 0x0669, - BNXT_ULP_ACT_HID_0256 = 0x0256, - BNXT_ULP_ACT_HID_03bc = 0x03bc, - BNXT_ULP_ACT_HID_0300 = 0x0300, - BNXT_ULP_ACT_HID_0656 = 0x0656, - BNXT_ULP_ACT_HID_03a9 = 0x03a9, - BNXT_ULP_ACT_HID_021b = 0x021b, - BNXT_ULP_ACT_HID_021c = 0x021c, - BNXT_ULP_ACT_HID_021e = 0x021e, - BNXT_ULP_ACT_HID_063f = 0x063f, - BNXT_ULP_ACT_HID_0510 = 0x0510, - BNXT_ULP_ACT_HID_03c6 = 0x03c6, - BNXT_ULP_ACT_HID_0082 = 0x0082, - BNXT_ULP_ACT_HID_06bb = 0x06bb, - BNXT_ULP_ACT_HID_021d = 0x021d, - BNXT_ULP_ACT_HID_0641 = 0x0641, - BNXT_ULP_ACT_HID_0512 = 0x0512, - BNXT_ULP_ACT_HID_03c8 = 0x03c8, - BNXT_ULP_ACT_HID_0084 = 0x0084, - BNXT_ULP_ACT_HID_06bd = 0x06bd, - BNXT_ULP_ACT_HID_06d7 = 0x06d7, - BNXT_ULP_ACT_HID_02c4 = 0x02c4, - BNXT_ULP_ACT_HID_042a = 0x042a, - BNXT_ULP_ACT_HID_036e = 0x036e, - BNXT_ULP_ACT_HID_06c4 = 0x06c4, - BNXT_ULP_ACT_HID_0417 = 0x0417, - BNXT_ULP_ACT_HID_06d9 = 0x06d9, - BNXT_ULP_ACT_HID_02c6 = 0x02c6, - BNXT_ULP_ACT_HID_042c = 0x042c, - BNXT_ULP_ACT_HID_0370 = 0x0370, - BNXT_ULP_ACT_HID_06c6 = 0x06c6, - BNXT_ULP_ACT_HID_0419 = 0x0419, - BNXT_ULP_ACT_HID_0119 = 0x0119, - BNXT_ULP_ACT_HID_046f = 0x046f, - BNXT_ULP_ACT_HID_05d5 = 0x05d5, - BNXT_ULP_ACT_HID_0519 = 0x0519, - BNXT_ULP_ACT_HID_0106 = 0x0106, - BNXT_ULP_ACT_HID_05c2 = 0x05c2, - BNXT_ULP_ACT_HID_011b = 0x011b, - BNXT_ULP_ACT_HID_0471 = 0x0471, - BNXT_ULP_ACT_HID_05d7 = 0x05d7, - BNXT_ULP_ACT_HID_051b = 0x051b, - BNXT_ULP_ACT_HID_0108 = 0x0108, - BNXT_ULP_ACT_HID_05c4 = 0x05c4, - BNXT_ULP_ACT_HID_00a2 = 0x00a2, - BNXT_ULP_ACT_HID_00a4 = 0x00a4 + BNXT_ULP_ACT_HID_5fde = 0x5fde, + BNXT_ULP_ACT_HID_4a42 = 0x4a42, + BNXT_ULP_ACT_HID_0196 = 0x0196, + BNXT_ULP_ACT_HID_12a6 = 0x12a6, + BNXT_ULP_ACT_HID_4ede = 0x4ede, + BNXT_ULP_ACT_HID_0632 = 0x0632, + BNXT_ULP_ACT_HID_5fee = 0x5fee, + BNXT_ULP_ACT_HID_4a52 = 0x4a52, + BNXT_ULP_ACT_HID_01a6 = 0x01a6, + BNXT_ULP_ACT_HID_12b6 = 0x12b6, + BNXT_ULP_ACT_HID_56ce = 0x56ce, + BNXT_ULP_ACT_HID_0e22 = 0x0e22, + BNXT_ULP_ACT_HID_67de = 0x67de, + BNXT_ULP_ACT_HID_5242 = 0x5242, + BNXT_ULP_ACT_HID_0996 = 0x0996, + BNXT_ULP_ACT_HID_1aa6 = 0x1aa6, + BNXT_ULP_ACT_HID_56de = 0x56de, + BNXT_ULP_ACT_HID_0e32 = 0x0e32, + BNXT_ULP_ACT_HID_67ee = 0x67ee, + BNXT_ULP_ACT_HID_5252 = 0x5252, + BNXT_ULP_ACT_HID_09a6 = 0x09a6, + BNXT_ULP_ACT_HID_1ab6 = 0x1ab6, + BNXT_ULP_ACT_HID_31d0 = 0x31d0, + BNXT_ULP_ACT_HID_31e0 = 0x31e0, + BNXT_ULP_ACT_HID_39d0 = 0x39d0, + BNXT_ULP_ACT_HID_39e0 = 0x39e0, + BNXT_ULP_ACT_HID_41d0 = 0x41d0, + BNXT_ULP_ACT_HID_41e0 = 0x41e0, + BNXT_ULP_ACT_HID_49d0 = 0x49d0, + BNXT_ULP_ACT_HID_49e0 = 0x49e0, + BNXT_ULP_ACT_HID_64ba = 0x64ba, + BNXT_ULP_ACT_HID_64ca = 0x64ca, + BNXT_ULP_ACT_HID_6cba = 0x6cba, + BNXT_ULP_ACT_HID_6cca = 0x6cca, + BNXT_ULP_ACT_HID_74ba = 0x74ba, + BNXT_ULP_ACT_HID_74ca = 0x74ca, + BNXT_ULP_ACT_HID_00fe = 0x00fe, + BNXT_ULP_ACT_HID_010e = 0x010e, + BNXT_ULP_ACT_HID_331c = 0x331c, + BNXT_ULP_ACT_HID_332c = 0x332c, + BNXT_ULP_ACT_HID_6706 = 0x6706, + BNXT_ULP_ACT_HID_6716 = 0x6716, + BNXT_ULP_ACT_HID_1b6d = 0x1b6d, + BNXT_ULP_ACT_HID_1b7d = 0x1b7d, + BNXT_ULP_ACT_HID_641a = 0x641a }; enum bnxt_ulp_df_tpl { @@ -2618,3 +3879,4 @@ enum bnxt_ulp_df_tpl { }; #endif + diff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_field.h b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_field.h index 0a5c7e3d6e..73cd7762e5 100644 --- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_field.h +++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_field.h @@ -1,16 +1,18 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2014-2021 Broadcom + * Copyright(c) 2014-2023 Broadcom * All rights reserved. */ -/* date: Fri Aug 6 11:15:47 2021 */ - #ifndef ULP_HDR_FIELD_ENUMS_H_ #define ULP_HDR_FIELD_ENUMS_H_ enum bnxt_ulp_glb_hf { BNXT_ULP_GLB_HF_ID_WM, BNXT_ULP_GLB_HF_ID_SVIF_INDEX, + BNXT_ULP_GLB_HF_ID_O_ECPRI_TYPE, + BNXT_ULP_GLB_HF_ID_I_ECPRI_TYPE, + BNXT_ULP_GLB_HF_ID_O_ECPRI_ID, + BNXT_ULP_GLB_HF_ID_I_ECPRI_ID, BNXT_ULP_GLB_HF_ID_O_ETH_DMAC, BNXT_ULP_GLB_HF_ID_I_ETH_DMAC, BNXT_ULP_GLB_HF_ID_O_ETH_SMAC, @@ -65,6 +67,20 @@ enum bnxt_ulp_glb_hf { BNXT_ULP_GLB_HF_ID_I_IPV6_SRC_ADDR, BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR, BNXT_ULP_GLB_HF_ID_I_IPV6_DST_ADDR, + BNXT_ULP_GLB_HF_ID_O_SRV6_NEXT_HDR, + BNXT_ULP_GLB_HF_ID_I_SRV6_NEXT_HDR, + BNXT_ULP_GLB_HF_ID_O_SRV6_HDR_LEN, + BNXT_ULP_GLB_HF_ID_I_SRV6_HDR_LEN, + BNXT_ULP_GLB_HF_ID_O_SRV6_ROUTING_TYPE, + BNXT_ULP_GLB_HF_ID_I_SRV6_ROUTING_TYPE, + BNXT_ULP_GLB_HF_ID_O_SRV6_SEG_LEFT, + BNXT_ULP_GLB_HF_ID_I_SRV6_SEG_LEFT, + BNXT_ULP_GLB_HF_ID_O_SRV6_LAST_ENTRY, + BNXT_ULP_GLB_HF_ID_I_SRV6_LAST_ENTRY, + BNXT_ULP_GLB_HF_ID_O_SRV6_FLAGS, + BNXT_ULP_GLB_HF_ID_I_SRV6_FLAGS, + BNXT_ULP_GLB_HF_ID_O_SRV6_TAG, + BNXT_ULP_GLB_HF_ID_I_SRV6_TAG, BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT, BNXT_ULP_GLB_HF_ID_I_TCP_SRC_PORT, BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT, @@ -415,94 +431,80 @@ enum bnxt_ulp_hf_0_2_0_bitmask { BNXT_ULP_HF_0_2_0_BITMASK_O_ETH_DMAC = 0x2000000000000000, BNXT_ULP_HF_0_2_0_BITMASK_O_ETH_SMAC = 0x1000000000000000, BNXT_ULP_HF_0_2_0_BITMASK_O_ETH_TYPE = 0x0800000000000000, - BNXT_ULP_HF_0_2_0_BITMASK_O_IPV4_VER = 0x0400000000000000, - BNXT_ULP_HF_0_2_0_BITMASK_O_IPV4_TOS = 0x0200000000000000, - BNXT_ULP_HF_0_2_0_BITMASK_O_IPV4_LEN = 0x0100000000000000, - BNXT_ULP_HF_0_2_0_BITMASK_O_IPV4_FRAG_ID = 0x0080000000000000, - BNXT_ULP_HF_0_2_0_BITMASK_O_IPV4_FRAG_OFF = 0x0040000000000000, - BNXT_ULP_HF_0_2_0_BITMASK_O_IPV4_TTL = 0x0020000000000000, - BNXT_ULP_HF_0_2_0_BITMASK_O_IPV4_PROTO_ID = 0x0010000000000000, - BNXT_ULP_HF_0_2_0_BITMASK_O_IPV4_CSUM = 0x0008000000000000, - BNXT_ULP_HF_0_2_0_BITMASK_O_IPV4_SRC_ADDR = 0x0004000000000000, - BNXT_ULP_HF_0_2_0_BITMASK_O_IPV4_DST_ADDR = 0x0002000000000000, - BNXT_ULP_HF_0_2_0_BITMASK_O_UDP_SRC_PORT = 0x0001000000000000, - BNXT_ULP_HF_0_2_0_BITMASK_O_UDP_DST_PORT = 0x0000800000000000, - BNXT_ULP_HF_0_2_0_BITMASK_O_UDP_LENGTH = 0x0000400000000000, - BNXT_ULP_HF_0_2_0_BITMASK_O_UDP_CSUM = 0x0000200000000000, - BNXT_ULP_HF_0_2_0_BITMASK_T_VXLAN_FLAGS = 0x0000100000000000, - BNXT_ULP_HF_0_2_0_BITMASK_T_VXLAN_RSVD0 = 0x0000080000000000, - BNXT_ULP_HF_0_2_0_BITMASK_T_VXLAN_VNI = 0x0000040000000000, - BNXT_ULP_HF_0_2_0_BITMASK_T_VXLAN_RSVD1 = 0x0000020000000000 + BNXT_ULP_HF_0_2_0_BITMASK_O_IPV6_VER = 0x0400000000000000, + BNXT_ULP_HF_0_2_0_BITMASK_O_IPV6_TC = 0x0200000000000000, + BNXT_ULP_HF_0_2_0_BITMASK_O_IPV6_FLOW_LABEL = 0x0100000000000000, + BNXT_ULP_HF_0_2_0_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0080000000000000, + BNXT_ULP_HF_0_2_0_BITMASK_O_IPV6_PROTO_ID = 0x0040000000000000, + BNXT_ULP_HF_0_2_0_BITMASK_O_IPV6_TTL = 0x0020000000000000, + BNXT_ULP_HF_0_2_0_BITMASK_O_IPV6_SRC_ADDR = 0x0010000000000000, + BNXT_ULP_HF_0_2_0_BITMASK_O_IPV6_DST_ADDR = 0x0008000000000000, + BNXT_ULP_HF_0_2_0_BITMASK_O_UDP_SRC_PORT = 0x0004000000000000, + BNXT_ULP_HF_0_2_0_BITMASK_O_UDP_DST_PORT = 0x0002000000000000, + BNXT_ULP_HF_0_2_0_BITMASK_O_UDP_LENGTH = 0x0001000000000000, + BNXT_ULP_HF_0_2_0_BITMASK_O_UDP_CSUM = 0x0000800000000000, + BNXT_ULP_HF_0_2_0_BITMASK_T_VXLAN_FLAGS = 0x0000400000000000, + BNXT_ULP_HF_0_2_0_BITMASK_T_VXLAN_RSVD0 = 0x0000200000000000, + BNXT_ULP_HF_0_2_0_BITMASK_T_VXLAN_VNI = 0x0000100000000000, + BNXT_ULP_HF_0_2_0_BITMASK_T_VXLAN_RSVD1 = 0x0000080000000000 }; enum bnxt_ulp_hf_0_2_1_bitmask { BNXT_ULP_HF_0_2_1_BITMASK_WM = 0x8000000000000000, BNXT_ULP_HF_0_2_1_BITMASK_SVIF_INDEX = 0x4000000000000000, - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_VER = 0x2000000000000000, - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_TOS = 0x1000000000000000, - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_LEN = 0x0800000000000000, - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_FRAG_ID = 0x0400000000000000, - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_FRAG_OFF = 0x0200000000000000, - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_TTL = 0x0100000000000000, - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_PROTO_ID = 0x0080000000000000, - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_CSUM = 0x0040000000000000, - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR = 0x0020000000000000, - BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR = 0x0010000000000000, - BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_SRC_PORT = 0x0008000000000000, - BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_DST_PORT = 0x0004000000000000, - BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_LENGTH = 0x0002000000000000, - BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_CSUM = 0x0001000000000000, - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_FLAGS = 0x0000800000000000, - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_RSVD0 = 0x0000400000000000, - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI = 0x0000200000000000, - BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_RSVD1 = 0x0000100000000000, - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC = 0x0000080000000000, - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC = 0x0000040000000000, - BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_TYPE = 0x0000020000000000, - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_VER = 0x0000010000000000, - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_TC = 0x0000008000000000, - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_FLOW_LABEL = 0x0000004000000000, - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_PAYLOAD_LEN = 0x0000002000000000, - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_PROTO_ID = 0x0000001000000000, - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_TTL = 0x0000000800000000, - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR = 0x0000000400000000, - BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR = 0x0000000200000000 + BNXT_ULP_HF_0_2_1_BITMASK_O_ETH_DMAC = 0x2000000000000000, + BNXT_ULP_HF_0_2_1_BITMASK_O_ETH_SMAC = 0x1000000000000000, + BNXT_ULP_HF_0_2_1_BITMASK_O_ETH_TYPE = 0x0800000000000000, + BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_VER = 0x0400000000000000, + BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_TOS = 0x0200000000000000, + BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_LEN = 0x0100000000000000, + BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_FRAG_ID = 0x0080000000000000, + BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_FRAG_OFF = 0x0040000000000000, + BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_TTL = 0x0020000000000000, + BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_PROTO_ID = 0x0010000000000000, + BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_CSUM = 0x0008000000000000, + BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR = 0x0004000000000000, + BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR = 0x0002000000000000, + BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_SRC_PORT = 0x0001000000000000, + BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_DST_PORT = 0x0000800000000000, + BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_LENGTH = 0x0000400000000000, + BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_CSUM = 0x0000200000000000, + BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_FLAGS = 0x0000100000000000, + BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_RSVD0 = 0x0000080000000000, + BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI = 0x0000040000000000, + BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_RSVD1 = 0x0000020000000000 }; enum bnxt_ulp_hf_0_2_2_bitmask { BNXT_ULP_HF_0_2_2_BITMASK_WM = 0x8000000000000000, BNXT_ULP_HF_0_2_2_BITMASK_SVIF_INDEX = 0x4000000000000000, - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_VER = 0x2000000000000000, - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_TOS = 0x1000000000000000, - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_LEN = 0x0800000000000000, - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_FRAG_ID = 0x0400000000000000, - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_FRAG_OFF = 0x0200000000000000, - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_TTL = 0x0100000000000000, - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_PROTO_ID = 0x0080000000000000, - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_CSUM = 0x0040000000000000, - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR = 0x0020000000000000, - BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR = 0x0010000000000000, - BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_SRC_PORT = 0x0008000000000000, - BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT = 0x0004000000000000, - BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_LENGTH = 0x0002000000000000, - BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_CSUM = 0x0001000000000000, - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_FLAGS = 0x0000800000000000, - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_RSVD0 = 0x0000400000000000, - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI = 0x0000200000000000, - BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_RSVD1 = 0x0000100000000000, - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC = 0x0000080000000000, - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC = 0x0000040000000000, - BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_TYPE = 0x0000020000000000, - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_VER = 0x0000010000000000, - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_TOS = 0x0000008000000000, - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_LEN = 0x0000004000000000, - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_FRAG_ID = 0x0000002000000000, - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_FRAG_OFF = 0x0000001000000000, - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_TTL = 0x0000000800000000, - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_PROTO_ID = 0x0000000400000000, - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_CSUM = 0x0000000200000000, - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR = 0x0000000100000000, - BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR = 0x0000000080000000 + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_VER = 0x2000000000000000, + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_TC = 0x1000000000000000, + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_FLOW_LABEL = 0x0800000000000000, + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0400000000000000, + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_PROTO_ID = 0x0200000000000000, + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_TTL = 0x0100000000000000, + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR = 0x0080000000000000, + BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR = 0x0040000000000000, + BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_SRC_PORT = 0x0020000000000000, + BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT = 0x0010000000000000, + BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_LENGTH = 0x0008000000000000, + BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_CSUM = 0x0004000000000000, + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_FLAGS = 0x0002000000000000, + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_RSVD0 = 0x0001000000000000, + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI = 0x0000800000000000, + BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_RSVD1 = 0x0000400000000000, + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC = 0x0000200000000000, + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC = 0x0000100000000000, + BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_TYPE = 0x0000080000000000, + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_VER = 0x0000040000000000, + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_TC = 0x0000020000000000, + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_FLOW_LABEL = 0x0000010000000000, + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_PAYLOAD_LEN = 0x0000008000000000, + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_PROTO_ID = 0x0000004000000000, + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_TTL = 0x0000002000000000, + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR = 0x0000001000000000, + BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR = 0x0000000800000000 }; enum bnxt_ulp_hf_0_2_3_bitmask { @@ -536,61 +538,41 @@ enum bnxt_ulp_hf_0_2_3_bitmask { BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_PROTO_ID = 0x0000001000000000, BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_TTL = 0x0000000800000000, BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR = 0x0000000400000000, - BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR = 0x0000000200000000, - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT = 0x0000000100000000, - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT = 0x0000000080000000, - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SENT_SEQ = 0x0000000040000000, - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_RECV_ACK = 0x0000000020000000, - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DATA_OFF = 0x0000000010000000, - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_TCP_FLAGS = 0x0000000008000000, - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_RX_WIN = 0x0000000004000000, - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_CSUM = 0x0000000002000000, - BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_URP = 0x0000000001000000 + BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR = 0x0000000200000000 }; enum bnxt_ulp_hf_0_2_4_bitmask { BNXT_ULP_HF_0_2_4_BITMASK_WM = 0x8000000000000000, BNXT_ULP_HF_0_2_4_BITMASK_SVIF_INDEX = 0x4000000000000000, - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_VER = 0x2000000000000000, - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_TOS = 0x1000000000000000, - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_LEN = 0x0800000000000000, - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_FRAG_ID = 0x0400000000000000, - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_FRAG_OFF = 0x0200000000000000, - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_TTL = 0x0100000000000000, - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_PROTO_ID = 0x0080000000000000, - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_CSUM = 0x0040000000000000, - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR = 0x0020000000000000, - BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR = 0x0010000000000000, - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_SRC_PORT = 0x0008000000000000, - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT = 0x0004000000000000, - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_LENGTH = 0x0002000000000000, - BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_CSUM = 0x0001000000000000, - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_FLAGS = 0x0000800000000000, - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_RSVD0 = 0x0000400000000000, - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI = 0x0000200000000000, - BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_RSVD1 = 0x0000100000000000, - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC = 0x0000080000000000, - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC = 0x0000040000000000, - BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_TYPE = 0x0000020000000000, - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_VER = 0x0000010000000000, - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_TOS = 0x0000008000000000, - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_LEN = 0x0000004000000000, - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_FRAG_ID = 0x0000002000000000, - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_FRAG_OFF = 0x0000001000000000, - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_TTL = 0x0000000800000000, - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_PROTO_ID = 0x0000000400000000, - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_CSUM = 0x0000000200000000, - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR = 0x0000000100000000, - BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR = 0x0000000080000000, - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT = 0x0000000040000000, - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT = 0x0000000020000000, - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SENT_SEQ = 0x0000000010000000, - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_RECV_ACK = 0x0000000008000000, - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DATA_OFF = 0x0000000004000000, - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_TCP_FLAGS = 0x0000000002000000, - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_RX_WIN = 0x0000000001000000, - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_CSUM = 0x0000000000800000, - BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_URP = 0x0000000000400000 + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_VER = 0x2000000000000000, + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_TC = 0x1000000000000000, + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_FLOW_LABEL = 0x0800000000000000, + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0400000000000000, + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_PROTO_ID = 0x0200000000000000, + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_TTL = 0x0100000000000000, + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR = 0x0080000000000000, + BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR = 0x0040000000000000, + BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_SRC_PORT = 0x0020000000000000, + BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT = 0x0010000000000000, + BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_LENGTH = 0x0008000000000000, + BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_CSUM = 0x0004000000000000, + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_FLAGS = 0x0002000000000000, + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_RSVD0 = 0x0001000000000000, + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI = 0x0000800000000000, + BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_RSVD1 = 0x0000400000000000, + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC = 0x0000200000000000, + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC = 0x0000100000000000, + BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_TYPE = 0x0000080000000000, + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_VER = 0x0000040000000000, + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_TOS = 0x0000020000000000, + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_LEN = 0x0000010000000000, + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_FRAG_ID = 0x0000008000000000, + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_FRAG_OFF = 0x0000004000000000, + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_TTL = 0x0000002000000000, + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_PROTO_ID = 0x0000001000000000, + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_CSUM = 0x0000000800000000, + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR = 0x0000000400000000, + BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR = 0x0000000200000000 }; enum bnxt_ulp_hf_0_2_5_bitmask { @@ -617,58 +599,57 @@ enum bnxt_ulp_hf_0_2_5_bitmask { BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC = 0x0000080000000000, BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC = 0x0000040000000000, BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_TYPE = 0x0000020000000000, - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_VER = 0x0000010000000000, - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_TC = 0x0000008000000000, - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_FLOW_LABEL = 0x0000004000000000, - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_PAYLOAD_LEN = 0x0000002000000000, - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_PROTO_ID = 0x0000001000000000, - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_TTL = 0x0000000800000000, - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR = 0x0000000400000000, - BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR = 0x0000000200000000, - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT = 0x0000000100000000, - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT = 0x0000000080000000, - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_LENGTH = 0x0000000040000000, - BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_CSUM = 0x0000000020000000 + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_VER = 0x0000010000000000, + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_TOS = 0x0000008000000000, + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_LEN = 0x0000004000000000, + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_FRAG_ID = 0x0000002000000000, + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_FRAG_OFF = 0x0000001000000000, + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_TTL = 0x0000000800000000, + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_PROTO_ID = 0x0000000400000000, + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_CSUM = 0x0000000200000000, + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR = 0x0000000100000000, + BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR = 0x0000000080000000 }; enum bnxt_ulp_hf_0_2_6_bitmask { BNXT_ULP_HF_0_2_6_BITMASK_WM = 0x8000000000000000, BNXT_ULP_HF_0_2_6_BITMASK_SVIF_INDEX = 0x4000000000000000, - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_VER = 0x2000000000000000, - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_TOS = 0x1000000000000000, - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_LEN = 0x0800000000000000, - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_FRAG_ID = 0x0400000000000000, - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_FRAG_OFF = 0x0200000000000000, - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_TTL = 0x0100000000000000, - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_PROTO_ID = 0x0080000000000000, - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_CSUM = 0x0040000000000000, - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR = 0x0020000000000000, - BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR = 0x0010000000000000, - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_SRC_PORT = 0x0008000000000000, - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT = 0x0004000000000000, - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_LENGTH = 0x0002000000000000, - BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_CSUM = 0x0001000000000000, - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_FLAGS = 0x0000800000000000, - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_RSVD0 = 0x0000400000000000, - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI = 0x0000200000000000, - BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_RSVD1 = 0x0000100000000000, - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC = 0x0000080000000000, - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC = 0x0000040000000000, - BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_TYPE = 0x0000020000000000, - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_VER = 0x0000010000000000, - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_TOS = 0x0000008000000000, - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_LEN = 0x0000004000000000, - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_FRAG_ID = 0x0000002000000000, - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_FRAG_OFF = 0x0000001000000000, - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_TTL = 0x0000000800000000, - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_PROTO_ID = 0x0000000400000000, - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_CSUM = 0x0000000200000000, - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR = 0x0000000100000000, - BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR = 0x0000000080000000, - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT = 0x0000000040000000, - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT = 0x0000000020000000, - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_LENGTH = 0x0000000010000000, - BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_CSUM = 0x0000000008000000 + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_VER = 0x2000000000000000, + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_TC = 0x1000000000000000, + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_FLOW_LABEL = 0x0800000000000000, + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0400000000000000, + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_PROTO_ID = 0x0200000000000000, + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_TTL = 0x0100000000000000, + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR = 0x0080000000000000, + BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR = 0x0040000000000000, + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_SRC_PORT = 0x0020000000000000, + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT = 0x0010000000000000, + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_LENGTH = 0x0008000000000000, + BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_CSUM = 0x0004000000000000, + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_FLAGS = 0x0002000000000000, + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_RSVD0 = 0x0001000000000000, + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI = 0x0000800000000000, + BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_RSVD1 = 0x0000400000000000, + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC = 0x0000200000000000, + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC = 0x0000100000000000, + BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_TYPE = 0x0000080000000000, + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_VER = 0x0000040000000000, + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_TC = 0x0000020000000000, + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_FLOW_LABEL = 0x0000010000000000, + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_PAYLOAD_LEN = 0x0000008000000000, + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_PROTO_ID = 0x0000004000000000, + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_TTL = 0x0000002000000000, + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR = 0x0000001000000000, + BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR = 0x0000000800000000, + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT = 0x0000000400000000, + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT = 0x0000000200000000, + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SENT_SEQ = 0x0000000100000000, + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_RECV_ACK = 0x0000000080000000, + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DATA_OFF = 0x0000000040000000, + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_TCP_FLAGS = 0x0000000020000000, + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_RX_WIN = 0x0000000010000000, + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_CSUM = 0x0000000008000000, + BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_URP = 0x0000000004000000 }; enum bnxt_ulp_hf_0_2_7_bitmask { @@ -695,21 +676,343 @@ enum bnxt_ulp_hf_0_2_7_bitmask { BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC = 0x0000080000000000, BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC = 0x0000040000000000, BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_TYPE = 0x0000020000000000, - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_VER = 0x0000010000000000, - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_TOS = 0x0000008000000000, - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_LEN = 0x0000004000000000, - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_FRAG_ID = 0x0000002000000000, - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_FRAG_OFF = 0x0000001000000000, - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_TTL = 0x0000000800000000, - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_PROTO_ID = 0x0000000400000000, - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_CSUM = 0x0000000200000000, - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR = 0x0000000100000000, - BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR = 0x0000000080000000, - BNXT_ULP_HF_0_2_7_BITMASK_I_ICMP_TYPE = 0x0000000040000000, - BNXT_ULP_HF_0_2_7_BITMASK_I_ICMP_CODE = 0x0000000020000000, - BNXT_ULP_HF_0_2_7_BITMASK_I_ICMP_CSUM = 0x0000000010000000, - BNXT_ULP_HF_0_2_7_BITMASK_I_ICMP_IDENT = 0x0000000008000000, - BNXT_ULP_HF_0_2_7_BITMASK_I_ICMP_SEQ_NUM = 0x0000000004000000 + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_VER = 0x0000010000000000, + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_TC = 0x0000008000000000, + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_FLOW_LABEL = 0x0000004000000000, + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_PAYLOAD_LEN = 0x0000002000000000, + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_PROTO_ID = 0x0000001000000000, + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_TTL = 0x0000000800000000, + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR = 0x0000000400000000, + BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR = 0x0000000200000000, + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT = 0x0000000100000000, + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT = 0x0000000080000000, + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SENT_SEQ = 0x0000000040000000, + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_RECV_ACK = 0x0000000020000000, + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DATA_OFF = 0x0000000010000000, + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_TCP_FLAGS = 0x0000000008000000, + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_RX_WIN = 0x0000000004000000, + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_CSUM = 0x0000000002000000, + BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_URP = 0x0000000001000000 +}; + +enum bnxt_ulp_hf_0_2_8_bitmask { + BNXT_ULP_HF_0_2_8_BITMASK_WM = 0x8000000000000000, + BNXT_ULP_HF_0_2_8_BITMASK_SVIF_INDEX = 0x4000000000000000, + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_VER = 0x2000000000000000, + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_TC = 0x1000000000000000, + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_FLOW_LABEL = 0x0800000000000000, + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0400000000000000, + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_PROTO_ID = 0x0200000000000000, + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_TTL = 0x0100000000000000, + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_SRC_ADDR = 0x0080000000000000, + BNXT_ULP_HF_0_2_8_BITMASK_O_IPV6_DST_ADDR = 0x0040000000000000, + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_SRC_PORT = 0x0020000000000000, + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_DST_PORT = 0x0010000000000000, + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_LENGTH = 0x0008000000000000, + BNXT_ULP_HF_0_2_8_BITMASK_O_UDP_CSUM = 0x0004000000000000, + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_FLAGS = 0x0002000000000000, + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_RSVD0 = 0x0001000000000000, + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_VNI = 0x0000800000000000, + BNXT_ULP_HF_0_2_8_BITMASK_T_VXLAN_RSVD1 = 0x0000400000000000, + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_DMAC = 0x0000200000000000, + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_SMAC = 0x0000100000000000, + BNXT_ULP_HF_0_2_8_BITMASK_I_ETH_TYPE = 0x0000080000000000, + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_VER = 0x0000040000000000, + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_TOS = 0x0000020000000000, + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_LEN = 0x0000010000000000, + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_FRAG_ID = 0x0000008000000000, + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_FRAG_OFF = 0x0000004000000000, + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_TTL = 0x0000002000000000, + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_PROTO_ID = 0x0000001000000000, + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_CSUM = 0x0000000800000000, + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_SRC_ADDR = 0x0000000400000000, + BNXT_ULP_HF_0_2_8_BITMASK_I_IPV4_DST_ADDR = 0x0000000200000000, + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SRC_PORT = 0x0000000100000000, + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DST_PORT = 0x0000000080000000, + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_SENT_SEQ = 0x0000000040000000, + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_RECV_ACK = 0x0000000020000000, + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_DATA_OFF = 0x0000000010000000, + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_TCP_FLAGS = 0x0000000008000000, + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_RX_WIN = 0x0000000004000000, + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_CSUM = 0x0000000002000000, + BNXT_ULP_HF_0_2_8_BITMASK_I_TCP_URP = 0x0000000001000000 +}; + +enum bnxt_ulp_hf_0_2_9_bitmask { + BNXT_ULP_HF_0_2_9_BITMASK_WM = 0x8000000000000000, + BNXT_ULP_HF_0_2_9_BITMASK_SVIF_INDEX = 0x4000000000000000, + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_VER = 0x2000000000000000, + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_TOS = 0x1000000000000000, + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_LEN = 0x0800000000000000, + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_FRAG_ID = 0x0400000000000000, + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_FRAG_OFF = 0x0200000000000000, + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_TTL = 0x0100000000000000, + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_PROTO_ID = 0x0080000000000000, + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_CSUM = 0x0040000000000000, + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_SRC_ADDR = 0x0020000000000000, + BNXT_ULP_HF_0_2_9_BITMASK_O_IPV4_DST_ADDR = 0x0010000000000000, + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_SRC_PORT = 0x0008000000000000, + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_DST_PORT = 0x0004000000000000, + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_LENGTH = 0x0002000000000000, + BNXT_ULP_HF_0_2_9_BITMASK_O_UDP_CSUM = 0x0001000000000000, + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_FLAGS = 0x0000800000000000, + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_RSVD0 = 0x0000400000000000, + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_VNI = 0x0000200000000000, + BNXT_ULP_HF_0_2_9_BITMASK_T_VXLAN_RSVD1 = 0x0000100000000000, + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_DMAC = 0x0000080000000000, + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_SMAC = 0x0000040000000000, + BNXT_ULP_HF_0_2_9_BITMASK_I_ETH_TYPE = 0x0000020000000000, + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_VER = 0x0000010000000000, + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_TOS = 0x0000008000000000, + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_LEN = 0x0000004000000000, + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_FRAG_ID = 0x0000002000000000, + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_FRAG_OFF = 0x0000001000000000, + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_TTL = 0x0000000800000000, + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_PROTO_ID = 0x0000000400000000, + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_CSUM = 0x0000000200000000, + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_SRC_ADDR = 0x0000000100000000, + BNXT_ULP_HF_0_2_9_BITMASK_I_IPV4_DST_ADDR = 0x0000000080000000, + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SRC_PORT = 0x0000000040000000, + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DST_PORT = 0x0000000020000000, + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_SENT_SEQ = 0x0000000010000000, + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_RECV_ACK = 0x0000000008000000, + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_DATA_OFF = 0x0000000004000000, + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_TCP_FLAGS = 0x0000000002000000, + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_RX_WIN = 0x0000000001000000, + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_CSUM = 0x0000000000800000, + BNXT_ULP_HF_0_2_9_BITMASK_I_TCP_URP = 0x0000000000400000 +}; + +enum bnxt_ulp_hf_0_2_10_bitmask { + BNXT_ULP_HF_0_2_10_BITMASK_WM = 0x8000000000000000, + BNXT_ULP_HF_0_2_10_BITMASK_SVIF_INDEX = 0x4000000000000000, + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_VER = 0x2000000000000000, + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_TC = 0x1000000000000000, + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_FLOW_LABEL = 0x0800000000000000, + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0400000000000000, + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_PROTO_ID = 0x0200000000000000, + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_TTL = 0x0100000000000000, + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_SRC_ADDR = 0x0080000000000000, + BNXT_ULP_HF_0_2_10_BITMASK_O_IPV6_DST_ADDR = 0x0040000000000000, + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_SRC_PORT = 0x0020000000000000, + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_DST_PORT = 0x0010000000000000, + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_LENGTH = 0x0008000000000000, + BNXT_ULP_HF_0_2_10_BITMASK_O_UDP_CSUM = 0x0004000000000000, + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_FLAGS = 0x0002000000000000, + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_RSVD0 = 0x0001000000000000, + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_VNI = 0x0000800000000000, + BNXT_ULP_HF_0_2_10_BITMASK_T_VXLAN_RSVD1 = 0x0000400000000000, + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_DMAC = 0x0000200000000000, + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_SMAC = 0x0000100000000000, + BNXT_ULP_HF_0_2_10_BITMASK_I_ETH_TYPE = 0x0000080000000000, + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_VER = 0x0000040000000000, + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_TC = 0x0000020000000000, + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_FLOW_LABEL = 0x0000010000000000, + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_PAYLOAD_LEN = 0x0000008000000000, + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_PROTO_ID = 0x0000004000000000, + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_TTL = 0x0000002000000000, + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_SRC_ADDR = 0x0000001000000000, + BNXT_ULP_HF_0_2_10_BITMASK_I_IPV6_DST_ADDR = 0x0000000800000000, + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_SRC_PORT = 0x0000000400000000, + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_DST_PORT = 0x0000000200000000, + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_LENGTH = 0x0000000100000000, + BNXT_ULP_HF_0_2_10_BITMASK_I_UDP_CSUM = 0x0000000080000000 +}; + +enum bnxt_ulp_hf_0_2_11_bitmask { + BNXT_ULP_HF_0_2_11_BITMASK_WM = 0x8000000000000000, + BNXT_ULP_HF_0_2_11_BITMASK_SVIF_INDEX = 0x4000000000000000, + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_VER = 0x2000000000000000, + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_TOS = 0x1000000000000000, + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_LEN = 0x0800000000000000, + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_FRAG_ID = 0x0400000000000000, + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_FRAG_OFF = 0x0200000000000000, + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_TTL = 0x0100000000000000, + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_PROTO_ID = 0x0080000000000000, + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_CSUM = 0x0040000000000000, + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_SRC_ADDR = 0x0020000000000000, + BNXT_ULP_HF_0_2_11_BITMASK_O_IPV4_DST_ADDR = 0x0010000000000000, + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_SRC_PORT = 0x0008000000000000, + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_DST_PORT = 0x0004000000000000, + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_LENGTH = 0x0002000000000000, + BNXT_ULP_HF_0_2_11_BITMASK_O_UDP_CSUM = 0x0001000000000000, + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_FLAGS = 0x0000800000000000, + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_RSVD0 = 0x0000400000000000, + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_VNI = 0x0000200000000000, + BNXT_ULP_HF_0_2_11_BITMASK_T_VXLAN_RSVD1 = 0x0000100000000000, + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_DMAC = 0x0000080000000000, + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_SMAC = 0x0000040000000000, + BNXT_ULP_HF_0_2_11_BITMASK_I_ETH_TYPE = 0x0000020000000000, + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_VER = 0x0000010000000000, + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_TC = 0x0000008000000000, + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_FLOW_LABEL = 0x0000004000000000, + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_PAYLOAD_LEN = 0x0000002000000000, + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_PROTO_ID = 0x0000001000000000, + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_TTL = 0x0000000800000000, + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_SRC_ADDR = 0x0000000400000000, + BNXT_ULP_HF_0_2_11_BITMASK_I_IPV6_DST_ADDR = 0x0000000200000000, + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_SRC_PORT = 0x0000000100000000, + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_DST_PORT = 0x0000000080000000, + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_LENGTH = 0x0000000040000000, + BNXT_ULP_HF_0_2_11_BITMASK_I_UDP_CSUM = 0x0000000020000000 +}; + +enum bnxt_ulp_hf_0_2_12_bitmask { + BNXT_ULP_HF_0_2_12_BITMASK_WM = 0x8000000000000000, + BNXT_ULP_HF_0_2_12_BITMASK_SVIF_INDEX = 0x4000000000000000, + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_VER = 0x2000000000000000, + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_TC = 0x1000000000000000, + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_FLOW_LABEL = 0x0800000000000000, + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0400000000000000, + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_PROTO_ID = 0x0200000000000000, + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_TTL = 0x0100000000000000, + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_SRC_ADDR = 0x0080000000000000, + BNXT_ULP_HF_0_2_12_BITMASK_O_IPV6_DST_ADDR = 0x0040000000000000, + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_SRC_PORT = 0x0020000000000000, + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_DST_PORT = 0x0010000000000000, + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_LENGTH = 0x0008000000000000, + BNXT_ULP_HF_0_2_12_BITMASK_O_UDP_CSUM = 0x0004000000000000, + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_FLAGS = 0x0002000000000000, + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_RSVD0 = 0x0001000000000000, + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_VNI = 0x0000800000000000, + BNXT_ULP_HF_0_2_12_BITMASK_T_VXLAN_RSVD1 = 0x0000400000000000, + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_DMAC = 0x0000200000000000, + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_SMAC = 0x0000100000000000, + BNXT_ULP_HF_0_2_12_BITMASK_I_ETH_TYPE = 0x0000080000000000, + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_VER = 0x0000040000000000, + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_TOS = 0x0000020000000000, + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_LEN = 0x0000010000000000, + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_FRAG_ID = 0x0000008000000000, + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_FRAG_OFF = 0x0000004000000000, + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_TTL = 0x0000002000000000, + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_PROTO_ID = 0x0000001000000000, + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_CSUM = 0x0000000800000000, + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_SRC_ADDR = 0x0000000400000000, + BNXT_ULP_HF_0_2_12_BITMASK_I_IPV4_DST_ADDR = 0x0000000200000000, + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_SRC_PORT = 0x0000000100000000, + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_DST_PORT = 0x0000000080000000, + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_LENGTH = 0x0000000040000000, + BNXT_ULP_HF_0_2_12_BITMASK_I_UDP_CSUM = 0x0000000020000000 +}; + +enum bnxt_ulp_hf_0_2_13_bitmask { + BNXT_ULP_HF_0_2_13_BITMASK_WM = 0x8000000000000000, + BNXT_ULP_HF_0_2_13_BITMASK_SVIF_INDEX = 0x4000000000000000, + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_VER = 0x2000000000000000, + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_TOS = 0x1000000000000000, + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_LEN = 0x0800000000000000, + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_FRAG_ID = 0x0400000000000000, + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_FRAG_OFF = 0x0200000000000000, + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_TTL = 0x0100000000000000, + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_PROTO_ID = 0x0080000000000000, + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_CSUM = 0x0040000000000000, + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_SRC_ADDR = 0x0020000000000000, + BNXT_ULP_HF_0_2_13_BITMASK_O_IPV4_DST_ADDR = 0x0010000000000000, + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_SRC_PORT = 0x0008000000000000, + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT = 0x0004000000000000, + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_LENGTH = 0x0002000000000000, + BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_CSUM = 0x0001000000000000, + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_FLAGS = 0x0000800000000000, + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_RSVD0 = 0x0000400000000000, + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_VNI = 0x0000200000000000, + BNXT_ULP_HF_0_2_13_BITMASK_T_VXLAN_RSVD1 = 0x0000100000000000, + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_DMAC = 0x0000080000000000, + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_SMAC = 0x0000040000000000, + BNXT_ULP_HF_0_2_13_BITMASK_I_ETH_TYPE = 0x0000020000000000, + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_VER = 0x0000010000000000, + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_TOS = 0x0000008000000000, + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_LEN = 0x0000004000000000, + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_FRAG_ID = 0x0000002000000000, + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_FRAG_OFF = 0x0000001000000000, + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_TTL = 0x0000000800000000, + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_PROTO_ID = 0x0000000400000000, + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_CSUM = 0x0000000200000000, + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_SRC_ADDR = 0x0000000100000000, + BNXT_ULP_HF_0_2_13_BITMASK_I_IPV4_DST_ADDR = 0x0000000080000000, + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_SRC_PORT = 0x0000000040000000, + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_DST_PORT = 0x0000000020000000, + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_LENGTH = 0x0000000010000000, + BNXT_ULP_HF_0_2_13_BITMASK_I_UDP_CSUM = 0x0000000008000000 +}; + +enum bnxt_ulp_hf_0_2_14_bitmask { + BNXT_ULP_HF_0_2_14_BITMASK_WM = 0x8000000000000000, + BNXT_ULP_HF_0_2_14_BITMASK_SVIF_INDEX = 0x4000000000000000, + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_VER = 0x2000000000000000, + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_TC = 0x1000000000000000, + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_FLOW_LABEL = 0x0800000000000000, + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0400000000000000, + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_PROTO_ID = 0x0200000000000000, + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_TTL = 0x0100000000000000, + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_SRC_ADDR = 0x0080000000000000, + BNXT_ULP_HF_0_2_14_BITMASK_O_IPV6_DST_ADDR = 0x0040000000000000, + BNXT_ULP_HF_0_2_14_BITMASK_O_UDP_SRC_PORT = 0x0020000000000000, + BNXT_ULP_HF_0_2_14_BITMASK_O_UDP_DST_PORT = 0x0010000000000000, + BNXT_ULP_HF_0_2_14_BITMASK_O_UDP_LENGTH = 0x0008000000000000, + BNXT_ULP_HF_0_2_14_BITMASK_O_UDP_CSUM = 0x0004000000000000, + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_FLAGS = 0x0002000000000000, + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_RSVD0 = 0x0001000000000000, + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_VNI = 0x0000800000000000, + BNXT_ULP_HF_0_2_14_BITMASK_T_VXLAN_RSVD1 = 0x0000400000000000, + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_DMAC = 0x0000200000000000, + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_SMAC = 0x0000100000000000, + BNXT_ULP_HF_0_2_14_BITMASK_I_ETH_TYPE = 0x0000080000000000, + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_VER = 0x0000040000000000, + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_TOS = 0x0000020000000000, + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_LEN = 0x0000010000000000, + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_FRAG_ID = 0x0000008000000000, + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_FRAG_OFF = 0x0000004000000000, + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_TTL = 0x0000002000000000, + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_PROTO_ID = 0x0000001000000000, + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_CSUM = 0x0000000800000000, + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_SRC_ADDR = 0x0000000400000000, + BNXT_ULP_HF_0_2_14_BITMASK_I_IPV4_DST_ADDR = 0x0000000200000000, + BNXT_ULP_HF_0_2_14_BITMASK_I_ICMP_TYPE = 0x0000000100000000, + BNXT_ULP_HF_0_2_14_BITMASK_I_ICMP_CODE = 0x0000000080000000, + BNXT_ULP_HF_0_2_14_BITMASK_I_ICMP_CSUM = 0x0000000040000000, + BNXT_ULP_HF_0_2_14_BITMASK_I_ICMP_IDENT = 0x0000000020000000, + BNXT_ULP_HF_0_2_14_BITMASK_I_ICMP_SEQ_NUM = 0x0000000010000000 +}; + +enum bnxt_ulp_hf_0_2_15_bitmask { + BNXT_ULP_HF_0_2_15_BITMASK_WM = 0x8000000000000000, + BNXT_ULP_HF_0_2_15_BITMASK_SVIF_INDEX = 0x4000000000000000, + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_VER = 0x2000000000000000, + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_TOS = 0x1000000000000000, + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_LEN = 0x0800000000000000, + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_FRAG_ID = 0x0400000000000000, + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_FRAG_OFF = 0x0200000000000000, + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_TTL = 0x0100000000000000, + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_PROTO_ID = 0x0080000000000000, + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_CSUM = 0x0040000000000000, + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_SRC_ADDR = 0x0020000000000000, + BNXT_ULP_HF_0_2_15_BITMASK_O_IPV4_DST_ADDR = 0x0010000000000000, + BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_SRC_PORT = 0x0008000000000000, + BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT = 0x0004000000000000, + BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_LENGTH = 0x0002000000000000, + BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_CSUM = 0x0001000000000000, + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_FLAGS = 0x0000800000000000, + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_RSVD0 = 0x0000400000000000, + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI = 0x0000200000000000, + BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_RSVD1 = 0x0000100000000000, + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC = 0x0000080000000000, + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC = 0x0000040000000000, + BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_TYPE = 0x0000020000000000, + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_VER = 0x0000010000000000, + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_TOS = 0x0000008000000000, + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_LEN = 0x0000004000000000, + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_FRAG_ID = 0x0000002000000000, + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_FRAG_OFF = 0x0000001000000000, + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_TTL = 0x0000000800000000, + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_PROTO_ID = 0x0000000400000000, + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_CSUM = 0x0000000200000000, + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_SRC_ADDR = 0x0000000100000000, + BNXT_ULP_HF_0_2_15_BITMASK_I_IPV4_DST_ADDR = 0x0000000080000000, + BNXT_ULP_HF_0_2_15_BITMASK_I_ICMP_TYPE = 0x0000000040000000, + BNXT_ULP_HF_0_2_15_BITMASK_I_ICMP_CODE = 0x0000000020000000, + BNXT_ULP_HF_0_2_15_BITMASK_I_ICMP_CSUM = 0x0000000010000000, + BNXT_ULP_HF_0_2_15_BITMASK_I_ICMP_IDENT = 0x0000000008000000, + BNXT_ULP_HF_0_2_15_BITMASK_I_ICMP_SEQ_NUM = 0x0000000004000000 }; enum bnxt_ulp_hf_0_3_0_bitmask { diff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_tbl.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_tbl.c index 305e516a7f..d08443ff43 100644 --- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_tbl.c +++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_tbl.c @@ -1,10 +1,8 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2014-2021 Broadcom + * Copyright(c) 2014-2023 Broadcom * All rights reserved. */ -/* date: Fri Nov 12 19:33:52 2021 */ - #include "ulp_template_db_enum.h" #include "ulp_template_db_field.h" #include "ulp_template_struct.h" @@ -77,7 +75,7 @@ struct bnxt_ulp_generic_tbl_params ulp_generic_tbl_params[] = { .name = "INGRESS GENERIC_TABLE_MAC_ADDR_CACHE", .result_num_entries = 512, .result_num_bytes = 8, - .key_num_bytes = 10, + .key_num_bytes = 12, .num_buckets = 8, .hash_tbl_entries = 2048, .result_byte_order = BNXT_ULP_BYTE_ORDER_LE @@ -87,7 +85,7 @@ struct bnxt_ulp_generic_tbl_params ulp_generic_tbl_params[] = { .name = "EGRESS GENERIC_TABLE_MAC_ADDR_CACHE", .result_num_entries = 512, .result_num_bytes = 8, - .key_num_bytes = 10, + .key_num_bytes = 12, .num_buckets = 8, .hash_tbl_entries = 2048, .result_byte_order = BNXT_ULP_BYTE_ORDER_LE @@ -96,7 +94,7 @@ struct bnxt_ulp_generic_tbl_params ulp_generic_tbl_params[] = { BNXT_ULP_DIRECTION_INGRESS] = { .name = "INGRESS GENERIC_TABLE_PORT_TABLE", .result_num_entries = 1024, - .result_num_bytes = 19, + .result_num_bytes = 21, .key_num_bytes = 0, .num_buckets = 0, .hash_tbl_entries = 0, @@ -106,7 +104,7 @@ struct bnxt_ulp_generic_tbl_params ulp_generic_tbl_params[] = { BNXT_ULP_DIRECTION_EGRESS] = { .name = "EGRESS GENERIC_TABLE_PORT_TABLE", .result_num_entries = 1024, - .result_num_bytes = 19, + .result_num_bytes = 21, .key_num_bytes = 0, .num_buckets = 0, .hash_tbl_entries = 0, @@ -135,16 +133,16 @@ struct bnxt_ulp_generic_tbl_params ulp_generic_tbl_params[] = { [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SOURCE_PROPERTY_CACHE << 1 | BNXT_ULP_DIRECTION_INGRESS] = { .name = "INGRESS GEN_TABLE_SOURCE_PROPERTY_CACHE", - .result_num_entries = 0, + .result_num_entries = 4096, .result_num_bytes = 6, .key_num_bytes = 10, .num_buckets = 4, - .hash_tbl_entries = 0, + .hash_tbl_entries = 8192, .result_byte_order = BNXT_ULP_BYTE_ORDER_LE }, [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SOURCE_PROPERTY_CACHE << 1 | BNXT_ULP_DIRECTION_EGRESS] = { - .name = "INGRESS GEN_TABLE_SOURCE_PROPERTY_CACHE", + .name = "EGRESS GEN_TABLE_SOURCE_PROPERTY_CACHE", .result_num_entries = 128, .result_num_bytes = 6, .key_num_bytes = 10, @@ -152,6 +150,26 @@ struct bnxt_ulp_generic_tbl_params ulp_generic_tbl_params[] = { .hash_tbl_entries = 512, .result_byte_order = BNXT_ULP_BYTE_ORDER_LE }, + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_ENCAP_REC_CACHE << 1 | + BNXT_ULP_DIRECTION_INGRESS] = { + .name = "INGRESS GEN_TABLE_L2_ENCAP_REC_CACHE", + .result_num_entries = 4096, + .result_num_bytes = 6, + .key_num_bytes = 14, + .num_buckets = 4, + .hash_tbl_entries = 8192, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE + }, + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_ENCAP_REC_CACHE << 1 | + BNXT_ULP_DIRECTION_EGRESS] = { + .name = "EGRESS GEN_TABLE_L2_ENCAP_REC_CACHE", + .result_num_entries = 0, + .result_num_bytes = 6, + .key_num_bytes = 14, + .num_buckets = 4, + .hash_tbl_entries = 0, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE + }, [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_VXLAN_ENCAP_REC_CACHE << 1 | BNXT_ULP_DIRECTION_INGRESS] = { .name = "INGRESS GEN_TABLE_VXLAN_ENCAP_REC_CACHE", @@ -191,6 +209,166 @@ struct bnxt_ulp_generic_tbl_params ulp_generic_tbl_params[] = { .num_buckets = 0, .hash_tbl_entries = 0, .result_byte_order = BNXT_ULP_BYTE_ORDER_LE + }, + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SOURCE_PROPERTY_IPV6_CACHE << 1 | + BNXT_ULP_DIRECTION_INGRESS] = { + .name = "INGRESS GEN_TABLE_SOURCE_PROPERTY_IPV6_CACHE", + .result_num_entries = 0, + .result_num_bytes = 6, + .key_num_bytes = 22, + .num_buckets = 4, + .hash_tbl_entries = 0, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE + }, + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SOURCE_PROPERTY_IPV6_CACHE << 1 | + BNXT_ULP_DIRECTION_EGRESS] = { + .name = "EGRESS GEN_TABLE_SOURCE_PROPERTY_IPV6_CACHE", + .result_num_entries = 2048, + .result_num_bytes = 6, + .key_num_bytes = 22, + .num_buckets = 4, + .hash_tbl_entries = 8192, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE + }, + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_VXLAN_ENCAP_IPV6_REC_CACHE << 1 | + BNXT_ULP_DIRECTION_INGRESS] = { + .name = "INGRESS GEN_TABLE_VXLAN_ENCAP_IPV6_REC_CACHE", + .result_num_entries = 0, + .result_num_bytes = 6, + .key_num_bytes = 29, + .num_buckets = 8, + .hash_tbl_entries = 0, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE + }, + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_VXLAN_ENCAP_IPV6_REC_CACHE << 1 | + BNXT_ULP_DIRECTION_EGRESS] = { + .name = "EGRESS GEN_TABLE_VXLAN_ENCAP_IPV6_REC_CACHE", + .result_num_entries = 4096, + .result_num_bytes = 6, + .key_num_bytes = 29, + .num_buckets = 8, + .hash_tbl_entries = 16384, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE + }, + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SRV6_ENCAP_REC_CACHE << 1 | + BNXT_ULP_DIRECTION_INGRESS] = { + .name = "INGRESS GEN_TABLE_SRV6_ENCAP_REC_CACHE", + .result_num_entries = 0, + .result_num_bytes = 6, + .key_num_bytes = 29, + .num_buckets = 8, + .hash_tbl_entries = 0, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE + }, + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SRV6_ENCAP_REC_CACHE << 1 | + BNXT_ULP_DIRECTION_EGRESS] = { + .name = "EGRESS GEN_TABLE_SRV6_ENCAP_REC_CACHE", + .result_num_entries = 2048, + .result_num_bytes = 6, + .key_num_bytes = 86, + .num_buckets = 4, + .hash_tbl_entries = 8192, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE + }, + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_OUTER_TUNNEL_CACHE << 1 | + BNXT_ULP_DIRECTION_INGRESS] = { + .name = "INGRESS GEN_TABLE_OUTER_TUNNEL_CACHE", + .result_num_entries = 4096, + .result_num_bytes = 4, + .key_num_bytes = 32, + .num_buckets = 4, + .hash_tbl_entries = 16384, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE + }, + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_OUTER_TUNNEL_CACHE << 1 | + BNXT_ULP_DIRECTION_EGRESS] = { + .name = "EGRESS GEN_TABLE_OUTER_TUNNEL_CACHE", + .result_num_entries = 0, + .result_num_bytes = 4, + .key_num_bytes = 32, + .num_buckets = 8, + .hash_tbl_entries = 0, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE + }, + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_METER_PROFILE_TBL_CACHE << 1 | + BNXT_ULP_DIRECTION_INGRESS] = { + .name = "INGRESS GENERIC_TABLE_METER_PROFILE_TBL_CACHE", + .result_num_entries = 512, + .result_num_bytes = 8, + .key_num_bytes = 4, + .num_buckets = 8, + .hash_tbl_entries = 2048, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE + }, + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_METER_PROFILE_TBL_CACHE << 1 | + BNXT_ULP_DIRECTION_EGRESS] = { + .name = "EGRESS GENERIC_TABLE_METER_PROFILE_TBL_CACHE", + .result_num_entries = 512, + .result_num_bytes = 8, + .key_num_bytes = 4, + .num_buckets = 8, + .hash_tbl_entries = 2048, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE + }, + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_METER_TBL_CACHE << 1 | + BNXT_ULP_DIRECTION_INGRESS] = { + .name = "INGRESS GENERIC_TABLE_SHARED_METER_TBL_CACHE", + .result_num_entries = 1024, + .result_num_bytes = 10, + .key_num_bytes = 4, + .num_buckets = 8, + .hash_tbl_entries = 2048, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE + }, + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_METER_TBL_CACHE << 1 | + BNXT_ULP_DIRECTION_EGRESS] = { + .name = "EGRESS GENERIC_TABLE_SHARED_METER_TBL_CACHE", + .result_num_entries = 1024, + .result_num_bytes = 10, + .key_num_bytes = 4, + .num_buckets = 8, + .hash_tbl_entries = 2048, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE + }, + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_GLOBAL_REGISTER_TBL << 1 | + BNXT_ULP_DIRECTION_INGRESS] = { + .name = "INGRESS GENERIC_TABLE_GLOBAL_REGISTER_TBL", + .result_num_entries = 256, + .result_num_bytes = 8, + .key_num_bytes = 3, + .num_buckets = 4, + .hash_tbl_entries = 1024, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE + }, + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_GLOBAL_REGISTER_TBL << 1 | + BNXT_ULP_DIRECTION_EGRESS] = { + .name = "EGRESS GENERIC_TABLE_GLOBAL_REGISTER_TBL", + .result_num_entries = 0, + .result_num_bytes = 8, + .key_num_bytes = 3, + .num_buckets = 0, + .hash_tbl_entries = 0, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE + }, + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_CHAIN_ID_CACHE << 1 | + BNXT_ULP_DIRECTION_INGRESS] = { + .name = "INGRESS GEN_TABLE_CHAIN_ID_CACHE", + .result_num_entries = 0, + .result_num_bytes = 4, + .key_num_bytes = 4, + .num_buckets = 4, + .hash_tbl_entries = 0, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE + }, + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_CHAIN_ID_CACHE << 1 | + BNXT_ULP_DIRECTION_EGRESS] = { + .name = "EGRESS GEN_TABLE_CHAIN_ID_CACHE", + .result_num_entries = 64, + .result_num_bytes = 4, + .key_num_bytes = 4, + .num_buckets = 4, + .hash_tbl_entries = 256, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE } }; @@ -281,8 +459,15 @@ struct bnxt_ulp_device_params ulp_device_params[BNXT_ULP_DEVICE_ID_LAST] = { .packet_count_mask = 0xfffffff000000000, .byte_count_shift = 0, .packet_count_shift = 36, - .dynamic_pad_en = 0, + .wc_dynamic_pad_en = 1, + .em_dynamic_pad_en = 0, .dynamic_sram_en = 0, + .wc_slice_width = 80, + .wc_max_slices = 4, + .wc_mode_list = {0x00000000, 0x00000002, + 0x00000003, 0x00000003}, + .wc_mod_list_max_size = 4, + .wc_ctl_size_bits = 16, .dev_tbls = ulp_template_wh_plus_tbls }, [BNXT_ULP_DEVICE_ID_THOR] = { @@ -306,13 +491,15 @@ struct bnxt_ulp_device_params ulp_device_params[BNXT_ULP_DEVICE_ID_LAST] = { .packet_count_mask = 0xfffffff800000000, .byte_count_shift = 0, .packet_count_shift = 35, - .dynamic_pad_en = 1, + .wc_dynamic_pad_en = 1, + .em_dynamic_pad_en = 1, .dynamic_sram_en = 1, - .dyn_encap_list_size = 4, + .dyn_encap_list_size = 5, .dyn_encap_sizes = {{64, TF_TBL_TYPE_ACT_ENCAP_8B}, {128, TF_TBL_TYPE_ACT_ENCAP_16B}, {256, TF_TBL_TYPE_ACT_ENCAP_32B}, - {512, TF_TBL_TYPE_ACT_ENCAP_64B}}, + {512, TF_TBL_TYPE_ACT_ENCAP_64B}, + {1024, TF_TBL_TYPE_ACT_ENCAP_128B}}, .dyn_modify_list_size = 4, .dyn_modify_sizes = {{64, TF_TBL_TYPE_ACT_MODIFY_8B}, {128, TF_TBL_TYPE_ACT_MODIFY_16B}, @@ -348,55 +535,75 @@ struct bnxt_ulp_app_capabilities_info ulp_app_cap_info_list[] = { { .app_id = 0, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .flags = 0 + .flags = 0, + .vxlan_port = 4789, + .vxlan_ip_port = 0 }, { .app_id = 0, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .flags = 0 + .flags = 0, + .vxlan_port = 0, + .vxlan_ip_port = 0 }, { .app_id = 1, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .flags = BNXT_ULP_APP_CAP_SHARED_EN | - BNXT_ULP_APP_CAP_HOT_UPGRADE_EN | - BNXT_ULP_APP_CAP_UNICAST_ONLY + .flags = 0, + .vxlan_port = 0, + .vxlan_ip_port = 0 }, { .app_id = 1, .device_id = BNXT_ULP_DEVICE_ID_THOR, .flags = BNXT_ULP_APP_CAP_SHARED_EN | - BNXT_ULP_APP_CAP_HOT_UPGRADE_EN | - BNXT_ULP_APP_CAP_UNICAST_ONLY + BNXT_ULP_APP_CAP_IP_TOS_PROTO_SUPPORT | + BNXT_ULP_APP_CAP_SRV6, + .vxlan_port = 0, + .vxlan_ip_port = 0 }, { .app_id = 2, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .flags = BNXT_ULP_APP_CAP_SHARED_EN | - BNXT_ULP_APP_CAP_UNICAST_ONLY + .flags = 0, + .vxlan_port = 0, + .vxlan_ip_port = 0 }, { .app_id = 2, .device_id = BNXT_ULP_DEVICE_ID_THOR, .flags = BNXT_ULP_APP_CAP_SHARED_EN | - BNXT_ULP_APP_CAP_UNICAST_ONLY + BNXT_ULP_APP_CAP_IP_TOS_PROTO_SUPPORT | + BNXT_ULP_APP_CAP_SRV6, + .vxlan_port = 0, + .vxlan_ip_port = 0 }, { .app_id = 3, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .flags = BNXT_ULP_APP_CAP_UNICAST_ONLY + .flags = BNXT_ULP_APP_CAP_UNICAST_ONLY, + .vxlan_port = 0, + .vxlan_ip_port = 0 }, { .app_id = 3, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .flags = BNXT_ULP_APP_CAP_UNICAST_ONLY + .flags = BNXT_ULP_APP_CAP_UNICAST_ONLY, + .vxlan_port = 0, + .vxlan_ip_port = 0 }, { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .flags = BNXT_ULP_APP_CAP_SHARED_EN | BNXT_ULP_APP_CAP_HOT_UPGRADE_EN | - BNXT_ULP_APP_CAP_UNICAST_ONLY + BNXT_ULP_APP_CAP_UNICAST_ONLY, + .vxlan_port = 0, + .vxlan_ip_port = 0, + .upgrade_fw_update = 0, + .ha_pool_id = 3, + .ha_reg_cnt = 7, + .ha_reg_state = 8 }, { .app_id = 4, @@ -404,576 +611,617 @@ struct bnxt_ulp_app_capabilities_info ulp_app_cap_info_list[] = { .flags = BNXT_ULP_APP_CAP_SHARED_EN | BNXT_ULP_APP_CAP_HOT_UPGRADE_EN | BNXT_ULP_APP_CAP_UNICAST_ONLY | - BNXT_ULP_APP_CAP_SOCKET_DIRECT + BNXT_ULP_APP_CAP_SOCKET_DIRECT, + .vxlan_port = 0, + .vxlan_ip_port = 0, + .upgrade_fw_update = 0, + .ha_pool_id = 3, + .ha_reg_cnt = 7, + .ha_reg_state = 8 }, { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .flags = BNXT_ULP_APP_CAP_SHARED_EN | - BNXT_ULP_APP_CAP_UNICAST_ONLY + BNXT_ULP_APP_CAP_HOT_UPGRADE_EN | + BNXT_ULP_APP_CAP_UNICAST_ONLY | + BNXT_ULP_APP_CAP_HA_DYNAMIC, + .vxlan_port = 0, + .vxlan_ip_port = 0, + .upgrade_fw_update = 1, + .ha_pool_id = 4, + .ha_reg_cnt = 9, + .ha_reg_state = 10 }, { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, .flags = BNXT_ULP_APP_CAP_SHARED_EN | BNXT_ULP_APP_CAP_UNICAST_ONLY | - BNXT_ULP_APP_CAP_SOCKET_DIRECT - } -}; - -/* List of unnamed app tf resources required to be reserved per app/device */ -struct bnxt_ulp_resource_resv_info ulp_app_resource_resv_list[] = { + BNXT_ULP_APP_CAP_HOT_UPGRADE_EN | + BNXT_ULP_APP_CAP_SOCKET_DIRECT | + BNXT_ULP_APP_CAP_HA_DYNAMIC, + .vxlan_port = 0, + .vxlan_ip_port = 0, + .upgrade_fw_update = 1, + .ha_pool_id = 4, + .ha_reg_cnt = 9, + .ha_reg_state = 10 + }, { - .app_id = 1, + .app_id = 6, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .direction = TF_DIR_RX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .count = 2 + .flags = BNXT_ULP_APP_CAP_UNICAST_ONLY | + BNXT_ULP_APP_CAP_IP_TOS_PROTO_SUPPORT, + .vxlan_port = 0, + .vxlan_ip_port = 0 }, { - .app_id = 1, + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .flags = BNXT_ULP_APP_CAP_UNICAST_ONLY | + BNXT_ULP_APP_CAP_IP_TOS_PROTO_SUPPORT, + .vxlan_port = 0, + .vxlan_ip_port = 0 + }, + { + .app_id = 7, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .direction = TF_DIR_RX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 128 + .flags = BNXT_ULP_APP_CAP_UNICAST_ONLY | + BNXT_ULP_APP_CAP_IP_TOS_PROTO_SUPPORT | + BNXT_ULP_APP_CAP_BC_MC_SUPPORT, + .vxlan_port = 0, + .vxlan_ip_port = 0 }, { - .app_id = 1, + .app_id = 7, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .direction = TF_DIR_RX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .count = 2 + .flags = BNXT_ULP_APP_CAP_UNICAST_ONLY | + BNXT_ULP_APP_CAP_IP_TOS_PROTO_SUPPORT | + BNXT_ULP_APP_CAP_BC_MC_SUPPORT, + .vxlan_port = 0, + .vxlan_ip_port = 0 }, { - .app_id = 1, + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .flags = BNXT_ULP_APP_CAP_UNICAST_ONLY | + BNXT_ULP_APP_CAP_SHARED_EN, + .vxlan_port = 0, + .vxlan_ip_port = 0 + }, + { + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .direction = TF_DIR_RX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 1024 + .flags = BNXT_ULP_APP_CAP_UNICAST_ONLY | + BNXT_ULP_APP_CAP_SHARED_EN, + .vxlan_port = 0, + .vxlan_ip_port = 0 }, { - .app_id = 2, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .direction = TF_DIR_RX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .count = 2 + .flags = BNXT_ULP_APP_CAP_UNICAST_ONLY | + BNXT_ULP_APP_CAP_SHARED_EN, + .vxlan_port = 0, + .vxlan_ip_port = 0 }, { - .app_id = 2, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .direction = TF_DIR_RX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 128 + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .flags = BNXT_ULP_APP_CAP_UNICAST_ONLY | + BNXT_ULP_APP_CAP_SHARED_EN, + .vxlan_port = 0, + .vxlan_ip_port = 0 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .direction = TF_DIR_RX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .count = 2 + .flags = BNXT_ULP_APP_CAP_UNICAST_ONLY, + .vxlan_port = 0, + .vxlan_ip_port = 250 }, { - .app_id = 2, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .direction = TF_DIR_RX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 1024 + .flags = BNXT_ULP_APP_CAP_BC_MC_SUPPORT | + BNXT_ULP_APP_CAP_IP_TOS_PROTO_SUPPORT }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .direction = TF_DIR_RX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .count = 2 + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .flags = BNXT_ULP_APP_CAP_UNICAST_ONLY | + BNXT_ULP_APP_CAP_SHARED_EN | + BNXT_ULP_APP_CAP_HOT_UPGRADE_EN, + .vxlan_port = 0, + .vxlan_ip_port = 0, + .upgrade_fw_update = 0, + .ha_pool_id = 5, + .ha_reg_cnt = 7, + .ha_reg_state = 8 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .direction = TF_DIR_RX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 128 + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .flags = BNXT_ULP_APP_CAP_UNICAST_ONLY | + BNXT_ULP_APP_CAP_SHARED_EN | + BNXT_ULP_APP_CAP_HOT_UPGRADE_EN, + .vxlan_port = 0, + .vxlan_ip_port = 0, + .upgrade_fw_update = 0, + .ha_pool_id = 5, + .ha_reg_cnt = 7, + .ha_reg_state = 8 }, { - .app_id = 4, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .flags = BNXT_ULP_APP_CAP_UNICAST_ONLY, + .vxlan_port = 0, + .vxlan_ip_port = 0 + } +}; + +/* List of unnamed app tf resources required to be reserved per app/device */ +struct bnxt_ulp_resource_resv_info ulp_app_resource_resv_list[] = { + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .count = 2 + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 256 }, { - .app_id = 4, + .app_id = 1, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 6648 + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 1792 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .count = 2 + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 896 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 128 + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 1792 }, { - .app_id = 5, + .app_id = 1, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .count = 2 + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 1024 }, { - .app_id = 5, + .app_id = 1, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 6648 - } -}; - -/* List of global app tf resources required to be reserved per app/device */ -struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { + .count = 6860 + }, { .app_id = 1, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_0, - .direction = TF_DIR_RX - }, - { - .app_id = 1, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_1, - .direction = TF_DIR_RX - }, - { - .app_id = 1, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_2, - .direction = TF_DIR_RX - }, - { - .app_id = 1, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_3, - .direction = TF_DIR_RX - }, - { - .app_id = 1, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_0, - .direction = TF_DIR_RX - }, - { - .app_id = 1, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_1, - .direction = TF_DIR_RX - }, - { - .app_id = 1, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_EM_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_PROFILE_ID_0, - .direction = TF_DIR_RX - }, - { - .app_id = 1, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_0, - .direction = TF_DIR_RX - }, - { - .app_id = 1, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_1, - .direction = TF_DIR_RX - }, - { - .app_id = 1, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_2, - .direction = TF_DIR_RX + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 256 }, { .app_id = 1, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_0, - .direction = TF_DIR_RX + .count = 1792 }, { .app_id = 1, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_1, - .direction = TF_DIR_RX + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 896 }, { .app_id = 1, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_0, - .direction = TF_DIR_RX + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 1792 }, { .app_id = 1, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_1, - .direction = TF_DIR_RX + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 1024 }, { .app_id = 1, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_2, - .direction = TF_DIR_RX + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 7168 }, { - .app_id = 1, - .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_3, - .direction = TF_DIR_RX + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 256 }, { - .app_id = 1, + .app_id = 2, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_0, - .direction = TF_DIR_RX + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 7168 }, { - .app_id = 1, + .app_id = 2, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_1, - .direction = TF_DIR_RX + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 7168 }, { - .app_id = 1, + .app_id = 2, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_EM_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_PROFILE_ID_0, - .direction = TF_DIR_RX + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 1792 }, { - .app_id = 1, + .app_id = 2, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_0, - .direction = TF_DIR_RX + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 4096 }, { - .app_id = 1, + .app_id = 2, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_1, - .direction = TF_DIR_RX + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 6860 }, { - .app_id = 1, - .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_2, - .direction = TF_DIR_RX + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 256 }, { - .app_id = 1, + .app_id = 2, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EM_FKB, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_KEY_ID_0, - .direction = TF_DIR_RX + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 7168 }, { - .app_id = 1, + .app_id = 2, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_WC_FKB, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_0, - .direction = TF_DIR_RX + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 7168 }, { - .app_id = 1, + .app_id = 2, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_0, - .direction = TF_DIR_RX + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 1792 }, { - .app_id = 1, + .app_id = 2, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_1, - .direction = TF_DIR_RX - }, - { - .app_id = 2, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_0, - .direction = TF_DIR_RX + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 4096 }, { .app_id = 2, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_1, - .direction = TF_DIR_RX + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 7168 }, { - .app_id = 2, + .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_2, - .direction = TF_DIR_RX + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED_OWC, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 128 }, { - .app_id = 2, + .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_3, - .direction = TF_DIR_RX + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED_WC, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 64 }, { - .app_id = 2, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_0, - .direction = TF_DIR_RX + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED_OWC, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 6520 }, { - .app_id = 2, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_1, - .direction = TF_DIR_RX + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED_WC, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 6520 }, { - .app_id = 2, + .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_EM_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_PROFILE_ID_0, - .direction = TF_DIR_RX + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED_OWC, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 128 }, { - .app_id = 2, + .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_0, - .direction = TF_DIR_RX + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED_WC, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 256 }, { - .app_id = 2, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_1, - .direction = TF_DIR_RX + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED_OWC, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 6520 }, { - .app_id = 2, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_2, - .direction = TF_DIR_RX + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED_WC, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 392 }, { - .app_id = 2, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_0, - .direction = TF_DIR_RX + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED_WC, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 2 }, { - .app_id = 2, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_1, - .direction = TF_DIR_RX + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED_WC, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 128 }, { - .app_id = 2, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_0, - .direction = TF_DIR_RX + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED_WC, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 2 }, { - .app_id = 2, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_1, - .direction = TF_DIR_RX + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED_WC, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 1024 }, { - .app_id = 2, - .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_2, - .direction = TF_DIR_RX + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED_WC, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 2 }, { - .app_id = 2, + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED_WC, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 128 + }, + { + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_3, - .direction = TF_DIR_RX + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED_WC, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 2 }, { - .app_id = 2, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_0, - .direction = TF_DIR_RX + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED_WC, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 1024 }, { - .app_id = 2, + .app_id = 12, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_1, - .direction = TF_DIR_RX + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED_WC, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 2 }, { - .app_id = 2, + .app_id = 12, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_EM_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_PROFILE_ID_0, - .direction = TF_DIR_RX + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED_WC, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 6860 }, { - .app_id = 2, + .app_id = 12, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_0, - .direction = TF_DIR_RX + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED_OWC, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 6860 }, { - .app_id = 2, + .app_id = 13, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_1, - .direction = TF_DIR_RX + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED_WC, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 2 }, { - .app_id = 2, + .app_id = 13, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_2, - .direction = TF_DIR_RX + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED_WC, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 704 }, { - .app_id = 2, + .app_id = 13, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EM_FKB, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_KEY_ID_0, - .direction = TF_DIR_RX + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED_OWC, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 704 + } +}; + +/* List of global app tf resources required to be reserved per app/device */ +struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX }, { - .app_id = 2, + .app_id = 1, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_WC_FKB, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_0, - .direction = TF_DIR_RX + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX }, { .app_id = 2, - .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_0, - .direction = TF_DIR_RX + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX }, { .app_id = 2, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_1, - .direction = TF_DIR_RX + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX }, { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_0, @@ -982,6 +1230,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_1, @@ -990,6 +1239,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_2, @@ -998,6 +1248,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_3, @@ -1006,6 +1257,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_0, @@ -1014,6 +1266,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_1, @@ -1022,6 +1275,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_PROFILE_ID_0, @@ -1030,6 +1284,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_0, @@ -1038,6 +1293,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_1, @@ -1046,6 +1302,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_2, @@ -1054,6 +1311,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_3, @@ -1062,6 +1320,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_4, @@ -1070,6 +1329,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_5, @@ -1078,6 +1338,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_6, @@ -1086,6 +1347,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_7, @@ -1094,6 +1356,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_8, @@ -1102,6 +1365,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_9, @@ -1110,6 +1374,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_10, @@ -1118,6 +1383,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_0, @@ -1126,6 +1392,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_1, @@ -1134,6 +1401,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_0, @@ -1142,6 +1410,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_1, @@ -1150,6 +1419,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_2, @@ -1158,6 +1428,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_3, @@ -1166,6 +1437,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_0, @@ -1174,6 +1446,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_1, @@ -1182,6 +1455,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_PROFILE_ID_0, @@ -1190,6 +1464,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_0, @@ -1198,6 +1473,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_1, @@ -1206,6 +1482,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_2, @@ -1214,6 +1491,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_3, @@ -1222,6 +1500,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_4, @@ -1230,6 +1509,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_5, @@ -1238,6 +1518,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_6, @@ -1246,6 +1527,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_7, @@ -1254,6 +1536,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_8, @@ -1262,6 +1545,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_9, @@ -1270,6 +1554,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_10, @@ -1278,6 +1563,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EM_FKB, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_KEY_ID_0, @@ -1286,6 +1572,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_WC_FKB, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_0, @@ -1294,6 +1581,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_WC_FKB, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_1, @@ -1302,6 +1590,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_WC_FKB, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_2, @@ -1310,6 +1599,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_WC_FKB, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_3, @@ -1318,6 +1608,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_WC_FKB, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_4, @@ -1326,6 +1617,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_0, @@ -1334,6 +1626,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 4, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_1, @@ -1342,6 +1635,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_0, @@ -1350,6 +1644,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_1, @@ -1358,6 +1653,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_2, @@ -1366,6 +1662,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_3, @@ -1374,6 +1671,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_0, @@ -1382,6 +1680,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_1, @@ -1390,6 +1689,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_PROFILE_ID_0, @@ -1398,6 +1698,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_0, @@ -1406,6 +1707,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_1, @@ -1414,6 +1716,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_2, @@ -1422,6 +1725,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_3, @@ -1430,6 +1734,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_4, @@ -1438,6 +1743,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_5, @@ -1446,6 +1752,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_6, @@ -1454,6 +1761,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_7, @@ -1462,6 +1770,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_8, @@ -1470,6 +1779,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_9, @@ -1478,6 +1788,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_10, @@ -1486,6 +1797,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_0, @@ -1494,6 +1806,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_1, @@ -1502,6 +1815,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_0, @@ -1510,6 +1824,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_1, @@ -1518,6 +1833,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_2, @@ -1526,6 +1842,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_3, @@ -1534,6 +1851,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_0, @@ -1542,6 +1860,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_1, @@ -1550,6 +1869,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_PROFILE_ID_0, @@ -1558,6 +1878,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_0, @@ -1566,6 +1887,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_1, @@ -1574,6 +1896,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_2, @@ -1582,6 +1905,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_3, @@ -1590,6 +1914,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_4, @@ -1598,6 +1923,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_5, @@ -1606,6 +1932,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_6, @@ -1614,6 +1941,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_7, @@ -1622,6 +1950,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_8, @@ -1630,6 +1959,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_9, @@ -1638,6 +1968,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_10, @@ -1646,6 +1977,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EM_FKB, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_KEY_ID_0, @@ -1654,6 +1986,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_WC_FKB, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_0, @@ -1662,6 +1995,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_WC_FKB, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_1, @@ -1670,6 +2004,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_WC_FKB, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_2, @@ -1678,6 +2013,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_WC_FKB, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_3, @@ -1686,6 +2022,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_WC_FKB, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_4, @@ -1694,6 +2031,7 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_0, @@ -1702,4346 +2040,14401 @@ struct bnxt_ulp_glb_resource_info ulp_app_glb_resource_tbl[] = { { .app_id = 5, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_1, .direction = TF_DIR_RX - } -}; - -/* List of global tf resources required to be reserved per app/device */ -struct bnxt_ulp_glb_resource_info ulp_glb_resource_tbl[] = { + }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_0, .direction = TF_DIR_RX }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, - .direction = TF_DIR_TX - }, - { - .app_id = 0, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, - .direction = TF_DIR_TX + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_1, + .direction = TF_DIR_RX }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_2, .direction = TF_DIR_RX }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, - .direction = TF_DIR_TX + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_3, + .direction = TF_DIR_RX }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_0, .direction = TF_DIR_RX }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_1, .direction = TF_DIR_RX }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, - .direction = TF_DIR_TX + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_PROFILE_ID_0, + .direction = TF_DIR_RX }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_EM_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_0, .direction = TF_DIR_RX }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_1, .direction = TF_DIR_RX }, { - .app_id = 0, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_2, .direction = TF_DIR_RX }, { - .app_id = 0, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, - .direction = TF_DIR_TX + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_3, + .direction = TF_DIR_RX }, { - .app_id = 0, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, - .direction = TF_DIR_TX + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_0, + .direction = TF_DIR_RX }, { - .app_id = 0, - .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_1, .direction = TF_DIR_RX }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, - .direction = TF_DIR_TX + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_0, + .direction = TF_DIR_RX }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_1, .direction = TF_DIR_RX }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GRE_PROF_FUNC_ID, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_2, .direction = TF_DIR_RX }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_3, .direction = TF_DIR_RX }, { - .app_id = 0, - .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, - .direction = TF_DIR_TX - }, - { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_EM_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_0, .direction = TF_DIR_RX }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_1, .direction = TF_DIR_RX }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_PROFILE_ID_0, .direction = TF_DIR_RX }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_0, .direction = TF_DIR_RX }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_1, .direction = TF_DIR_RX }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_2, .direction = TF_DIR_RX }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_5, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_3, .direction = TF_DIR_RX }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_WC_FKB, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_KEY_ID_0, .direction = TF_DIR_RX }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_WC_FKB, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_0, .direction = TF_DIR_RX }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_WC_FKB, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_1, .direction = TF_DIR_RX }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_WC_FKB, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_3, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_0, .direction = TF_DIR_RX }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_WC_FKB, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_4, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_1, .direction = TF_DIR_RX }, { - .app_id = 0, - .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_WC_FKB, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, - .direction = TF_DIR_TX - }, - { - .app_id = 0, - .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_WC_FKB, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, - .direction = TF_DIR_TX - }, - { - .app_id = 0, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, - .direction = TF_DIR_TX + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_0, + .direction = TF_DIR_RX }, { - .app_id = 0, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, - .direction = TF_DIR_TX - }, - { - .app_id = 0, - .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_WC_FKB, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, - .direction = TF_DIR_TX - }, - { - .app_id = 0, - .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_METADATA, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_METADATA_PROF_0, - .direction = TF_DIR_TX + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_1, + .direction = TF_DIR_RX }, { - .app_id = 0, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_EM_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_0, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_2, .direction = TF_DIR_RX }, { - .app_id = 0, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_VFR_PROF_FUNC_0, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_3, .direction = TF_DIR_RX }, { - .app_id = 0, - .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EM_FKB, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_0, + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_0, .direction = TF_DIR_RX }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_1, .direction = TF_DIR_RX }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, - .direction = TF_DIR_TX + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_PROFILE_ID_0, + .direction = TF_DIR_RX }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, - .direction = TF_DIR_TX + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_RX }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_1, .direction = TF_DIR_RX }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, - .direction = TF_DIR_TX + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_2, + .direction = TF_DIR_RX }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_3, .direction = TF_DIR_RX }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_0, .direction = TF_DIR_RX }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, - .direction = TF_DIR_TX + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_1, + .direction = TF_DIR_RX }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_0, .direction = TF_DIR_RX }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, - .direction = TF_DIR_TX + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_1, + .direction = TF_DIR_RX }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, - .direction = TF_DIR_TX - }, - { - .app_id = 2, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_2, .direction = TF_DIR_RX }, { - .app_id = 2, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, - .direction = TF_DIR_TX - }, - { - .app_id = 2, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, - .direction = TF_DIR_TX - }, - { - .app_id = 2, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_3, .direction = TF_DIR_RX }, { - .app_id = 2, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, - .direction = TF_DIR_TX - }, - { - .app_id = 2, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, - .direction = TF_DIR_RX - }, - { - .app_id = 2, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_0, .direction = TF_DIR_RX }, { - .app_id = 2, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, - .direction = TF_DIR_TX - }, - { - .app_id = 2, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_1, .direction = TF_DIR_RX }, { - .app_id = 2, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, - .direction = TF_DIR_TX + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_PROFILE_ID_0, + .direction = TF_DIR_RX }, { - .app_id = 2, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, - .direction = TF_DIR_TX - }, - { - .app_id = 3, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_0, .direction = TF_DIR_RX }, { - .app_id = 3, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, - .direction = TF_DIR_TX - }, - { - .app_id = 3, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, - .direction = TF_DIR_TX - }, - { - .app_id = 3, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_1, .direction = TF_DIR_RX }, { - .app_id = 3, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, - .direction = TF_DIR_TX + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_2, + .direction = TF_DIR_RX }, { - .app_id = 3, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_3, .direction = TF_DIR_RX }, { - .app_id = 3, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_KEY_ID_0, .direction = TF_DIR_RX }, { - .app_id = 3, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, - .direction = TF_DIR_TX - }, - { - .app_id = 3, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_EM_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, - .direction = TF_DIR_RX - }, - { - .app_id = 3, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_0, .direction = TF_DIR_RX }, { - .app_id = 3, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_1, .direction = TF_DIR_RX }, { - .app_id = 3, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, - .direction = TF_DIR_TX + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_0, + .direction = TF_DIR_RX }, { - .app_id = 3, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, - .direction = TF_DIR_TX + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_1, + .direction = TF_DIR_RX }, { - .app_id = 3, + .app_id = 12, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_0, .direction = TF_DIR_RX }, { - .app_id = 3, + .app_id = 12, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, - .direction = TF_DIR_TX + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_1, + .direction = TF_DIR_RX }, { - .app_id = 3, + .app_id = 12, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_2, .direction = TF_DIR_RX }, { - .app_id = 3, + .app_id = 12, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GRE_PROF_FUNC_ID, - .direction = TF_DIR_RX - }, - { - .app_id = 3, - .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_3, .direction = TF_DIR_RX }, { - .app_id = 3, - .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, - .direction = TF_DIR_TX - }, - { - .app_id = 3, + .app_id = 12, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_0, .direction = TF_DIR_RX }, { - .app_id = 3, + .app_id = 12, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_1, .direction = TF_DIR_RX }, { - .app_id = 3, + .app_id = 12, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_PROFILE_ID_0, .direction = TF_DIR_RX }, { - .app_id = 3, + .app_id = 12, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_0, .direction = TF_DIR_RX }, { - .app_id = 3, + .app_id = 12, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_1, .direction = TF_DIR_RX }, { - .app_id = 3, + .app_id = 12, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_5, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_2, .direction = TF_DIR_RX }, { - .app_id = 3, + .app_id = 12, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_6, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_3, .direction = TF_DIR_RX }, { - .app_id = 3, + .app_id = 12, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_7, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_KEY_ID_0, .direction = TF_DIR_RX }, { - .app_id = 3, + .app_id = 12, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_WC_FKB, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_0, .direction = TF_DIR_RX }, { - .app_id = 3, + .app_id = 12, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_WC_FKB, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_1, .direction = TF_DIR_RX }, { - .app_id = 3, + .app_id = 12, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_WC_FKB, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_2, .direction = TF_DIR_RX }, { - .app_id = 3, + .app_id = 12, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_WC_FKB, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_3, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_0, .direction = TF_DIR_RX }, { - .app_id = 3, + .app_id = 12, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_WC_FKB, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_4, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_1, .direction = TF_DIR_RX }, { - .app_id = 3, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 13, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_WC_FKB, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, - .direction = TF_DIR_TX + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_0, + .direction = TF_DIR_RX }, { - .app_id = 3, + .app_id = 13, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_WC_FKB, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, - .direction = TF_DIR_TX + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_1, + .direction = TF_DIR_RX }, { - .app_id = 3, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_0, + .direction = TF_DIR_RX + }, + { + .app_id = 13, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_SHARED, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_1, + .direction = TF_DIR_RX + } +}; + +/* List of global tf resources required to be reserved per app/device */ +struct bnxt_ulp_glb_resource_info ulp_glb_resource_tbl[] = { + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, .direction = TF_DIR_TX }, { - .app_id = 3, + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_DROP_AREC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_DROP_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 0, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_WC_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, .direction = TF_DIR_TX }, { - .app_id = 3, + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GRE_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VF_2_VFR_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ANY_2_VF_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ANY_2_VF_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_8B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_MODIFY_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_5, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_4, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, + .direction = TF_DIR_TX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_TX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_METADATA, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_METADATA_PROF_0, + .direction = TF_DIR_TX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_DROP_AREC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_DROP_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GRE_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VF_2_VFR_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ANY_2_VF_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ANY_2_VF_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_8B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_MODIFY_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_5, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_4, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, + .direction = TF_DIR_TX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_TX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2, + .direction = TF_DIR_TX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3, + .direction = TF_DIR_TX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_DROP_AREC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_DROP_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GRE_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VF_2_VFR_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ANY_2_VF_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ANY_2_VF_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_8B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_MODIFY_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_5, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_4, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, + .direction = TF_DIR_TX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_TX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2, + .direction = TF_DIR_TX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3, + .direction = TF_DIR_TX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GRE_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_5, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_6, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_7, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_8, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_9, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_4, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_5, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_6, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_7, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_8, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, + .direction = TF_DIR_TX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_TX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_4, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_5, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_6, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_7, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_8, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_9, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_4, + .direction = TF_DIR_RX + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_5, + .direction = TF_DIR_RX + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GRE_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4, + .direction = TF_DIR_RX + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_5, + .direction = TF_DIR_RX + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GRE_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4, + .direction = TF_DIR_RX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_5, + .direction = TF_DIR_RX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_4, + .direction = TF_DIR_RX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, + .direction = TF_DIR_TX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_TX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_METADATA, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_METADATA_PROF_0, + .direction = TF_DIR_TX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GRE_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, + .direction = TF_DIR_TX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_TX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2, + .direction = TF_DIR_TX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_4, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GRE_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_4, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, + .direction = TF_DIR_TX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_TX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2, + .direction = TF_DIR_TX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GRE_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4, + .direction = TF_DIR_RX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_5, + .direction = TF_DIR_RX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_4, + .direction = TF_DIR_RX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, + .direction = TF_DIR_TX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_TX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_METADATA, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_METADATA_PROF_0, + .direction = TF_DIR_TX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GRE_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_5, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_6, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_7, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_4, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, + .direction = TF_DIR_TX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_TX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_4, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_5, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_6, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_7, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 11, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GRE_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_4, + .direction = TF_DIR_RX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, + .direction = TF_DIR_TX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_TX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2, + .direction = TF_DIR_TX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_TX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GRE_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, + .direction = TF_DIR_TX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_5, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_3, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_4, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0, + .direction = TF_DIR_TX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0, + .direction = TF_DIR_TX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1, + .direction = TF_DIR_TX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_METADATA, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_METADATA_PROF_0, + .direction = TF_DIR_TX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_0, + .direction = TF_DIR_RX + }, + { + .app_id = 14, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, + .direction = TF_DIR_RX + }, + { + .app_id = 14, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, + .direction = TF_DIR_RX + } +}; + +/* List of tf resources required to be reserved per app/device */ +struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = { + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 422 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, + .count = 6 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 191 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 63 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 192 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 8192 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 6912 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, + .count = 1023 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, + .count = 511 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .count = 15 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC, + .count = 255 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 1 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 422 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .count = 6 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 960 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 88 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 13168 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_TBL_SCOPE, + .count = 1 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 292 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, + .count = 148 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 191 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 63 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 192 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 8192 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 6912 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, + .count = 1023 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 511 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .count = 223 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, + .count = 255 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 488 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, + .count = 511 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 1 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 292 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .count = 144 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 960 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 928 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 15232 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_TBL_SCOPE, + .count = 1 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 272 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, + .count = 6 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 32 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 32 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 32 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 8192 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 8192 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 5 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_METER_PROF, + .count = 256 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_METER_INST, + .count = 1023 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .count = 32 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .count = 31 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 2048 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 64 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 272 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .count = 6 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 128 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 4096 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 16384 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, + .count = 272 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 32 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 63 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 32 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 8192 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 8192 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 5 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .count = 32 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .count = 32 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 2048 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 100 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .count = 272 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 128 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 4096 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 16384 + }, + { + .app_id = 0, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_METADATA, + .count = 1 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 422 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, + .count = 6 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 191 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 63 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 192 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 8192 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 6912 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, + .count = 1023 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, + .count = 511 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .count = 15 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC, + .count = 255 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 1 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 422 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .count = 6 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 960 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 88 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 13168 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_TBL_SCOPE, + .count = 1 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 292 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, + .count = 148 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 191 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 63 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 192 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 8192 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 6912 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, + .count = 1023 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 511 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .count = 223 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, + .count = 255 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 488 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, + .count = 511 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 1 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 292 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .count = 144 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 960 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 928 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 15232 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_TBL_SCOPE, + .count = 1 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 16 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, + .count = 2 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 48 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 32 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 48 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 512 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 512 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 5 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .count = 16 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .count = 16 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 128 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 16 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .count = 2 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 64 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 11264 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, + .count = 256 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 48 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 24 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 48 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 512 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 512 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 5 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .count = 16 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .count = 16 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 128 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .count = 256 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 64 + }, + { + .app_id = 1, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 11264 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 422 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, + .count = 6 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 191 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 63 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 192 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 8192 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 6912 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, + .count = 1023 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, + .count = 511 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .count = 15 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC, + .count = 255 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 1 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 422 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .count = 6 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 960 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 88 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 13168 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_TBL_SCOPE, + .count = 1 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 292 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, + .count = 148 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 191 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 63 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 192 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 8192 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 6912 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, + .count = 1023 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 511 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .count = 223 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, + .count = 255 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 488 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, + .count = 511 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 1 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 292 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .count = 144 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 960 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 928 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 15232 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_TBL_SCOPE, + .count = 1 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 256 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, + .count = 4 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 48 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 32 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 48 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 512 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 512 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 5 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .count = 16 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .count = 16 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 128 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 256 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .count = 4 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 64 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 11264 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, + .count = 16 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 48 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 24 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 48 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 512 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 512 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 5 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .count = 16 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .count = 16 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 128 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .count = 16 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 64 + }, + { + .app_id = 2, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 11264 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 422 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, + .count = 6 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 191 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 63 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 192 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 8192 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 7168 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, + .count = 1023 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, + .count = 511 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .count = 15 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC, + .count = 255 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 1 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 422 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .count = 6 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 960 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 88 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 13168 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_TBL_SCOPE, + .count = 1 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 292 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, + .count = 148 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 191 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 63 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 192 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 8192 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 7168 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, + .count = 1023 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 511 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .count = 223 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, + .count = 255 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 488 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, + .count = 511 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 1 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 292 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .count = 144 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 960 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 928 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 15232 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_TBL_SCOPE, + .count = 1 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 128 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, + .count = 6 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 128 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 63 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 128 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 8192 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 8192 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 1 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .count = 32 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .count = 32 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 1024 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 1024 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, + .count = 1024 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 128 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .count = 6 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 128 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 7168 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 26624 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 128 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, + .count = 6 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 128 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 63 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 128 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 4096 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 1024 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 1 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .count = 32 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .count = 32 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 1024 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 1024 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, + .count = 1024 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 128 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .count = 6 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 128 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 2048 + }, + { + .app_id = 3, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 6144 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 16 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 4 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 4 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 128 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 48 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, + .count = 4 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, + .count = 4 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .count = 1 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC, + .count = 4 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 32 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 32 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 1024 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 16 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 4 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 4 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 128 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, + .count = 4 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 4 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .count = 1 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, + .count = 4 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 4 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, + .count = 4 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 32 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 32 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 4 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 1024 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 16 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 16 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 12 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 3576 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 3576 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .count = 4 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .count = 4 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 4 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 4 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 16 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 32 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 1024 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 16 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 4 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 4 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 512 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 256 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .count = 4 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .count = 4 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 4 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 4 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 16 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 32 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 4 + }, + { + .app_id = 4, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 1024 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 16 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 2 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 128 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 28 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 128 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 28 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .count = 1 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 32 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 32 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 64 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 28 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 1024 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 16 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 2 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 1 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 1 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 1 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 128 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .count = 1 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 32 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 1 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 32 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 1 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 1024 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 16 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 2 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 16 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 12 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 32 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 512 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 192 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 512 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 192 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 16 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 32 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 128 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 128 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 1024 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 16 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 1 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 1 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 1 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 512 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 256 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .count = 1 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .count = 1 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 16 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 1 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 32 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 2 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 4 + }, + { + .app_id = 5, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 1024 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 32 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, + .count = 2 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 4 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 4 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 4 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 128 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 128 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, + .count = 4 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, + .count = 4 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .count = 4 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC, + .count = 4 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 32 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .count = 2 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 32 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 4 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 1024 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 32 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, + .count = 2 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 4 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 4 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 4 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 128 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 128 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, + .count = 4 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 4 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .count = 4 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, + .count = 4 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 4 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, + .count = 4 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 32 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .count = 2 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 32 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 4 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 1024 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 128 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, + .count = 6 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 128 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 63 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 128 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 8192 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 8192 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .count = 32 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .count = 32 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 1024 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 1024 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 128 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .count = 6 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 128 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 7168 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 26624 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 128 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, + .count = 6 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 128 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 63 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 128 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 4096 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 1024 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .count = 32 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .count = 32 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 1024 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 1024 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 128 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .count = 6 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 128 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 2048 + }, + { + .app_id = 6, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 6144 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 422 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, + .count = 6 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 191 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 63 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 192 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 8192 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 6912 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, + .count = 1023 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, + .count = 511 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .count = 15 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC, + .count = 255 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 1 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 422 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .count = 6 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 960 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 88 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 13168 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_TBL_SCOPE, + .count = 1 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 292 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, + .count = 148 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 191 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 63 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 192 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 8192 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 6912 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, + .count = 1023 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 511 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .count = 223 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, + .count = 255 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 488 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, + .count = 511 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 1 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 292 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .count = 144 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 960 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 928 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 15232 + }, + { + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_TBL_SCOPE, + .count = 1 + }, + { + .app_id = 7, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_EM_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0, - .direction = TF_DIR_RX + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 272 }, { - .app_id = 3, + .app_id = 7, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_EM_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_1, - .direction = TF_DIR_RX + .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, + .count = 6 }, { - .app_id = 3, + .app_id = 7, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_EM_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_2, - .direction = TF_DIR_RX + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 32 }, { - .app_id = 3, + .app_id = 7, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_EM_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_3, - .direction = TF_DIR_RX + .resource_type = TF_IDENT_TYPE_PROF_FUNC, + .count = 32 }, { - .app_id = 3, + .app_id = 7, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_4, - .direction = TF_DIR_RX + .count = 32 }, { - .app_id = 3, + .app_id = 7, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_EM_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_5, - .direction = TF_DIR_RX + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .count = 8192 }, { - .app_id = 3, + .app_id = 7, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_EM_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_6, - .direction = TF_DIR_RX + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 8192 }, { - .app_id = 3, + .app_id = 7, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_EM_PROF, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_7, - .direction = TF_DIR_RX + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 5 }, { - .app_id = 3, + .app_id = 7, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EM_FKB, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_0, - .direction = TF_DIR_RX + .count = 32 }, { - .app_id = 3, + .app_id = 7, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EM_FKB, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_1, - .direction = TF_DIR_RX + .resource_type = TF_TBL_TYPE_WC_FKB, + .count = 31 }, { - .app_id = 3, + .app_id = 7, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EM_FKB, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_2, - .direction = TF_DIR_RX + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 2048 }, { - .app_id = 3, + .app_id = 7, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EM_FKB, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_3, - .direction = TF_DIR_RX + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 64 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, - .direction = TF_DIR_RX + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 272 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, - .direction = TF_DIR_TX + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .count = 6 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, - .direction = TF_DIR_TX + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 128 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, - .direction = TF_DIR_RX + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 4096 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, - .direction = TF_DIR_TX + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 16384 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, - .direction = TF_DIR_RX - }, - { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, - .direction = TF_DIR_RX + .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, + .count = 272 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, - .direction = TF_DIR_TX + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_WC_PROF, + .count = 32 }, { - .app_id = 4, + .app_id = 7, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, - .direction = TF_DIR_RX + .count = 63 }, { - .app_id = 4, + .app_id = 7, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, - .direction = TF_DIR_TX + .resource_type = TF_IDENT_TYPE_EM_PROF, + .count = 32 }, { - .app_id = 4, + .app_id = 7, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, - .direction = TF_DIR_TX - }, - { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, - .direction = TF_DIR_RX + .count = 8192 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, - .direction = TF_DIR_TX + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .count = 8192 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, - .direction = TF_DIR_TX + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 5 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, - .direction = TF_DIR_RX + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .count = 32 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, - .direction = TF_DIR_TX + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .count = 32 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, - .direction = TF_DIR_RX + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 2048 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, - .direction = TF_DIR_RX + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 100 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, - .direction = TF_DIR_TX + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .count = 272 }, { - .app_id = 5, + .app_id = 7, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, - .direction = TF_DIR_RX + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .count = 128 }, { - .app_id = 5, + .app_id = 7, .device_id = BNXT_ULP_DEVICE_ID_THOR, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, - .direction = TF_DIR_TX + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, + .count = 4096 }, { - .app_id = 5, + .app_id = 7, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_EM_RECORD, + .count = 16384 + }, + { + .app_id = 7, .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, - .direction = TF_DIR_TX - } -}; - -/* List of tf resources required to be reserved per app/device */ -struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = { + .resource_type = TF_TBL_TYPE_METADATA, + .count = 1 + }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .count = 422 + .count = 32 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, - .count = 6 + .count = 2 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, - .count = 191 + .count = 4 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .count = 63 + .count = 4 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, - .count = 192 + .count = 4 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .count = 8192 + .count = 128 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .count = 6912 + .count = 128 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, - .count = 1023 + .count = 4 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, - .count = 511 + .count = 4 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .count = 15 + .count = 4 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_SP_SMAC, - .count = 255 - }, - { - .app_id = 0, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .direction = TF_DIR_RX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, - .count = 1 + .count = 4 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .count = 422 + .count = 32 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .count = 6 + .count = 2 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .count = 960 + .count = 4 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 88 + .count = 16 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_EM_RECORD, - .count = 13168 + .count = 1024 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_TBL_SCOPE, .count = 1 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .count = 292 + .count = 32 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, - .count = 148 + .count = 2 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, - .count = 191 + .count = 4 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .count = 63 + .count = 4 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, - .count = 192 + .count = 4 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .count = 8192 + .count = 128 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .count = 6912 + .count = 128 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, - .count = 1023 + .count = 4 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, - .count = 511 + .count = 4 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .count = 223 + .count = 4 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, - .count = 255 + .count = 4 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, - .count = 488 + .count = 4 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, - .count = 511 - }, - { - .app_id = 0, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .direction = TF_DIR_TX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, - .count = 1 + .count = 4 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .count = 292 + .count = 32 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .count = 144 + .count = 2 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .count = 960 + .count = 4 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 928 + .count = 16 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_EM_RECORD, - .count = 15232 + .count = 1024 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_TBL_SCOPE, .count = 1 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .count = 272 + .count = 32 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, - .count = 6 + .count = 2 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .count = 32 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .count = 32 + .count = 8 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, .count = 32 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .count = 8192 + .count = 1024 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .count = 8192 + .count = 256 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, - .count = 5 + .resource_type = TF_TBL_TYPE_EM_FKB, + .count = 8 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EM_FKB, - .count = 32 + .resource_type = TF_TBL_TYPE_WC_FKB, + .count = 8 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_WC_FKB, - .count = 31 + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 4 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, - .count = 2048 + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 4 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, - .count = 64 + .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, + .count = 4 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .count = 272 + .count = 32 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .count = 6 + .count = 2 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .count = 128 + .count = 32 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 4096 + .count = 256 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_EM_RECORD, - .count = 16384 + .count = 1024 }, { - .app_id = 0, + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .count = 32 + }, + { + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, - .count = 272 + .count = 2 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .count = 32 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .count = 63 + .count = 8 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, .count = 32 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .count = 8192 + .count = 1024 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .count = 8192 + .count = 256 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, - .count = 5 + .resource_type = TF_TBL_TYPE_EM_FKB, + .count = 4 + }, + { + .app_id = 8, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .count = 4 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EM_FKB, - .count = 32 + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 4 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_WC_FKB, - .count = 32 + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 4 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, - .count = 2048 + .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, + .count = 4 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, - .count = 100 + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .count = 32 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .count = 272 + .count = 2 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .count = 128 + .count = 32 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 4096 + .count = 32 }, { - .app_id = 0, + .app_id = 8, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_EM_RECORD, - .count = 16384 - }, - { - .app_id = 0, - .device_id = BNXT_ULP_DEVICE_ID_THOR, - .direction = TF_DIR_TX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_METADATA, - .count = 1 + .count = 1024 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .count = 32 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, .count = 2 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, - .count = 4 + .count = 16 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .count = 4 + .count = 16 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, - .count = 4 + .count = 16 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .count = 128 + .count = 4096 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .count = 128 + .count = 2048 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, - .count = 4 + .count = 512 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, - .count = 4 + .count = 256 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .count = 4 + .count = 8 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_SP_SMAC, - .count = 4 + .count = 128 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .count = 32 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .count = 2 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .count = 32 + .count = 256 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 4 + .count = 588 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_EM_RECORD, - .count = 1024 + .count = 4096 }, { - .app_id = 1, + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_TBL_SCOPE, + .count = 1 + }, + { + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .count = 32 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, .count = 2 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, - .count = 4 + .count = 16 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .count = 4 + .count = 8 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, - .count = 4 + .count = 16 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .count = 128 + .count = 4096 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .count = 128 + .count = 2048 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, - .count = 4 + .count = 512 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, - .count = 4 + .count = 32 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .count = 4 + .count = 32 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, - .count = 4 + .count = 128 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, - .count = 4 + .count = 128 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, - .count = 4 + .count = 128 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .count = 32 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .count = 2 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .count = 32 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 4 + .count = 256 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_EM_RECORD, - .count = 1024 + .count = 4096 }, { - .app_id = 1, + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_TBL_SCOPE, + .count = 1 + }, + { + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .count = 32 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, .count = 2 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .count = 32 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .count = 16 + .count = 8 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, .count = 32 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .count = 528 + .count = 4096 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .count = 256 + .count = 4096 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EM_FKB, - .count = 4 + .count = 8 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_WC_FKB, - .count = 4 + .count = 8 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, - .count = 4 + .count = 512 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, - .count = 4 + .count = 512 }, { - .app_id = 1, + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, + .count = 512 + }, + { + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .count = 32 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .count = 2 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .count = 32 + .count = 64 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 4 + .count = 4096 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_EM_RECORD, - .count = 1024 + .count = 6144 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .count = 32 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, .count = 2 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, - .count = 4 + .count = 32 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .count = 4 + .count = 8 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, - .count = 4 + .count = 32 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .count = 512 + .count = 4096 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .count = 256 + .count = 1024 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EM_FKB, - .count = 4 + .count = 8 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_WC_FKB, - .count = 4 + .count = 8 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, - .count = 4 + .count = 512 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, - .count = 4 + .count = 512 }, { - .app_id = 1, + .app_id = 9, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, + .count = 512 + }, + { + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .count = 32 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .count = 2 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .count = 32 + .count = 64 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 4 + .count = 1024 }, { - .app_id = 1, + .app_id = 9, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_EM_RECORD, - .count = 1024 + .count = 4096 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .count = 32 + .count = 422 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, - .count = 2 + .count = 6 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, - .count = 4 + .count = 191 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .count = 4 + .count = 63 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, - .count = 4 + .count = 192 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .count = 128 + .count = 8192 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .count = 128 + .count = 6912 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, - .count = 4 + .count = 1023 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, - .count = 4 + .count = 511 + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .count = 15 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .count = 4 + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC, + .count = 255 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_SP_SMAC, - .count = 4 + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 1 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .count = 32 + .count = 422 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .count = 2 + .count = 6 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .count = 32 + .count = 960 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 64 + .count = 88 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_EM_RECORD, - .count = 1024 + .count = 13168 }, { - .app_id = 2, + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_TBL_SCOPE, + .count = 1 + }, + { + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .count = 32 + .count = 292 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, - .count = 2 + .count = 148 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, - .count = 4 + .count = 191 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .count = 4 + .count = 63 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, - .count = 4 + .count = 192 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .count = 128 + .count = 8192 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .count = 128 + .count = 6912 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, - .count = 4 + .count = 1023 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, - .count = 4 + .count = 511 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .count = 4 + .count = 223 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, - .count = 4 + .count = 255 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, - .count = 4 + .count = 488 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, - .count = 4 + .count = 511 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 1 + }, + { + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .count = 32 + .count = 292 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .count = 2 + .count = 144 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .count = 32 + .count = 960 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 4 + .count = 928 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_EM_RECORD, - .count = 1024 + .count = 15232 }, { - .app_id = 2, + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_TBL_SCOPE, + .count = 1 + }, + { + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .count = 32 + .count = 272 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, - .count = 2 + .count = 6 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .count = 32 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .count = 16 + .count = 32 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, .count = 32 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .count = 528 + .count = 8192 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .count = 256 + .count = 8192 }, { - .app_id = 2, + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 5 + }, + { + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EM_FKB, - .count = 4 + .count = 32 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_WC_FKB, - .count = 4 + .count = 31 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, - .count = 4 + .count = 2048 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, - .count = 4 + .count = 64 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .count = 32 + .count = 272 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .count = 2 + .count = 6 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .count = 32 + .count = 128 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 512 + .count = 4096 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_EM_RECORD, - .count = 1024 - }, - { - .app_id = 2, - .device_id = BNXT_ULP_DEVICE_ID_THOR, - .direction = TF_DIR_TX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .count = 32 + .count = 16384 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, - .count = 2 + .count = 272 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, - .count = 4 + .count = 32 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .count = 4 + .count = 63 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, - .count = 4 + .count = 32 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .count = 512 + .count = 8192 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .count = 256 + .count = 8192 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EM_FKB, - .count = 4 + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 5 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_WC_FKB, - .count = 4 + .resource_type = TF_TBL_TYPE_EM_FKB, + .count = 32 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, - .count = 4 + .resource_type = TF_TBL_TYPE_WC_FKB, + .count = 32 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, - .count = 4 + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 2048 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .count = 32 + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 100 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .count = 2 + .count = 272 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .count = 32 + .count = 128 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 4 + .count = 4096 }, { - .app_id = 2, + .app_id = 10, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_EM_RECORD, - .count = 1024 + .count = 16384 }, { - .app_id = 3, + .app_id = 10, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_METADATA, + .count = 1 + }, + { + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .count = 422 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, .count = 6 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .count = 191 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, .count = 63 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, .count = 192 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .count = 8192 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, .count = 7168 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, .count = 1023 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, .count = 511 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, .count = 15 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_SP_SMAC, .count = 255 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, .count = 1 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .count = 422 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .count = 6 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .count = 960 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, .count = 88 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_EM_RECORD, .count = 13168 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_TBL_SCOPE, .count = 1 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .count = 292 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, .count = 148 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .count = 191 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, .count = 63 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, .count = 192 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .count = 8192 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, .count = 7168 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, .count = 1023 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, .count = 511 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, .count = 223 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, .count = 255 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, .count = 488 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, .count = 511 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, .count = 1 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .count = 292 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .count = 144 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .count = 960 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, .count = 928 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_EM_RECORD, .count = 15232 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_TBL_SCOPE, .count = 1 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .count = 128 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, .count = 6 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .count = 128 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, .count = 63 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, .count = 128 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .count = 8192 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, .count = 8192 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, .count = 1 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EM_FKB, .count = 32 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_WC_FKB, .count = 32 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, .count = 1024 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, .count = 1024 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, .count = 1024 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .count = 128 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .count = 6 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .count = 128 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, .count = 7168 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_EM_RECORD, .count = 26624 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .count = 128 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, .count = 6 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .count = 128 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, .count = 63 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, .count = 128 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .count = 4096 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, .count = 1024 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, .count = 1 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EM_FKB, .count = 32 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_WC_FKB, .count = 32 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, .count = 1024 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, .count = 1024 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, .count = 1024 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .count = 128 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .count = 6 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .count = 128 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, .count = 2048 }, { - .app_id = 3, + .app_id = 11, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_EM_RECORD, .count = 6144 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .count = 32 + .count = 128 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, .count = 2 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, - .count = 4 + .count = 62 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .count = 4 + .count = 8 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, - .count = 4 + .count = 32 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .count = 128 + .count = 4080 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .count = 128 + .count = 4080 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, - .count = 4 + .resource_type = TF_TBL_TYPE_EM_FKB, + .count = 8 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, - .count = 4 + .resource_type = TF_TBL_TYPE_WC_FKB, + .count = 8 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .count = 4 + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 512 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_SP_SMAC, - .count = 4 + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 512 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, + .count = 512 + }, + { + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .count = 32 + .count = 128 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .count = 2 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .count = 32 - }, - { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .direction = TF_DIR_RX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 4 + .count = 64 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_EM_RECORD, - .count = 1024 - }, - { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .direction = TF_DIR_TX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .count = 32 + .count = 4096 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, .count = 2 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, - .count = 4 + .count = 32 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .count = 4 + .count = 8 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, - .count = 4 + .count = 32 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .count = 128 + .count = 4096 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .count = 128 - }, - { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .direction = TF_DIR_TX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, - .count = 4 + .count = 1024 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, - .count = 4 + .resource_type = TF_TBL_TYPE_EM_FKB, + .count = 8 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .count = 4 + .resource_type = TF_TBL_TYPE_WC_FKB, + .count = 8 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, - .count = 4 + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 512 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, - .count = 4 + .count = 512 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, - .count = 4 - }, - { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .direction = TF_DIR_TX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .count = 32 + .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, + .count = 512 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .count = 2 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .count = 32 + .count = 64 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 4 + .count = 1024 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 12, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_EM_RECORD, - .count = 1024 + .count = 4096 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .count = 32 + .count = 422 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, - .count = 2 + .count = 6 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, - .count = 32 + .count = 191 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .count = 16 + .count = 63 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, - .count = 32 + .count = 192 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .count = 3340 + .count = 8192 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .count = 3340 + .count = 6912 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EM_FKB, - .count = 4 + .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, + .count = 1023 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_WC_FKB, - .count = 4 + .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, + .count = 511 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, - .count = 4 + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .count = 15 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, - .count = 4 + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC, + .count = 255 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 1 + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .count = 32 + .count = 422 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .count = 2 + .count = 6 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .count = 32 + .count = 960 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 4 + .count = 88 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_EM_RECORD, - .count = 1024 + .count = 13168 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_TBL_SCOPE, + .count = 1 + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .count = 32 + .count = 292 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, - .count = 2 + .count = 148 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, - .count = 4 + .count = 191 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .count = 4 + .count = 63 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, - .count = 4 + .count = 192 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .count = 512 + .count = 8192 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .count = 256 + .count = 6912 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EM_FKB, - .count = 4 + .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, + .count = 1023 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_WC_FKB, - .count = 4 + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 511 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, - .count = 4 + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .count = 223 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, + .count = 255 + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, - .count = 4 + .count = 488 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, + .count = 511 + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 1 + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .count = 32 + .count = 292 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .count = 2 + .count = 144 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .count = 32 + .count = 960 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 4 + .count = 928 }, { - .app_id = 4, - .device_id = BNXT_ULP_DEVICE_ID_THOR, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_EM_RECORD, - .count = 1024 + .count = 15232 }, { - .app_id = 5, + .app_id = 13, .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_EM_TBL_TYPE_TBL_SCOPE, + .count = 1 + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .count = 32 + .count = 64 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, .count = 2 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, - .count = 4 + .count = 16 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .count = 4 + .count = 16 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, - .count = 4 + .count = 16 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .count = 128 + .count = 1024 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .count = 128 + .count = 1024 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, - .count = 4 + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 5 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, - .count = 4 + .resource_type = TF_TBL_TYPE_EM_FKB, + .count = 8 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .count = 4 + .resource_type = TF_TBL_TYPE_WC_FKB, + .count = 8 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_SP_SMAC, - .count = 4 + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 1000 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .count = 64 + }, + { + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .count = 32 + .count = 64 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .count = 2 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .count = 32 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .direction = TF_DIR_RX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 64 - }, - { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_EM_RECORD, - .count = 1024 - }, - { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .direction = TF_DIR_TX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .count = 32 + .count = 8192 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, - .count = 2 + .count = 64 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, - .count = 4 + .count = 16 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .count = 4 + .count = 16 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, - .count = 4 + .count = 16 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .count = 128 + .count = 2048 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .count = 128 + .count = 2048 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, - .count = 4 + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 5 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, - .count = 4 + .resource_type = TF_TBL_TYPE_EM_FKB, + .count = 8 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .count = 4 + .resource_type = TF_TBL_TYPE_WC_FKB, + .count = 8 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, - .count = 4 + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .count = 1000 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, - .count = 4 - }, - { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .direction = TF_DIR_TX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, - .count = 4 - }, - { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, - .direction = TF_DIR_TX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .count = 32 + .count = 100 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .count = 2 + .count = 64 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .count = 32 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 4 + .count = 2032 }, { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_WH_PLUS, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_EM_RECORD, - .count = 1024 + .count = 8192 }, { - .app_id = 5, + .app_id = 13, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_METADATA, + .count = 1 + }, + { + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .count = 32 + .count = 272 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, - .count = 2 + .count = 6 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, .count = 32 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .count = 16 + .count = 32 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, .count = 32 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .count = 528 + .count = 8192 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .count = 256 + .count = 8192 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EM_FKB, - .count = 4 + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 5 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_WC_FKB, - .count = 4 + .resource_type = TF_TBL_TYPE_METER_PROF, + .count = 256 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, - .count = 4 + .resource_type = TF_TBL_TYPE_METER_INST, + .count = 1023 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, - .count = 4 + .resource_type = TF_TBL_TYPE_EM_FKB, + .count = 32 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_WC_FKB, + .count = 31 + }, + { + .app_id = 14, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .count = 32 + .count = 272 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .count = 2 + .count = 6 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .count = 32 + .count = 128 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 512 + .count = 4096 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_RX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_EM_RECORD, - .count = 1024 - }, - { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_THOR, - .direction = TF_DIR_TX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .count = 32 + .count = 16384 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_L2_CTXT_LOW, - .count = 2 + .count = 272 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_WC_PROF, - .count = 4 + .count = 32 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .count = 4 + .count = 63 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_EM_PROF, - .count = 4 + .count = 32 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .count = 512 + .count = 8192 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .count = 256 - }, - { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_THOR, - .direction = TF_DIR_TX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EM_FKB, - .count = 4 + .count = 8192 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_WC_FKB, - .count = 4 + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .count = 5 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, - .count = 4 + .resource_type = TF_TBL_TYPE_EM_FKB, + .count = 32 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, - .count = 4 - }, - { - .app_id = 5, - .device_id = BNXT_ULP_DEVICE_ID_THOR, - .direction = TF_DIR_TX, - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .resource_type = TF_TBL_TYPE_WC_FKB, .count = 32 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .count = 2 + .count = 272 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .count = 32 + .count = 128 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .count = 4 + .count = 4096 }, { - .app_id = 5, + .app_id = 14, .device_id = BNXT_ULP_DEVICE_ID_THOR, .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_EM_TBL_TYPE_EM_RECORD, - .count = 1024 + .count = 16384 + }, + { + .app_id = 14, + .device_id = BNXT_ULP_DEVICE_ID_THOR, + .direction = TF_DIR_TX, + .session_type = BNXT_ULP_SESSION_TYPE_DEFAULT, + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_METADATA, + .count = 1 } }; @@ -6138,787 +16531,1095 @@ uint32_t ulp_act_prop_map_table[] = { BNXT_ULP_ACT_PROP_SZ_RSS_KEY_LEN, [BNXT_ULP_ACT_PROP_IDX_RSS_KEY] = BNXT_ULP_ACT_PROP_SZ_RSS_KEY, + [BNXT_ULP_ACT_PROP_IDX_RSS_QUEUE_NUM] = + BNXT_ULP_ACT_PROP_SZ_RSS_QUEUE_NUM, + [BNXT_ULP_ACT_PROP_IDX_RSS_QUEUE] = + BNXT_ULP_ACT_PROP_SZ_RSS_QUEUE, + [BNXT_ULP_ACT_PROP_IDX_QUEUE_INDEX] = + BNXT_ULP_ACT_PROP_SZ_QUEUE_INDEX, + [BNXT_ULP_ACT_PROP_IDX_METER_PROF_ID_UPDATE] = + BNXT_ULP_ACT_PROP_SZ_METER_PROF_ID_UPDATE, + [BNXT_ULP_ACT_PROP_IDX_METER_PROF_ID] = + BNXT_ULP_ACT_PROP_SZ_METER_PROF_ID, + [BNXT_ULP_ACT_PROP_IDX_METER_PROF_CIR] = + BNXT_ULP_ACT_PROP_SZ_METER_PROF_CIR, + [BNXT_ULP_ACT_PROP_IDX_METER_PROF_EIR] = + BNXT_ULP_ACT_PROP_SZ_METER_PROF_EIR, + [BNXT_ULP_ACT_PROP_IDX_METER_PROF_CBS] = + BNXT_ULP_ACT_PROP_SZ_METER_PROF_CBS, + [BNXT_ULP_ACT_PROP_IDX_METER_PROF_EBS] = + BNXT_ULP_ACT_PROP_SZ_METER_PROF_EBS, + [BNXT_ULP_ACT_PROP_IDX_METER_PROF_RFC2698] = + BNXT_ULP_ACT_PROP_SZ_METER_PROF_RFC2698, + [BNXT_ULP_ACT_PROP_IDX_METER_PROF_PM] = + BNXT_ULP_ACT_PROP_SZ_METER_PROF_PM, + [BNXT_ULP_ACT_PROP_IDX_METER_PROF_EBND] = + BNXT_ULP_ACT_PROP_SZ_METER_PROF_EBND, + [BNXT_ULP_ACT_PROP_IDX_METER_PROF_CBND] = + BNXT_ULP_ACT_PROP_SZ_METER_PROF_CBND, + [BNXT_ULP_ACT_PROP_IDX_METER_PROF_EBSM] = + BNXT_ULP_ACT_PROP_SZ_METER_PROF_EBSM, + [BNXT_ULP_ACT_PROP_IDX_METER_PROF_CBSM] = + BNXT_ULP_ACT_PROP_SZ_METER_PROF_CBSM, + [BNXT_ULP_ACT_PROP_IDX_METER_PROF_CF] = + BNXT_ULP_ACT_PROP_SZ_METER_PROF_CF, + [BNXT_ULP_ACT_PROP_IDX_METER_INST_ID] = + BNXT_ULP_ACT_PROP_SZ_METER_INST_ID, + [BNXT_ULP_ACT_PROP_IDX_METER_INST_ECN_RMP_EN_UPDATE] = + BNXT_ULP_ACT_PROP_SZ_METER_INST_ECN_RMP_EN_UPDATE, + [BNXT_ULP_ACT_PROP_IDX_METER_INST_ECN_RMP_EN] = + BNXT_ULP_ACT_PROP_SZ_METER_INST_ECN_RMP_EN, + [BNXT_ULP_ACT_PROP_IDX_METER_INST_MTR_VAL_UPDATE] = + BNXT_ULP_ACT_PROP_SZ_METER_INST_MTR_VAL_UPDATE, + [BNXT_ULP_ACT_PROP_IDX_METER_INST_MTR_VAL] = + BNXT_ULP_ACT_PROP_SZ_METER_INST_MTR_VAL, + [BNXT_ULP_ACT_PROP_IDX_GOTO_CHAINID] = + BNXT_ULP_ACT_PROP_SZ_GOTO_CHAINID, [BNXT_ULP_ACT_PROP_IDX_LAST] = BNXT_ULP_ACT_PROP_SZ_LAST }; uint8_t ulp_glb_field_tbl[] = { - [2048] = 0, - [2049] = 1, - [2050] = 2, - [2052] = 3, - [2054] = 4, - [2088] = 5, - [2090] = 6, - [2092] = 7, - [2094] = 8, - [2096] = 9, - [2098] = 10, - [2100] = 11, - [2102] = 12, - [2176] = 0, - [2177] = 1, - [2178] = 2, - [2180] = 3, - [2182] = 4, - [2196] = 5, - [2198] = 6, - [2200] = 7, - [2202] = 8, - [2204] = 9, - [2206] = 10, - [2208] = 11, - [2210] = 12, - [2212] = 13, - [2214] = 14, - [2304] = 0, - [2305] = 1, - [2306] = 2, - [2308] = 3, - [2310] = 4, - [2344] = 8, - [2346] = 9, - [2348] = 10, - [2350] = 11, - [2352] = 12, - [2354] = 13, - [2356] = 14, - [2358] = 15, - [2386] = 5, - [2390] = 6, - [2394] = 7, - [2432] = 0, - [2433] = 1, - [2434] = 2, - [2436] = 3, - [2438] = 4, - [2452] = 8, - [2454] = 9, - [2456] = 10, - [2458] = 11, - [2460] = 12, - [2462] = 13, - [2464] = 14, - [2466] = 15, - [2468] = 16, - [2470] = 17, - [2514] = 5, - [2518] = 6, - [2522] = 7, - [2560] = 0, - [2561] = 1, - [2562] = 2, - [2564] = 3, - [2566] = 4, - [2600] = 5, - [2602] = 6, - [2604] = 7, - [2606] = 8, - [2608] = 9, - [2610] = 10, - [2612] = 11, - [2614] = 12, - [2616] = 13, - [2618] = 14, - [2620] = 15, - [2622] = 16, - [2624] = 17, - [2626] = 18, - [2628] = 19, - [2630] = 20, - [2632] = 21, - [2688] = 0, - [2689] = 1, - [2690] = 2, - [2692] = 3, - [2694] = 4, - [2708] = 5, - [2710] = 6, - [2712] = 7, - [2714] = 8, - [2716] = 9, - [2718] = 10, - [2720] = 11, - [2722] = 12, - [2724] = 13, - [2726] = 14, - [2744] = 15, - [2746] = 16, - [2748] = 17, - [2750] = 18, - [2752] = 19, - [2754] = 20, - [2756] = 21, - [2758] = 22, - [2760] = 23, - [2816] = 0, - [2817] = 1, - [2818] = 2, - [2820] = 3, - [2822] = 4, - [2856] = 5, - [2858] = 6, - [2860] = 7, - [2862] = 8, - [2864] = 9, - [2866] = 10, - [2868] = 11, - [2870] = 12, - [2890] = 13, - [2892] = 14, - [2894] = 15, - [2896] = 16, - [2944] = 0, - [2945] = 1, - [2946] = 2, - [2948] = 3, - [2950] = 4, - [2964] = 5, - [2966] = 6, - [2968] = 7, - [2970] = 8, - [2972] = 9, - [2974] = 10, - [2976] = 11, - [2978] = 12, - [2980] = 13, - [2982] = 14, - [3018] = 15, - [3020] = 16, - [3022] = 17, - [3024] = 18, - [3072] = 0, - [3073] = 1, - [3074] = 2, - [3076] = 3, - [3078] = 4, - [3112] = 8, - [3114] = 9, - [3116] = 10, - [3118] = 11, - [3120] = 12, - [3122] = 13, - [3124] = 14, - [3126] = 15, - [3128] = 16, - [3130] = 17, - [3132] = 18, - [3134] = 19, - [3136] = 20, - [3138] = 21, - [3140] = 22, - [3142] = 23, - [3144] = 24, - [3154] = 5, - [3158] = 6, - [3162] = 7, - [3200] = 0, - [3201] = 1, - [3202] = 2, - [3204] = 3, - [3206] = 4, - [3220] = 8, - [3222] = 9, - [3224] = 10, - [3226] = 11, - [3228] = 12, - [3230] = 13, - [3232] = 14, - [3234] = 15, - [3236] = 16, - [3238] = 17, - [3256] = 18, - [3258] = 19, - [3260] = 20, - [3262] = 21, - [3264] = 22, - [3266] = 23, - [3268] = 24, - [3270] = 25, - [3272] = 26, - [3282] = 5, - [3286] = 6, - [3290] = 7, - [3328] = 0, - [3329] = 1, - [3330] = 2, - [3332] = 3, - [3334] = 4, - [3368] = 8, - [3370] = 9, - [3372] = 10, - [3374] = 11, - [3376] = 12, - [3378] = 13, - [3380] = 14, - [3382] = 15, - [3402] = 16, - [3404] = 17, - [3406] = 18, - [3408] = 19, - [3410] = 5, - [3414] = 6, - [3418] = 7, - [3456] = 0, - [3457] = 1, - [3458] = 2, - [3460] = 3, - [3462] = 4, - [3476] = 8, - [3478] = 9, - [3480] = 10, - [3482] = 11, - [3484] = 12, - [3486] = 13, - [3488] = 14, - [3490] = 15, - [3492] = 16, - [3494] = 17, - [3530] = 18, - [3532] = 19, - [3534] = 20, - [3536] = 21, - [3538] = 5, - [3542] = 6, - [3546] = 7, - [3584] = 0, - [3585] = 1, - [3586] = 2, - [3588] = 3, - [3590] = 4, - [3604] = 5, - [3606] = 6, - [3608] = 7, - [3610] = 8, - [3612] = 9, - [3614] = 10, - [3616] = 11, - [3618] = 12, - [3620] = 13, - [3622] = 14, - [3658] = 15, - [3660] = 16, - [3662] = 17, - [3664] = 18, - [3678] = 19, - [3679] = 20, - [3680] = 21, - [3681] = 22, [4096] = 0, [4097] = 1, - [4098] = 2, - [4100] = 3, - [4102] = 4, - [4116] = 5, - [4118] = 6, - [4120] = 7, - [4122] = 8, - [4124] = 9, - [4126] = 10, - [4128] = 11, - [4130] = 12, - [4132] = 13, - [4134] = 14, - [4170] = 15, - [4172] = 16, - [4174] = 17, - [4176] = 18, - [4190] = 19, - [4191] = 20, - [4192] = 21, - [4193] = 22, + [4102] = 2, + [4104] = 3, + [4106] = 4, + [4140] = 5, + [4142] = 6, + [4144] = 7, + [4146] = 8, + [4148] = 9, + [4150] = 10, + [4152] = 11, + [4154] = 12, [4224] = 0, [4225] = 1, - [4227] = 20, - [4229] = 21, - [4231] = 22, - [4244] = 2, - [4246] = 3, - [4248] = 4, - [4250] = 5, - [4252] = 6, - [4254] = 7, - [4256] = 8, - [4258] = 9, - [4260] = 10, - [4262] = 11, - [4265] = 23, - [4267] = 24, - [4269] = 25, - [4271] = 26, - [4273] = 27, - [4275] = 28, - [4277] = 29, - [4279] = 30, - [4298] = 12, - [4300] = 13, - [4302] = 14, - [4304] = 15, - [4318] = 16, - [4319] = 17, - [4320] = 18, - [4321] = 19, + [4230] = 2, + [4232] = 3, + [4234] = 4, + [4248] = 5, + [4250] = 6, + [4252] = 7, + [4254] = 8, + [4256] = 9, + [4258] = 10, + [4260] = 11, + [4262] = 12, + [4264] = 13, + [4266] = 14, [4352] = 0, [4353] = 1, - [4355] = 20, - [4357] = 21, - [4359] = 22, - [4372] = 2, - [4373] = 23, - [4374] = 3, - [4375] = 24, - [4376] = 4, - [4377] = 25, - [4378] = 5, - [4379] = 26, - [4380] = 6, - [4381] = 27, - [4382] = 7, - [4383] = 28, - [4384] = 8, - [4385] = 29, - [4386] = 9, - [4387] = 30, - [4388] = 10, - [4389] = 31, - [4390] = 11, - [4391] = 32, - [4426] = 12, - [4428] = 13, - [4430] = 14, - [4432] = 15, - [4446] = 16, - [4447] = 17, - [4448] = 18, - [4449] = 19, + [4358] = 2, + [4360] = 3, + [4362] = 4, + [4396] = 8, + [4398] = 9, + [4400] = 10, + [4402] = 11, + [4404] = 12, + [4406] = 13, + [4408] = 14, + [4410] = 15, + [4452] = 5, + [4456] = 6, + [4460] = 7, [4480] = 0, [4481] = 1, - [4483] = 20, - [4485] = 21, - [4487] = 22, - [4500] = 2, - [4502] = 3, - [4504] = 4, - [4506] = 5, - [4508] = 6, - [4510] = 7, - [4512] = 8, - [4514] = 9, - [4516] = 10, - [4518] = 11, - [4521] = 23, - [4523] = 24, - [4525] = 25, - [4527] = 26, - [4529] = 27, - [4531] = 28, - [4533] = 29, - [4535] = 30, - [4537] = 31, - [4539] = 32, - [4541] = 33, - [4543] = 34, - [4545] = 35, - [4547] = 36, - [4549] = 37, - [4551] = 38, - [4553] = 39, - [4554] = 12, - [4556] = 13, - [4558] = 14, - [4560] = 15, - [4574] = 16, - [4575] = 17, - [4576] = 18, - [4577] = 19, + [4486] = 2, + [4488] = 3, + [4490] = 4, + [4504] = 8, + [4506] = 9, + [4508] = 10, + [4510] = 11, + [4512] = 12, + [4514] = 13, + [4516] = 14, + [4518] = 15, + [4520] = 16, + [4522] = 17, + [4580] = 5, + [4584] = 6, + [4588] = 7, [4608] = 0, [4609] = 1, - [4611] = 20, - [4613] = 21, - [4615] = 22, - [4628] = 2, - [4629] = 23, - [4630] = 3, - [4631] = 24, - [4632] = 4, - [4633] = 25, - [4634] = 5, - [4635] = 26, - [4636] = 6, - [4637] = 27, - [4638] = 7, - [4639] = 28, - [4640] = 8, - [4641] = 29, - [4642] = 9, - [4643] = 30, - [4644] = 10, - [4645] = 31, - [4646] = 11, - [4647] = 32, - [4665] = 33, - [4667] = 34, - [4669] = 35, - [4671] = 36, - [4673] = 37, - [4675] = 38, - [4677] = 39, - [4679] = 40, - [4681] = 41, - [4682] = 12, - [4684] = 13, - [4686] = 14, - [4688] = 15, - [4702] = 16, - [4703] = 17, - [4704] = 18, - [4705] = 19, + [4614] = 2, + [4616] = 3, + [4618] = 4, + [4652] = 5, + [4654] = 6, + [4656] = 7, + [4658] = 8, + [4660] = 9, + [4662] = 10, + [4664] = 11, + [4666] = 12, + [4682] = 13, + [4684] = 14, + [4686] = 15, + [4688] = 16, + [4690] = 17, + [4692] = 18, + [4694] = 19, + [4696] = 20, + [4698] = 21, [4736] = 0, [4737] = 1, - [4739] = 20, - [4741] = 21, - [4743] = 22, - [4756] = 2, - [4758] = 3, - [4760] = 4, - [4762] = 5, - [4764] = 6, - [4766] = 7, - [4768] = 8, - [4770] = 9, - [4772] = 10, - [4774] = 11, - [4777] = 23, - [4779] = 24, - [4781] = 25, - [4783] = 26, - [4785] = 27, - [4787] = 28, - [4789] = 29, - [4791] = 30, - [4810] = 12, - [4811] = 31, - [4812] = 13, - [4813] = 32, - [4814] = 14, - [4815] = 33, - [4816] = 15, - [4817] = 34, - [4830] = 16, - [4831] = 17, - [4832] = 18, - [4833] = 19, + [4742] = 2, + [4744] = 3, + [4746] = 4, + [4760] = 5, + [4762] = 6, + [4764] = 7, + [4766] = 8, + [4768] = 9, + [4770] = 10, + [4772] = 11, + [4774] = 12, + [4776] = 13, + [4778] = 14, + [4810] = 15, + [4812] = 16, + [4814] = 17, + [4816] = 18, + [4818] = 19, + [4820] = 20, + [4822] = 21, + [4824] = 22, + [4826] = 23, [4864] = 0, [4865] = 1, - [4867] = 20, - [4869] = 21, - [4871] = 22, - [4884] = 2, - [4885] = 23, - [4886] = 3, - [4887] = 24, - [4888] = 4, - [4889] = 25, - [4890] = 5, - [4891] = 26, - [4892] = 6, - [4893] = 27, - [4894] = 7, - [4895] = 28, - [4896] = 8, - [4897] = 29, - [4898] = 9, - [4899] = 30, - [4900] = 10, - [4901] = 31, - [4902] = 11, - [4903] = 32, - [4938] = 12, - [4939] = 33, - [4940] = 13, - [4941] = 34, - [4942] = 14, - [4943] = 35, - [4944] = 15, - [4945] = 36, - [4958] = 16, - [4959] = 17, - [4960] = 18, - [4961] = 19, + [4870] = 2, + [4872] = 3, + [4874] = 4, + [4908] = 5, + [4910] = 6, + [4912] = 7, + [4914] = 8, + [4916] = 9, + [4918] = 10, + [4920] = 11, + [4922] = 12, + [4956] = 13, + [4958] = 14, + [4960] = 15, + [4962] = 16, [4992] = 0, [4993] = 1, - [4995] = 20, - [4997] = 21, - [4999] = 22, - [5003] = 33, - [5005] = 34, - [5007] = 35, - [5009] = 36, - [5011] = 37, - [5012] = 2, - [5013] = 23, - [5014] = 3, - [5015] = 24, - [5016] = 4, - [5017] = 25, - [5018] = 5, - [5019] = 26, - [5020] = 6, - [5021] = 27, - [5022] = 7, - [5023] = 28, - [5024] = 8, - [5025] = 29, - [5026] = 9, - [5027] = 30, - [5028] = 10, - [5029] = 31, - [5030] = 11, - [5031] = 32, - [5066] = 12, - [5068] = 13, - [5070] = 14, - [5072] = 15, + [4998] = 2, + [5000] = 3, + [5002] = 4, + [5016] = 5, + [5018] = 6, + [5020] = 7, + [5022] = 8, + [5024] = 9, + [5026] = 10, + [5028] = 11, + [5030] = 12, + [5032] = 13, + [5034] = 14, + [5084] = 15, [5086] = 16, - [5087] = 17, - [5088] = 18, - [5089] = 19, - [6144] = 0, - [6145] = 1, - [6146] = 2, - [6148] = 3, - [6150] = 4, - [6184] = 5, - [6186] = 6, - [6188] = 7, - [6190] = 8, - [6192] = 9, - [6194] = 10, - [6196] = 11, - [6198] = 12, - [6272] = 0, - [6273] = 1, - [6274] = 2, - [6276] = 3, - [6278] = 4, - [6292] = 5, - [6294] = 6, - [6296] = 7, - [6298] = 8, - [6300] = 9, - [6302] = 10, - [6304] = 11, - [6306] = 12, - [6308] = 13, - [6310] = 14, - [6400] = 0, - [6401] = 1, - [6402] = 2, - [6404] = 3, - [6406] = 4, - [6440] = 8, - [6442] = 9, - [6444] = 10, - [6446] = 11, - [6448] = 12, - [6450] = 13, - [6452] = 14, - [6454] = 15, - [6482] = 5, - [6486] = 6, - [6490] = 7, - [6528] = 0, - [6529] = 1, - [6530] = 2, - [6532] = 3, - [6534] = 4, - [6548] = 8, - [6550] = 9, - [6552] = 10, - [6554] = 11, - [6556] = 12, - [6558] = 13, - [6560] = 14, - [6562] = 15, - [6564] = 16, - [6566] = 17, - [6610] = 5, - [6614] = 6, - [6618] = 7, - [6656] = 0, - [6657] = 1, - [6658] = 2, - [6660] = 3, - [6662] = 4, - [6696] = 5, - [6698] = 6, - [6700] = 7, - [6702] = 8, - [6704] = 9, - [6706] = 10, - [6708] = 11, - [6710] = 12, - [6712] = 13, - [6714] = 14, - [6716] = 15, - [6718] = 16, - [6720] = 17, - [6722] = 18, - [6724] = 19, - [6726] = 20, - [6728] = 21, - [6784] = 0, - [6785] = 1, - [6786] = 2, - [6788] = 3, - [6790] = 4, - [6804] = 5, - [6806] = 6, - [6808] = 7, - [6810] = 8, - [6812] = 9, - [6814] = 10, - [6816] = 11, - [6818] = 12, - [6820] = 13, - [6822] = 14, - [6840] = 15, - [6842] = 16, - [6844] = 17, - [6846] = 18, - [6848] = 19, - [6850] = 20, - [6852] = 21, - [6854] = 22, - [6856] = 23, - [6912] = 0, - [6913] = 1, - [6914] = 2, - [6916] = 3, - [6918] = 4, - [6952] = 5, - [6954] = 6, - [6956] = 7, - [6958] = 8, - [6960] = 9, - [6962] = 10, - [6964] = 11, - [6966] = 12, - [6986] = 13, - [6988] = 14, - [6990] = 15, - [6992] = 16, - [7040] = 0, - [7041] = 1, - [7042] = 2, - [7044] = 3, - [7046] = 4, - [7060] = 5, - [7062] = 6, - [7064] = 7, - [7066] = 8, - [7068] = 9, - [7070] = 10, - [7072] = 11, - [7074] = 12, - [7076] = 13, - [7078] = 14, - [7114] = 15, - [7116] = 16, - [7118] = 17, - [7120] = 18, - [7168] = 0, - [7169] = 1, - [7170] = 2, - [7172] = 3, - [7174] = 4, - [7208] = 8, - [7210] = 9, - [7212] = 10, - [7214] = 11, - [7216] = 12, - [7218] = 13, - [7220] = 14, - [7222] = 15, - [7224] = 16, - [7226] = 17, - [7228] = 18, - [7230] = 19, - [7232] = 20, - [7234] = 21, - [7236] = 22, - [7238] = 23, - [7240] = 24, - [7250] = 5, - [7254] = 6, - [7258] = 7, - [7296] = 0, - [7297] = 1, - [7298] = 2, - [7300] = 3, - [7302] = 4, - [7316] = 8, - [7318] = 9, - [7320] = 10, - [7322] = 11, - [7324] = 12, - [7326] = 13, - [7328] = 14, - [7330] = 15, - [7332] = 16, - [7334] = 17, - [7352] = 18, - [7354] = 19, - [7356] = 20, - [7358] = 21, - [7360] = 22, - [7362] = 23, - [7364] = 24, - [7366] = 25, - [7368] = 26, - [7378] = 5, - [7382] = 6, - [7386] = 7, - [7424] = 0, - [7425] = 1, - [7426] = 2, - [7428] = 3, - [7430] = 4, - [7464] = 8, - [7466] = 9, - [7468] = 10, - [7470] = 11, - [7472] = 12, - [7474] = 13, - [7476] = 14, - [7478] = 15, - [7498] = 16, - [7500] = 17, - [7502] = 18, - [7504] = 19, - [7506] = 5, - [7510] = 6, - [7514] = 7, - [7552] = 0, - [7553] = 1, - [7554] = 2, - [7556] = 3, - [7558] = 4, - [7572] = 8, - [7574] = 9, - [7576] = 10, - [7578] = 11, - [7580] = 12, - [7582] = 13, - [7584] = 14, - [7586] = 15, - [7588] = 16, - [7590] = 17, - [7626] = 18, - [7628] = 19, - [7630] = 20, - [7632] = 21, - [7634] = 5, - [7638] = 6, - [7642] = 7 + [5088] = 17, + [5090] = 18, + [5120] = 0, + [5121] = 1, + [5126] = 2, + [5128] = 3, + [5130] = 4, + [5164] = 8, + [5166] = 9, + [5168] = 10, + [5170] = 11, + [5172] = 12, + [5174] = 13, + [5176] = 14, + [5178] = 15, + [5194] = 16, + [5196] = 17, + [5198] = 18, + [5200] = 19, + [5202] = 20, + [5204] = 21, + [5206] = 22, + [5208] = 23, + [5210] = 24, + [5220] = 5, + [5224] = 6, + [5228] = 7, + [5248] = 0, + [5249] = 1, + [5254] = 2, + [5256] = 3, + [5258] = 4, + [5272] = 8, + [5274] = 9, + [5276] = 10, + [5278] = 11, + [5280] = 12, + [5282] = 13, + [5284] = 14, + [5286] = 15, + [5288] = 16, + [5290] = 17, + [5322] = 18, + [5324] = 19, + [5326] = 20, + [5328] = 21, + [5330] = 22, + [5332] = 23, + [5334] = 24, + [5336] = 25, + [5338] = 26, + [5348] = 5, + [5352] = 6, + [5356] = 7, + [5376] = 0, + [5377] = 1, + [5382] = 2, + [5384] = 3, + [5386] = 4, + [5420] = 8, + [5422] = 9, + [5424] = 10, + [5426] = 11, + [5428] = 12, + [5430] = 13, + [5432] = 14, + [5434] = 15, + [5468] = 16, + [5470] = 17, + [5472] = 18, + [5474] = 19, + [5476] = 5, + [5480] = 6, + [5484] = 7, + [5504] = 0, + [5505] = 1, + [5510] = 2, + [5512] = 3, + [5514] = 4, + [5528] = 8, + [5530] = 9, + [5532] = 10, + [5534] = 11, + [5536] = 12, + [5538] = 13, + [5540] = 14, + [5542] = 15, + [5544] = 16, + [5546] = 17, + [5596] = 18, + [5598] = 19, + [5600] = 20, + [5602] = 21, + [5604] = 5, + [5608] = 6, + [5612] = 7, + [5632] = 0, + [5633] = 1, + [5638] = 2, + [5640] = 3, + [5642] = 4, + [5656] = 5, + [5658] = 6, + [5660] = 7, + [5662] = 8, + [5664] = 9, + [5666] = 10, + [5668] = 11, + [5670] = 12, + [5672] = 13, + [5674] = 14, + [5724] = 15, + [5726] = 16, + [5728] = 17, + [5730] = 18, + [5744] = 19, + [5745] = 20, + [5746] = 21, + [5747] = 22, + [8192] = 0, + [8193] = 1, + [8198] = 2, + [8200] = 3, + [8202] = 4, + [8236] = 5, + [8238] = 6, + [8240] = 7, + [8242] = 8, + [8244] = 9, + [8246] = 10, + [8248] = 11, + [8250] = 12, + [8284] = 13, + [8286] = 14, + [8288] = 15, + [8290] = 16, + [8304] = 17, + [8305] = 18, + [8306] = 19, + [8307] = 20, + [8320] = 0, + [8321] = 1, + [8326] = 2, + [8328] = 3, + [8330] = 4, + [8344] = 5, + [8346] = 6, + [8348] = 7, + [8350] = 8, + [8352] = 9, + [8354] = 10, + [8356] = 11, + [8358] = 12, + [8360] = 13, + [8362] = 14, + [8412] = 15, + [8414] = 16, + [8416] = 17, + [8418] = 18, + [8432] = 19, + [8433] = 20, + [8434] = 21, + [8435] = 22, + [8448] = 0, + [8449] = 1, + [8455] = 18, + [8457] = 19, + [8459] = 20, + [8492] = 2, + [8493] = 21, + [8494] = 3, + [8495] = 22, + [8496] = 4, + [8497] = 23, + [8498] = 5, + [8499] = 24, + [8500] = 6, + [8501] = 25, + [8502] = 7, + [8503] = 26, + [8504] = 8, + [8505] = 27, + [8506] = 9, + [8507] = 28, + [8540] = 10, + [8542] = 11, + [8544] = 12, + [8546] = 13, + [8560] = 14, + [8561] = 15, + [8562] = 16, + [8563] = 17, + [8576] = 0, + [8577] = 1, + [8583] = 20, + [8585] = 21, + [8587] = 22, + [8600] = 2, + [8602] = 3, + [8604] = 4, + [8606] = 5, + [8608] = 6, + [8610] = 7, + [8612] = 8, + [8614] = 9, + [8616] = 10, + [8618] = 11, + [8621] = 23, + [8623] = 24, + [8625] = 25, + [8627] = 26, + [8629] = 27, + [8631] = 28, + [8633] = 29, + [8635] = 30, + [8668] = 12, + [8670] = 13, + [8672] = 14, + [8674] = 15, + [8688] = 16, + [8689] = 17, + [8690] = 18, + [8691] = 19, + [8704] = 0, + [8705] = 1, + [8711] = 18, + [8713] = 19, + [8715] = 20, + [8729] = 21, + [8731] = 22, + [8733] = 23, + [8735] = 24, + [8737] = 25, + [8739] = 26, + [8741] = 27, + [8743] = 28, + [8745] = 29, + [8747] = 30, + [8748] = 2, + [8750] = 3, + [8752] = 4, + [8754] = 5, + [8756] = 6, + [8758] = 7, + [8760] = 8, + [8762] = 9, + [8796] = 10, + [8798] = 11, + [8800] = 12, + [8802] = 13, + [8816] = 14, + [8817] = 15, + [8818] = 16, + [8819] = 17, + [8832] = 0, + [8833] = 1, + [8839] = 20, + [8841] = 21, + [8843] = 22, + [8856] = 2, + [8857] = 23, + [8858] = 3, + [8859] = 24, + [8860] = 4, + [8861] = 25, + [8862] = 5, + [8863] = 26, + [8864] = 6, + [8865] = 27, + [8866] = 7, + [8867] = 28, + [8868] = 8, + [8869] = 29, + [8870] = 9, + [8871] = 30, + [8872] = 10, + [8873] = 31, + [8874] = 11, + [8875] = 32, + [8924] = 12, + [8926] = 13, + [8928] = 14, + [8930] = 15, + [8944] = 16, + [8945] = 17, + [8946] = 18, + [8947] = 19, + [8960] = 0, + [8961] = 1, + [8967] = 18, + [8969] = 19, + [8971] = 20, + [9004] = 2, + [9005] = 21, + [9006] = 3, + [9007] = 22, + [9008] = 4, + [9009] = 23, + [9010] = 5, + [9011] = 24, + [9012] = 6, + [9013] = 25, + [9014] = 7, + [9015] = 26, + [9016] = 8, + [9017] = 27, + [9018] = 9, + [9019] = 28, + [9035] = 29, + [9037] = 30, + [9039] = 31, + [9041] = 32, + [9043] = 33, + [9045] = 34, + [9047] = 35, + [9049] = 36, + [9051] = 37, + [9052] = 10, + [9054] = 11, + [9056] = 12, + [9058] = 13, + [9072] = 14, + [9073] = 15, + [9074] = 16, + [9075] = 17, + [9088] = 0, + [9089] = 1, + [9095] = 20, + [9097] = 21, + [9099] = 22, + [9112] = 2, + [9114] = 3, + [9116] = 4, + [9118] = 5, + [9120] = 6, + [9122] = 7, + [9124] = 8, + [9126] = 9, + [9128] = 10, + [9130] = 11, + [9133] = 23, + [9135] = 24, + [9137] = 25, + [9139] = 26, + [9141] = 27, + [9143] = 28, + [9145] = 29, + [9147] = 30, + [9163] = 31, + [9165] = 32, + [9167] = 33, + [9169] = 34, + [9171] = 35, + [9173] = 36, + [9175] = 37, + [9177] = 38, + [9179] = 39, + [9180] = 12, + [9182] = 13, + [9184] = 14, + [9186] = 15, + [9200] = 16, + [9201] = 17, + [9202] = 18, + [9203] = 19, + [9216] = 0, + [9217] = 1, + [9223] = 18, + [9225] = 19, + [9227] = 20, + [9241] = 21, + [9243] = 22, + [9245] = 23, + [9247] = 24, + [9249] = 25, + [9251] = 26, + [9253] = 27, + [9255] = 28, + [9257] = 29, + [9259] = 30, + [9260] = 2, + [9262] = 3, + [9264] = 4, + [9266] = 5, + [9268] = 6, + [9270] = 7, + [9272] = 8, + [9274] = 9, + [9291] = 31, + [9293] = 32, + [9295] = 33, + [9297] = 34, + [9299] = 35, + [9301] = 36, + [9303] = 37, + [9305] = 38, + [9307] = 39, + [9308] = 10, + [9310] = 11, + [9312] = 12, + [9314] = 13, + [9328] = 14, + [9329] = 15, + [9330] = 16, + [9331] = 17, + [9344] = 0, + [9345] = 1, + [9351] = 20, + [9353] = 21, + [9355] = 22, + [9368] = 2, + [9369] = 23, + [9370] = 3, + [9371] = 24, + [9372] = 4, + [9373] = 25, + [9374] = 5, + [9375] = 26, + [9376] = 6, + [9377] = 27, + [9378] = 7, + [9379] = 28, + [9380] = 8, + [9381] = 29, + [9382] = 9, + [9383] = 30, + [9384] = 10, + [9385] = 31, + [9386] = 11, + [9387] = 32, + [9419] = 33, + [9421] = 34, + [9423] = 35, + [9425] = 36, + [9427] = 37, + [9429] = 38, + [9431] = 39, + [9433] = 40, + [9435] = 41, + [9436] = 12, + [9438] = 13, + [9440] = 14, + [9442] = 15, + [9456] = 16, + [9457] = 17, + [9458] = 18, + [9459] = 19, + [9472] = 0, + [9473] = 1, + [9479] = 18, + [9481] = 19, + [9483] = 20, + [9516] = 2, + [9517] = 21, + [9518] = 3, + [9519] = 22, + [9520] = 4, + [9521] = 23, + [9522] = 5, + [9523] = 24, + [9524] = 6, + [9525] = 25, + [9526] = 7, + [9527] = 26, + [9528] = 8, + [9529] = 27, + [9530] = 9, + [9531] = 28, + [9564] = 10, + [9565] = 29, + [9566] = 11, + [9567] = 30, + [9568] = 12, + [9569] = 31, + [9570] = 13, + [9571] = 32, + [9584] = 14, + [9585] = 15, + [9586] = 16, + [9587] = 17, + [9600] = 0, + [9601] = 1, + [9607] = 20, + [9609] = 21, + [9611] = 22, + [9624] = 2, + [9626] = 3, + [9628] = 4, + [9630] = 5, + [9632] = 6, + [9634] = 7, + [9636] = 8, + [9638] = 9, + [9640] = 10, + [9642] = 11, + [9645] = 23, + [9647] = 24, + [9649] = 25, + [9651] = 26, + [9653] = 27, + [9655] = 28, + [9657] = 29, + [9659] = 30, + [9692] = 12, + [9693] = 31, + [9694] = 13, + [9695] = 32, + [9696] = 14, + [9697] = 33, + [9698] = 15, + [9699] = 34, + [9712] = 16, + [9713] = 17, + [9714] = 18, + [9715] = 19, + [9728] = 0, + [9729] = 1, + [9735] = 18, + [9737] = 19, + [9739] = 20, + [9753] = 21, + [9755] = 22, + [9757] = 23, + [9759] = 24, + [9761] = 25, + [9763] = 26, + [9765] = 27, + [9767] = 28, + [9769] = 29, + [9771] = 30, + [9772] = 2, + [9774] = 3, + [9776] = 4, + [9778] = 5, + [9780] = 6, + [9782] = 7, + [9784] = 8, + [9786] = 9, + [9820] = 10, + [9821] = 31, + [9822] = 11, + [9823] = 32, + [9824] = 12, + [9825] = 33, + [9826] = 13, + [9827] = 34, + [9840] = 14, + [9841] = 15, + [9842] = 16, + [9843] = 17, + [9856] = 0, + [9857] = 1, + [9863] = 20, + [9865] = 21, + [9867] = 22, + [9880] = 2, + [9881] = 23, + [9882] = 3, + [9883] = 24, + [9884] = 4, + [9885] = 25, + [9886] = 5, + [9887] = 26, + [9888] = 6, + [9889] = 27, + [9890] = 7, + [9891] = 28, + [9892] = 8, + [9893] = 29, + [9894] = 9, + [9895] = 30, + [9896] = 10, + [9897] = 31, + [9898] = 11, + [9899] = 32, + [9948] = 12, + [9949] = 33, + [9950] = 13, + [9951] = 34, + [9952] = 14, + [9953] = 35, + [9954] = 15, + [9955] = 36, + [9968] = 16, + [9969] = 17, + [9970] = 18, + [9971] = 19, + [9984] = 0, + [9985] = 1, + [9991] = 18, + [9993] = 19, + [9995] = 20, + [9999] = 31, + [10001] = 32, + [10003] = 33, + [10005] = 34, + [10007] = 35, + [10009] = 21, + [10011] = 22, + [10013] = 23, + [10015] = 24, + [10017] = 25, + [10019] = 26, + [10021] = 27, + [10023] = 28, + [10025] = 29, + [10027] = 30, + [10028] = 2, + [10030] = 3, + [10032] = 4, + [10034] = 5, + [10036] = 6, + [10038] = 7, + [10040] = 8, + [10042] = 9, + [10076] = 10, + [10078] = 11, + [10080] = 12, + [10082] = 13, + [10096] = 14, + [10097] = 15, + [10098] = 16, + [10099] = 17, + [10112] = 0, + [10113] = 1, + [10119] = 20, + [10121] = 21, + [10123] = 22, + [10127] = 33, + [10129] = 34, + [10131] = 35, + [10133] = 36, + [10135] = 37, + [10136] = 2, + [10137] = 23, + [10138] = 3, + [10139] = 24, + [10140] = 4, + [10141] = 25, + [10142] = 5, + [10143] = 26, + [10144] = 6, + [10145] = 27, + [10146] = 7, + [10147] = 28, + [10148] = 8, + [10149] = 29, + [10150] = 9, + [10151] = 30, + [10152] = 10, + [10153] = 31, + [10154] = 11, + [10155] = 32, + [10204] = 12, + [10206] = 13, + [10208] = 14, + [10210] = 15, + [10224] = 16, + [10225] = 17, + [10226] = 18, + [10227] = 19, + [12288] = 0, + [12289] = 1, + [12294] = 2, + [12296] = 3, + [12298] = 4, + [12332] = 5, + [12334] = 6, + [12336] = 7, + [12338] = 8, + [12340] = 9, + [12342] = 10, + [12344] = 11, + [12346] = 12, + [12416] = 0, + [12417] = 1, + [12422] = 2, + [12424] = 3, + [12426] = 4, + [12440] = 5, + [12442] = 6, + [12444] = 7, + [12446] = 8, + [12448] = 9, + [12450] = 10, + [12452] = 11, + [12454] = 12, + [12456] = 13, + [12458] = 14, + [12544] = 0, + [12545] = 1, + [12550] = 2, + [12552] = 3, + [12554] = 4, + [12588] = 8, + [12590] = 9, + [12592] = 10, + [12594] = 11, + [12596] = 12, + [12598] = 13, + [12600] = 14, + [12602] = 15, + [12644] = 5, + [12648] = 6, + [12652] = 7, + [12672] = 0, + [12673] = 1, + [12678] = 2, + [12680] = 3, + [12682] = 4, + [12696] = 8, + [12698] = 9, + [12700] = 10, + [12702] = 11, + [12704] = 12, + [12706] = 13, + [12708] = 14, + [12710] = 15, + [12712] = 16, + [12714] = 17, + [12772] = 5, + [12776] = 6, + [12780] = 7, + [12800] = 0, + [12801] = 1, + [12806] = 2, + [12808] = 3, + [12810] = 4, + [12844] = 5, + [12846] = 6, + [12848] = 7, + [12850] = 8, + [12852] = 9, + [12854] = 10, + [12856] = 11, + [12858] = 12, + [12874] = 13, + [12876] = 14, + [12878] = 15, + [12880] = 16, + [12882] = 17, + [12884] = 18, + [12886] = 19, + [12888] = 20, + [12890] = 21, + [12928] = 0, + [12929] = 1, + [12934] = 2, + [12936] = 3, + [12938] = 4, + [12952] = 5, + [12954] = 6, + [12956] = 7, + [12958] = 8, + [12960] = 9, + [12962] = 10, + [12964] = 11, + [12966] = 12, + [12968] = 13, + [12970] = 14, + [13002] = 15, + [13004] = 16, + [13006] = 17, + [13008] = 18, + [13010] = 19, + [13012] = 20, + [13014] = 21, + [13016] = 22, + [13018] = 23, + [13056] = 0, + [13057] = 1, + [13062] = 2, + [13064] = 3, + [13066] = 4, + [13100] = 5, + [13102] = 6, + [13104] = 7, + [13106] = 8, + [13108] = 9, + [13110] = 10, + [13112] = 11, + [13114] = 12, + [13148] = 13, + [13150] = 14, + [13152] = 15, + [13154] = 16, + [13184] = 0, + [13185] = 1, + [13190] = 2, + [13192] = 3, + [13194] = 4, + [13208] = 5, + [13210] = 6, + [13212] = 7, + [13214] = 8, + [13216] = 9, + [13218] = 10, + [13220] = 11, + [13222] = 12, + [13224] = 13, + [13226] = 14, + [13276] = 15, + [13278] = 16, + [13280] = 17, + [13282] = 18, + [13312] = 0, + [13313] = 1, + [13318] = 2, + [13320] = 3, + [13322] = 4, + [13356] = 8, + [13358] = 9, + [13360] = 10, + [13362] = 11, + [13364] = 12, + [13366] = 13, + [13368] = 14, + [13370] = 15, + [13386] = 16, + [13388] = 17, + [13390] = 18, + [13392] = 19, + [13394] = 20, + [13396] = 21, + [13398] = 22, + [13400] = 23, + [13402] = 24, + [13412] = 5, + [13416] = 6, + [13420] = 7, + [13440] = 0, + [13441] = 1, + [13446] = 2, + [13448] = 3, + [13450] = 4, + [13464] = 8, + [13466] = 9, + [13468] = 10, + [13470] = 11, + [13472] = 12, + [13474] = 13, + [13476] = 14, + [13478] = 15, + [13480] = 16, + [13482] = 17, + [13514] = 18, + [13516] = 19, + [13518] = 20, + [13520] = 21, + [13522] = 22, + [13524] = 23, + [13526] = 24, + [13528] = 25, + [13530] = 26, + [13540] = 5, + [13544] = 6, + [13548] = 7, + [13568] = 0, + [13569] = 1, + [13574] = 2, + [13576] = 3, + [13578] = 4, + [13612] = 8, + [13614] = 9, + [13616] = 10, + [13618] = 11, + [13620] = 12, + [13622] = 13, + [13624] = 14, + [13626] = 15, + [13660] = 16, + [13662] = 17, + [13664] = 18, + [13666] = 19, + [13668] = 5, + [13672] = 6, + [13676] = 7, + [13696] = 0, + [13697] = 1, + [13702] = 2, + [13704] = 3, + [13706] = 4, + [13720] = 8, + [13722] = 9, + [13724] = 10, + [13726] = 11, + [13728] = 12, + [13730] = 13, + [13732] = 14, + [13734] = 15, + [13736] = 16, + [13738] = 17, + [13788] = 18, + [13790] = 19, + [13792] = 20, + [13794] = 21, + [13796] = 5, + [13800] = 6, + [13804] = 7 }; + diff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_act.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_act.c index 8869ab1c33..9d4ea8b422 100644 --- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_act.c +++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_act.c @@ -1,10 +1,8 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2014-2021 Broadcom + * Copyright(c) 2014-2023 Broadcom * All rights reserved. */ -/* date: Fri Oct 8 11:41:10 2021 */ - #include "ulp_template_db_enum.h" #include "ulp_template_db_field.h" #include "ulp_template_struct.h" @@ -15,7 +13,7 @@ struct bnxt_ulp_mapper_tmpl_info ulp_thor_act_tmpl_list[] = { /* act_tid: 1, ingress */ [1] = { .device_name = BNXT_ULP_DEVICE_ID_THOR, - .num_tbls = 5, + .num_tbls = 9, .start_tbl_idx = 0, .reject_info = { .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, @@ -25,56 +23,128 @@ struct bnxt_ulp_mapper_tmpl_info ulp_thor_act_tmpl_list[] = { /* act_tid: 2, ingress */ [2] = { .device_name = BNXT_ULP_DEVICE_ID_THOR, - .num_tbls = 6, - .start_tbl_idx = 5, + .num_tbls = 10, + .start_tbl_idx = 9, .reject_info = { .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, - .cond_start_idx = 3, + .cond_start_idx = 9, .cond_nums = 0 } }, /* act_tid: 3, ingress */ [3] = { .device_name = BNXT_ULP_DEVICE_ID_THOR, - .num_tbls = 4, - .start_tbl_idx = 11, + .num_tbls = 6, + .start_tbl_idx = 19, .reject_info = { .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, - .cond_start_idx = 4, + .cond_start_idx = 13, .cond_nums = 0 } }, - /* act_tid: 4, egress */ + /* act_tid: 4, ingress */ [4] = { .device_name = BNXT_ULP_DEVICE_ID_THOR, - .num_tbls = 5, - .start_tbl_idx = 15, + .num_tbls = 7, + .start_tbl_idx = 25, .reject_info = { .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, - .cond_start_idx = 7, + .cond_start_idx = 18, .cond_nums = 0 } }, - /* act_tid: 5, egress */ + /* act_tid: 5, ingress */ [5] = { .device_name = BNXT_ULP_DEVICE_ID_THOR, - .num_tbls = 4, - .start_tbl_idx = 20, + .num_tbls = 20, + .start_tbl_idx = 32, .reject_info = { .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, - .cond_start_idx = 12, + .cond_start_idx = 25, .cond_nums = 0 } }, /* act_tid: 6, egress */ [6] = { .device_name = BNXT_ULP_DEVICE_ID_THOR, - .num_tbls = 12, - .start_tbl_idx = 24, + .num_tbls = 7, + .start_tbl_idx = 52, .reject_info = { .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, - .cond_start_idx = 15, + .cond_start_idx = 40, + .cond_nums = 0 } + }, + /* act_tid: 7, egress */ + [7] = { + .device_name = BNXT_ULP_DEVICE_ID_THOR, + .num_tbls = 6, + .start_tbl_idx = 59, + .reject_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, + .cond_start_idx = 47, + .cond_nums = 0 } + }, + /* act_tid: 8, egress */ + [8] = { + .device_name = BNXT_ULP_DEVICE_ID_THOR, + .num_tbls = 15, + .start_tbl_idx = 65, + .reject_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, + .cond_start_idx = 52, + .cond_nums = 0 } + }, + /* act_tid: 9, egress */ + [9] = { + .device_name = BNXT_ULP_DEVICE_ID_THOR, + .num_tbls = 5, + .start_tbl_idx = 80, + .reject_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, + .cond_start_idx = 68, + .cond_nums = 0 } + }, + /* act_tid: 10, egress */ + [10] = { + .device_name = BNXT_ULP_DEVICE_ID_THOR, + .num_tbls = 11, + .start_tbl_idx = 85, + .reject_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, + .cond_start_idx = 71, .cond_nums = 0 } } }; struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = { + { /* act_tid: 1, , table: shared_meter_tbl_cache.rd */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_METER_TBL_CACHE, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 2, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 0, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, + .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .key_start_idx = 0, + .blob_key_bit_size = 32, + .key_bit_size = 32, + .key_num_fields = 1, + .ident_start_idx = 0, + .ident_nums = 1 + }, + { /* act_tid: 1, , table: control.meter_chk */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 1023, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 1, + .cond_nums = 1 }, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP + }, { /* act_tid: 1, , table: shared_mirror_record.rd */ .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, @@ -83,20 +153,31 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = { .direction = TF_DIR_RX, .execute_info = { .cond_true_goto = 1, - .cond_false_goto = 1, + .cond_false_goto = 2, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 0, + .cond_start_idx = 2, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, - .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, - .key_start_idx = 0, - .blob_key_bit_size = 1, - .key_bit_size = 1, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .key_start_idx = 1, + .blob_key_bit_size = 4, + .key_bit_size = 4, .key_num_fields = 1, - .ident_start_idx = 0, + .ident_start_idx = 1, .ident_nums = 1 }, + { /* act_tid: 1, , table: control.mirror */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 1023, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 3, + .cond_nums = 1 }, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP + }, { /* act_tid: 1, , table: int_flow_counter_tbl.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, @@ -107,7 +188,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 1, + .cond_start_idx = 4, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, @@ -124,10 +205,10 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = { BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .direction = TF_DIR_RX, .execute_info = { - .cond_true_goto = 1, - .cond_false_goto = 2, + .cond_true_goto = 2, + .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 2, + .cond_start_idx = 5, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR, @@ -137,6 +218,26 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = { .result_num_fields = 0, .encap_num_fields = 47 }, + { /* act_tid: 1, , table: mod_record.ing_no_ttl */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 2, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, + .cond_start_idx = 6, + .cond_nums = 3 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .result_start_idx = 48, + .result_bit_size = 0, + .result_num_fields = 0, + .encap_num_fields = 47 + }, { /* act_tid: 1, , table: int_full_act_record.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, @@ -147,13 +248,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = { .cond_true_goto = 0, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 3, + .cond_start_idx = 9, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .result_start_idx = 48, + .result_start_idx = 95, .result_bit_size = 128, .result_num_fields = 17 }, @@ -167,24 +268,88 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = { .cond_true_goto = 0, .cond_false_goto = 0, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 3, + .cond_start_idx = 9, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .result_start_idx = 65, + .result_start_idx = 112, .result_bit_size = 64, .result_num_fields = 13 }, - { /* act_tid: 2, , table: control.0 */ + { /* act_tid: 2, , table: control.delete_chk */ .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 4, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 9, + .cond_nums = 1 }, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP + }, + { /* act_tid: 2, , table: shared_mirror_record.del_chk */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_MIRROR, + .direction = TF_DIR_RX, .execute_info = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 3, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, + .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, + .ref_cnt_opcode = BNXT_ULP_REF_CNT_OPC_NOP, + .key_start_idx = 2, + .blob_key_bit_size = 4, + .key_bit_size = 4, + .key_num_fields = 1, + .ident_start_idx = 2, + .ident_nums = 1 + }, + { /* act_tid: 2, , table: control.mirror_del_exist_chk */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 0, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 10, + .cond_nums = 1 }, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP + }, + { /* act_tid: 2, , table: control.mirror_ref_cnt_chk */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 0, + .cond_false_goto = 1023, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 11, + .cond_nums = 1 }, + .fdb_opcode = BNXT_ULP_FDB_OPC_DELETE_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .func_info = { + .func_opc = BNXT_ULP_FUNC_OPC_EQ, + .func_src1 = BNXT_ULP_FUNC_SRC_REGFILE, + .func_opr1 = BNXT_ULP_RF_IDX_REF_CNT, + .func_src2 = BNXT_ULP_FUNC_SRC_CONST, + .func_opr2 = 1, + .func_dst_opr = BNXT_ULP_RF_IDX_CC } + }, + { /* act_tid: 2, , table: control.create */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 12, .cond_nums = 0 }, .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE, .fdb_operand = BNXT_ULP_RF_IDX_RID @@ -199,14 +364,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 3, + .cond_start_idx = 12, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MIRROR_PTR_0, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, .fdb_operand = BNXT_ULP_RF_IDX_RID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .result_start_idx = 78, + .result_start_idx = 125, .result_bit_size = 32, .result_num_fields = 5 }, @@ -220,14 +385,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 3, + .cond_start_idx = 12, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, .fdb_operand = BNXT_ULP_RF_IDX_RID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .result_start_idx = 83, + .result_start_idx = 130, .result_bit_size = 64, .result_num_fields = 1 }, @@ -241,14 +406,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 4, + .cond_start_idx = 13, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, .fdb_operand = BNXT_ULP_RF_IDX_RID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .result_start_idx = 84, + .result_start_idx = 131, .result_bit_size = 64, .result_num_fields = 13, .encap_num_fields = 0 @@ -263,13 +428,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 4, + .cond_start_idx = 13, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MIRROR_PTR_0, .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .result_start_idx = 97, + .result_start_idx = 144, .result_bit_size = 32, .result_num_fields = 5 }, @@ -283,19 +448,54 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = { .cond_true_goto = 0, .cond_false_goto = 0, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 4, + .cond_start_idx = 13, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, - .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, - .key_start_idx = 1, - .blob_key_bit_size = 1, - .key_bit_size = 1, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .ref_cnt_opcode = BNXT_ULP_REF_CNT_OPC_INC, + .key_start_idx = 3, + .blob_key_bit_size = 4, + .key_bit_size = 4, .key_num_fields = 1, - .result_start_idx = 102, + .result_start_idx = 149, .result_bit_size = 36, .result_num_fields = 2 }, + { /* act_tid: 3, , table: shared_mirror_record.rd */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_MIRROR, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 2, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 13, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, + .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .key_start_idx = 4, + .blob_key_bit_size = 4, + .key_bit_size = 4, + .key_num_fields = 1, + .ident_start_idx = 3, + .ident_nums = 1 + }, + { /* act_tid: 3, , table: control.mirror */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 1023, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 14, + .cond_nums = 1 }, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP + }, { /* act_tid: 3, , table: int_flow_counter_tbl.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, @@ -306,12 +506,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 4, + .cond_start_idx = 15, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 104, + .result_start_idx = 151, .result_bit_size = 64, .result_num_fields = 1 }, @@ -325,12 +525,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = { .cond_true_goto = 2, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 5, + .cond_start_idx = 16, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 105, + .result_start_idx = 152, .result_bit_size = 0, .result_num_fields = 0, .encap_num_fields = 47 @@ -345,12 +545,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 6, + .cond_start_idx = 17, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 152, + .result_start_idx = 199, .result_bit_size = 0, .result_num_fields = 0, .encap_num_fields = 47 @@ -365,386 +565,564 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = { .cond_true_goto = 0, .cond_false_goto = 0, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 7, + .cond_start_idx = 18, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 199, + .result_start_idx = 246, .result_bit_size = 128, .result_num_fields = 17 }, + { /* act_tid: 4, , table: shared_mirror_record.rd */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_MIRROR, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 2, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 18, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, + .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .key_start_idx = 5, + .blob_key_bit_size = 4, + .key_bit_size = 4, + .key_num_fields = 1, + .ident_start_idx = 4, + .ident_nums = 1 + }, + { /* act_tid: 4, , table: control.mirror */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 1023, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 19, + .cond_nums = 1 }, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP + }, { /* act_tid: 4, , table: int_flow_counter_tbl.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, - .direction = TF_DIR_TX, + .direction = TF_DIR_RX, .execute_info = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 7, + .cond_start_idx = 20, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 216, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .result_start_idx = 263, .result_bit_size = 64, .result_num_fields = 1 }, - { /* act_tid: 4, , table: int_vtag_encap_record.0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + { /* act_tid: 4, , table: vnic_interface_rss_config.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_VNIC_TABLE, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .direction = TF_DIR_TX, + BNXT_ULP_RESOURCE_SUB_TYPE_VNIC_TABLE_RSS, + .direction = TF_DIR_RX, .execute_info = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 8, + .cond_start_idx = 21, .cond_nums = 1 }, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0, + .tbl_opcode = BNXT_ULP_VNIC_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_RSS_VNIC, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 217, + .result_start_idx = 264, .result_bit_size = 0, - .result_num_fields = 0, - .encap_num_fields = 11 + .result_num_fields = 0 }, - { /* act_tid: 4, , table: mod_record.dec_ttl_egr */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, + { /* act_tid: 4, , table: vnic_interface_queue_config.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_VNIC_TABLE, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .direction = TF_DIR_TX, + BNXT_ULP_RESOURCE_SUB_TYPE_VNIC_TABLE_QUEUE, + .direction = TF_DIR_RX, .execute_info = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 9, + .cond_start_idx = 22, .cond_nums = 1 }, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR, + .tbl_opcode = BNXT_ULP_VNIC_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_RSS_VNIC, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 228, + .result_start_idx = 264, .result_bit_size = 0, - .result_num_fields = 0, - .encap_num_fields = 47 + .result_num_fields = 0 }, - { /* act_tid: 4, , table: int_full_act_record.0 */ + { /* act_tid: 4, , table: int_compact_act_record.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .resource_type = TF_TBL_TYPE_COMPACT_ACT_RECORD, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .direction = TF_DIR_TX, + .direction = TF_DIR_RX, .execute_info = { .cond_true_goto = 0, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, - .cond_start_idx = 10, + .cond_start_idx = 23, .cond_nums = 2 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 275, - .result_bit_size = 128, - .result_num_fields = 17 + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .result_start_idx = 264, + .result_bit_size = 64, + .result_num_fields = 13, + .encap_num_fields = 0 }, - { /* act_tid: 4, , table: int_compact_act_record.0 */ + { /* act_tid: 4, , table: int_compact_act_record.1 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_COMPACT_ACT_RECORD, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .direction = TF_DIR_TX, + .direction = TF_DIR_RX, .execute_info = { .cond_true_goto = 0, .cond_false_goto = 0, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 12, + .cond_start_idx = 25, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 292, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .result_start_idx = 277, .result_bit_size = 64, - .result_num_fields = 13 + .result_num_fields = 13, + .encap_num_fields = 0 }, - { /* act_tid: 5, , table: int_flow_counter_tbl.0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_STATS_64, + { /* act_tid: 5, , table: control.create_check */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 11, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 25, + .cond_nums = 2 }, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP + }, + { /* act_tid: 5, , table: meter_profile_tbl_cache.rd */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, - .direction = TF_DIR_TX, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_METER_PROFILE_TBL_CACHE, + .direction = TF_DIR_RX, .execute_info = { .cond_true_goto = 1, - .cond_false_goto = 1, + .cond_false_goto = 4, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 12, + .cond_start_idx = 27, .cond_nums = 1 }, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, - .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, - .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 305, - .result_bit_size = 64, - .result_num_fields = 1 + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, + .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, + .ref_cnt_opcode = BNXT_ULP_REF_CNT_OPC_NOP, + .key_start_idx = 6, + .blob_key_bit_size = 32, + .key_bit_size = 32, + .key_num_fields = 1, + .ident_start_idx = 5, + .ident_nums = 0 }, - { /* act_tid: 5, , table: mod_record.ing_ttl */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .direction = TF_DIR_TX, + { /* act_tid: 5, , table: control.shared_meter_profile_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_RX, .execute_info = { - .cond_true_goto = 2, - .cond_false_goto = 1, + .cond_true_goto = 1, + .cond_false_goto = 1023, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 13, + .cond_start_idx = 28, .cond_nums = 1 }, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR, - .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 306, - .result_bit_size = 0, - .result_num_fields = 0, - .encap_num_fields = 47 + .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID }, - { /* act_tid: 5, , table: mod_record.ing_no_ttl */ + { /* act_tid: 5, , table: meter_profile_tbl.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, + .resource_type = TF_TBL_TYPE_METER_PROF, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .direction = TF_DIR_TX, + .direction = TF_DIR_RX, .execute_info = { .cond_true_goto = 1, .cond_false_goto = 1, - .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 14, - .cond_nums = 1 }, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 29, + .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR, - .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 353, - .result_bit_size = 0, - .result_num_fields = 0, - .encap_num_fields = 47 + .tbl_operand = BNXT_ULP_RF_IDX_METER_PROFILE_PTR_0, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .result_start_idx = 290, + .result_bit_size = 65, + .result_num_fields = 11 }, - { /* act_tid: 5, , table: int_full_act_record.0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + { /* act_tid: 5, , table: meter_profile_tbl_cache.wr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TBL_TYPE_METER_PROF, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .direction = TF_DIR_TX, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_METER_PROFILE_TBL_CACHE, + .direction = TF_DIR_RX, .execute_info = { .cond_true_goto = 0, - .cond_false_goto = 0, + .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 15, + .cond_start_idx = 29, .cond_nums = 0 }, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, - .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 400, - .result_bit_size = 128, - .result_num_fields = 17 + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, + .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .key_start_idx = 7, + .blob_key_bit_size = 32, + .key_bit_size = 32, + .key_num_fields = 1, + .result_start_idx = 301, + .result_bit_size = 42, + .result_num_fields = 2 }, - { /* act_tid: 6, , table: int_flow_counter_tbl.0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_STATS_64, + { /* act_tid: 5, , table: shared_meter_tbl_cache.rd */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, - .direction = TF_DIR_TX, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_METER_TBL_CACHE, + .direction = TF_DIR_RX, .execute_info = { .cond_true_goto = 1, - .cond_false_goto = 1, + .cond_false_goto = 1023, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 15, + .cond_start_idx = 29, .cond_nums = 1 }, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, - .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, - .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 417, - .result_bit_size = 64, - .result_num_fields = 1 + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, + .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, + .ref_cnt_opcode = BNXT_ULP_REF_CNT_OPC_NOP, + .key_start_idx = 8, + .blob_key_bit_size = 32, + .key_bit_size = 32, + .key_num_fields = 1, + .ident_start_idx = 5, + .ident_nums = 0 + }, + { /* act_tid: 5, , table: control.meter_created_chk */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1023, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 30, + .cond_nums = 1 }, + .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID }, - { /* act_tid: 6, , table: source_property_cache.rd */ + { /* act_tid: 5, , table: meter_profile_tbl_cache.rd2 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SOURCE_PROPERTY_CACHE, - .direction = TF_DIR_TX, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_METER_PROFILE_TBL_CACHE, + .direction = TF_DIR_RX, .execute_info = { .cond_true_goto = 1, .cond_false_goto = 1, - .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 16, - .cond_nums = 1 }, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 31, + .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, - .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 2, - .blob_key_bit_size = 80, - .key_bit_size = 80, - .key_num_fields = 2, - .ident_start_idx = 1, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .key_start_idx = 9, + .blob_key_bit_size = 32, + .key_bit_size = 32, + .key_num_fields = 1, + .ident_start_idx = 5, .ident_nums = 1 }, - { /* act_tid: 6, , table: control.0 */ + { /* act_tid: 5, , table: control.shared_meter_profile_chk */ .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, - .direction = TF_DIR_TX, + .direction = TF_DIR_RX, .execute_info = { - .cond_true_goto = 1, - .cond_false_goto = 3, + .cond_true_goto = 1023, + .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 17, + .cond_start_idx = 31, .cond_nums = 1 }, - .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE, - .fdb_operand = BNXT_ULP_RF_IDX_RID + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP }, - { /* act_tid: 6, , table: sp_smac_ipv4.0 */ + { /* act_tid: 5, , table: meter_tbl.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .resource_type = TF_TBL_TYPE_METER_INST, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .direction = TF_DIR_TX, + .direction = TF_DIR_RX, .execute_info = { .cond_true_goto = 1, .cond_false_goto = 1, - .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 18, - .cond_nums = 1 }, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 32, + .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_RF_IDX_MAIN_SP_PTR, + .tbl_operand = BNXT_ULP_RF_IDX_METER_PTR_0, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, .fdb_operand = BNXT_ULP_RF_IDX_RID, - .record_size = 16, - .result_start_idx = 418, - .result_bit_size = 0, - .result_num_fields = 0, - .encap_num_fields = 3 + .result_start_idx = 303, + .result_bit_size = 64, + .result_num_fields = 5 }, - { /* act_tid: 6, , table: source_property_cache.wr */ + { /* act_tid: 5, , table: shared_meter_tbl_cache.wr */ .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SOURCE_PROPERTY_CACHE, - .direction = TF_DIR_TX, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_METER_TBL_CACHE, + .direction = TF_DIR_RX, .execute_info = { - .cond_true_goto = 1, + .cond_true_goto = 0, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 19, + .cond_start_idx = 32, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, - .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 4, - .blob_key_bit_size = 80, - .key_bit_size = 80, - .key_num_fields = 2, - .result_start_idx = 421, - .result_bit_size = 48, - .result_num_fields = 2 + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .key_start_idx = 10, + .blob_key_bit_size = 32, + .key_bit_size = 32, + .key_num_fields = 1, + .result_start_idx = 308, + .result_bit_size = 74, + .result_num_fields = 3 }, - { /* act_tid: 6, , table: sp_smac_ipv6.0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .direction = TF_DIR_TX, + { /* act_tid: 5, , table: control.delete_check */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_RX, .execute_info = { .cond_true_goto = 1, - .cond_false_goto = 1, + .cond_false_goto = 5, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 19, + .cond_start_idx = 32, .cond_nums = 1 }, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_RF_IDX_MAIN_SP_PTR, - .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .record_size = 32, - .result_start_idx = 423, - .result_bit_size = 0, - .result_num_fields = 0, - .encap_num_fields = 3 + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP }, - { /* act_tid: 6, , table: vxlan_encap_rec_cache.rd */ + { /* act_tid: 5, , table: meter_profile_tbl_cache.del_chk */ .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_VXLAN_ENCAP_REC_CACHE, - .direction = TF_DIR_TX, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_METER_PROFILE_TBL_CACHE, + .direction = TF_DIR_RX, .execute_info = { .cond_true_goto = 1, - .cond_false_goto = 1, + .cond_false_goto = 2, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 20, - .cond_nums = 2 }, + .cond_start_idx = 33, + .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, - .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 6, - .blob_key_bit_size = 136, - .key_bit_size = 136, - .key_num_fields = 5, - .ident_start_idx = 2, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, + .ref_cnt_opcode = BNXT_ULP_REF_CNT_OPC_NOP, + .key_start_idx = 11, + .blob_key_bit_size = 32, + .key_bit_size = 32, + .key_num_fields = 1, + .ident_start_idx = 6, .ident_nums = 1 }, - { /* act_tid: 6, , table: control.0 */ + { /* act_tid: 5, , table: control.mtr_prof_ref_cnt_chk */ .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, - .direction = TF_DIR_TX, + .direction = TF_DIR_RX, .execute_info = { - .cond_true_goto = 1, - .cond_false_goto = 3, + .cond_true_goto = 0, + .cond_false_goto = 1023, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 22, + .cond_start_idx = 34, .cond_nums = 1 }, - .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE, - .fdb_operand = BNXT_ULP_RF_IDX_RID - }, - { /* act_tid: 6, , table: int_tun_encap_record.ipv4_vxlan */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .direction = TF_DIR_TX, - .execute_info = { - .cond_true_goto = 1, - .cond_false_goto = 1, - .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 23, - .cond_nums = 2 }, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0, - .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, + .fdb_opcode = BNXT_ULP_FDB_OPC_DELETE_RID_REGFILE, .fdb_operand = BNXT_ULP_RF_IDX_RID, - .result_start_idx = 426, - .result_bit_size = 0, - .result_num_fields = 0, - .encap_num_fields = 30 - }, - { /* act_tid: 6, , table: vxlan_encap_rec_cache.wr */ + .func_info = { + .func_opc = BNXT_ULP_FUNC_OPC_EQ, + .func_src1 = BNXT_ULP_FUNC_SRC_REGFILE, + .func_opr1 = BNXT_ULP_RF_IDX_REF_CNT, + .func_src2 = BNXT_ULP_FUNC_SRC_CONST, + .func_opr2 = 1, + .func_dst_opr = BNXT_ULP_RF_IDX_CC } + }, + { /* act_tid: 5, , table: shared_meter_tbl_cache.del_chk */ .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_VXLAN_ENCAP_REC_CACHE, - .direction = TF_DIR_TX, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_METER_TBL_CACHE, + .direction = TF_DIR_RX, .execute_info = { .cond_true_goto = 1, - .cond_false_goto = 1, - .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 25, - .cond_nums = 0 }, - .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, + .cond_false_goto = 1023, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 35, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, - .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 11, - .blob_key_bit_size = 136, - .key_bit_size = 136, - .key_num_fields = 5, - .result_start_idx = 456, - .result_bit_size = 48, - .result_num_fields = 2 + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, + .ref_cnt_opcode = BNXT_ULP_REF_CNT_OPC_NOP, + .key_start_idx = 12, + .blob_key_bit_size = 32, + .key_bit_size = 32, + .key_num_fields = 1, + .ident_start_idx = 7, + .ident_nums = 1 + }, + { /* act_tid: 5, , table: control.shared_mtr_ref_cnt_chk */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 0, + .cond_false_goto = 1023, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 36, + .cond_nums = 1 }, + .fdb_opcode = BNXT_ULP_FDB_OPC_DELETE_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .func_info = { + .func_opc = BNXT_ULP_FUNC_OPC_EQ, + .func_src1 = BNXT_ULP_FUNC_SRC_REGFILE, + .func_opr1 = BNXT_ULP_RF_IDX_REF_CNT, + .func_src2 = BNXT_ULP_FUNC_SRC_CONST, + .func_opr2 = 1, + .func_dst_opr = BNXT_ULP_RF_IDX_CC } + }, + { /* act_tid: 5, , table: control.update_check */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1023, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 37, + .cond_nums = 0 }, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP + }, + { /* act_tid: 5, , table: shared_meter_tbl_cache.rd_update */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_METER_TBL_CACHE, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1023, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 37, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, + .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, + .ref_cnt_opcode = BNXT_ULP_REF_CNT_OPC_NOP, + .key_start_idx = 13, + .blob_key_bit_size = 32, + .key_bit_size = 32, + .key_num_fields = 1, + .ident_start_idx = 8, + .ident_nums = 1 }, - { /* act_tid: 6, , table: int_tun_encap_record.ipv6_vxlan */ + { /* act_tid: 5, , table: meter_tbl.update_rd */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .resource_type = TF_TBL_TYPE_METER_INST, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1023, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 38, + .cond_nums = 2 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_RD_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_METER_PTR_0, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, + .ident_start_idx = 9, + .ident_nums = 3, + .result_bit_size = 64 + }, + { /* act_tid: 5, , table: meter_tbl.update_wr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_METER_INST, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 0, + .cond_false_goto = 0, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 40, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_METER_PTR_0, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, + .result_start_idx = 311, + .result_bit_size = 64, + .result_num_fields = 5 + }, + { /* act_tid: 6, , table: shared_mirror_record.rd */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_MIRROR, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 2, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 40, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, + .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .key_start_idx = 14, + .blob_key_bit_size = 4, + .key_bit_size = 4, + .key_num_fields = 1, + .ident_start_idx = 12, + .ident_nums = 1 + }, + { /* act_tid: 6, , table: control.mirror */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1023, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 41, + .cond_nums = 1 }, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP + }, + { /* act_tid: 6, , table: int_flow_counter_tbl.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 42, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .result_start_idx = 316, + .result_bit_size = 64, + .result_num_fields = 1 + }, + { /* act_tid: 6, , table: int_vtag_encap_record.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .direction = TF_DIR_TX, @@ -752,15 +1130,35 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 25, - .cond_nums = 2 }, + .cond_start_idx = 43, + .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 458, + .result_start_idx = 317, .result_bit_size = 0, .result_num_fields = 0, - .encap_num_fields = 30 + .encap_num_fields = 11 + }, + { /* act_tid: 6, , table: mod_record.dec_ttl_egr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 44, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .result_start_idx = 328, + .result_bit_size = 0, + .result_num_fields = 0, + .encap_num_fields = 47 }, { /* act_tid: 6, , table: int_full_act_record.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -770,516 +1168,4512 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = { .direction = TF_DIR_TX, .execute_info = { .cond_true_goto = 0, - .cond_false_goto = 0, - .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 27, - .cond_nums = 0 }, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, + .cond_start_idx = 45, + .cond_nums = 2 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .result_start_idx = 488, + .result_start_idx = 375, .result_bit_size = 128, .result_num_fields = 17 - } -}; - -struct bnxt_ulp_mapper_cond_info ulp_thor_act_cond_list[] = { - /* cond_execute: act_tid: 1, shared_mirror_record.rd */ - { - .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACT_BIT_SHARED_SAMPLE - }, - /* cond_execute: act_tid: 1, int_flow_counter_tbl.0 */ - { - .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACT_BIT_COUNT - }, - /* cond_execute: act_tid: 1, mod_record.ing_ttl */ - { - .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACT_BIT_DEC_TTL }, - /* cond_execute: act_tid: 2, int_flow_counter_tbl.0 */ - { - .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACT_BIT_COUNT + { /* act_tid: 6, , table: int_compact_act_record.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_COMPACT_ACT_RECORD, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 0, + .cond_false_goto = 0, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 47, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .result_start_idx = 392, + .result_bit_size = 64, + .result_num_fields = 13 }, - /* cond_execute: act_tid: 3, int_flow_counter_tbl.0 */ - { - .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACT_BIT_COUNT + { /* act_tid: 7, , table: shared_mirror_record.rd */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_MIRROR, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 2, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 47, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, + .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .key_start_idx = 15, + .blob_key_bit_size = 4, + .key_bit_size = 4, + .key_num_fields = 1, + .ident_start_idx = 13, + .ident_nums = 1 }, - /* cond_execute: act_tid: 3, mod_record.ing_ttl */ - { - .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACT_BIT_DEC_TTL + { /* act_tid: 7, , table: control.mirror */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1023, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 48, + .cond_nums = 1 }, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP }, - /* cond_execute: act_tid: 3, mod_record.ing_no_ttl */ - { - .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_NOT_SET, - .cond_operand = BNXT_ULP_ACT_BIT_DEC_TTL + { /* act_tid: 7, , table: int_flow_counter_tbl.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 49, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .result_start_idx = 405, + .result_bit_size = 64, + .result_num_fields = 1 }, - /* cond_execute: act_tid: 4, int_flow_counter_tbl.0 */ - { - .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACT_BIT_COUNT + { /* act_tid: 7, , table: mod_record.ing_ttl */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 2, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 50, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .result_start_idx = 406, + .result_bit_size = 0, + .result_num_fields = 0, + .encap_num_fields = 47 }, - /* cond_execute: act_tid: 4, int_vtag_encap_record.0 */ - { - .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACT_BIT_PUSH_VLAN + { /* act_tid: 7, , table: mod_record.ing_no_ttl */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 51, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .result_start_idx = 453, + .result_bit_size = 0, + .result_num_fields = 0, + .encap_num_fields = 47 + }, + { /* act_tid: 7, , table: int_full_act_record.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 0, + .cond_false_goto = 0, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 52, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .result_start_idx = 500, + .result_bit_size = 128, + .result_num_fields = 17 + }, + { /* act_tid: 8, , table: shared_mirror_record.rd */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_MIRROR, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 2, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 52, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, + .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .key_start_idx = 16, + .blob_key_bit_size = 4, + .key_bit_size = 4, + .key_num_fields = 1, + .ident_start_idx = 14, + .ident_nums = 1 + }, + { /* act_tid: 8, , table: control.mirror */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1023, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 53, + .cond_nums = 1 }, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP + }, + { /* act_tid: 8, , table: int_flow_counter_tbl.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 54, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .result_start_idx = 517, + .result_bit_size = 64, + .result_num_fields = 1 + }, + { /* act_tid: 8, , table: source_property_cache.rd */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SOURCE_PROPERTY_CACHE, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 55, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, + .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .key_start_idx = 17, + .blob_key_bit_size = 80, + .key_bit_size = 80, + .key_num_fields = 2, + .ident_start_idx = 15, + .ident_nums = 1 + }, + { /* act_tid: 8, , table: control.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 3, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 56, + .cond_nums = 1 }, + .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID + }, + { /* act_tid: 8, , table: sp_smac_ipv4.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 57, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MAIN_SP_PTR, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .record_size = 16, + .result_start_idx = 518, + .result_bit_size = 0, + .result_num_fields = 0, + .encap_num_fields = 3 + }, + { /* act_tid: 8, , table: source_property_cache.wr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SOURCE_PROPERTY_CACHE, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 58, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, + .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .key_start_idx = 19, + .blob_key_bit_size = 80, + .key_bit_size = 80, + .key_num_fields = 2, + .result_start_idx = 521, + .result_bit_size = 48, + .result_num_fields = 2 + }, + { /* act_tid: 8, , table: sp_smac_ipv6.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 58, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MAIN_SP_PTR, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .record_size = 32, + .result_start_idx = 523, + .result_bit_size = 0, + .result_num_fields = 0, + .encap_num_fields = 3 + }, + { /* act_tid: 8, , table: vxlan_encap_rec_cache.rd */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_VXLAN_ENCAP_REC_CACHE, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 59, + .cond_nums = 2 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, + .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .key_start_idx = 21, + .blob_key_bit_size = 136, + .key_bit_size = 136, + .key_num_fields = 5, + .ident_start_idx = 16, + .ident_nums = 1 + }, + { /* act_tid: 8, , table: mod_record.ing_l2write */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, + .cond_start_idx = 61, + .cond_nums = 2 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .result_start_idx = 526, + .result_bit_size = 0, + .result_num_fields = 0, + .encap_num_fields = 47 + }, + { /* act_tid: 8, , table: control.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 3, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 63, + .cond_nums = 1 }, + .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID + }, + { /* act_tid: 8, , table: int_tun_encap_record.ipv4_vxlan */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 64, + .cond_nums = 2 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .result_start_idx = 573, + .result_bit_size = 0, + .result_num_fields = 0, + .encap_num_fields = 30 + }, + { /* act_tid: 8, , table: vxlan_encap_rec_cache.wr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_VXLAN_ENCAP_REC_CACHE, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 66, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, + .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .key_start_idx = 26, + .blob_key_bit_size = 136, + .key_bit_size = 136, + .key_num_fields = 5, + .result_start_idx = 603, + .result_bit_size = 48, + .result_num_fields = 2 + }, + { /* act_tid: 8, , table: int_tun_encap_record.ipv6_vxlan */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 66, + .cond_nums = 2 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .result_start_idx = 605, + .result_bit_size = 0, + .result_num_fields = 0, + .encap_num_fields = 30 + }, + { /* act_tid: 8, , table: int_full_act_record.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 0, + .cond_false_goto = 0, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 68, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .result_start_idx = 635, + .result_bit_size = 128, + .result_num_fields = 17 + }, + { /* act_tid: 9, , table: shared_mirror_record.rd */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_MIRROR, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 2, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 68, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, + .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .key_start_idx = 31, + .blob_key_bit_size = 4, + .key_bit_size = 4, + .key_num_fields = 1, + .ident_start_idx = 17, + .ident_nums = 1 + }, + { /* act_tid: 9, , table: control.mirror */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1023, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 69, + .cond_nums = 1 }, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP + }, + { /* act_tid: 9, , table: int_flow_counter_tbl.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 70, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .result_start_idx = 652, + .result_bit_size = 64, + .result_num_fields = 1 + }, + { /* act_tid: 9, , table: mod_record.vf_2_vf */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 71, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .result_start_idx = 653, + .result_bit_size = 0, + .result_num_fields = 0, + .encap_num_fields = 47 + }, + { /* act_tid: 9, , table: int_full_act_record.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 0, + .cond_false_goto = 0, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 71, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .result_start_idx = 700, + .result_bit_size = 128, + .result_num_fields = 17 + }, + { /* act_tid: 10, , table: control.delete_chk */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 4, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 71, + .cond_nums = 1 }, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP + }, + { /* act_tid: 10, , table: shared_mirror_record.del_chk */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_MIRROR, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 72, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, + .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, + .ref_cnt_opcode = BNXT_ULP_REF_CNT_OPC_NOP, + .key_start_idx = 32, + .blob_key_bit_size = 4, + .key_bit_size = 4, + .key_num_fields = 1, + .ident_start_idx = 18, + .ident_nums = 1 + }, + { /* act_tid: 10, , table: control.mirror_del_exist_chk */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 0, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 72, + .cond_nums = 1 }, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP + }, + { /* act_tid: 10, , table: control.mirror_ref_cnt_chk */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 0, + .cond_false_goto = 1023, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 73, + .cond_nums = 1 }, + .fdb_opcode = BNXT_ULP_FDB_OPC_DELETE_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .func_info = { + .func_opc = BNXT_ULP_FUNC_OPC_EQ, + .func_src1 = BNXT_ULP_FUNC_SRC_REGFILE, + .func_opr1 = BNXT_ULP_RF_IDX_REF_CNT, + .func_src2 = BNXT_ULP_FUNC_SRC_CONST, + .func_opr2 = 1, + .func_dst_opr = BNXT_ULP_RF_IDX_CC } + }, + { /* act_tid: 10, , table: control.create */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 74, + .cond_nums = 0 }, + .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID + }, + { /* act_tid: 10, , table: mirror_tbl.alloc */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 74, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MIRROR_PTR_0, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .result_start_idx = 717, + .result_bit_size = 32, + .result_num_fields = 5 + }, + { /* act_tid: 10, , table: int_flow_counter_tbl.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 74, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .result_start_idx = 722, + .result_bit_size = 64, + .result_num_fields = 1 + }, + { /* act_tid: 10, , table: mod_record.vf_2_vf */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 75, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .result_start_idx = 723, + .result_bit_size = 0, + .result_num_fields = 0, + .encap_num_fields = 47 + }, + { /* act_tid: 10, , table: int_full_act_record.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 75, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .result_start_idx = 770, + .result_bit_size = 128, + .result_num_fields = 17 + }, + { /* act_tid: 10, , table: mirror_tbl.wr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 75, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MIRROR_PTR_0, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .result_start_idx = 787, + .result_bit_size = 32, + .result_num_fields = 5 + }, + { /* act_tid: 10, , table: shared_mirror_record.wr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_MIRROR, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 0, + .cond_false_goto = 0, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 75, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, + .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .ref_cnt_opcode = BNXT_ULP_REF_CNT_OPC_INC, + .key_start_idx = 33, + .blob_key_bit_size = 4, + .key_bit_size = 4, + .key_num_fields = 1, + .result_start_idx = 792, + .result_bit_size = 36, + .result_num_fields = 2 + } +}; + +struct bnxt_ulp_mapper_cond_info ulp_thor_act_cond_list[] = { + /* cond_execute: act_tid: 1, shared_meter_tbl_cache.rd */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_METER + }, + /* cond_execute: act_tid: 1, control.meter_chk */ + { + .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS + }, + /* cond_execute: act_tid: 1, shared_mirror_record.rd */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SHARED_SAMPLE + }, + /* cond_execute: act_tid: 1, control.mirror */ + { + .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS + }, + /* cond_execute: act_tid: 1, int_flow_counter_tbl.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_COUNT + }, + /* cond_execute: act_tid: 1, mod_record.ing_ttl */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_DEC_TTL + }, + /* cond_execute: act_tid: 1, mod_record.ing_no_ttl */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_NOT_SET, + .cond_operand = BNXT_ULP_ACT_BIT_DEC_TTL + }, + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SET_MAC_SRC + }, + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SET_MAC_DST + }, + /* cond_execute: act_tid: 2, control.delete_chk */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_DELETE + }, + /* cond_execute: act_tid: 2, control.mirror_del_exist_chk */ + { + .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS + }, + /* cond_execute: act_tid: 2, control.mirror_ref_cnt_chk */ + { + .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, + .cond_operand = BNXT_ULP_RF_IDX_CC + }, + /* cond_execute: act_tid: 2, int_flow_counter_tbl.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_COUNT + }, + /* cond_execute: act_tid: 3, shared_mirror_record.rd */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SHARED_SAMPLE + }, + /* cond_execute: act_tid: 3, control.mirror */ + { + .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS + }, + /* cond_execute: act_tid: 3, int_flow_counter_tbl.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_COUNT + }, + /* cond_execute: act_tid: 3, mod_record.ing_ttl */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_DEC_TTL + }, + /* cond_execute: act_tid: 3, mod_record.ing_no_ttl */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_NOT_SET, + .cond_operand = BNXT_ULP_ACT_BIT_DEC_TTL + }, + /* cond_execute: act_tid: 4, shared_mirror_record.rd */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SHARED_SAMPLE + }, + /* cond_execute: act_tid: 4, control.mirror */ + { + .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS + }, + /* cond_execute: act_tid: 4, int_flow_counter_tbl.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_COUNT + }, + /* cond_execute: act_tid: 4, vnic_interface_rss_config.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_RSS + }, + /* cond_execute: act_tid: 4, vnic_interface_queue_config.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_QUEUE + }, + /* cond_execute: act_tid: 4, int_compact_act_record.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_QUEUE + }, + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_RSS + }, + /* cond_execute: act_tid: 5, control.create_check */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_NOT_SET, + .cond_operand = BNXT_ULP_ACT_BIT_UPDATE + }, + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_NOT_SET, + .cond_operand = BNXT_ULP_ACT_BIT_DELETE + }, + /* cond_execute: act_tid: 5, meter_profile_tbl_cache.rd */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_METER_PROFILE + }, + /* cond_execute: act_tid: 5, control.shared_meter_profile_0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS + }, + /* cond_execute: act_tid: 5, shared_meter_tbl_cache.rd */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SHARED_METER + }, + /* cond_execute: act_tid: 5, control.meter_created_chk */ + { + .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS + }, + /* cond_execute: act_tid: 5, control.shared_meter_profile_chk */ + { + .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS + }, + /* cond_execute: act_tid: 5, control.delete_check */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_DELETE + }, + /* cond_execute: act_tid: 5, meter_profile_tbl_cache.del_chk */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_METER_PROFILE + }, + /* cond_execute: act_tid: 5, control.mtr_prof_ref_cnt_chk */ + { + .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, + .cond_operand = BNXT_ULP_RF_IDX_CC + }, + /* cond_execute: act_tid: 5, shared_meter_tbl_cache.del_chk */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SHARED_METER + }, + /* cond_execute: act_tid: 5, control.shared_mtr_ref_cnt_chk */ + { + .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, + .cond_operand = BNXT_ULP_RF_IDX_CC + }, + /* cond_execute: act_tid: 5, shared_meter_tbl_cache.rd_update */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SHARED_METER + }, + /* cond_execute: act_tid: 5, meter_tbl.update_rd */ + { + .cond_opcode = BNXT_ULP_COND_OPC_RF_NOT_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS + }, + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_PROP_NOT_SET, + .cond_operand = BNXT_ULP_ACT_PROP_IDX_METER_PROF_ID_UPDATE + }, + /* cond_execute: act_tid: 6, shared_mirror_record.rd */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SHARED_SAMPLE + }, + /* cond_execute: act_tid: 6, control.mirror */ + { + .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS + }, + /* cond_execute: act_tid: 6, int_flow_counter_tbl.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_COUNT + }, + /* cond_execute: act_tid: 6, int_vtag_encap_record.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_PUSH_VLAN + }, + /* cond_execute: act_tid: 6, mod_record.dec_ttl_egr */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_DEC_TTL + }, + /* cond_execute: act_tid: 6, int_full_act_record.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_DEC_TTL + }, + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_PUSH_VLAN + }, + /* cond_execute: act_tid: 7, shared_mirror_record.rd */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SHARED_SAMPLE + }, + /* cond_execute: act_tid: 7, control.mirror */ + { + .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS + }, + /* cond_execute: act_tid: 7, int_flow_counter_tbl.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_COUNT + }, + /* cond_execute: act_tid: 7, mod_record.ing_ttl */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_DEC_TTL + }, + /* cond_execute: act_tid: 7, mod_record.ing_no_ttl */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_NOT_SET, + .cond_operand = BNXT_ULP_ACT_BIT_DEC_TTL + }, + /* cond_execute: act_tid: 8, shared_mirror_record.rd */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SHARED_SAMPLE + }, + /* cond_execute: act_tid: 8, control.mirror */ + { + .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS + }, + /* cond_execute: act_tid: 8, int_flow_counter_tbl.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_COUNT + }, + /* cond_execute: act_tid: 8, source_property_cache.rd */ + { + .cond_opcode = BNXT_ULP_COND_OPC_CF_IS_SET, + .cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV4_FLAG + }, + /* cond_execute: act_tid: 8, control.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS + }, + /* cond_execute: act_tid: 8, sp_smac_ipv4.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_CF_IS_SET, + .cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV4_FLAG + }, + /* cond_execute: act_tid: 8, sp_smac_ipv6.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_CF_IS_SET, + .cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV6_FLAG + }, + /* cond_execute: act_tid: 8, vxlan_encap_rec_cache.rd */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET, + .cond_operand = BNXT_ULP_HDR_BIT_O_IPV4 + }, + { + .cond_opcode = BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET, + .cond_operand = BNXT_ULP_HDR_BIT_T_VXLAN + }, + /* cond_execute: act_tid: 8, mod_record.ing_l2write */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SET_MAC_SRC + }, + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SET_MAC_DST + }, + /* cond_execute: act_tid: 8, control.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS + }, + /* cond_execute: act_tid: 8, int_tun_encap_record.ipv4_vxlan */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET, + .cond_operand = BNXT_ULP_HDR_BIT_O_IPV4 + }, + { + .cond_opcode = BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET, + .cond_operand = BNXT_ULP_HDR_BIT_T_VXLAN + }, + /* cond_execute: act_tid: 8, int_tun_encap_record.ipv6_vxlan */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET, + .cond_operand = BNXT_ULP_HDR_BIT_O_IPV6 + }, + { + .cond_opcode = BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET, + .cond_operand = BNXT_ULP_HDR_BIT_T_VXLAN + }, + /* cond_execute: act_tid: 9, shared_mirror_record.rd */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SHARED_SAMPLE + }, + /* cond_execute: act_tid: 9, control.mirror */ + { + .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS + }, + /* cond_execute: act_tid: 9, int_flow_counter_tbl.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_COUNT + }, + /* cond_execute: act_tid: 10, control.delete_chk */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_DELETE + }, + /* cond_execute: act_tid: 10, control.mirror_del_exist_chk */ + { + .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS + }, + /* cond_execute: act_tid: 10, control.mirror_ref_cnt_chk */ + { + .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, + .cond_operand = BNXT_ULP_RF_IDX_CC + }, + /* cond_execute: act_tid: 10, int_flow_counter_tbl.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_COUNT + } +}; + +struct bnxt_ulp_mapper_key_info ulp_thor_act_key_info_list[] = { + /* act_tid: 1, , table: shared_meter_tbl_cache.rd */ + { + .field_info_mask = { + .description = "sw_meter_id", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff, + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "sw_meter_id", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_METER >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER & 0xff} + } + }, + /* act_tid: 1, , table: shared_mirror_record.rd */ + { + .field_info_mask = { + .description = "shared_index", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff} + }, + .field_info_spec = { + .description = "shared_index", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE & 0xff} + } + }, + /* act_tid: 2, , table: shared_mirror_record.del_chk */ + { + .field_info_mask = { + .description = "shared_index", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff} + }, + .field_info_spec = { + .description = "shared_index", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE & 0xff} + } + }, + /* act_tid: 2, , table: shared_mirror_record.wr */ + { + .field_info_mask = { + .description = "shared_index", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff} + }, + .field_info_spec = { + .description = "shared_index", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MIRROR_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_MIRROR_PTR_0 & 0xff} + } + }, + /* act_tid: 3, , table: shared_mirror_record.rd */ + { + .field_info_mask = { + .description = "shared_index", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff} + }, + .field_info_spec = { + .description = "shared_index", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE & 0xff} + } + }, + /* act_tid: 4, , table: shared_mirror_record.rd */ + { + .field_info_mask = { + .description = "shared_index", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff} + }, + .field_info_spec = { + .description = "shared_index", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE & 0xff} + } + }, + /* act_tid: 5, , table: meter_profile_tbl_cache.rd */ + { + .field_info_mask = { + .description = "sw_meter_profile_id", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff, + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "sw_meter_profile_id", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_METER_PROF_ID >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_ID & 0xff} + } + }, + /* act_tid: 5, , table: meter_profile_tbl_cache.wr */ + { + .field_info_mask = { + .description = "sw_meter_profile_id", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff, + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "sw_meter_profile_id", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_METER_PROF_ID >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_ID & 0xff} + } + }, + /* act_tid: 5, , table: shared_meter_tbl_cache.rd */ + { + .field_info_mask = { + .description = "sw_meter_id", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff, + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "sw_meter_id", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_METER_INST_ID >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_INST_ID & 0xff} + } + }, + /* act_tid: 5, , table: meter_profile_tbl_cache.rd2 */ + { + .field_info_mask = { + .description = "sw_meter_profile_id", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff, + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "sw_meter_profile_id", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_METER_PROF_ID >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_ID & 0xff} + } + }, + /* act_tid: 5, , table: shared_meter_tbl_cache.wr */ + { + .field_info_mask = { + .description = "sw_meter_id", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff, + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "sw_meter_id", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_METER_INST_ID >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_INST_ID & 0xff} + } + }, + /* act_tid: 5, , table: meter_profile_tbl_cache.del_chk */ + { + .field_info_mask = { + .description = "sw_meter_profile_id", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff, + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "sw_meter_profile_id", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_METER_PROF_ID >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_ID & 0xff} + } + }, + /* act_tid: 5, , table: shared_meter_tbl_cache.del_chk */ + { + .field_info_mask = { + .description = "sw_meter_id", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff, + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "sw_meter_id", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_METER_INST_ID >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_INST_ID & 0xff} + } + }, + /* act_tid: 5, , table: shared_meter_tbl_cache.rd_update */ + { + .field_info_mask = { + .description = "sw_meter_id", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff, + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "sw_meter_id", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_METER_INST_ID >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_INST_ID & 0xff} + } + }, + /* act_tid: 6, , table: shared_mirror_record.rd */ + { + .field_info_mask = { + .description = "shared_index", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff} + }, + .field_info_spec = { + .description = "shared_index", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE & 0xff} + } + }, + /* act_tid: 7, , table: shared_mirror_record.rd */ + { + .field_info_mask = { + .description = "shared_index", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff} + }, + .field_info_spec = { + .description = "shared_index", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE & 0xff} + } + }, + /* act_tid: 8, , table: shared_mirror_record.rd */ + { + .field_info_mask = { + .description = "shared_index", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff} + }, + .field_info_spec = { + .description = "shared_index", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE & 0xff} + } + }, + /* act_tid: 8, , table: source_property_cache.rd */ + { + .field_info_mask = { + .description = "smac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "smac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_ETH_SMAC >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_ETH_SMAC & 0xff} + } + }, + { + .field_info_mask = { + .description = "ipv4_src_addr", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff, + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "ipv4_src_addr", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_IPV4_SADDR >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_IPV4_SADDR & 0xff} + } + }, + /* act_tid: 8, , table: source_property_cache.wr */ + { + .field_info_mask = { + .description = "smac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "smac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_ETH_SMAC >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_ETH_SMAC & 0xff} + } + }, + { + .field_info_mask = { + .description = "ipv4_src_addr", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff, + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "ipv4_src_addr", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_IPV4_SADDR >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_IPV4_SADDR & 0xff} + } + }, + /* act_tid: 8, , table: vxlan_encap_rec_cache.rd */ + { + .field_info_mask = { + .description = "dmac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "dmac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_ETH_DMAC & 0xff} + } + }, + { + .field_info_mask = { + .description = "ipv4_dst_addr", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff, + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "ipv4_dst_addr", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_IPV4_DADDR >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_IPV4_DADDR & 0xff} + } + }, + { + .field_info_mask = { + .description = "udp_sport", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "udp_sport", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_UDP_SPORT >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_UDP_SPORT & 0xff} + } + }, + { + .field_info_mask = { + .description = "udp_dport", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "udp_dport", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_UDP_DPORT >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_UDP_DPORT & 0xff} + } + }, + { + .field_info_mask = { + .description = "vni", + .field_bit_size = 24, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "vni", + .field_bit_size = 24, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_VXLAN_VNI >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_VXLAN_VNI & 0xff} + } + }, + /* act_tid: 8, , table: vxlan_encap_rec_cache.wr */ + { + .field_info_mask = { + .description = "dmac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "dmac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_ETH_DMAC & 0xff} + } + }, + { + .field_info_mask = { + .description = "ipv4_dst_addr", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff, + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "ipv4_dst_addr", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_IPV4_DADDR >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_IPV4_DADDR & 0xff} + } + }, + { + .field_info_mask = { + .description = "udp_sport", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "udp_sport", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_UDP_SPORT >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_UDP_SPORT & 0xff} + } + }, + { + .field_info_mask = { + .description = "udp_dport", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "udp_dport", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_UDP_DPORT >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_UDP_DPORT & 0xff} + } + }, + { + .field_info_mask = { + .description = "vni", + .field_bit_size = 24, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "vni", + .field_bit_size = 24, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_VXLAN_VNI >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_VXLAN_VNI & 0xff} + } + }, + /* act_tid: 9, , table: shared_mirror_record.rd */ + { + .field_info_mask = { + .description = "shared_index", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff} + }, + .field_info_spec = { + .description = "shared_index", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE & 0xff} + } + }, + /* act_tid: 10, , table: shared_mirror_record.del_chk */ + { + .field_info_mask = { + .description = "shared_index", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff} + }, + .field_info_spec = { + .description = "shared_index", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE & 0xff} + } + }, + /* act_tid: 10, , table: shared_mirror_record.wr */ + { + .field_info_mask = { + .description = "shared_index", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff} + }, + .field_info_spec = { + .description = "shared_index", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MIRROR_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_MIRROR_PTR_0 & 0xff} + } + } +}; + +struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { + /* act_tid: 1, , table: int_flow_counter_tbl.0 */ + { + .description = "count", + .field_bit_size = 64, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + /* act_tid: 1, , table: mod_record.ing_ttl */ + { + .description = "metadata_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "rem_ovlan", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "rem_ivlan", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "rep_add_ivlan", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "rep_add_ovlan", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "ttl_update", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + }, + { + .description = "tun_md_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "reserved_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l2_dmac_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + 1}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l2_smac_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + 1}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_sip_ipv6_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_dip_ipv6_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_sip_ipv4_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_dip_ipv4_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l4_sport_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l4_dport_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "metadata_data", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "metadata_rsvd", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "metadata_op", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "metadata_prof", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ivlan_tpid", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ivlan_pri", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ivlan_de", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ivlan_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ovlan_tpid", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ovlan_pri", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ovlan_de", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ovlan_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "alt_pfid", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "alt_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "ttl_rsvd", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "ttl_tl3_dec", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_opr1 = { + (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, + BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff} + }, + { + .description = "ttl_il3_dec", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_opr1 = { + (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, + BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff} + }, + { + .description = "ttl_tl3_rdir", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "ttl_il3_rdir", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tun_new_prot", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "tun_ex_prot", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "tun_mv", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "reserved", + .field_bit_size = 0, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l2_dmac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr2 = { + (BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + }, + { + .description = "l2_smac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr2 = { + (BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + }, + { + .description = "l3_sip_ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l3_dip_ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l3_sip_ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l3_dip_ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l4_sport", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l4_dport", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + /* act_tid: 1, , table: mod_record.ing_no_ttl */ + { + .description = "metadata_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "rem_ovlan", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "rem_ivlan", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "rep_add_ivlan", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "rep_add_ovlan", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "ttl_update", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tun_md_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "reserved_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l2_dmac_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + 1}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l2_smac_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + 1}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_sip_ipv6_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_dip_ipv6_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_sip_ipv4_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_dip_ipv4_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l4_sport_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l4_dport_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "metadata_data", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "metadata_rsvd", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "metadata_op", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "metadata_prof", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ivlan_tpid", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ivlan_pri", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ivlan_de", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ivlan_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ovlan_tpid", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ovlan_pri", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ovlan_de", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ovlan_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "alt_pfid", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "alt_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ttl_rsvd", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ttl_tl3_dec", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ttl_il3_dec", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ttl_tl3_rdir", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ttl_il3_rdir", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "tun_new_prot", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "tun_ex_prot", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "tun_mv", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "reserved", + .field_bit_size = 0, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l2_dmac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr2 = { + (BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + }, + { + .description = "l2_smac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr2 = { + (BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + }, + { + .description = "l3_sip_ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l3_dip_ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l3_sip_ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l3_dip_ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l4_sport", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l4_dport", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + /* act_tid: 1, , table: int_full_act_record.0 */ + { + .description = "sp_rec_ptr", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "encap_ptr", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "mod_rec_ptr", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MODIFY_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MODIFY_PTR & 0xff} + }, + { + .description = "rsvd1", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "rsvd0", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "decap_func", + .field_bit_size = 5, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + ULP_THOR_SYM_DECAP_FUNC_THRU_TUN}, + .field_src3 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr3 = { + ULP_THOR_SYM_DECAP_FUNC_NONE} + }, + { + .description = "meter", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_METER >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_METER >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_METER >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_METER >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_METER >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_METER >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_METER >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_METER & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_RF, + .field_opr2 = { + (BNXT_ULP_RF_IDX_METER_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_METER_PTR_0 & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "stats_op", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + }, + { + .description = "stats_ptr", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff} + }, + { + .description = "vnic_or_vport", + .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff} + }, + { + .description = "use_default", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "mirror", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_RF, + .field_opr2 = { + (BNXT_ULP_RF_IDX_MIRROR_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_MIRROR_ID_0 & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "cond_copy", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "vlan_del_rpt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + ULP_THOR_SYM_VLAN_DEL_RPT_STRIP_OUTER}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "drop", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_DROP & 0xff} + }, + { + .description = "hit", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "type", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + }, + /* act_tid: 1, , table: int_compact_act_record.0 */ + { + .description = "rsvd0", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "decap_func", + .field_bit_size = 5, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + ULP_THOR_SYM_DECAP_FUNC_THRU_TUN}, + .field_src3 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr3 = { + ULP_THOR_SYM_DECAP_FUNC_NONE} + }, + { + .description = "meter", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_METER >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_METER >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_METER >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_METER >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_METER >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_METER >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_METER >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_METER & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_RF, + .field_opr2 = { + (BNXT_ULP_RF_IDX_METER_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_METER_PTR_0 & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "stats_op", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + }, + { + .description = "stats_ptr", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff} + }, + { + .description = "vnic_or_vport", + .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff} + }, + { + .description = "use_default", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "mirror", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_RF, + .field_opr2 = { + (BNXT_ULP_RF_IDX_MIRROR_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_MIRROR_ID_0 & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "cond_copy", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "vlan_del_rpt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + ULP_THOR_SYM_VLAN_DEL_RPT_STRIP_OUTER}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "drop", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_DROP & 0xff} + }, + { + .description = "hit", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "type", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + /* act_tid: 2, , table: mirror_tbl.alloc */ + { + .description = "act_rec_ptr", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "reserved", + .field_bit_size = 13, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "ignore_drop", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "copy_ing_or_egr", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "enable", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + }, + /* act_tid: 2, , table: int_flow_counter_tbl.0 */ + { + .description = "count", + .field_bit_size = 64, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + /* act_tid: 2, , table: int_compact_act_record.0 */ + { + .description = "rsvd0", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "decap_func", + .field_bit_size = 5, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "meter", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "stats_op", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + }, + { + .description = "stats_ptr", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff} + }, + { + .description = "vnic_or_vport", + .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff} + }, + { + .description = "use_default", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "mirror", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "cond_copy", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "vlan_del_rpt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "drop", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "hit", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "type", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + /* act_tid: 2, , table: mirror_tbl.wr */ + { + .description = "act_rec_ptr", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} + }, + { + .description = "reserved", + .field_bit_size = 13, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "ignore_drop", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "copy_ing_or_egr", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + }, + { + .description = "enable", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + }, + /* act_tid: 2, , table: shared_mirror_record.wr */ + { + .description = "rid", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, + BNXT_ULP_RF_IDX_RID & 0xff} + }, + { + .description = "mirror_id", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MIRROR_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_MIRROR_PTR_0 & 0xff} + }, + /* act_tid: 3, , table: int_flow_counter_tbl.0 */ + { + .description = "count", + .field_bit_size = 64, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + /* act_tid: 3, , table: mod_record.ing_ttl */ + { + .description = "metadata_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "rem_ovlan", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "rem_ivlan", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "rep_add_ivlan", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "rep_add_ovlan", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "ttl_update", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + }, + { + .description = "tun_md_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "reserved_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l2_dmac_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + 1}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l2_smac_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + 1}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_sip_ipv6_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_dip_ipv6_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_sip_ipv4_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + 1}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_dip_ipv4_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + 1}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l4_sport_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + 1}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l4_dport_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + 1}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "metadata_data", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "metadata_rsvd", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "metadata_op", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "metadata_prof", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ivlan_tpid", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ivlan_pri", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ivlan_de", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ivlan_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ovlan_tpid", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ovlan_pri", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ovlan_de", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ovlan_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "alt_pfid", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "alt_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "ttl_rsvd", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "ttl_tl3_dec", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_opr1 = { + (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, + BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff} + }, + { + .description = "ttl_il3_dec", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_opr1 = { + (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, + BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff} + }, + { + .description = "ttl_tl3_rdir", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "ttl_il3_rdir", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tun_new_prot", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "tun_ex_prot", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "tun_mv", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "reserved", + .field_bit_size = 0, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l2_dmac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr2 = { + (BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + }, + { + .description = "l2_smac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr2 = { + (BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + }, + { + .description = "l3_sip_ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l3_dip_ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l3_sip_ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr2 = { + (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + }, + { + .description = "l3_dip_ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr2 = { + (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + }, + { + .description = "l4_sport", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr2 = { + (BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + }, + { + .description = "l4_dport", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr2 = { + (BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + }, + /* act_tid: 3, , table: mod_record.ing_no_ttl */ + { + .description = "metadata_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "rem_ovlan", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "rem_ivlan", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "rep_add_ivlan", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "rep_add_ovlan", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "ttl_update", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tun_md_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "reserved_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l2_dmac_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + 1}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l2_smac_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + 1}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_sip_ipv6_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_dip_ipv6_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_sip_ipv4_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + 1}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_dip_ipv4_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + 1}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l4_sport_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + 1}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l4_dport_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + 1}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "metadata_data", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "metadata_rsvd", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "metadata_op", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "metadata_prof", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ivlan_tpid", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ivlan_pri", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ivlan_de", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ivlan_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ovlan_tpid", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ovlan_pri", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ovlan_de", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ovlan_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "alt_pfid", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "alt_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ttl_rsvd", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ttl_tl3_dec", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ttl_il3_dec", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ttl_tl3_rdir", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ttl_il3_rdir", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "tun_new_prot", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "tun_ex_prot", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "tun_mv", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "reserved", + .field_bit_size = 0, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l2_dmac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr2 = { + (BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + }, + { + .description = "l2_smac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr2 = { + (BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + }, + { + .description = "l3_sip_ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l3_dip_ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l3_sip_ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr2 = { + (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + }, + { + .description = "l3_dip_ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr2 = { + (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + }, + { + .description = "l4_sport", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr2 = { + (BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + }, + { + .description = "l4_dport", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr2 = { + (BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + }, + /* act_tid: 3, , table: int_full_act_record.0 */ + { + .description = "sp_rec_ptr", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "encap_ptr", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "mod_rec_ptr", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MODIFY_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MODIFY_PTR & 0xff} + }, + { + .description = "rsvd1", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "rsvd0", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "decap_func", + .field_bit_size = 5, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "meter", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "stats_op", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + }, + { + .description = "stats_ptr", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff} + }, + { + .description = "vnic_or_vport", + .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff} + }, + { + .description = "use_default", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "mirror", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MIRROR_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_MIRROR_ID_0 & 0xff} + }, + { + .description = "cond_copy", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "vlan_del_rpt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "drop", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "hit", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "type", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + }, + /* act_tid: 4, , table: int_flow_counter_tbl.0 */ + { + .description = "count", + .field_bit_size = 64, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + /* act_tid: 4, , table: vnic_interface_rss_config.0 */ + /* act_tid: 4, , table: vnic_interface_queue_config.0 */ + /* act_tid: 4, , table: int_compact_act_record.0 */ + { + .description = "rsvd0", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "decap_func", + .field_bit_size = 5, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "meter", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "stats_op", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "stats_ptr", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff} + }, + { + .description = "vnic_or_vport", + .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_RSS_VNIC >> 8) & 0xff, + BNXT_ULP_RF_IDX_RSS_VNIC & 0xff} + }, + { + .description = "use_default", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "mirror", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MIRROR_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_MIRROR_ID_0 & 0xff} }, - /* cond_execute: act_tid: 4, mod_record.dec_ttl_egr */ { - .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACT_BIT_DEC_TTL + .description = "cond_copy", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* cond_execute: act_tid: 4, int_full_act_record.0 */ { - .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACT_BIT_DEC_TTL + .description = "vlan_del_rpt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACT_BIT_PUSH_VLAN + .description = "drop", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* cond_execute: act_tid: 5, int_flow_counter_tbl.0 */ { - .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACT_BIT_COUNT + .description = "hit", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* cond_execute: act_tid: 5, mod_record.ing_ttl */ { - .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACT_BIT_DEC_TTL + .description = "type", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* cond_execute: act_tid: 5, mod_record.ing_no_ttl */ + /* act_tid: 4, , table: int_compact_act_record.1 */ { - .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_NOT_SET, - .cond_operand = BNXT_ULP_ACT_BIT_DEC_TTL + .description = "rsvd0", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* cond_execute: act_tid: 6, int_flow_counter_tbl.0 */ { - .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACT_BIT_COUNT + .description = "decap_func", + .field_bit_size = 5, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* cond_execute: act_tid: 6, source_property_cache.rd */ { - .cond_opcode = BNXT_ULP_COND_OPC_CF_IS_SET, - .cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV4_FLAG + .description = "meter", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* cond_execute: act_tid: 6, control.0 */ { - .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, - .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS + .description = "stats_op", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* cond_execute: act_tid: 6, sp_smac_ipv4.0 */ { - .cond_opcode = BNXT_ULP_COND_OPC_CF_IS_SET, - .cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV4_FLAG + .description = "stats_ptr", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff} }, - /* cond_execute: act_tid: 6, sp_smac_ipv6.0 */ { - .cond_opcode = BNXT_ULP_COND_OPC_CF_IS_SET, - .cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV6_FLAG + .description = "vnic_or_vport", + .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff} }, - /* cond_execute: act_tid: 6, vxlan_encap_rec_cache.rd */ { - .cond_opcode = BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET, - .cond_operand = BNXT_ULP_HDR_BIT_O_IPV4 + .description = "use_default", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .cond_opcode = BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET, - .cond_operand = BNXT_ULP_HDR_BIT_T_VXLAN + .description = "mirror", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MIRROR_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_MIRROR_ID_0 & 0xff} }, - /* cond_execute: act_tid: 6, control.0 */ { - .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, - .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS + .description = "cond_copy", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* cond_execute: act_tid: 6, int_tun_encap_record.ipv4_vxlan */ { - .cond_opcode = BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET, - .cond_operand = BNXT_ULP_HDR_BIT_O_IPV4 + .description = "vlan_del_rpt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .cond_opcode = BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET, - .cond_operand = BNXT_ULP_HDR_BIT_T_VXLAN + .description = "drop", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* cond_execute: act_tid: 6, int_tun_encap_record.ipv6_vxlan */ { - .cond_opcode = BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET, - .cond_operand = BNXT_ULP_HDR_BIT_O_IPV6 + .description = "hit", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .cond_opcode = BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET, - .cond_operand = BNXT_ULP_HDR_BIT_T_VXLAN - } -}; - -struct bnxt_ulp_mapper_key_info ulp_thor_act_key_info_list[] = { - /* act_tid: 1, , table: shared_mirror_record.rd */ + .description = "type", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + /* act_tid: 5, , table: meter_profile_tbl.0 */ { - .field_info_mask = { - .description = "shared_index", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff} - }, - .field_info_spec = { - .description = "shared_index", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, - .field_opr1 = { - (BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE & 0xff} - } + .description = "cf", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_METER_PROF_CF >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_CF & 0xff} + }, + { + .description = "pm", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_METER_PROF_PM >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_PM & 0xff} + }, + { + .description = "rfc2698", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_METER_PROF_RFC2698 >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_RFC2698 & 0xff} + }, + { + .description = "cbsm", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_METER_PROF_CBSM >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_CBSM & 0xff} + }, + { + .description = "ebsm", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_METER_PROF_EBSM >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_EBSM & 0xff} + }, + { + .description = "cbnd", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_METER_PROF_CBND >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_CBND & 0xff} + }, + { + .description = "ebnd", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_METER_PROF_EBND >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_EBND & 0xff} + }, + { + .description = "cbs", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_METER_PROF_CBS >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_CBS & 0xff} + }, + { + .description = "ebs", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_METER_PROF_EBS >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_EBS & 0xff} + }, + { + .description = "cir", + .field_bit_size = 17, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_METER_PROF_CIR >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_CIR & 0xff} + }, + { + .description = "eir", + .field_bit_size = 17, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_METER_PROF_EIR >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_EIR & 0xff} + }, + /* act_tid: 5, , table: meter_profile_tbl_cache.wr */ + { + .description = "rid", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, + BNXT_ULP_RF_IDX_RID & 0xff} + }, + { + .description = "meter_profile_ptr", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_METER_PROFILE_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_METER_PROFILE_PTR_0 & 0xff} + }, + /* act_tid: 5, , table: meter_tbl.0 */ + { + .description = "bkt_c", + .field_bit_size = 27, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + (134217727 >> 24) & 0xff, + (134217727 >> 16) & 0xff, + (134217727 >> 8) & 0xff, + 134217727 & 0xff} + }, + { + .description = "bkt_e", + .field_bit_size = 27, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + (134217727 >> 24) & 0xff, + (134217727 >> 16) & 0xff, + (134217727 >> 8) & 0xff, + 134217727 & 0xff} + }, + { + .description = "mtr_val", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_METER_INST_MTR_VAL >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_INST_MTR_VAL & 0xff} + }, + { + .description = "ecn_rmp_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_METER_INST_ECN_RMP_EN >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_INST_ECN_RMP_EN & 0xff} + }, + { + .description = "meter_profile", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_METER_PROFILE_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_METER_PROFILE_PTR_0 & 0xff} + }, + /* act_tid: 5, , table: shared_meter_tbl_cache.wr */ + { + .description = "rid", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, + BNXT_ULP_RF_IDX_RID & 0xff} + }, + { + .description = "meter_ptr", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_METER_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_METER_PTR_0 & 0xff} }, - /* act_tid: 2, , table: shared_mirror_record.wr */ { - .field_info_mask = { - .description = "shared_index", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff} - }, - .field_info_spec = { - .description = "shared_index", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_MIRROR_PTR_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_MIRROR_PTR_0 & 0xff} - } + .description = "sw_meter_profile_id", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_METER_PROF_ID >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_PROF_ID & 0xff} }, - /* act_tid: 6, , table: source_property_cache.rd */ + /* act_tid: 5, , table: meter_tbl.update_wr */ { - .field_info_mask = { - .description = "smac", - .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff, - 0xff, - 0xff, - 0xff, - 0xff, - 0xff} - }, - .field_info_spec = { - .description = "smac", - .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_ETH_SMAC & 0xff} - } + .description = "bkt_c", + .field_bit_size = 27, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + (134217727 >> 24) & 0xff, + (134217727 >> 16) & 0xff, + (134217727 >> 8) & 0xff, + 134217727 & 0xff} }, { - .field_info_mask = { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff, - 0xff, - 0xff, - 0xff} - }, - .field_info_spec = { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_IPV4_SADDR >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_IPV4_SADDR & 0xff} - } + .description = "bkt_e", + .field_bit_size = 27, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + (134217727 >> 24) & 0xff, + (134217727 >> 16) & 0xff, + (134217727 >> 8) & 0xff, + 134217727 & 0xff} }, - /* act_tid: 6, , table: source_property_cache.wr */ { - .field_info_mask = { - .description = "smac", - .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff, - 0xff, - 0xff, - 0xff, - 0xff, - 0xff} - }, - .field_info_spec = { - .description = "smac", - .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_ETH_SMAC & 0xff} - } + .description = "mtr_val", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_METER_INST_MTR_VAL_UPDATE >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_INST_MTR_VAL_UPDATE & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr2 = { + (BNXT_ULP_ACT_PROP_IDX_METER_INST_MTR_VAL >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_INST_MTR_VAL & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_RF, + .field_opr3 = { + (BNXT_ULP_RF_IDX_RF_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_RF_0 & 0xff} }, { - .field_info_mask = { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff, - 0xff, - 0xff, - 0xff} - }, - .field_info_spec = { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_IPV4_SADDR >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_IPV4_SADDR & 0xff} - } + .description = "ecn_rmp_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_METER_INST_ECN_RMP_EN_UPDATE >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_INST_ECN_RMP_EN_UPDATE & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr2 = { + (BNXT_ULP_ACT_PROP_IDX_METER_INST_ECN_RMP_EN >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_METER_INST_ECN_RMP_EN & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_RF, + .field_opr3 = { + (BNXT_ULP_RF_IDX_RF_1 >> 8) & 0xff, + BNXT_ULP_RF_IDX_RF_1 & 0xff} }, - /* act_tid: 6, , table: vxlan_encap_rec_cache.rd */ { - .field_info_mask = { - .description = "dmac", - .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff, - 0xff, - 0xff, - 0xff, - 0xff, - 0xff} - }, - .field_info_spec = { - .description = "dmac", - .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_ETH_DMAC & 0xff} - } + .description = "meter_profile", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_METER_PROFILE_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_METER_PROFILE_PTR_0 & 0xff} }, + /* act_tid: 6, , table: int_flow_counter_tbl.0 */ { - .field_info_mask = { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff, - 0xff, - 0xff, - 0xff} - }, - .field_info_spec = { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_IPV4_DADDR >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_IPV4_DADDR & 0xff} - } + .description = "count", + .field_bit_size = 64, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, + /* act_tid: 6, , table: int_vtag_encap_record.0 */ { - .field_info_mask = { - .description = "udp_sport", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff, - 0xff} - }, - .field_info_spec = { - .description = "udp_sport", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_UDP_SPORT >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_UDP_SPORT & 0xff} - } + .description = "ecv_valid", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, { - .field_info_mask = { - .description = "udp_dport", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff, - 0xff} - }, - .field_info_spec = { - .description = "udp_dport", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_UDP_DPORT >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_UDP_DPORT & 0xff} - } + .description = "ecv_custom_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .field_info_mask = { - .description = "vni", - .field_bit_size = 24, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff, - 0xff, - 0xff} - }, - .field_info_spec = { - .description = "vni", - .field_bit_size = 24, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_VXLAN_VNI >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_VXLAN_VNI & 0xff} - } + .description = "ecv_vtag_type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + ULP_THOR_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI} + }, + { + .description = "ecv_l2_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* act_tid: 6, , table: vxlan_encap_rec_cache.wr */ { - .field_info_mask = { - .description = "dmac", - .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff, - 0xff, - 0xff, - 0xff, - 0xff, - 0xff} - }, - .field_info_spec = { - .description = "dmac", - .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_ETH_DMAC & 0xff} - } + .description = "ecv_l3_type", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .field_info_mask = { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff, - 0xff, - 0xff, - 0xff} - }, - .field_info_spec = { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_IPV4_DADDR >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_IPV4_DADDR & 0xff} - } + .description = "ecv_l4_type", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .field_info_mask = { - .description = "udp_sport", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff, - 0xff} - }, - .field_info_spec = { - .description = "udp_sport", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_UDP_SPORT >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_UDP_SPORT & 0xff} - } + .description = "ecv_tun_type", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .field_info_mask = { - .description = "udp_dport", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff, - 0xff} - }, - .field_info_spec = { - .description = "udp_dport", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_UDP_DPORT >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_UDP_DPORT & 0xff} - } + .description = "vtag_tpid", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN & 0xff} }, { - .field_info_mask = { - .description = "vni", - .field_bit_size = 24, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff, - 0xff, - 0xff} - }, - .field_info_spec = { - .description = "vni", - .field_bit_size = 24, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_VXLAN_VNI >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_VXLAN_VNI & 0xff} - } - } -}; - -struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { - /* act_tid: 1, , table: int_flow_counter_tbl.0 */ + .description = "vtag_pcp", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff} + }, { - .description = "count", - .field_bit_size = 64, + .description = "vtag_de", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* act_tid: 1, , table: mod_record.ing_ttl */ + { + .description = "vtag_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff} + }, + /* act_tid: 6, , table: mod_record.dec_ttl_egr */ { .description = "metadata_en", .field_bit_size = 1, @@ -1462,8 +5856,8 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { - (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff} + (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, + BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff} }, { .description = "ttl_il3_dec", @@ -1471,8 +5865,8 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { - (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff} + (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, + BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff} }, { .description = "ttl_tl3_rdir", @@ -1521,211 +5915,63 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { .field_bit_size = 128, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, - { - .description = "l3_dip_ipv6", - .field_bit_size = 128, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - { - .description = "l3_sip_ipv4", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - { - .description = "l3_dip_ipv4", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - { - .description = "l4_sport", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - { - .description = "l4_dport", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - /* act_tid: 1, , table: int_full_act_record.0 */ - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "mod_rec_ptr", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_RF, - .field_opr2 = { - (BNXT_ULP_RF_IDX_MODIFY_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_MODIFY_PTR & 0xff}, - .field_src3 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "rsvd1", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "rsvd0", - .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "decap_func", - .field_bit_size = 5, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr2 = { - ULP_THOR_SYM_DECAP_FUNC_THRU_TUN}, - .field_src3 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr3 = { - ULP_THOR_SYM_DECAP_FUNC_NONE} - }, - { - .description = "meter", - .field_bit_size = 10, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "stats_op", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} - }, - { - .description = "stats_ptr", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff} + { + .description = "l3_dip_ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "vnic_or_vport", - .field_bit_size = 11, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, - .field_opr1 = { - (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff} + .description = "l3_sip_ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "use_default", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "l3_dip_ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "mirror", - .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_RF, - .field_opr2 = { - (BNXT_ULP_RF_IDX_MIRROR_ID_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_MIRROR_ID_0 & 0xff}, - .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + .description = "l4_sport", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "cond_copy", - .field_bit_size = 1, + .description = "l4_dport", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + /* act_tid: 6, , table: int_full_act_record.0 */ + { + .description = "sp_rec_ptr", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "vlan_del_rpt", - .field_bit_size = 2, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .description = "encap_ptr", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr2 = { - ULP_THOR_SYM_VLAN_DEL_RPT_STRIP_OUTER}, - .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + (BNXT_ULP_RF_IDX_ENCAP_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_ENCAP_PTR_0 & 0xff} }, { - .description = "drop", - .field_bit_size = 1, + .description = "mod_rec_ptr", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_DROP & 0xff} + (BNXT_ULP_RF_IDX_MODIFY_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MODIFY_PTR & 0xff} }, { - .description = "hit", - .field_bit_size = 1, + .description = "rsvd1", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "type", - .field_bit_size = 3, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} - }, - /* act_tid: 1, , table: int_compact_act_record.0 */ - { .description = "rsvd0", .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, @@ -1734,23 +5980,8 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { { .description = "decap_func", .field_bit_size = 5, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr2 = { - ULP_THOR_SYM_DECAP_FUNC_THRU_TUN}, - .field_src3 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr3 = { - ULP_THOR_SYM_DECAP_FUNC_NONE} + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "meter", @@ -1781,8 +6012,8 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { - (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff} + (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff} }, { .description = "use_default", @@ -1819,21 +6050,8 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { { .description = "vlan_del_rpt", .field_bit_size = 2, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr2 = { - ULP_THOR_SYM_VLAN_DEL_RPT_STRIP_OUTER}, - .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "drop", @@ -1860,49 +6078,11 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { .description = "type", .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - /* act_tid: 2, , table: mirror_tbl.alloc */ - { - .description = "act_rec_ptr", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "reserved", - .field_bit_size = 13, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "ignore_drop", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "copy_ing_or_egr", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "enable", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { 1} }, - /* act_tid: 2, , table: int_flow_counter_tbl.0 */ - { - .description = "count", - .field_bit_size = 64, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - /* act_tid: 2, , table: int_compact_act_record.0 */ + /* act_tid: 6, , table: int_compact_act_record.0 */ { .description = "rsvd0", .field_bit_size = 8, @@ -1944,8 +6124,8 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { - (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff} + (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff} }, { .description = "use_default", @@ -1956,109 +6136,70 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { { .description = "mirror", .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { - (BNXT_ULP_RF_IDX_MIRROR_PTR_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_MIRROR_PTR_0 & 0xff} + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_RF, + .field_opr2 = { + (BNXT_ULP_RF_IDX_MIRROR_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_MIRROR_ID_0 & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "cond_copy", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "vlan_del_rpt", - .field_bit_size = 2, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "hit", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "type", - .field_bit_size = 3, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - /* act_tid: 2, , table: mirror_tbl.wr */ - { - .description = "act_rec_ptr", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} - }, - { - .description = "reserved", - .field_bit_size = 13, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "ignore_drop", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "copy_ing_or_egr", - .field_bit_size = 1, + .description = "vlan_del_rpt", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "enable", + .description = "drop", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { - 1} + ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_DROP & 0xff} }, - /* act_tid: 2, , table: shared_mirror_record.wr */ { - .description = "rid", - .field_bit_size = 32, + .description = "hit", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, - BNXT_ULP_RF_IDX_RID & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "mirror_id", - .field_bit_size = 4, + .description = "type", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_MIRROR_PTR_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_MIRROR_PTR_0 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* act_tid: 3, , table: int_flow_counter_tbl.0 */ + /* act_tid: 7, , table: int_flow_counter_tbl.0 */ { .description = "count", .field_bit_size = 64, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* act_tid: 3, , table: mod_record.ing_ttl */ + /* act_tid: 7, , table: mod_record.ing_ttl */ { .description = "metadata_en", .field_bit_size = 1, @@ -2112,14 +6253,40 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { { .description = "l2_dmac_en", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + 1}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "l2_smac_en", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + 1}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "l3_sip_ipv6_en", @@ -2340,12 +6507,42 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { { .description = "l2_dmac", .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr2 = { + (BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP }, { .description = "l2_smac", .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr2 = { + (BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP }, { .description = "l3_sip_ipv6", @@ -2437,7 +6634,7 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff}, .field_src3 = BNXT_ULP_FIELD_SRC_SKIP }, - /* act_tid: 3, , table: mod_record.ing_no_ttl */ + /* act_tid: 7, , table: mod_record.ing_no_ttl */ { .description = "metadata_en", .field_bit_size = 1, @@ -2489,14 +6686,40 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { { .description = "l2_dmac_en", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + 1}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "l2_smac_en", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + 1}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "l3_sip_ipv6_en", @@ -2704,12 +6927,42 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { { .description = "l2_dmac", .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr2 = { + (BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP }, { .description = "l2_smac", .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr2 = { + (BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP }, { .description = "l3_sip_ipv6", @@ -2801,7 +7054,7 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff}, .field_src3 = BNXT_ULP_FIELD_SRC_SKIP }, - /* act_tid: 3, , table: int_full_act_record.0 */ + /* act_tid: 7, , table: int_full_act_record.0 */ { .description = "sp_rec_ptr", .field_bit_size = 16, @@ -2851,9 +7104,16 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { .description = "stats_op", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { - 1} + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_COUNT & 0xff} }, { .description = "stats_ptr", @@ -2870,8 +7130,8 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { - (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff} + (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff} }, { .description = "use_default", @@ -2883,7 +7143,10 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { .description = "mirror", .field_bit_size = 4, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MIRROR_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_MIRROR_ID_0 & 0xff} }, { .description = "cond_copy", @@ -2917,94 +7180,83 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { .field_opr1 = { 1} }, - /* act_tid: 4, , table: int_flow_counter_tbl.0 */ + /* act_tid: 8, , table: int_flow_counter_tbl.0 */ { .description = "count", .field_bit_size = 64, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* act_tid: 4, , table: int_vtag_encap_record.0 */ + /* act_tid: 8, , table: sp_smac_ipv4.0 */ { - .description = "ecv_valid", - .field_bit_size = 1, + .description = "smac", + .field_bit_size = 48, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, .field_opr1 = { - 1} - }, - { - .description = "ecv_custom_en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + (BNXT_ULP_ENC_FIELD_ETH_SMAC >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_ETH_SMAC & 0xff} }, { - .description = "ecv_vtag_type", - .field_bit_size = 4, + .description = "ipv4_src_addr", + .field_bit_size = 32, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, .field_opr1 = { - ULP_THOR_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI} - }, - { - .description = "ecv_l2_en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "ecv_l3_type", - .field_bit_size = 3, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + (BNXT_ULP_ENC_FIELD_IPV4_SADDR >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_IPV4_SADDR & 0xff} }, { - .description = "ecv_l4_type", - .field_bit_size = 3, + .description = "reserved", + .field_bit_size = 48, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, + /* act_tid: 8, , table: source_property_cache.wr */ { - .description = "ecv_tun_type", - .field_bit_size = 3, + .description = "rid", + .field_bit_size = 32, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, + BNXT_ULP_RF_IDX_RID & 0xff} }, { - .description = "vtag_tpid", + .description = "sp_rec_ptr", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { - (BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN & 0xff} + (BNXT_ULP_RF_IDX_MAIN_SP_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_SP_PTR & 0xff} }, + /* act_tid: 8, , table: sp_smac_ipv6.0 */ { - .description = "vtag_pcp", - .field_bit_size = 3, + .description = "smac", + .field_bit_size = 48, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, .field_opr1 = { - (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff} + (BNXT_ULP_ENC_FIELD_ETH_SMAC >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_ETH_SMAC & 0xff} }, { - .description = "vtag_de", - .field_bit_size = 1, + .description = "ipv6_src_addr", + .field_bit_size = 128, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_IPV6_SADDR >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_IPV6_SADDR & 0xff} }, { - .description = "vtag_vid", - .field_bit_size = 12, + .description = "reserved", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, - .field_opr1 = { - (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* act_tid: 4, , table: mod_record.dec_ttl_egr */ + /* act_tid: 8, , table: mod_record.ing_l2write */ { .description = "metadata_en", .field_bit_size = 1, @@ -3039,9 +7291,7 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { .description = "ttl_update", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "tun_md_en", @@ -3058,14 +7308,40 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { { .description = "l2_dmac_en", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + 1}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "l2_smac_en", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + 1}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "l3_sip_ipv6_en", @@ -3166,50 +7442,37 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { { .description = "alt_pfid", .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { .description = "alt_vid", .field_bit_size = 12, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { .description = "ttl_rsvd", .field_bit_size = 12, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "ttl_tl3_dec", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, - .field_opr1 = { - (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff} + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ttl_tl3_dec", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { .description = "ttl_il3_dec", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, - .field_opr1 = { - (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff} + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { .description = "ttl_tl3_rdir", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { .description = "ttl_il3_rdir", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { .description = "tun_new_prot", @@ -3234,12 +7497,42 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { { .description = "l2_dmac", .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_DST & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr2 = { + (BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP }, { .description = "l2_smac", .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SET_MAC_SRC & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr2 = { + (BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP }, { .description = "l3_sip_ipv6", @@ -3271,622 +7564,730 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, - /* act_tid: 4, , table: int_full_act_record.0 */ + /* act_tid: 8, , table: int_tun_encap_record.ipv4_vxlan */ { - .description = "sp_rec_ptr", - .field_bit_size = 16, + .description = "ecv_valid", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + ULP_THOR_SYM_ECV_VALID_YES} + }, + { + .description = "ecv_custom_en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "encap_ptr", + .description = "ecv_vtag_type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE & 0xff} + }, + { + .description = "ecv_l2_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + ULP_THOR_SYM_ECV_L2_EN_YES} + }, + { + .description = "ecv_l3_type", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE & 0xff} + }, + { + .description = "ecv_l4_type", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + ULP_THOR_SYM_ECV_L4_TYPE_UDP_CSUM} + }, + { + .description = "ecv_tun_type", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + ULP_THOR_SYM_ECV_TUN_TYPE_VXLAN} + }, + { + .description = "enc_eth_dmac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_ETH_DMAC & 0xff} + }, + { + .description = "enc_o_vlan_tag", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr2 = { + (BNXT_ULP_ENC_FIELD_O_VLAN_TCI >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_O_VLAN_TCI & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + }, + { + .description = "enc_o_vlan_type", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr2 = { + (BNXT_ULP_ENC_FIELD_O_VLAN_TYPE >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_O_VLAN_TYPE & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + }, + { + .description = "enc_i_vlan_tag", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr2 = { + (BNXT_ULP_ENC_FIELD_I_VLAN_TCI >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_I_VLAN_TCI & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + }, + { + .description = "enc_i_vlan_type", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr2 = { + (BNXT_ULP_ENC_FIELD_I_VLAN_TYPE >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_I_VLAN_TYPE & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + }, + { + .description = "enc_ipv4_ihl", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, .field_opr1 = { - (BNXT_ULP_RF_IDX_ENCAP_PTR_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_ENCAP_PTR_0 & 0xff} + (BNXT_ULP_ENC_FIELD_IPV4_IHL >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_IPV4_IHL & 0xff} }, { - .description = "mod_rec_ptr", + .description = "enc_ipv4_tos", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_IPV4_TOS >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_IPV4_TOS & 0xff} + }, + { + .description = "enc_ipv4_pkt_id", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, .field_opr1 = { - (BNXT_ULP_RF_IDX_MODIFY_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_MODIFY_PTR & 0xff} + (BNXT_ULP_ENC_FIELD_IPV4_PKT_ID >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_IPV4_PKT_ID & 0xff} }, { - .description = "rsvd1", + .description = "enc_ipv4_frag", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_IPV4_FRAG >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_IPV4_FRAG & 0xff} }, { - .description = "rsvd0", + .description = "enc_ipv4_ttl", .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_IPV4_TTL >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_IPV4_TTL & 0xff} }, { - .description = "decap_func", - .field_bit_size = 5, + .description = "enc_ipv4_proto", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_IPV4_PROTO >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_IPV4_PROTO & 0xff} }, { - .description = "meter", - .field_bit_size = 10, + .description = "enc_ipv4_daddr", + .field_bit_size = 32, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_IPV4_DADDR >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_IPV4_DADDR & 0xff} + }, + { + .description = "enc_ipv6_vtc", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "enc_ipv6_zero", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "enc_ipv6_proto", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "enc_ipv6_ttl", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "enc_ipv6_daddr", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "stats_op", - .field_bit_size = 1, + .description = "enc_udp_sport", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, .field_opr1 = { - 1} + (BNXT_ULP_ENC_FIELD_UDP_SPORT >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_UDP_SPORT & 0xff} }, { - .description = "stats_ptr", + .description = "enc_udp_dport", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, .field_opr1 = { - (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff} + (BNXT_ULP_ENC_FIELD_UDP_DPORT >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_UDP_DPORT & 0xff} }, { - .description = "vnic_or_vport", - .field_bit_size = 11, + .description = "enc_vxlan_flags", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, .field_opr1 = { - (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff} + (BNXT_ULP_ENC_FIELD_VXLAN_FLAGS >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_VXLAN_FLAGS & 0xff} }, { - .description = "use_default", - .field_bit_size = 1, + .description = "enc_vxlan_rsvd0", + .field_bit_size = 24, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_VXLAN_RSVD0 >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_VXLAN_RSVD0 & 0xff} }, { - .description = "mirror", - .field_bit_size = 4, + .description = "enc_vxlan_vni", + .field_bit_size = 24, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_VXLAN_VNI >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_VXLAN_VNI & 0xff} }, { - .description = "cond_copy", - .field_bit_size = 1, + .description = "enc_vxlan_rsvd1", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 & 0xff} }, + /* act_tid: 8, , table: vxlan_encap_rec_cache.wr */ { - .description = "vlan_del_rpt", - .field_bit_size = 2, + .description = "rid", + .field_bit_size = 32, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, + BNXT_ULP_RF_IDX_RID & 0xff} }, { - .description = "drop", - .field_bit_size = 1, + .description = "enc_rec_ptr", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_DROP & 0xff} + (BNXT_ULP_RF_IDX_ENCAP_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_ENCAP_PTR_0 & 0xff} }, + /* act_tid: 8, , table: int_tun_encap_record.ipv6_vxlan */ { - .description = "hit", + .description = "ecv_valid", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "type", - .field_bit_size = 3, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - 1} - }, - /* act_tid: 4, , table: int_compact_act_record.0 */ - { - .description = "rsvd0", - .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + ULP_THOR_SYM_ECV_VALID_YES} }, { - .description = "decap_func", - .field_bit_size = 5, + .description = "ecv_custom_en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "meter", - .field_bit_size = 10, + .description = "ecv_vtag_type", + .field_bit_size = 4, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE & 0xff} }, { - .description = "stats_op", + .description = "ecv_l2_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - 1} - }, - { - .description = "stats_ptr", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff} + ULP_THOR_SYM_ECV_L2_EN_YES} }, { - .description = "vnic_or_vport", - .field_bit_size = 11, + .description = "ecv_l3_type", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { - (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff} + (BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE & 0xff} }, { - .description = "use_default", - .field_bit_size = 1, + .description = "ecv_l4_type", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + ULP_THOR_SYM_ECV_L4_TYPE_UDP_CSUM} }, { - .description = "mirror", - .field_bit_size = 4, + .description = "ecv_tun_type", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + ULP_THOR_SYM_ECV_TUN_TYPE_VXLAN} }, { - .description = "cond_copy", - .field_bit_size = 1, + .description = "enc_eth_dmac", + .field_bit_size = 48, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_ETH_DMAC & 0xff} }, { - .description = "vlan_del_rpt", - .field_bit_size = 2, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "enc_o_vlan_tag", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr2 = { + (BNXT_ULP_ENC_FIELD_O_VLAN_TCI >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_O_VLAN_TCI & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP }, { - .description = "drop", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .description = "enc_o_vlan_type", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT, .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_DROP & 0xff} + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr2 = { + (BNXT_ULP_ENC_FIELD_O_VLAN_TYPE >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_O_VLAN_TYPE & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP }, { - .description = "hit", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "enc_i_vlan_tag", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr2 = { + (BNXT_ULP_ENC_FIELD_I_VLAN_TCI >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_I_VLAN_TCI & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP }, { - .description = "type", - .field_bit_size = 3, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "enc_i_vlan_type", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr2 = { + (BNXT_ULP_ENC_FIELD_I_VLAN_TYPE >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_I_VLAN_TYPE & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_SKIP }, - /* act_tid: 5, , table: int_flow_counter_tbl.0 */ { - .description = "count", - .field_bit_size = 64, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "enc_ipv4_ihl", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, - /* act_tid: 5, , table: mod_record.ing_ttl */ { - .description = "metadata_en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "enc_ipv4_tos", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "rem_ovlan", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "enc_ipv4_pkt_id", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "rem_ivlan", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "enc_ipv4_frag", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "rep_add_ivlan", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "enc_ipv4_ttl", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "rep_add_ovlan", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "enc_ipv4_proto", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "ttl_update", - .field_bit_size = 1, + .description = "enc_ipv4_daddr", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "enc_ipv6_vtc", + .field_bit_size = 32, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, .field_opr1 = { - 1} + (BNXT_ULP_ENC_FIELD_IPV6_VTC_FLOW >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_IPV6_VTC_FLOW & 0xff} }, { - .description = "tun_md_en", - .field_bit_size = 1, + .description = "enc_ipv6_zero", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "reserved_en", - .field_bit_size = 1, + .description = "enc_ipv6_proto", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_IPV6_PROTO >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_IPV6_PROTO & 0xff} }, { - .description = "l2_dmac_en", - .field_bit_size = 1, + .description = "enc_ipv6_ttl", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_IPV6_TTL >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_IPV6_TTL & 0xff} }, { - .description = "l2_smac_en", - .field_bit_size = 1, + .description = "enc_ipv6_daddr", + .field_bit_size = 128, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_IPV6_DADDR >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_IPV6_DADDR & 0xff} }, { - .description = "l3_sip_ipv6_en", - .field_bit_size = 1, + .description = "enc_udp_sport", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_UDP_SPORT >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_UDP_SPORT & 0xff} }, { - .description = "l3_dip_ipv6_en", - .field_bit_size = 1, + .description = "enc_udp_dport", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_opr1 = { + (BNXT_ULP_ENC_FIELD_UDP_DPORT >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_UDP_DPORT & 0xff} }, { - .description = "l3_sip_ipv4_en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .description = "enc_vxlan_flags", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr2 = { - 1}, - .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + (BNXT_ULP_ENC_FIELD_VXLAN_FLAGS >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_VXLAN_FLAGS & 0xff} }, { - .description = "l3_dip_ipv4_en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .description = "enc_vxlan_rsvd0", + .field_bit_size = 24, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr2 = { - 1}, - .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + (BNXT_ULP_ENC_FIELD_VXLAN_RSVD0 >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_VXLAN_RSVD0 & 0xff} }, { - .description = "l4_sport_en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .description = "enc_vxlan_vni", + .field_bit_size = 24, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr2 = { - 1}, - .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + (BNXT_ULP_ENC_FIELD_VXLAN_VNI >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_VXLAN_VNI & 0xff} }, { - .description = "l4_dport_en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .description = "enc_vxlan_rsvd1", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr2 = { - 1}, - .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + (BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 >> 8) & 0xff, + BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 & 0xff} }, + /* act_tid: 8, , table: int_full_act_record.0 */ { - .description = "metadata_data", + .description = "sp_rec_ptr", .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - { - .description = "metadata_rsvd", - .field_bit_size = 10, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - { - .description = "metadata_op", - .field_bit_size = 2, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - { - .description = "metadata_prof", - .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MAIN_SP_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_SP_PTR & 0xff} }, { - .description = "ivlan_tpid", + .description = "encap_ptr", .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - { - .description = "ivlan_pri", - .field_bit_size = 3, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - { - .description = "ivlan_de", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - { - .description = "ivlan_vid", - .field_bit_size = 12, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_ENCAP_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_ENCAP_PTR_0 & 0xff} }, { - .description = "ovlan_tpid", + .description = "mod_rec_ptr", .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - { - .description = "ovlan_pri", - .field_bit_size = 3, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - { - .description = "ovlan_de", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - { - .description = "ovlan_vid", - .field_bit_size = 12, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MODIFY_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MODIFY_PTR & 0xff} }, { - .description = "alt_pfid", - .field_bit_size = 4, + .description = "rsvd1", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "alt_vid", - .field_bit_size = 12, + .description = "rsvd0", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ttl_rsvd", - .field_bit_size = 12, + .description = "decap_func", + .field_bit_size = 5, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ttl_tl3_dec", + .description = "meter", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "stats_op", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff} + 1} }, { - .description = "ttl_il3_dec", - .field_bit_size = 1, + .description = "stats_ptr", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { - (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff} + (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff} }, { - .description = "ttl_tl3_rdir", - .field_bit_size = 1, + .description = "vnic_or_vport", + .field_bit_size = 11, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff} }, { - .description = "ttl_il3_rdir", + .description = "use_default", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tun_new_prot", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - { - .description = "tun_ex_prot", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - { - .description = "tun_mv", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - { - .description = "reserved", - .field_bit_size = 0, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - { - .description = "l2_dmac", - .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - { - .description = "l2_smac", - .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "mirror", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MIRROR_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_MIRROR_ID_0 & 0xff} }, { - .description = "l3_sip_ipv6", - .field_bit_size = 128, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "cond_copy", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_dip_ipv6", - .field_bit_size = 128, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "vlan_del_rpt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_sip_ipv4", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, - .field_opr2 = { - (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC & 0xff}, - .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + .description = "drop", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_dip_ipv4", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, - .field_opr2 = { - (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST & 0xff}, - .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + .description = "hit", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_sport", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .description = "type", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, - .field_opr2 = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff}, - .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + 1} }, + /* act_tid: 9, , table: int_flow_counter_tbl.0 */ { - .description = "l4_dport", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, - .field_opr2 = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff}, - .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + .description = "count", + .field_bit_size = 64, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* act_tid: 5, , table: mod_record.ing_no_ttl */ + /* act_tid: 9, , table: mod_record.vf_2_vf */ { .description = "metadata_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, { .description = "rem_ovlan", @@ -3957,98 +8358,55 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { { .description = "l3_sip_ipv4_en", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr2 = { - 1}, - .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "l3_dip_ipv4_en", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr2 = { - 1}, - .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "l4_sport_en", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr2 = { - 1}, - .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "l4_dport_en", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr2 = { - 1}, - .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "metadata_data", .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_PORT_TABLE, + .field_opr1 = { + (BNXT_ULP_CF_IDX_DEV_ACT_PORT_ID >> 8) & 0xff, + BNXT_ULP_CF_IDX_DEV_ACT_PORT_ID & 0xff, + (BNXT_ULP_PORT_TABLE_VF_FUNC_METADATA >> 8) & 0xff, + BNXT_ULP_PORT_TABLE_VF_FUNC_METADATA & 0xff} }, { .description = "metadata_rsvd", .field_bit_size = 10, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "metadata_op", .field_bit_size = 2, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "metadata_prof", .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "ivlan_tpid", @@ -4168,84 +8526,24 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { { .description = "l3_sip_ipv4", .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, - .field_opr2 = { - (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC & 0xff}, - .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { .description = "l3_dip_ipv4", .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, - .field_opr2 = { - (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST & 0xff}, - .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { .description = "l4_sport", .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, - .field_opr2 = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff}, - .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { .description = "l4_dport", .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, - .field_opr2 = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff}, - .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, - /* act_tid: 5, , table: int_full_act_record.0 */ + /* act_tid: 9, , table: int_full_act_record.0 */ { .description = "sp_rec_ptr", .field_bit_size = 16, @@ -4270,788 +8568,435 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { { .description = "rsvd1", .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "rsvd0", - .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "decap_func", - .field_bit_size = 5, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "meter", - .field_bit_size = 10, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "stats_op", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACT_BIT_COUNT & 0xff} - }, - { - .description = "stats_ptr", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff} - }, - { - .description = "vnic_or_vport", - .field_bit_size = 11, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, - .field_opr1 = { - (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff} - }, - { - .description = "use_default", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "mirror", - .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "cond_copy", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "vlan_del_rpt", - .field_bit_size = 2, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "hit", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "type", - .field_bit_size = 3, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} - }, - /* act_tid: 6, , table: int_flow_counter_tbl.0 */ - { - .description = "count", - .field_bit_size = 64, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - /* act_tid: 6, , table: sp_smac_ipv4.0 */ - { - .description = "smac", - .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_ETH_SMAC & 0xff} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_IPV4_SADDR >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_IPV4_SADDR & 0xff} - }, - { - .description = "reserved", - .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - /* act_tid: 6, , table: source_property_cache.wr */ - { - .description = "rid", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, - BNXT_ULP_RF_IDX_RID & 0xff} - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_MAIN_SP_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_MAIN_SP_PTR & 0xff} - }, - /* act_tid: 6, , table: sp_smac_ipv6.0 */ - { - .description = "smac", - .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_ETH_SMAC & 0xff} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_IPV6_SADDR >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_IPV6_SADDR & 0xff} - }, - { - .description = "reserved", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - /* act_tid: 6, , table: int_tun_encap_record.ipv4_vxlan */ - { - .description = "ecv_valid", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - ULP_THOR_SYM_ECV_VALID_YES} + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ecv_custom_en", - .field_bit_size = 1, + .description = "rsvd0", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ecv_vtag_type", - .field_bit_size = 4, + .description = "decap_func", + .field_bit_size = 5, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, - .field_opr1 = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ecv_l2_en", - .field_bit_size = 1, + .description = "meter", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - ULP_THOR_SYM_ECV_L2_EN_YES} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ecv_l3_type", - .field_bit_size = 3, + .description = "stats_op", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE & 0xff} + 1} }, { - .description = "ecv_l4_type", - .field_bit_size = 3, + .description = "stats_ptr", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { - ULP_THOR_SYM_ECV_L4_TYPE_UDP_CSUM} + (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff} }, { - .description = "ecv_tun_type", - .field_bit_size = 3, + .description = "vnic_or_vport", + .field_bit_size = 11, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - ULP_THOR_SYM_ECV_TUN_TYPE_VXLAN} + (ULP_THOR_SYM_LOOPBACK_PORT >> 8) & 0xff, + ULP_THOR_SYM_LOOPBACK_PORT & 0xff} }, { - .description = "enc_eth_dmac", - .field_bit_size = 48, + .description = "use_default", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_ETH_DMAC & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "enc_o_vlan_tag", - .field_bit_size = 16, + .description = "mirror", + .field_bit_size = 4, .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_RF, .field_opr2 = { - (BNXT_ULP_ENC_FIELD_O_VLAN_TCI >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_O_VLAN_TCI & 0xff}, - .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + (BNXT_ULP_RF_IDX_MIRROR_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_MIRROR_ID_0 & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "enc_o_vlan_type", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr2 = { - (BNXT_ULP_ENC_FIELD_O_VLAN_TYPE >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_O_VLAN_TYPE & 0xff}, - .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + .description = "cond_copy", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "enc_i_vlan_tag", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr2 = { - (BNXT_ULP_ENC_FIELD_I_VLAN_TCI >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_I_VLAN_TCI & 0xff}, - .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + .description = "vlan_del_rpt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "enc_i_vlan_type", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr2 = { - (BNXT_ULP_ENC_FIELD_I_VLAN_TYPE >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_I_VLAN_TYPE & 0xff}, - .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + .description = "drop", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "enc_ipv4_ihl", - .field_bit_size = 8, + .description = "hit", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_IPV4_IHL >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_IPV4_IHL & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "enc_ipv4_tos", - .field_bit_size = 8, + .description = "type", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_ENC_FIELD_IPV4_TOS >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_IPV4_TOS & 0xff} + 1} }, + /* act_tid: 10, , table: mirror_tbl.alloc */ { - .description = "enc_ipv4_pkt_id", + .description = "act_rec_ptr", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_IPV4_PKT_ID >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_IPV4_PKT_ID & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "enc_ipv4_frag", - .field_bit_size = 16, + .description = "reserved", + .field_bit_size = 13, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_IPV4_FRAG >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_IPV4_FRAG & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "enc_ipv4_ttl", - .field_bit_size = 8, + .description = "ignore_drop", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_IPV4_TTL >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_IPV4_TTL & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "enc_ipv4_proto", - .field_bit_size = 8, + .description = "copy_ing_or_egr", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_IPV4_PROTO >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_IPV4_PROTO & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "enc_ipv4_daddr", - .field_bit_size = 32, + .description = "enable", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_ENC_FIELD_IPV4_DADDR >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_IPV4_DADDR & 0xff} + 1} }, + /* act_tid: 10, , table: int_flow_counter_tbl.0 */ { - .description = "enc_ipv6_vtc", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "count", + .field_bit_size = 64, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, + /* act_tid: 10, , table: mod_record.vf_2_vf */ { - .description = "enc_ipv6_zero", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "metadata_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, { - .description = "enc_ipv6_proto", - .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "rem_ovlan", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "enc_ipv6_ttl", - .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "rem_ivlan", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "enc_ipv6_daddr", - .field_bit_size = 128, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "rep_add_ivlan", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "enc_udp_sport", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_UDP_SPORT >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_UDP_SPORT & 0xff} + .description = "rep_add_ovlan", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "enc_udp_dport", - .field_bit_size = 16, + .description = "ttl_update", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_UDP_DPORT >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_UDP_DPORT & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "enc_vxlan_flags", - .field_bit_size = 8, + .description = "tun_md_en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_VXLAN_FLAGS >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_VXLAN_FLAGS & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "enc_vxlan_rsvd0", - .field_bit_size = 24, + .description = "reserved_en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_VXLAN_RSVD0 >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_VXLAN_RSVD0 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "enc_vxlan_vni", - .field_bit_size = 24, + .description = "l2_dmac_en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_VXLAN_VNI >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_VXLAN_VNI & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "enc_vxlan_rsvd1", - .field_bit_size = 8, + .description = "l2_smac_en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* act_tid: 6, , table: vxlan_encap_rec_cache.wr */ { - .description = "rid", - .field_bit_size = 32, + .description = "l3_sip_ipv6_en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, - BNXT_ULP_RF_IDX_RID & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "enc_rec_ptr", - .field_bit_size = 16, + .description = "l3_dip_ipv6_en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_ENCAP_PTR_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_ENCAP_PTR_0 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* act_tid: 6, , table: int_tun_encap_record.ipv6_vxlan */ { - .description = "ecv_valid", + .description = "l3_sip_ipv4_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - ULP_THOR_SYM_ECV_VALID_YES} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ecv_custom_en", + .description = "l3_dip_ipv4_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ecv_vtag_type", - .field_bit_size = 4, + .description = "l4_sport_en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, - .field_opr1 = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ecv_l2_en", + .description = "l4_dport_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - ULP_THOR_SYM_ECV_L2_EN_YES} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ecv_l3_type", - .field_bit_size = 3, + .description = "metadata_data", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_src1 = BNXT_ULP_FIELD_SRC_PORT_TABLE, .field_opr1 = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE & 0xff} + (BNXT_ULP_CF_IDX_DEV_ACT_PORT_ID >> 8) & 0xff, + BNXT_ULP_CF_IDX_DEV_ACT_PORT_ID & 0xff, + (BNXT_ULP_PORT_TABLE_VF_FUNC_METADATA >> 8) & 0xff, + BNXT_ULP_PORT_TABLE_VF_FUNC_METADATA & 0xff} }, { - .description = "ecv_l4_type", - .field_bit_size = 3, + .description = "metadata_rsvd", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - ULP_THOR_SYM_ECV_L4_TYPE_UDP_CSUM} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ecv_tun_type", - .field_bit_size = 3, + .description = "metadata_op", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - ULP_THOR_SYM_ECV_TUN_TYPE_VXLAN} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "enc_eth_dmac", - .field_bit_size = 48, + .description = "metadata_prof", + .field_bit_size = 4, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_ETH_DMAC & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "enc_o_vlan_tag", + .description = "ivlan_tpid", .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr2 = { - (BNXT_ULP_ENC_FIELD_O_VLAN_TCI >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_O_VLAN_TCI & 0xff}, - .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "enc_o_vlan_type", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr2 = { - (BNXT_ULP_ENC_FIELD_O_VLAN_TYPE >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_O_VLAN_TYPE & 0xff}, - .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + .description = "ivlan_pri", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "enc_i_vlan_tag", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr2 = { - (BNXT_ULP_ENC_FIELD_I_VLAN_TCI >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_I_VLAN_TCI & 0xff}, - .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + .description = "ivlan_de", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "enc_i_vlan_type", + .description = "ivlan_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ovlan_tpid", .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr2 = { - (BNXT_ULP_ENC_FIELD_I_VLAN_TYPE >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_I_VLAN_TYPE & 0xff}, - .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "enc_ipv4_ihl", - .field_bit_size = 8, + .description = "ovlan_pri", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ovlan_de", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ovlan_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "alt_pfid", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "alt_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ttl_rsvd", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ttl_tl3_dec", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ttl_il3_dec", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ttl_tl3_rdir", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ttl_il3_rdir", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "enc_ipv4_tos", - .field_bit_size = 8, + .description = "tun_new_prot", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "enc_ipv4_pkt_id", + .description = "tun_ex_prot", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "enc_ipv4_frag", + .description = "tun_mv", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "enc_ipv4_ttl", - .field_bit_size = 8, + .description = "reserved", + .field_bit_size = 0, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "enc_ipv4_proto", - .field_bit_size = 8, + .description = "l2_dmac", + .field_bit_size = 48, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "enc_ipv4_daddr", - .field_bit_size = 32, + .description = "l2_smac", + .field_bit_size = 48, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "enc_ipv6_vtc", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_IPV6_VTC_FLOW >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_IPV6_VTC_FLOW & 0xff} - }, - { - .description = "enc_ipv6_zero", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "l3_sip_ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "enc_ipv6_proto", - .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_IPV6_PROTO >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_IPV6_PROTO & 0xff} + .description = "l3_dip_ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "enc_ipv6_ttl", - .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_IPV6_TTL >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_IPV6_TTL & 0xff} + .description = "l3_sip_ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "enc_ipv6_daddr", - .field_bit_size = 128, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_IPV6_DADDR >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_IPV6_DADDR & 0xff} + .description = "l3_dip_ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "enc_udp_sport", + .description = "l4_sport", .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_UDP_SPORT >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_UDP_SPORT & 0xff} + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "enc_udp_dport", + .description = "l4_dport", .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_UDP_DPORT >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_UDP_DPORT & 0xff} - }, - { - .description = "enc_vxlan_flags", - .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_VXLAN_FLAGS >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_VXLAN_FLAGS & 0xff} - }, - { - .description = "enc_vxlan_rsvd0", - .field_bit_size = 24, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_VXLAN_RSVD0 >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_VXLAN_RSVD0 & 0xff} - }, - { - .description = "enc_vxlan_vni", - .field_bit_size = 24, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_VXLAN_VNI >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_VXLAN_VNI & 0xff} - }, - { - .description = "enc_vxlan_rsvd1", - .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, - .field_opr1 = { - (BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 >> 8) & 0xff, - BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 & 0xff} + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, - /* act_tid: 6, , table: int_full_act_record.0 */ + /* act_tid: 10, , table: int_full_act_record.0 */ { .description = "sp_rec_ptr", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_MAIN_SP_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_MAIN_SP_PTR & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "encap_ptr", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_ENCAP_PTR_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_ENCAP_PTR_0 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "mod_rec_ptr", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MODIFY_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MODIFY_PTR & 0xff} }, { .description = "rsvd1", @@ -5098,10 +9043,10 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { .description = "vnic_or_vport", .field_bit_size = 11, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff} + (ULP_THOR_SYM_LOOPBACK_PORT >> 8) & 0xff, + ULP_THOR_SYM_LOOPBACK_PORT & 0xff} }, { .description = "use_default", @@ -5146,10 +9091,74 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { 1} + }, + /* act_tid: 10, , table: mirror_tbl.wr */ + { + .description = "act_rec_ptr", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} + }, + { + .description = "reserved", + .field_bit_size = 13, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "ignore_drop", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + }, + { + .description = "copy_ing_or_egr", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "enable", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + }, + /* act_tid: 10, , table: shared_mirror_record.wr */ + { + .description = "rid", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, + BNXT_ULP_RF_IDX_RID & 0xff} + }, + { + .description = "mirror_id", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MIRROR_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_MIRROR_PTR_0 & 0xff} } }; struct bnxt_ulp_mapper_ident_info ulp_thor_act_ident_list[] = { + /* act_tid: 1, , table: shared_meter_tbl_cache.rd */ + { + .description = "meter_ptr", + .regfile_idx = BNXT_ULP_RF_IDX_METER_PTR_0, + .ident_bit_size = 10, + .ident_bit_pos = 32 + }, /* act_tid: 1, , table: shared_mirror_record.rd */ { .description = "mirror_id", @@ -5157,18 +9166,121 @@ struct bnxt_ulp_mapper_ident_info ulp_thor_act_ident_list[] = { .ident_bit_size = 4, .ident_bit_pos = 32 }, - /* act_tid: 6, , table: source_property_cache.rd */ + /* act_tid: 2, , table: shared_mirror_record.del_chk */ + { + .description = "rid", + .regfile_idx = BNXT_ULP_RF_IDX_RID, + .ident_bit_size = 32, + .ident_bit_pos = 0 + }, + /* act_tid: 3, , table: shared_mirror_record.rd */ + { + .description = "mirror_id", + .regfile_idx = BNXT_ULP_RF_IDX_MIRROR_ID_0, + .ident_bit_size = 4, + .ident_bit_pos = 32 + }, + /* act_tid: 4, , table: shared_mirror_record.rd */ + { + .description = "mirror_id", + .regfile_idx = BNXT_ULP_RF_IDX_MIRROR_ID_0, + .ident_bit_size = 4, + .ident_bit_pos = 32 + }, + /* act_tid: 5, , table: meter_profile_tbl_cache.rd2 */ + { + .description = "meter_profile_ptr", + .regfile_idx = BNXT_ULP_RF_IDX_METER_PROFILE_PTR_0, + .ident_bit_size = 10, + .ident_bit_pos = 32 + }, + /* act_tid: 5, , table: meter_profile_tbl_cache.del_chk */ + { + .description = "rid", + .regfile_idx = BNXT_ULP_RF_IDX_RID, + .ident_bit_size = 32, + .ident_bit_pos = 0 + }, + /* act_tid: 5, , table: shared_meter_tbl_cache.del_chk */ + { + .description = "rid", + .regfile_idx = BNXT_ULP_RF_IDX_RID, + .ident_bit_size = 32, + .ident_bit_pos = 0 + }, + /* act_tid: 5, , table: shared_meter_tbl_cache.rd_update */ + { + .description = "meter_ptr", + .regfile_idx = BNXT_ULP_RF_IDX_METER_PTR_0, + .ident_bit_size = 10, + .ident_bit_pos = 32 + }, + /* act_tid: 5, , table: meter_tbl.update_rd */ + { + .description = "ecn_rmp_en", + .regfile_idx = BNXT_ULP_RF_IDX_RF_1, + .ident_bit_size = 1, + .ident_bit_pos = 55 + }, + { + .description = "meter_profile", + .regfile_idx = BNXT_ULP_RF_IDX_METER_PROFILE_PTR_0, + .ident_bit_size = 8, + .ident_bit_pos = 56 + }, + { + .description = "mtr_val", + .regfile_idx = BNXT_ULP_RF_IDX_RF_0, + .ident_bit_size = 1, + .ident_bit_pos = 54 + }, + /* act_tid: 6, , table: shared_mirror_record.rd */ + { + .description = "mirror_id", + .regfile_idx = BNXT_ULP_RF_IDX_MIRROR_ID_0, + .ident_bit_size = 4, + .ident_bit_pos = 32 + }, + /* act_tid: 7, , table: shared_mirror_record.rd */ + { + .description = "mirror_id", + .regfile_idx = BNXT_ULP_RF_IDX_MIRROR_ID_0, + .ident_bit_size = 4, + .ident_bit_pos = 32 + }, + /* act_tid: 8, , table: shared_mirror_record.rd */ + { + .description = "mirror_id", + .regfile_idx = BNXT_ULP_RF_IDX_MIRROR_ID_0, + .ident_bit_size = 4, + .ident_bit_pos = 32 + }, + /* act_tid: 8, , table: source_property_cache.rd */ { .description = "sp_rec_ptr", .regfile_idx = BNXT_ULP_RF_IDX_MAIN_SP_PTR, .ident_bit_size = 16, .ident_bit_pos = 32 }, - /* act_tid: 6, , table: vxlan_encap_rec_cache.rd */ + /* act_tid: 8, , table: vxlan_encap_rec_cache.rd */ { .description = "enc_rec_ptr", .regfile_idx = BNXT_ULP_RF_IDX_ENCAP_PTR_0, .ident_bit_size = 16, .ident_bit_pos = 32 + }, + /* act_tid: 9, , table: shared_mirror_record.rd */ + { + .description = "mirror_id", + .regfile_idx = BNXT_ULP_RF_IDX_MIRROR_ID_0, + .ident_bit_size = 4, + .ident_bit_pos = 32 + }, + /* act_tid: 10, , table: shared_mirror_record.del_chk */ + { + .description = "rid", + .regfile_idx = BNXT_ULP_RF_IDX_RID, + .ident_bit_size = 32, + .ident_bit_pos = 0 } }; diff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_class.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_class.c index 46c0d624dc..9da14b0878 100644 --- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_class.c +++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_class.c @@ -1,10 +1,8 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2014-2021 Broadcom + * Copyright(c) 2014-2023 Broadcom * All rights reserved. */ -/* date: Wed Nov 24 17:15:38 2021 */ - #include "ulp_template_db_enum.h" #include "ulp_template_db_field.h" #include "ulp_template_struct.h" @@ -55,7 +53,7 @@ struct bnxt_ulp_mapper_tmpl_info ulp_thor_class_tmpl_list[] = { /* class_tid: 5, egress */ [5] = { .device_name = BNXT_ULP_DEVICE_ID_THOR, - .num_tbls = 25, + .num_tbls = 33, .start_tbl_idx = 91, .reject_info = { .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, @@ -123,9 +121,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .key_start_idx = 2, - .blob_key_bit_size = 76, - .key_bit_size = 76, - .key_num_fields = 5, + .blob_key_bit_size = 92, + .key_bit_size = 92, + .key_num_fields = 6, .ident_start_idx = 4, .ident_nums = 1 }, @@ -157,7 +155,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .fdb_operand = BNXT_ULP_RF_IDX_RID, .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 7, + .key_start_idx = 8, .blob_key_bit_size = 213, .key_bit_size = 213, .key_num_fields = 21, @@ -181,10 +179,10 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 28, - .blob_key_bit_size = 76, - .key_bit_size = 76, - .key_num_fields = 5, + .key_start_idx = 29, + .blob_key_bit_size = 92, + .key_bit_size = 92, + .key_num_fields = 6, .result_start_idx = 6, .result_bit_size = 62, .result_num_fields = 4 @@ -214,7 +212,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 33, + .key_start_idx = 35, .blob_key_bit_size = 14, .key_bit_size = 14, .key_num_fields = 3, @@ -287,7 +285,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 36, + .key_start_idx = 38, .blob_key_bit_size = 94, .key_bit_size = 94, .key_num_fields = 43, @@ -312,7 +310,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 79, + .key_start_idx = 81, .blob_key_bit_size = 14, .key_bit_size = 14, .key_num_fields = 3, @@ -332,7 +330,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .cond_nums = 0 }, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 82, + .key_start_idx = 84, .blob_key_bit_size = 0, .key_bit_size = 0, .key_num_fields = 114, @@ -354,7 +352,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 196, + .key_start_idx = 198, .blob_key_bit_size = 14, .key_bit_size = 14, .key_num_fields = 3, @@ -425,7 +423,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 199, + .key_start_idx = 201, .blob_key_bit_size = 94, .key_bit_size = 94, .key_num_fields = 43, @@ -453,7 +451,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 242, + .key_start_idx = 244, .blob_key_bit_size = 94, .key_bit_size = 94, .key_num_fields = 43, @@ -478,7 +476,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 285, + .key_start_idx = 287, .blob_key_bit_size = 14, .key_bit_size = 14, .key_num_fields = 3, @@ -503,7 +501,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 288, + .key_start_idx = 290, .blob_key_bit_size = 0, .key_bit_size = 0, .key_num_fields = 114, @@ -528,7 +526,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 402, + .key_start_idx = 404, .blob_key_bit_size = 0, .key_bit_size = 0, .key_num_fields = 114, @@ -553,7 +551,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 516, + .key_start_idx = 518, .blob_key_bit_size = 0, .key_bit_size = 0, .key_num_fields = 114, @@ -578,7 +576,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 630, + .key_start_idx = 632, .blob_key_bit_size = 0, .key_bit_size = 0, .key_num_fields = 114, @@ -603,7 +601,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 744, + .key_start_idx = 746, .blob_key_bit_size = 0, .key_bit_size = 0, .key_num_fields = 114, @@ -628,7 +626,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 858, + .key_start_idx = 860, .blob_key_bit_size = 0, .key_bit_size = 0, .key_num_fields = 114, @@ -653,7 +651,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 972, + .key_start_idx = 974, .blob_key_bit_size = 0, .key_bit_size = 0, .key_num_fields = 114, @@ -675,7 +673,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, - .key_start_idx = 1086, + .key_start_idx = 1088, .blob_key_bit_size = 10, .key_bit_size = 10, .key_num_fields = 1, @@ -696,7 +694,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 1087, + .key_start_idx = 1089, .blob_key_bit_size = 19, .key_bit_size = 19, .key_num_fields = 2, @@ -731,7 +729,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .fdb_operand = BNXT_ULP_RF_IDX_RID, .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 1089, + .key_start_idx = 1091, .blob_key_bit_size = 213, .key_bit_size = 213, .key_num_fields = 21, @@ -755,7 +753,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 1110, + .key_start_idx = 1112, .blob_key_bit_size = 19, .key_bit_size = 19, .key_num_fields = 2, @@ -788,10 +786,10 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 1112, - .blob_key_bit_size = 76, - .key_bit_size = 76, - .key_num_fields = 5, + .key_start_idx = 1114, + .blob_key_bit_size = 92, + .key_bit_size = 92, + .key_num_fields = 6, .ident_start_idx = 18, .ident_nums = 1 }, @@ -823,7 +821,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .fdb_operand = BNXT_ULP_RF_IDX_RID, .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 1117, + .key_start_idx = 1120, .blob_key_bit_size = 213, .key_bit_size = 213, .key_num_fields = 21, @@ -847,10 +845,10 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 1138, - .blob_key_bit_size = 76, - .key_bit_size = 76, - .key_num_fields = 5, + .key_start_idx = 1141, + .blob_key_bit_size = 92, + .key_bit_size = 92, + .key_num_fields = 6, .result_start_idx = 422, .result_bit_size = 62, .result_num_fields = 4 @@ -880,7 +878,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 1143, + .key_start_idx = 1147, .blob_key_bit_size = 14, .key_bit_size = 14, .key_num_fields = 3, @@ -953,7 +951,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 1146, + .key_start_idx = 1150, .blob_key_bit_size = 94, .key_bit_size = 94, .key_num_fields = 43, @@ -978,7 +976,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 1189, + .key_start_idx = 1193, .blob_key_bit_size = 14, .key_bit_size = 14, .key_num_fields = 3, @@ -998,7 +996,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .cond_nums = 0 }, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 1192, + .key_start_idx = 1196, .blob_key_bit_size = 0, .key_bit_size = 0, .key_num_fields = 114, @@ -1021,7 +1019,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 1306, + .key_start_idx = 1310, .blob_key_bit_size = 14, .key_bit_size = 14, .key_num_fields = 3, @@ -1075,7 +1073,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .pri_operand = 1, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 1309, + .key_start_idx = 1313, .blob_key_bit_size = 94, .key_bit_size = 94, .key_num_fields = 43, @@ -1098,7 +1096,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 1352, + .key_start_idx = 1356, .blob_key_bit_size = 14, .key_bit_size = 14, .key_num_fields = 3, @@ -1123,7 +1121,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 1355, + .key_start_idx = 1359, .blob_key_bit_size = 0, .key_bit_size = 0, .key_num_fields = 114, @@ -1145,7 +1143,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 1469, + .key_start_idx = 1473, .blob_key_bit_size = 11, .key_bit_size = 11, .key_num_fields = 1, @@ -1177,7 +1175,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 1470, + .key_start_idx = 1474, .blob_key_bit_size = 14, .key_bit_size = 14, .key_num_fields = 3, @@ -1250,7 +1248,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 1473, + .key_start_idx = 1477, .blob_key_bit_size = 94, .key_bit_size = 94, .key_num_fields = 43, @@ -1275,7 +1273,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 1516, + .key_start_idx = 1520, .blob_key_bit_size = 14, .key_bit_size = 14, .key_num_fields = 3, @@ -1295,7 +1293,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .cond_nums = 0 }, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 1519, + .key_start_idx = 1523, .blob_key_bit_size = 0, .key_bit_size = 0, .key_num_fields = 114, @@ -1317,7 +1315,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 1633, + .key_start_idx = 1637, .blob_key_bit_size = 14, .key_bit_size = 14, .key_num_fields = 3, @@ -1371,7 +1369,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 1636, + .key_start_idx = 1640, .blob_key_bit_size = 94, .key_bit_size = 94, .key_num_fields = 43, @@ -1399,7 +1397,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 1679, + .key_start_idx = 1683, .blob_key_bit_size = 94, .key_bit_size = 94, .key_num_fields = 43, @@ -1424,7 +1422,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 1722, + .key_start_idx = 1726, .blob_key_bit_size = 14, .key_bit_size = 14, .key_num_fields = 3, @@ -1449,7 +1447,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 1725, + .key_start_idx = 1729, .blob_key_bit_size = 0, .key_bit_size = 0, .key_num_fields = 114, @@ -1474,7 +1472,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 1839, + .key_start_idx = 1843, .blob_key_bit_size = 0, .key_bit_size = 0, .key_num_fields = 114, @@ -1499,7 +1497,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 1953, + .key_start_idx = 1957, .blob_key_bit_size = 0, .key_bit_size = 0, .key_num_fields = 114, @@ -1541,13 +1539,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 2067, + .key_start_idx = 2071, .blob_key_bit_size = 10, .key_bit_size = 10, .key_num_fields = 1, .result_start_idx = 967, - .result_bit_size = 152, - .result_num_fields = 5 + .result_bit_size = 153, + .result_num_fields = 6 }, { /* class_tid: 4, , table: l2_cntxt_tcam_cache.ing_rd */ .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, @@ -1563,7 +1561,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 2068, + .key_start_idx = 2072, .blob_key_bit_size = 11, .key_bit_size = 11, .key_num_fields = 1, @@ -1600,11 +1598,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 2069, + .key_start_idx = 2073, .blob_key_bit_size = 213, .key_bit_size = 213, .key_num_fields = 21, - .result_start_idx = 972, + .result_start_idx = 973, .result_bit_size = 43, .result_num_fields = 6, .ident_start_idx = 35, @@ -1624,11 +1622,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 2090, + .key_start_idx = 2094, .blob_key_bit_size = 11, .key_bit_size = 11, .key_num_fields = 1, - .result_start_idx = 978, + .result_start_idx = 979, .result_bit_size = 62, .result_num_fields = 4 }, @@ -1645,7 +1643,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, .tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF, .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, - .result_start_idx = 982, + .result_start_idx = 983, .result_bit_size = 32, .result_num_fields = 1 }, @@ -1662,7 +1660,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, .tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF, .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, - .result_start_idx = 983, + .result_start_idx = 984, .result_bit_size = 32, .result_num_fields = 1 }, @@ -1682,7 +1680,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .result_start_idx = 984, + .result_start_idx = 985, .result_bit_size = 128, .result_num_fields = 17, .encap_num_fields = 0 @@ -1701,13 +1699,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 2091, + .key_start_idx = 2095, .blob_key_bit_size = 10, .key_bit_size = 10, .key_num_fields = 1, - .result_start_idx = 1001, - .result_bit_size = 152, - .result_num_fields = 5 + .result_start_idx = 1002, + .result_bit_size = 153, + .result_num_fields = 6 }, { /* class_tid: 4, , table: control.egr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, @@ -1734,7 +1732,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 2092, + .key_start_idx = 2096, .blob_key_bit_size = 11, .key_bit_size = 11, .key_num_fields = 1, @@ -1767,7 +1765,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_SVIF, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, .fdb_operand = BNXT_ULP_RF_IDX_RID, - .result_start_idx = 1006, + .result_start_idx = 1008, .result_bit_size = 64, .result_num_fields = 8 }, @@ -1785,11 +1783,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 2093, + .key_start_idx = 2097, .blob_key_bit_size = 11, .key_bit_size = 11, .key_num_fields = 1, - .result_start_idx = 1014, + .result_start_idx = 1016, .result_bit_size = 62, .result_num_fields = 4 }, @@ -1807,7 +1805,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 2094, + .key_start_idx = 2098, .blob_key_bit_size = 11, .key_bit_size = 11, .key_num_fields = 1, @@ -1842,11 +1840,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .fdb_operand = BNXT_ULP_RF_IDX_RID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 2095, + .key_start_idx = 2099, .blob_key_bit_size = 213, .key_bit_size = 213, .key_num_fields = 21, - .result_start_idx = 1018, + .result_start_idx = 1020, .result_bit_size = 43, .result_num_fields = 6, .ident_start_idx = 36, @@ -1866,11 +1864,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 2116, + .key_start_idx = 2120, .blob_key_bit_size = 11, .key_bit_size = 11, .key_num_fields = 1, - .result_start_idx = 1024, + .result_start_idx = 1026, .result_bit_size = 62, .result_num_fields = 4 }, @@ -1887,7 +1885,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 1028, + .result_start_idx = 1030, .result_bit_size = 32, .result_num_fields = 1 }, @@ -1904,57 +1902,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 1029, + .result_start_idx = 1031, .result_bit_size = 32, .result_num_fields = 1 }, - { /* class_tid: 5, , table: int_full_act_record.loopback */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_VFR_CFA_ACTION, - .direction = TF_DIR_TX, - .execute_info = { - .cond_true_goto = 1, - .cond_false_goto = 1, - .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 51, - .cond_nums = 0 }, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, - .tbl_operand = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, - .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .result_start_idx = 1030, - .result_bit_size = 128, - .result_num_fields = 17, - .encap_num_fields = 0 - }, - { /* class_tid: 5, , table: port_table.egr_wr */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PORT_TABLE, - .direction = TF_DIR_TX, - .execute_info = { - .cond_true_goto = 1, - .cond_false_goto = 1, - .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 51, - .cond_nums = 0 }, - .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, - .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, - .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 2117, - .blob_key_bit_size = 10, - .key_bit_size = 10, - .key_num_fields = 1, - .result_start_idx = 1047, - .result_bit_size = 152, - .result_num_fields = 5 - }, - { /* class_tid: 5, , table: l2_cntxt_tcam_cache.vf_rd_egr */ + { /* class_tid: 5, , table: profile_tcam_cache.vfr_glb_act_rec_rd */ .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_TX, .execute_info = { .cond_true_goto = 1, @@ -1965,28 +1921,30 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 2118, - .blob_key_bit_size = 11, - .key_bit_size = 11, - .key_num_fields = 1, + .key_start_idx = 2121, + .blob_key_bit_size = 14, + .key_bit_size = 14, + .key_num_fields = 3, .ident_start_idx = 37, .ident_nums = 0 }, - { /* class_tid: 5, , table: control.vf_0 */ + { /* class_tid: 5, , table: control.prof_tcam_cache.vfr_glb_act_rec_rd.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, .direction = TF_DIR_TX, .execute_info = { .cond_true_goto = 1, - .cond_false_goto = 3, + .cond_false_goto = 6, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, .cond_start_idx = 51, .cond_nums = 1 }, .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE, .fdb_operand = BNXT_ULP_RF_IDX_RID }, - { /* class_tid: 5, , table: l2_cntxt_tcam.vf_egr */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + { /* class_tid: 5, , table: mod_record.vf_2_vfr_egr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .direction = TF_DIR_TX, .execute_info = { .cond_true_goto = 1, @@ -1994,26 +1952,19 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, .cond_start_idx = 52, .cond_nums = 0 }, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, - .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, - .fdb_operand = BNXT_ULP_RF_IDX_RID, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 2119, - .blob_key_bit_size = 213, - .key_bit_size = 213, - .key_num_fields = 21, - .result_start_idx = 1052, - .result_bit_size = 43, - .result_num_fields = 6, - .ident_start_idx = 37, - .ident_nums = 1 + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, + .tbl_operand = BNXT_ULP_GLB_RF_IDX_GLB_MODIFY_PTR, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, + .result_start_idx = 1032, + .result_bit_size = 0, + .result_num_fields = 0, + .encap_num_fields = 47 }, - { /* class_tid: 5, , table: l2_cntxt_tcam_cache.vf_egr_wr */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + { /* class_tid: 5, , table: int_full_act_record.vf_2_vfr_loopback */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .direction = TF_DIR_TX, .execute_info = { .cond_true_goto = 1, @@ -2021,16 +1972,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, .cond_start_idx = 52, .cond_nums = 0 }, - .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, - .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, - .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 2140, - .blob_key_bit_size = 11, - .key_bit_size = 11, - .key_num_fields = 1, - .result_start_idx = 1058, - .result_bit_size = 62, - .result_num_fields = 4 + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, + .tbl_operand = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .result_start_idx = 1079, + .result_bit_size = 128, + .result_num_fields = 17, + .encap_num_fields = 0 }, { /* class_tid: 5, , table: parif_def_arec_ptr.vf_egr */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, @@ -2044,8 +1993,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST, .tbl_operand = ULP_THOR_SYM_LOOPBACK_PARIF, - .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 1062, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .result_start_idx = 1096, .result_bit_size = 32, .result_num_fields = 1 }, @@ -2061,52 +2011,37 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST, .tbl_operand = ULP_THOR_SYM_LOOPBACK_PARIF, - .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 1063, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .result_start_idx = 1097, .result_bit_size = 32, .result_num_fields = 1 }, - { /* class_tid: 5, , table: int_full_act_record.vf_ing */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + { /* class_tid: 5, , table: profile_tcam_cache.vfr_glb_act_rec_wr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .direction = TF_DIR_RX, - .execute_info = { - .cond_true_goto = 1, - .cond_false_goto = 1, - .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 52, - .cond_nums = 0 }, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, - .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_AND_SET_VFR_FLAG, - .result_start_idx = 1064, - .result_bit_size = 128, - .result_num_fields = 17, - .encap_num_fields = 0 - }, - { /* class_tid: 5, , table: ilt_tbl.vf_ing */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, - .resource_type = TF_IF_TBL_TYPE_ILT, - .direction = TF_DIR_RX, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, + .direction = TF_DIR_TX, .execute_info = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, .cond_start_idx = 52, .cond_nums = 0 }, - .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, - .tbl_operand = BNXT_ULP_CF_IDX_VF_FUNC_SVIF, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, + .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 1081, - .result_bit_size = 64, - .result_num_fields = 8 + .key_start_idx = 2124, + .blob_key_bit_size = 14, + .key_bit_size = 14, + .key_num_fields = 3, + .result_start_idx = 1098, + .result_bit_size = 138, + .result_num_fields = 7 }, - { /* class_tid: 5, , table: l2_cntxt_tcam_cache.rd_egr0 */ + { /* class_tid: 5, , table: l2_cntxt_tcam_cache.vf_rd_egr */ .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, .direction = TF_DIR_TX, @@ -2119,14 +2054,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 2141, + .key_start_idx = 2127, .blob_key_bit_size = 11, .key_bit_size = 11, .key_num_fields = 1, - .ident_start_idx = 38, + .ident_start_idx = 37, .ident_nums = 0 }, - { /* class_tid: 5, , table: control.0 */ + { /* class_tid: 5, , table: control.vf_2_vfr.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, .direction = TF_DIR_TX, .execute_info = { @@ -2138,9 +2073,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE, .fdb_operand = BNXT_ULP_RF_IDX_RID }, - { /* class_tid: 5, , table: ilt_tbl.vfr_egr */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, - .resource_type = TF_IF_TBL_TYPE_ILT, + { /* class_tid: 5, , table: l2_cntxt_tcam.vf_egr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, .execute_info = { .cond_true_goto = 1, @@ -2148,15 +2083,23 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, .cond_start_idx = 53, .cond_nums = 0 }, - .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, - .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_SVIF, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, .fdb_operand = BNXT_ULP_RF_IDX_RID, - .result_start_idx = 1089, - .result_bit_size = 64, - .result_num_fields = 8 + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, + .key_start_idx = 2128, + .blob_key_bit_size = 213, + .key_bit_size = 213, + .key_num_fields = 21, + .result_start_idx = 1105, + .result_bit_size = 43, + .result_num_fields = 6, + .ident_start_idx = 37, + .ident_nums = 1 }, - { /* class_tid: 5, , table: l2_cntxt_tcam_cache.vfr_wr_egr0 */ + { /* class_tid: 5, , table: l2_cntxt_tcam_cache.vf_egr_wr */ .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, @@ -2170,59 +2113,20 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 2142, + .key_start_idx = 2149, .blob_key_bit_size = 11, .key_bit_size = 11, .key_num_fields = 1, - .result_start_idx = 1097, + .result_start_idx = 1111, .result_bit_size = 62, .result_num_fields = 4 }, - { /* class_tid: 5, , table: metadata_record.vfr_egr */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_METADATA, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .direction = TF_DIR_TX, - .execute_info = { - .cond_true_goto = 1, - .cond_false_goto = 1, - .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 53, - .cond_nums = 0 }, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, - .tbl_operand = BNXT_ULP_GLB_RF_IDX_GLB_METADATA_PROF_0, - .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, - .result_start_idx = 1101, - .result_bit_size = 16, - .result_num_fields = 1 - }, - { /* class_tid: 5, , table: mod_record.vfr_egr */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .direction = TF_DIR_TX, - .execute_info = { - .cond_true_goto = 1, - .cond_false_goto = 1, - .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 53, - .cond_nums = 0 }, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR, - .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 1102, - .result_bit_size = 0, - .result_num_fields = 0, - .encap_num_fields = 47 - }, - { /* class_tid: 5, , table: int_full_act_record.vfr_egr */ + { /* class_tid: 5, , table: int_full_act_record.vf_2_vfr_ing */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_VFR_CFA_ACTION, - .direction = TF_DIR_TX, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_RX, .execute_info = { .cond_true_goto = 1, .cond_false_goto = 1, @@ -2232,15 +2136,16 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .result_start_idx = 1149, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_AND_SET_VFR_FLAG, + .result_start_idx = 1115, .result_bit_size = 128, .result_num_fields = 17 }, - { /* class_tid: 5, , table: l2_cntxt_tcam_cache.ing_rd_vfr */ + { /* class_tid: 5, , table: profile_tcam_cache.vfr_rd */ .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .execute_info = { .cond_true_goto = 1, @@ -2251,26 +2156,75 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 2143, - .blob_key_bit_size = 11, - .key_bit_size = 11, - .key_num_fields = 1, + .key_start_idx = 2150, + .blob_key_bit_size = 14, + .key_bit_size = 14, + .key_num_fields = 3, .ident_start_idx = 38, .ident_nums = 0 }, - { /* class_tid: 5, , table: control.ing_rd_vfr */ + { /* class_tid: 5, , table: control.prof_tcam_cache.vfr.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, .direction = TF_DIR_TX, .execute_info = { .cond_true_goto = 1, - .cond_false_goto = 5, + .cond_false_goto = 10, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, .cond_start_idx = 53, .cond_nums = 1 }, .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE, .fdb_operand = BNXT_ULP_RF_IDX_RID }, - { /* class_tid: 5, , table: l2_cntxt_tcam.vfr_ing0 */ + { /* class_tid: 5, , table: int_full_act_record.drop_action */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 54, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, + .tbl_operand = BNXT_ULP_GLB_RF_IDX_GLB_DROP_AREC_PTR, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .result_start_idx = 1132, + .result_bit_size = 128, + .result_num_fields = 17, + .encap_num_fields = 0 + }, + { /* class_tid: 5, , table: l2_cntxt_tcam.vf_2_vfr_ing.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 54, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .key_start_idx = 2153, + .blob_key_bit_size = 213, + .key_bit_size = 213, + .key_num_fields = 21, + .result_start_idx = 1149, + .result_bit_size = 43, + .result_num_fields = 6, + .ident_start_idx = 38, + .ident_nums = 0 + }, + { /* class_tid: 5, , table: l2_cntxt_tcam.vfr_2_vf_ing.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -2288,11 +2242,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 2144, + .key_start_idx = 2174, .blob_key_bit_size = 213, .key_bit_size = 213, .key_num_fields = 21, - .result_start_idx = 1166, + .result_start_idx = 1155, .result_bit_size = 43, .result_num_fields = 6, .ident_start_idx = 38, @@ -2311,11 +2265,28 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, .tbl_operand = BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_0, .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, - .result_start_idx = 1172, + .result_start_idx = 1161, + .result_bit_size = 106, + .result_num_fields = 106 + }, + { /* class_tid: 5, , table: fkb_select.vf_em */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EM_FKB, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 54, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, + .tbl_operand = BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_1, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, + .result_start_idx = 1267, .result_bit_size = 106, .result_num_fields = 106 }, - { /* class_tid: 5, , table: profile_tcam.vfr_ing0 */ + { /* class_tid: 5, , table: profile_tcam.vf_2_vfr.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -2333,18 +2304,45 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 2165, + .key_start_idx = 2195, .blob_key_bit_size = 94, .key_bit_size = 94, .key_num_fields = 43, - .result_start_idx = 1278, + .result_start_idx = 1373, .result_bit_size = 33, .result_num_fields = 8 }, - { /* class_tid: 5, , table: l2_cntxt_tcam_cache.ing_wr_vfr */ + { /* class_tid: 5, , table: profile_tcam.vfr_2_vf.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 54, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .key_start_idx = 2238, + .blob_key_bit_size = 94, + .key_bit_size = 94, + .key_num_fields = 43, + .result_start_idx = 1381, + .result_bit_size = 33, + .result_num_fields = 8 + }, + { /* class_tid: 5, , table: profile_tcam_cache.vfr_wr */ .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .execute_info = { .cond_true_goto = 1, @@ -2355,15 +2353,183 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 2208, + .key_start_idx = 2281, + .blob_key_bit_size = 14, + .key_bit_size = 14, + .key_num_fields = 3, + .result_start_idx = 1389, + .result_bit_size = 138, + .result_num_fields = 7 + }, + { /* class_tid: 5, , table: ilt_tbl.vfr_ing */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, + .resource_type = TF_IF_TBL_TYPE_ILT, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 54, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_VF_FUNC_SVIF, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .result_start_idx = 1396, + .result_bit_size = 64, + .result_num_fields = 8 + }, + { /* class_tid: 5, , table: em.vf_2_vfr.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_MEM_INTERNAL, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 54, + .cond_nums = 0 }, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .key_start_idx = 2284, + .blob_key_bit_size = 0, + .key_bit_size = 0, + .key_num_fields = 114, + .result_start_idx = 1404, + .result_bit_size = 0, + .result_num_fields = 6 + }, + { /* class_tid: 5, , table: l2_cntxt_tcam_cache.rd_egr0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 54, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, + .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .key_start_idx = 2398, .blob_key_bit_size = 11, .key_bit_size = 11, .key_num_fields = 1, - .result_start_idx = 1286, + .ident_start_idx = 38, + .ident_nums = 0 + }, + { /* class_tid: 5, , table: control.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 4, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 54, + .cond_nums = 1 }, + .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID + }, + { /* class_tid: 5, , table: ilt_tbl.vfr_egr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, + .resource_type = TF_IF_TBL_TYPE_ILT, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 55, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_SVIF, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .result_start_idx = 1410, + .result_bit_size = 64, + .result_num_fields = 8 + }, + { /* class_tid: 5, , table: l2_cntxt_tcam_cache.vfr_wr_egr0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 55, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, + .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .key_start_idx = 2399, + .blob_key_bit_size = 11, + .key_bit_size = 11, + .key_num_fields = 1, + .result_start_idx = 1418, .result_bit_size = 62, .result_num_fields = 4 }, - { /* class_tid: 5, , table: int_full_act_record.vfr_ing0 */ + { /* class_tid: 5, , table: ilt_tbl.vf_egr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, + .resource_type = TF_IF_TBL_TYPE_ILT, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 55, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_VF_FUNC_SVIF, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .result_start_idx = 1422, + .result_bit_size = 64, + .result_num_fields = 8 + }, + { /* class_tid: 5, , table: mod_record.vfr_2_vf_egr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 55, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .result_start_idx = 1430, + .result_bit_size = 0, + .result_num_fields = 0, + .encap_num_fields = 47 + }, + { /* class_tid: 5, , table: int_full_act_record.vfr_egr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_VFR_CFA_ACTION, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 55, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .result_start_idx = 1477, + .result_bit_size = 128, + .result_num_fields = 17 + }, + { /* class_tid: 5, , table: int_full_act_record.vfr_2_vf.ing0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = @@ -2373,17 +2539,17 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 54, + .cond_start_idx = 55, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .result_start_idx = 1290, + .result_start_idx = 1494, .result_bit_size = 128, .result_num_fields = 17 }, - { /* class_tid: 5, , table: em.vfr.0 */ + { /* class_tid: 5, , table: em.vfr_2_vf.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .direction = TF_DIR_RX, @@ -2391,15 +2557,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = { .cond_true_goto = 0, .cond_false_goto = 0, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 54, + .cond_start_idx = 55, .cond_nums = 0 }, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 2209, + .key_start_idx = 2400, .blob_key_bit_size = 0, .key_bit_size = 0, .key_num_fields = 114, - .result_start_idx = 1307, + .result_start_idx = 1511, .result_bit_size = 0, .result_num_fields = 6 } @@ -2585,7 +2751,7 @@ struct bnxt_ulp_mapper_cond_info ulp_thor_class_cond_list[] = { /* cond_execute: class_tid: 2, wm.l3_l4.ipv4 */ { .cond_opcode = BNXT_ULP_COND_OPC_HDR_BIT_IS_SET, - .cond_operand = BNXT_ULP_HDR_BIT_O_IPV4 + .cond_operand = BNXT_ULP_HDR_BIT_I_IPV4 }, /* cond_execute: class_tid: 3, control.ipv6_check */ { @@ -2651,17 +2817,22 @@ struct bnxt_ulp_mapper_cond_info ulp_thor_class_cond_list[] = { .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS }, - /* cond_execute: class_tid: 5, control.vf_0 */ + /* cond_execute: class_tid: 5, control.prof_tcam_cache.vfr_glb_act_rec_rd.0 */ { .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS }, - /* cond_execute: class_tid: 5, control.0 */ + /* cond_execute: class_tid: 5, control.vf_2_vfr.0 */ { .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS }, - /* cond_execute: class_tid: 5, control.ing_rd_vfr */ + /* cond_execute: class_tid: 5, control.prof_tcam_cache.vfr.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS + }, + /* cond_execute: class_tid: 5, control.0 */ { .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS @@ -2798,6 +2969,20 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = { BNXT_ULP_GLB_HF_ID_O_ETH_DMAC & 0xff} } }, + { + .field_info_mask = { + .description = "etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, /* class_tid: 1, , table: l2_cntxt_tcam.0 */ { .field_info_mask = { @@ -3198,6 +3383,20 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = { BNXT_ULP_GLB_HF_ID_O_ETH_DMAC & 0xff} } }, + { + .field_info_mask = { + .description = "etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, /* class_tid: 1, , table: profile_tcam_cache.ipv6_rd */ { .field_info_mask = { @@ -3472,30 +3671,13 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = { .description = "l2_vtag_present", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { .description = "l2_vtag_present", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr2 = { - ULP_THOR_SYM_L2_VTAG_PRESENT_YES}, - .field_src3 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr3 = { - ULP_THOR_SYM_L2_VTAG_PRESENT_NO} + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { @@ -5809,25 +5991,22 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = { .field_info_mask = { .description = "l2_vtag_present", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { - 0xff} + (BNXT_ULP_CF_IDX_O_VLAN_NO_IGNORE >> 8) & 0xff, + BNXT_ULP_CF_IDX_O_VLAN_NO_IGNORE & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_ZERO, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { .description = "l2_vtag_present", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff}, + (BNXT_ULP_CF_IDX_O_HAS_VTAG >> 8) & 0xff, + BNXT_ULP_CF_IDX_O_HAS_VTAG & 0xff}, .field_src2 = BNXT_ULP_FIELD_SRC_CONST, .field_opr2 = { ULP_THOR_SYM_L2_VTAG_PRESENT_YES}, @@ -6795,30 +6974,13 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = { .description = "tl2_vtag_present", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { .description = "tl2_vtag_present", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr2 = { - ULP_THOR_SYM_TL2_VTAG_PRESENT_YES}, - .field_src3 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr3 = { - ULP_THOR_SYM_TL2_VTAG_PRESENT_NO} + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { @@ -17936,6 +18098,20 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = { BNXT_ULP_GLB_HF_ID_O_ETH_DMAC & 0xff} } }, + { + .field_info_mask = { + .description = "etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, /* class_tid: 2, , table: l2_cntxt_tcam.0 */ { .field_info_mask = { @@ -18336,6 +18512,20 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = { BNXT_ULP_GLB_HF_ID_O_ETH_DMAC & 0xff} } }, + { + .field_info_mask = { + .description = "etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, /* class_tid: 2, , table: profile_tcam_cache.f2_ipv6_rd */ { .field_info_mask = { @@ -18863,8 +19053,23 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = { .field_info_spec = { .description = "tl3_hdr_type", .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + ULP_THOR_SYM_TL3_HDR_TYPE_IPV4}, + .field_src3 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr3 = { + ULP_THOR_SYM_TL3_HDR_TYPE_IPV6} } }, { @@ -21143,8 +21348,23 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = { .field_info_spec = { .description = "tl3_hdr_type", .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + ULP_THOR_SYM_TL3_HDR_TYPE_IPV4}, + .field_src3 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr3 = { + ULP_THOR_SYM_TL3_HDR_TYPE_IPV6} } }, { @@ -21432,9 +21652,23 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = { .field_info_spec = { .description = "wc_profile_id", .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT, .field_opr1 = { + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr2 = { + (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_5 >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_5 & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr3 = { (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4 >> 8) & 0xff, BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4 & 0xff} } @@ -23231,30 +23465,13 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = { .description = "l2_vtag_present", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { .description = "l2_vtag_present", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr2 = { - ULP_THOR_SYM_L2_VTAG_PRESENT_YES}, - .field_src3 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr3 = { - ULP_THOR_SYM_L2_VTAG_PRESENT_NO} + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { @@ -25548,30 +25765,13 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = { .description = "l2_vtag_present", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { .description = "l2_vtag_present", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr2 = { - ULP_THOR_SYM_L2_VTAG_PRESENT_YES}, - .field_src3 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr3 = { - ULP_THOR_SYM_L2_VTAG_PRESENT_NO} + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { @@ -26210,30 +26410,13 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = { .description = "l2_vtag_present", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { .description = "l2_vtag_present", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr2 = { - ULP_THOR_SYM_L2_VTAG_PRESENT_YES}, - .field_src3 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr3 = { - ULP_THOR_SYM_L2_VTAG_PRESENT_NO} + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { @@ -31940,25 +32123,108 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = { BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff} } }, - /* class_tid: 5, , table: port_table.egr_wr */ + /* class_tid: 5, , table: profile_tcam_cache.vfr_glb_act_rec_rd */ { .field_info_mask = { - .description = "dev.port_id", - .field_bit_size = 10, + .description = "recycle_cnt", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ONES, .field_opr1 = { - 0xff, 0xff} }, .field_info_spec = { - .description = "dev.port_id", - .field_bit_size = 10, + .description = "recycle_cnt", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_CF_IDX_DEV_PORT_ID >> 8) & 0xff, - BNXT_ULP_CF_IDX_DEV_PORT_ID & 0xff} + 1} + } + }, + { + .field_info_mask = { + .description = "prof_func_id", + .field_bit_size = 7, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff} + }, + .field_info_spec = { + .description = "prof_func_id", + .field_bit_size = 7, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr1 = { + (BNXT_ULP_GLB_RF_IDX_ANY_2_VF_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_ANY_2_VF_PROF_FUNC_ID & 0xff} + } + }, + { + .field_info_mask = { + .description = "hdr_sig_id", + .field_bit_size = 5, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "hdr_sig_id", + .field_bit_size = 5, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, + /* class_tid: 5, , table: profile_tcam_cache.vfr_glb_act_rec_wr */ + { + .field_info_mask = { + .description = "recycle_cnt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff} + }, + .field_info_spec = { + .description = "recycle_cnt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + } + }, + { + .field_info_mask = { + .description = "prof_func_id", + .field_bit_size = 7, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff} + }, + .field_info_spec = { + .description = "prof_func_id", + .field_bit_size = 7, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr1 = { + (BNXT_ULP_GLB_RF_IDX_ANY_2_VF_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_ANY_2_VF_PROF_FUNC_ID & 0xff} + } + }, + { + .field_info_mask = { + .description = "hdr_sig_id", + .field_bit_size = 5, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "hdr_sig_id", + .field_bit_size = 5, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, /* class_tid: 5, , table: l2_cntxt_tcam_cache.vf_rd_egr */ @@ -32308,70 +32574,57 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = { BNXT_ULP_CF_IDX_VF_FUNC_SVIF & 0xff} } }, - /* class_tid: 5, , table: l2_cntxt_tcam_cache.rd_egr0 */ + /* class_tid: 5, , table: profile_tcam_cache.vfr_rd */ { .field_info_mask = { - .description = "svif", - .field_bit_size = 11, + .description = "recycle_cnt", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ONES, .field_opr1 = { - 0xff, 0xff} }, .field_info_spec = { - .description = "svif", - .field_bit_size = 11, + .description = "recycle_cnt", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, - .field_opr1 = { - (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, - /* class_tid: 5, , table: l2_cntxt_tcam_cache.vfr_wr_egr0 */ { .field_info_mask = { - .description = "svif", - .field_bit_size = 11, + .description = "prof_func_id", + .field_bit_size = 7, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ONES, .field_opr1 = { - 0xff, 0xff} }, .field_info_spec = { - .description = "svif", - .field_bit_size = 11, + .description = "prof_func_id", + .field_bit_size = 7, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, .field_opr1 = { - (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff} + (BNXT_ULP_GLB_RF_IDX_VF_2_VFR_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_VF_2_VFR_PROF_FUNC_ID & 0xff} } }, - /* class_tid: 5, , table: l2_cntxt_tcam_cache.ing_rd_vfr */ { .field_info_mask = { - .description = "svif", - .field_bit_size = 11, + .description = "hdr_sig_id", + .field_bit_size = 5, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff, - 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "svif", - .field_bit_size = 11, + .description = "hdr_sig_id", + .field_bit_size = 5, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, - .field_opr1 = { - (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, - /* class_tid: 5, , table: l2_cntxt_tcam.vfr_ing0 */ + /* class_tid: 5, , table: l2_cntxt_tcam.vf_2_vfr_ing.0 */ { .field_info_mask = { .description = "etype", @@ -32559,13 +32812,19 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = { .description = "metadata", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + (ULP_THOR_SYM_VF_2_VFR_META_MASK >> 8) & 0xff, + ULP_THOR_SYM_VF_2_VFR_META_MASK & 0xff} }, .field_info_spec = { .description = "metadata", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + (ULP_THOR_SYM_VF_2_VFR_META_VAL >> 8) & 0xff, + ULP_THOR_SYM_VF_2_VFR_META_VAL & 0xff} } }, { @@ -32573,19 +32832,13 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = { .description = "svif", .field_bit_size = 11, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff, - 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { .description = "svif", .field_bit_size = 11, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, - .field_opr1 = { - (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { @@ -32680,7 +32933,316 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = { 1} } }, - /* class_tid: 5, , table: profile_tcam.vfr_ing0 */ + /* class_tid: 5, , table: l2_cntxt_tcam.vfr_2_vf_ing.0 */ + { + .field_info_mask = { + .description = "etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_ivlan_tpid_sel", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "l2_ivlan_tpid_sel", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_ivlan_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "l2_ivlan_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_ovlan_tpid_sel", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "l2_ovlan_tpid_sel", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_ovlan_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "l2_ovlan_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, + { + .field_info_mask = { + .description = "two_vtags", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "two_vtags", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, + { + .field_info_mask = { + .description = "vtag_present", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "vtag_present", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, + { + .field_info_mask = { + .description = "mac1_addr", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "mac1_addr", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, + { + .field_info_mask = { + .description = "mac0_addr", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "mac0_addr", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, + { + .field_info_mask = { + .description = "tunnel_id", + .field_bit_size = 24, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "tunnel_id", + .field_bit_size = 24, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, + { + .field_info_mask = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, + { + .field_info_mask = { + .description = "llc", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "llc", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, + { + .field_info_mask = { + .description = "roce", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "roce", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, + { + .field_info_mask = { + .description = "metadata", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + (ULP_THOR_SYM_VF_2_VFR_META_MASK >> 8) & 0xff, + ULP_THOR_SYM_VF_2_VFR_META_MASK & 0xff} + }, + .field_info_spec = { + .description = "metadata", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + (ULP_THOR_SYM_VF_2_VF_META_VAL >> 8) & 0xff, + ULP_THOR_SYM_VF_2_VF_META_VAL & 0xff} + } + }, + { + .field_info_mask = { + .description = "svif", + .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "svif", + .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, + { + .field_info_mask = { + .description = "parif", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "parif", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, + { + .field_info_mask = { + .description = "spif", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "spif", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, + { + .field_info_mask = { + .description = "loopback", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff} + }, + .field_info_spec = { + .description = "loopback", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + } + }, + { + .field_info_mask = { + .description = "recycle_cnt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "recycle_cnt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, + { + .field_info_mask = { + .description = "mpass_cnt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "mpass_cnt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, + { + .field_info_mask = { + .description = "valid", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + }, + .field_info_spec = { + .description = "valid", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + } + }, + /* class_tid: 5, , table: profile_tcam.vf_2_vfr.0 */ { .field_info_mask = { .description = "l4_hdr_is_udp_tcp", @@ -33214,8 +33776,8 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = { .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, .field_opr1 = { - (BNXT_ULP_GLB_RF_IDX_GLB_VFR_PROF_FUNC_0 >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_VFR_PROF_FUNC_0 & 0xff} + (BNXT_ULP_GLB_RF_IDX_VF_2_VFR_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_VF_2_VFR_PROF_FUNC_ID & 0xff} } }, { @@ -33292,1474 +33854,4308 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = { 1} } }, - /* class_tid: 5, , table: l2_cntxt_tcam_cache.ing_wr_vfr */ + /* class_tid: 5, , table: profile_tcam.vfr_2_vf.0 */ { .field_info_mask = { - .description = "svif", - .field_bit_size = 11, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff, - 0xff} - }, - .field_info_spec = { - .description = "svif", - .field_bit_size = 11, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, - .field_opr1 = { - (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff} - } - }, - /* class_tid: 5, , table: em.vfr.0 */ - { - .field_info_mask = { - .description = "em_profile_id", - .field_bit_size = 8, + .description = "l4_hdr_is_udp_tcp", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "em_profile_id", - .field_bit_size = 8, + .description = "l4_hdr_is_udp_tcp", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, - .field_opr1 = { - (BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_0 >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_0 & 0xff} - } - }, - { - .field_info_mask = { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "parif", + .description = "l4_hdr_type", .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "parif", + .description = "l4_hdr_type", .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "spif", - .field_bit_size = 2, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l4_hdr_error", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "spif", - .field_bit_size = 2, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l4_hdr_error", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "svif", - .field_bit_size = 11, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l4_hdr_valid", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "svif", - .field_bit_size = 11, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l4_hdr_valid", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "lcos", - .field_bit_size = 3, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "ieh", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "lcos", - .field_bit_size = 3, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "ieh", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "meta", - .field_bit_size = 16, + .description = "l3_ipv6_cmp_dst", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff, - 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "meta", - .field_bit_size = 16, + .description = "l3_ipv6_cmp_dst", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, - .field_opr1 = { - (BNXT_ULP_CF_IDX_DEV_PORT_ID >> 8) & 0xff, - BNXT_ULP_CF_IDX_DEV_PORT_ID & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "rcyc_cnt", - .field_bit_size = 2, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l3_ipv6_cmp_src", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "rcyc_cnt", - .field_bit_size = 2, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l3_ipv6_cmp_src", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "loopback", + .description = "l3_hdr_isIP", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "loopback", + .description = "l3_hdr_isIP", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl2_l2type", - .field_bit_size = 2, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l3_hdr_type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl2_l2type", - .field_bit_size = 2, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l3_hdr_type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl2_dmac", - .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l3_hdr_error", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl2_dmac", - .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l3_hdr_error", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl2_smac", - .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l3_hdr_valid", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl2_smac", - .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l3_hdr_valid", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl2_dt", - .field_bit_size = 2, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l2_two_vtags", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl2_dt", - .field_bit_size = 2, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l2_two_vtags", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl2_sa", + .description = "l2_vtag_present", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl2_sa", + .description = "l2_vtag_present", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl2_nvt", + .description = "l2_uc_mc_bc", .field_bit_size = 2, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl2_nvt", + .description = "l2_uc_mc_bc", .field_bit_size = 2, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl2_ovp", - .field_bit_size = 3, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l2_hdr_type", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl2_ovp", - .field_bit_size = 3, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l2_hdr_type", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl2_ovd", + .description = "l2_hdr_error", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl2_ovd", + .description = "l2_hdr_error", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl2_ovv", - .field_bit_size = 12, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l2_hdr_valid", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl2_ovv", - .field_bit_size = 12, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l2_hdr_valid", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl2_ovt", + .description = "tun_hdr_flags", .field_bit_size = 3, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl2_ovt", + .description = "tun_hdr_flags", .field_bit_size = 3, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl2_ivp", - .field_bit_size = 3, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl2_ivp", - .field_bit_size = 3, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl2_ivd", + .description = "tun_hdr_err", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl2_ivd", + .description = "tun_hdr_err", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl2_ivv", - .field_bit_size = 12, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tun_hdr_valid", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl2_ivv", - .field_bit_size = 12, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tun_hdr_valid", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl2_ivt", - .field_bit_size = 3, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl4_hdr_is_udp_tcp", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl2_ivt", - .field_bit_size = 3, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl4_hdr_is_udp_tcp", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl2_etype", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl4_hdr_type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl2_etype", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl4_hdr_type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl3.l3type", - .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl4_hdr_error", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl3.l3type", - .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl4_hdr_error", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl3.sip.ipv4", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl4_hdr_valid", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl3.sip.ipv4", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl4_hdr_valid", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl3.sip.ipv6", - .field_bit_size = 128, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl3_ipv6_cmp_dst", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl3.sip.ipv6", - .field_bit_size = 128, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl3_ipv6_cmp_dst", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl3.sip_selcmp.ipv6", - .field_bit_size = 72, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl3_ipv6_cmp_src", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl3.sip_selcmp.ipv6", - .field_bit_size = 72, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl3_ipv6_cmp_src", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl3.dip.ipv4", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl3_hdr_isIP", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl3.dip.ipv4", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl3_hdr_isIP", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl3.dip.ipv6", - .field_bit_size = 128, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl3_hdr_type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl3.dip.ipv6", - .field_bit_size = 128, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl3_hdr_type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl3.dip_selcmp.ipv6", - .field_bit_size = 72, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl3_hdr_error", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl3.dip_selcmp.ipv6", - .field_bit_size = 72, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl3_hdr_error", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl3.ttl", - .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl3_hdr_valid", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl3.ttl", - .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl3_hdr_valid", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl3.prot", - .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl2_two_vtags", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl3.prot", - .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl2_two_vtags", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl3.fid.ipv4", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl2_vtag_present", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl3.fid.ipv4", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl2_vtag_present", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl3.fid.ipv6", - .field_bit_size = 20, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl2_uc_mc_bc", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl3.fid.ipv6", - .field_bit_size = 20, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl2_uc_mc_bc", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl3.qos", - .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl2_hdr_type", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl3.qos", - .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "tl2_hdr_type", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl3.ieh_nonext", + .description = "tl2_hdr_valid", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl3.ieh_nonext", + .description = "tl2_hdr_valid", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl3.ieh_esp", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "tl3.ieh_esp", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } - }, - { - .field_info_mask = { - .description = "tl3.ieh_auth", + .description = "hrec_next", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl3.ieh_auth", + .description = "hrec_next", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl3.ieh_dest", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "prof_func_id", + .field_bit_size = 7, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff} }, .field_info_spec = { - .description = "tl3.ieh_dest", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "prof_func_id", + .field_bit_size = 7, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr1 = { + (BNXT_ULP_GLB_RF_IDX_ANY_2_VF_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_ANY_2_VF_PROF_FUNC_ID & 0xff} } }, { .field_info_mask = { - .description = "tl3.ieh_frag", + .description = "agg_error", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl3.ieh_frag", + .description = "agg_error", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl3.ieh_rthdr", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "metadata", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl3.ieh_rthdr", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "metadata", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl3.ieh_hop", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "pkt_type_0", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl3.ieh_hop", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "pkt_type_0", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl3.ieh_1frag", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "pkt_type_1", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl3.ieh_1frag", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "pkt_type_1", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl3.df", + .description = "valid", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, .field_info_spec = { - .description = "tl3.df", + .description = "valid", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } - }, - { - .field_info_mask = { - .description = "tl3.l3err", - .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "tl3.l3err", - .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } - }, - { - .field_info_mask = { - .description = "tl4.l4type", - .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "tl4.l4type", - .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } - }, - { - .field_info_mask = { - .description = "tl4.src", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "tl4.src", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } - }, - { - .field_info_mask = { - .description = "tl4.dst", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "tl4.dst", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } - }, - { - .field_info_mask = { - .description = "tl4.flags", - .field_bit_size = 9, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "tl4.flags", - .field_bit_size = 9, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} } }, + /* class_tid: 5, , table: profile_tcam_cache.vfr_wr */ { .field_info_mask = { - .description = "tl4.seq", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "recycle_cnt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff} }, .field_info_spec = { - .description = "tl4.seq", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "recycle_cnt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, { .field_info_mask = { - .description = "tl4.pa", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "prof_func_id", + .field_bit_size = 7, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff} }, .field_info_spec = { - .description = "tl4.pa", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "prof_func_id", + .field_bit_size = 7, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr1 = { + (BNXT_ULP_GLB_RF_IDX_VF_2_VFR_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_VF_2_VFR_PROF_FUNC_ID & 0xff} } }, { .field_info_mask = { - .description = "tl4.opt", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "hdr_sig_id", + .field_bit_size = 5, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "tl4.opt", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "hdr_sig_id", + .field_bit_size = 5, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }, + /* class_tid: 5, , table: em.vf_2_vfr.0 */ { .field_info_mask = { - .description = "tl4.tcpts", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "em_profile_id", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff} }, .field_info_spec = { - .description = "tl4.tcpts", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "em_profile_id", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr1 = { + (BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_0 >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_0 & 0xff} } }, { .field_info_mask = { - .description = "tl4.err", - .field_bit_size = 4, + .description = "l2_cntxt_id", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "tl4.err", - .field_bit_size = 4, + .description = "l2_cntxt_id", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "tuntype", + .description = "parif", .field_bit_size = 4, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "tuntype", + .description = "parif", .field_bit_size = 4, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "tflags", - .field_bit_size = 3, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "tflags", - .field_bit_size = 3, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } - }, - { - .field_info_mask = { - .description = "tids", - .field_bit_size = 24, + .description = "spif", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "tids", - .field_bit_size = 24, + .description = "spif", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "tid", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "svif", + .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff} }, .field_info_spec = { - .description = "tid", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "svif", + .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_opr1 = { + (BNXT_ULP_CF_IDX_VF_FUNC_SVIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_VF_FUNC_SVIF & 0xff} } }, { .field_info_mask = { - .description = "tctxts", - .field_bit_size = 24, + .description = "lcos", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "tctxts", - .field_bit_size = 24, + .description = "lcos", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "tctxt", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "meta", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff} }, .field_info_spec = { - .description = "tctxt", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "meta", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + (ULP_THOR_SYM_VF_2_VFR_META_VAL >> 8) & 0xff, + ULP_THOR_SYM_VF_2_VFR_META_VAL & 0xff} } }, { .field_info_mask = { - .description = "tqos", - .field_bit_size = 3, + .description = "rcyc_cnt", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "tqos", - .field_bit_size = 3, + .description = "rcyc_cnt", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "terr", - .field_bit_size = 4, + .description = "loopback", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "terr", - .field_bit_size = 4, + .description = "loopback", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l2_l2type", + .description = "tl2_l2type", .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l2_l2type", + .description = "tl2_l2type", .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l2_dmac", + .description = "tl2_dmac", .field_bit_size = 48, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l2_dmac", + .description = "tl2_dmac", .field_bit_size = 48, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l2_smac", + .description = "tl2_smac", .field_bit_size = 48, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l2_smac", + .description = "tl2_smac", .field_bit_size = 48, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l2_dt", + .description = "tl2_dt", .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l2_dt", + .description = "tl2_dt", .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l2_sa", + .description = "tl2_sa", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l2_sa", + .description = "tl2_sa", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l2_nvt", + .description = "tl2_nvt", .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l2_nvt", + .description = "tl2_nvt", .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l2_ovp", + .description = "tl2_ovp", .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l2_ovp", + .description = "tl2_ovp", .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l2_ovd", + .description = "tl2_ovd", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l2_ovd", + .description = "tl2_ovd", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l2_ovv", + .description = "tl2_ovv", .field_bit_size = 12, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l2_ovv", + .description = "tl2_ovv", .field_bit_size = 12, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l2_ovt", + .description = "tl2_ovt", .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l2_ovt", + .description = "tl2_ovt", .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l2_ivp", + .description = "tl2_ivp", .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l2_ivp", + .description = "tl2_ivp", .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l2_ivd", + .description = "tl2_ivd", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l2_ivd", + .description = "tl2_ivd", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l2_ivv", + .description = "tl2_ivv", .field_bit_size = 12, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l2_ivv", + .description = "tl2_ivv", .field_bit_size = 12, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l2_ivt", + .description = "tl2_ivt", .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l2_ivt", + .description = "tl2_ivt", .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l2_etype", + .description = "tl2_etype", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l2_etype", + .description = "tl2_etype", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l3.l3type", + .description = "tl3.l3type", .field_bit_size = 4, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l3.l3type", + .description = "tl3.l3type", .field_bit_size = 4, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l3.sip.ipv4", + .description = "tl3.sip.ipv4", .field_bit_size = 32, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l3.sip.ipv4", + .description = "tl3.sip.ipv4", .field_bit_size = 32, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l3.sip.ipv6", + .description = "tl3.sip.ipv6", .field_bit_size = 128, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l3.sip.ipv6", + .description = "tl3.sip.ipv6", .field_bit_size = 128, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l3.sip_selcmp.ipv6", + .description = "tl3.sip_selcmp.ipv6", .field_bit_size = 72, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l3.sip_selcmp.ipv6", + .description = "tl3.sip_selcmp.ipv6", .field_bit_size = 72, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l3.dip.ipv4", + .description = "tl3.dip.ipv4", .field_bit_size = 32, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l3.dip.ipv4", + .description = "tl3.dip.ipv4", .field_bit_size = 32, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l3.dip.ipv6", + .description = "tl3.dip.ipv6", .field_bit_size = 128, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l3.dip.ipv6", + .description = "tl3.dip.ipv6", .field_bit_size = 128, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l3.dip_selcmp.ipv6", + .description = "tl3.dip_selcmp.ipv6", .field_bit_size = 72, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l3.dip_selcmp.ipv6", + .description = "tl3.dip_selcmp.ipv6", .field_bit_size = 72, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l3.ttl", + .description = "tl3.ttl", .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l3.ttl", + .description = "tl3.ttl", .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l3.prot", + .description = "tl3.prot", .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l3.prot", + .description = "tl3.prot", .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l3.fid.ipv4", + .description = "tl3.fid.ipv4", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l3.fid.ipv4", + .description = "tl3.fid.ipv4", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l3.fid.ipv6", + .description = "tl3.fid.ipv6", .field_bit_size = 20, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l3.fid.ipv6", + .description = "tl3.fid.ipv6", .field_bit_size = 20, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l3.qos", + .description = "tl3.qos", .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l3.qos", + .description = "tl3.qos", .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l3.ieh_nonext", + .description = "tl3.ieh_nonext", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l3.ieh_nonext", + .description = "tl3.ieh_nonext", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { .field_info_mask = { - .description = "l3.ieh_esp", + .description = "tl3.ieh_esp", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, .field_info_spec = { - .description = "l3.ieh_esp", + .description = "tl3.ieh_esp", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.ieh_auth", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.ieh_auth", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.ieh_dest", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.ieh_dest", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.ieh_frag", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.ieh_frag", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.ieh_rthdr", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.ieh_rthdr", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.ieh_hop", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.ieh_hop", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.ieh_1frag", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.ieh_1frag", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SKIP } }, { - .field_info_mask = { - .description = "l3.ieh_auth", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "l3.ieh_auth", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } + .field_info_mask = { + .description = "tl3.df", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.df", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.l3err", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.l3err", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl4.l4type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl4.l4type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl4.src", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl4.src", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl4.dst", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl4.dst", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl4.flags", + .field_bit_size = 9, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl4.flags", + .field_bit_size = 9, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl4.seq", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl4.seq", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl4.pa", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl4.pa", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl4.opt", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl4.opt", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl4.tcpts", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl4.tcpts", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl4.err", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl4.err", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tuntype", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tuntype", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tflags", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tflags", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tids", + .field_bit_size = 24, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tids", + .field_bit_size = 24, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tid", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tid", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tctxts", + .field_bit_size = 24, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tctxts", + .field_bit_size = 24, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tctxt", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tctxt", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tqos", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tqos", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "terr", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "terr", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_l2type", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_l2type", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_dmac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_dmac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_smac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_smac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_dt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_dt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_sa", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_sa", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_nvt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_nvt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_ovp", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_ovp", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_ovd", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_ovd", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_ovv", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_ovv", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_ovt", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_ovt", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_ivp", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_ivp", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_ivd", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_ivd", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_ivv", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_ivv", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_ivt", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_ivt", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.l3type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.l3type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.sip.ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.sip.ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.sip.ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.sip.ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.sip_selcmp.ipv6", + .field_bit_size = 72, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.sip_selcmp.ipv6", + .field_bit_size = 72, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.dip.ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.dip.ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.dip.ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.dip.ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.dip_selcmp.ipv6", + .field_bit_size = 72, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.dip_selcmp.ipv6", + .field_bit_size = 72, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.ttl", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.ttl", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.prot", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.prot", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.fid.ipv4", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.fid.ipv4", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.fid.ipv6", + .field_bit_size = 20, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.fid.ipv6", + .field_bit_size = 20, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.qos", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.qos", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.ieh_nonext", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.ieh_nonext", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.ieh_esp", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.ieh_esp", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.ieh_auth", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.ieh_auth", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.ieh_dest", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.ieh_dest", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.ieh_frag", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.ieh_frag", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.ieh_rthdr", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.ieh_rthdr", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.ieh_hop", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.ieh_hop", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.ieh_1frag", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.ieh_1frag", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.df", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.df", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.l3err.ipv4", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.l3err.ipv4", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.l3err.ipv6", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.l3err.ipv6", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.l4type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.l4type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.src", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.src", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.dst", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.dst", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.flags", + .field_bit_size = 9, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.flags", + .field_bit_size = 9, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.seq", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.seq", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.ack", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.ack", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.win", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.win", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.pa", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.pa", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.opt", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.opt", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.tcpts", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.tcpts", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.tsval", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.tsval", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.txecr", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.txecr", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.err", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.err", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + /* class_tid: 5, , table: l2_cntxt_tcam_cache.rd_egr0 */ + { + .field_info_mask = { + .description = "svif", + .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "svif", + .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_opr1 = { + (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff} + } + }, + /* class_tid: 5, , table: l2_cntxt_tcam_cache.vfr_wr_egr0 */ + { + .field_info_mask = { + .description = "svif", + .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "svif", + .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_opr1 = { + (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff} + } + }, + /* class_tid: 5, , table: em.vfr_2_vf.0 */ + { + .field_info_mask = { + .description = "em_profile_id", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff} + }, + .field_info_spec = { + .description = "em_profile_id", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr1 = { + (BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_1 >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_1 & 0xff} + } + }, + { + .field_info_mask = { + .description = "l2_cntxt_id", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_cntxt_id", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "parif", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "parif", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "spif", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "spif", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "svif", + .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "svif", + .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "lcos", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "lcos", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "meta", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ONES, + .field_opr1 = { + 0xff, + 0xff} + }, + .field_info_spec = { + .description = "meta", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_opr1 = { + (BNXT_ULP_CF_IDX_VF_META_FID >> 8) & 0xff, + BNXT_ULP_CF_IDX_VF_META_FID & 0xff} + } + }, + { + .field_info_mask = { + .description = "rcyc_cnt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "rcyc_cnt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "loopback", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "loopback", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl2_l2type", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl2_l2type", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl2_dmac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl2_dmac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl2_smac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl2_smac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl2_dt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl2_dt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl2_sa", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl2_sa", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl2_nvt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl2_nvt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl2_ovp", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl2_ovp", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl2_ovd", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl2_ovd", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl2_ovv", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl2_ovv", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl2_ovt", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl2_ovt", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl2_ivp", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl2_ivp", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl2_ivd", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl2_ivd", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl2_ivv", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl2_ivv", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl2_ivt", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl2_ivt", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl2_etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl2_etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.l3type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.l3type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.sip.ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.sip.ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.sip.ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.sip.ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.sip_selcmp.ipv6", + .field_bit_size = 72, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.sip_selcmp.ipv6", + .field_bit_size = 72, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.dip.ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.dip.ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.dip.ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.dip.ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.dip_selcmp.ipv6", + .field_bit_size = 72, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.dip_selcmp.ipv6", + .field_bit_size = 72, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.ttl", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.ttl", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.prot", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.prot", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.fid.ipv4", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.fid.ipv4", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.fid.ipv6", + .field_bit_size = 20, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.fid.ipv6", + .field_bit_size = 20, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.qos", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.qos", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.ieh_nonext", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.ieh_nonext", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.ieh_esp", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.ieh_esp", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.ieh_auth", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.ieh_auth", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.ieh_dest", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.ieh_dest", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.ieh_frag", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.ieh_frag", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.ieh_rthdr", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.ieh_rthdr", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.ieh_hop", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.ieh_hop", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.ieh_1frag", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.ieh_1frag", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.df", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.df", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl3.l3err", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl3.l3err", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl4.l4type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl4.l4type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl4.src", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl4.src", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl4.dst", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl4.dst", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl4.flags", + .field_bit_size = 9, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl4.flags", + .field_bit_size = 9, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl4.seq", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl4.seq", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl4.pa", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl4.pa", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl4.opt", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl4.opt", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl4.tcpts", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl4.tcpts", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tl4.err", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tl4.err", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tuntype", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tuntype", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tflags", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tflags", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tids", + .field_bit_size = 24, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tids", + .field_bit_size = 24, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tid", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tid", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tctxts", + .field_bit_size = 24, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tctxts", + .field_bit_size = 24, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tctxt", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tctxt", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "tqos", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "tqos", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "terr", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "terr", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_l2type", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_l2type", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_dmac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_dmac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_smac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_smac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_dt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_dt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_sa", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_sa", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_nvt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_nvt", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_ovp", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_ovp", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_ovd", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_ovd", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_ovv", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_ovv", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_ovt", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_ovt", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_ivp", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_ivp", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_ivd", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_ivd", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_ivv", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_ivv", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_ivt", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_ivt", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l2_etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l2_etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.l3type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.l3type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.sip.ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.sip.ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.sip.ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.sip.ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.sip_selcmp.ipv6", + .field_bit_size = 72, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.sip_selcmp.ipv6", + .field_bit_size = 72, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.dip.ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.dip.ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.dip.ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.dip.ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.dip_selcmp.ipv6", + .field_bit_size = 72, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.dip_selcmp.ipv6", + .field_bit_size = 72, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.ttl", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.ttl", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.prot", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.prot", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.fid.ipv4", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.fid.ipv4", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.fid.ipv6", + .field_bit_size = 20, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.fid.ipv6", + .field_bit_size = 20, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.qos", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.qos", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.ieh_nonext", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.ieh_nonext", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.ieh_esp", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.ieh_esp", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.ieh_auth", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.ieh_auth", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.ieh_dest", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.ieh_dest", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.ieh_frag", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.ieh_frag", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.ieh_rthdr", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.ieh_rthdr", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.ieh_hop", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.ieh_hop", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.ieh_1frag", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.ieh_1frag", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.df", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.df", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.l3err.ipv4", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.l3err.ipv4", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l3.l3err.ipv6", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l3.l3err.ipv6", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.l4type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.l4type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.src", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.src", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.dst", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.dst", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.flags", + .field_bit_size = 9, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.flags", + .field_bit_size = 9, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.seq", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.seq", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.ack", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.ack", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.win", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.win", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.pa", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.pa", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.opt", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.opt", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.tcpts", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.tcpts", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.tsval", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.tsval", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.txecr", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.txecr", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + }, + { + .field_info_mask = { + .description = "l4.err", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + .field_info_spec = { + .description = "l4.err", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + } + } +}; + +struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { + /* class_tid: 1, , table: l2_cntxt_tcam.0 */ + { + .description = "prof_func_id", + .field_bit_size = 7, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, + .field_opr1 = { + (BNXT_ULP_GLB_HF_ID_O_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_ETH_DMAC & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr2 = { + (BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr3 = { + (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff} + }, + { + .description = "ctxt_meta_prof", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "def_ctxt_data", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR & 0xff} + }, + { + .description = "ctxt_opcode", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + ULP_THOR_SYM_CTXT_OPCODE_NORMAL_FLOW} + }, + { + .description = "l2_cntxt_id", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff} + }, + { + .description = "parif", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_opr1 = { + (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff} + }, + /* class_tid: 1, , table: mac_addr_cache.wr */ + { + .description = "rid", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, + BNXT_ULP_RF_IDX_RID & 0xff} + }, + { + .description = "l2_cntxt_tcam_index", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l2_cntxt_id", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff} + }, + { + .description = "src_property_ptr", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + /* class_tid: 1, , table: fkb_select.l2_l3_l4_v6_em */ + { + .description = "l2_cntxt_id.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + }, + { + .description = "parif.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "spif.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "svif.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "lcos.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "meta.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "rcyc_cnt.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "loopback.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl2_l2type.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl2_dmac.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl2_smac.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl2_dt.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl2_sa.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl2_nvt.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl2_ovp.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl2_ovd.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl2_ovv.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl2_ovt.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl2_ivp.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl2_ivd.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl2_ivv.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl2_ivt.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl2_etype.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_l3type.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_sip.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_sip_selcmp.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_dip.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_dip_selcmp.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_ttl.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_prot.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_fid.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_qos.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_ieh_nonext.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_ieh_esp.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_ieh_auth.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_ieh_dest.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_ieh_frag.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_ieh_rthdr.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_ieh_hop.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_ieh_1frag.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_df.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_l3err.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl4_l4type.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl4_src.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl4_dst.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl4_flags.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl4_seq.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl4_pa.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl4_opt.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl4_tcpts.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl4_err.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tuntype.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tflags.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tids.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tid.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tctxts.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tctxt.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tqos.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "terr.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l2_l2type.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l2_dmac.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l2_smac.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, + .field_opr1 = { + (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff} + }, + { + .description = "l2_dt.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l2_sa.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l2_nvt.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l2_ovp.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l2_ovd.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l2_ovv.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l2_ovt.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l2_ivp.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l2_ivd.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l2_ivv.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_FIELD_BIT, + .field_opr2 = { + (BNXT_ULP_GLB_HF_ID_OO_VLAN_VID >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_OO_VLAN_VID & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l2_ivt.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l2_etype.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_l3type.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_sip.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, + .field_opr1 = { + (BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR & 0xff} + }, + { + .description = "l3_sip_selcmp.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_dip.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, + .field_opr1 = { + (BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR & 0xff} + }, + { + .description = "l3_dip_selcmp.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_ttl.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_prot.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_opr1 = { + (BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID >> 8) & 0xff, + BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID & 0xff} + }, + { + .description = "l3_fid.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_qos.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_ieh_nonext.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_ieh_esp.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_ieh_auth.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_ieh_dest.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_ieh_frag.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .field_info_mask = { - .description = "l3.ieh_dest", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "l3.ieh_dest", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } + .description = "l3_ieh_rthdr.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .field_info_mask = { - .description = "l3.ieh_frag", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "l3.ieh_frag", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } + .description = "l3_ieh_hop.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .field_info_mask = { - .description = "l3.ieh_rthdr", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "l3.ieh_rthdr", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } + .description = "l3_ieh_1frag.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .field_info_mask = { - .description = "l3.ieh_hop", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "l3.ieh_hop", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } + .description = "l3_df.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .field_info_mask = { - .description = "l3.ieh_1frag", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "l3.ieh_1frag", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } + .description = "l3_l3err.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .field_info_mask = { - .description = "l3.df", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "l3.df", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } + .description = "l4_l4type.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .field_info_mask = { - .description = "l3.l3err.ipv4", - .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "l3.l3err.ipv4", - .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } + .description = "l4_src.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_opr1 = { + (BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT >> 8) & 0xff, + BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT & 0xff} }, { - .field_info_mask = { - .description = "l3.l3err.ipv6", - .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "l3.l3err.ipv6", - .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } + .description = "l4_dst.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_opr1 = { + (BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT >> 8) & 0xff, + BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT & 0xff} }, { - .field_info_mask = { - .description = "l4.l4type", - .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "l4.l4type", - .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } + .description = "l4_flags.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .field_info_mask = { - .description = "l4.src", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "l4.src", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } + .description = "l4_seq.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .field_info_mask = { - .description = "l4.dst", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "l4.dst", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } + .description = "l4_ack.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .field_info_mask = { - .description = "l4.flags", - .field_bit_size = 9, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "l4.flags", - .field_bit_size = 9, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } + .description = "l4_win.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .field_info_mask = { - .description = "l4.seq", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "l4.seq", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } + .description = "l4_pa.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .field_info_mask = { - .description = "l4.ack", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "l4.ack", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } + .description = "l4_opt.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .field_info_mask = { - .description = "l4.win", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "l4.win", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } + .description = "l4_tcpts.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .field_info_mask = { - .description = "l4.pa", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "l4.pa", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } + .description = "l4_tsval.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .field_info_mask = { - .description = "l4.opt", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "l4.opt", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } + .description = "l4_txecr.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .field_info_mask = { - .description = "l4.tcpts", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "l4.tcpts", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } + .description = "l4_err.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, + /* class_tid: 1, , table: profile_tcam.l2_l3_l4_v6_em */ { - .field_info_mask = { - .description = "l4.tsval", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "l4.tsval", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } + .description = "wc_key_id", + .field_bit_size = 6, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .field_info_mask = { - .description = "l4.txecr", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "l4.txecr", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } + .description = "wc_profile_id", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .field_info_mask = { - .description = "l4.err", - .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - .field_info_spec = { - .description = "l4.err", - .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - } - } -}; - -struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { - /* class_tid: 1, , table: l2_cntxt_tcam.0 */ - { - .description = "prof_func_id", - .field_bit_size = 7, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, - .field_opr1 = { - (BNXT_ULP_GLB_HF_ID_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_GLB_HF_ID_O_ETH_DMAC & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_GLB_RF, - .field_opr2 = { - (BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID & 0xff}, - .field_src3 = BNXT_ULP_FIELD_SRC_GLB_RF, - .field_opr3 = { - (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff} + .description = "wc_search_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ctxt_meta_prof", - .field_bit_size = 3, + .description = "em_key_type", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "def_ctxt_data", - .field_bit_size = 16, + .description = "em_key_id", + .field_bit_size = 6, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { - (BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR & 0xff} + (BNXT_ULP_RF_IDX_EM_KEY_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_EM_KEY_ID_0 & 0xff} }, { - .description = "ctxt_opcode", - .field_bit_size = 3, + .description = "em_profile_id", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { - ULP_THOR_SYM_CTXT_OPCODE_NORMAL_FLOW} + (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff} }, { - .description = "l2_cntxt_id", - .field_bit_size = 10, + .description = "em_search_en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff} + 1} }, { - .description = "parif", - .field_bit_size = 4, + .description = "pl_byp_lkup_en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, - .field_opr1 = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 1, , table: mac_addr_cache.wr */ + /* class_tid: 1, , table: profile_tcam_cache.l2_l3_l4_v6_wr */ { .description = "rid", .field_bit_size = 32, @@ -34770,27 +38166,98 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { BNXT_ULP_RF_IDX_RID & 0xff} }, { - .description = "l2_cntxt_tcam_index", + .description = "profile_tcam_index", .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 & 0xff} + }, + { + .description = "em_profile_id", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff} + }, + { + .description = "em_key_id", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_EM_KEY_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_EM_KEY_ID_0 & 0xff} + }, + { + .description = "wc_profile_id", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_cntxt_id", - .field_bit_size = 10, + .description = "wc_key_id", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "flow_sig_id", + .field_bit_size = 64, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_opr1 = { + (BNXT_ULP_CF_IDX_FLOW_SIG_ID >> 8) & 0xff, + BNXT_ULP_CF_IDX_FLOW_SIG_ID & 0xff} + }, + /* class_tid: 1, , table: em.l2_l3_l4_v6.0 */ + { + .description = "valid", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + }, + { + .description = "strength", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 3} + }, + { + .description = "data", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { - (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff} + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} }, { - .description = "src_property_ptr", - .field_bit_size = 10, + .description = "opcode", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 1, , table: fkb_select.l2_l3_l4_v6_em */ + { + .description = "meta_prof", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "ctxt_data", + .field_bit_size = 14, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + /* class_tid: 1, , table: fkb_select.l3_l4_wm */ { .description = "l2_cntxt_id.en", .field_bit_size = 1, @@ -35163,10 +38630,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "l2_smac.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff} + 1} }, { .description = "l2_dt.en", @@ -35225,22 +38691,10 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { { .description = "l2_ivv.en", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_FIELD_BIT, - .field_opr2 = { - (BNXT_ULP_GLB_HF_ID_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_GLB_HF_ID_OO_VLAN_VID & 0xff}, - .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + 1} }, { .description = "l2_ivt.en", @@ -35264,10 +38718,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "l3_sip.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR & 0xff} + 1} }, { .description = "l3_sip_selcmp.en", @@ -35279,10 +38732,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "l3_dip.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR & 0xff} + 1} }, { .description = "l3_dip_selcmp.en", @@ -35300,10 +38752,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "l3_prot.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID & 0xff} + 1} }, { .description = "l3_fid.en", @@ -35387,19 +38838,17 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "l4_src.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT & 0xff} + 1} }, { .description = "l4_dst.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT & 0xff} + 1} }, { .description = "l4_flags.en", @@ -35461,166 +38910,7 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 1, , table: profile_tcam.l2_l3_l4_v6_em */ - { - .description = "wc_key_id", - .field_bit_size = 6, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "em_key_type", - .field_bit_size = 2, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "em_key_id", - .field_bit_size = 6, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_EM_KEY_ID_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_EM_KEY_ID_0 & 0xff} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - /* class_tid: 1, , table: profile_tcam_cache.l2_l3_l4_v6_wr */ - { - .description = "rid", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, - BNXT_ULP_RF_IDX_RID & 0xff} - }, - { - .description = "profile_tcam_index", - .field_bit_size = 10, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 & 0xff} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff} - }, - { - .description = "em_key_id", - .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_EM_KEY_ID_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_EM_KEY_ID_0 & 0xff} - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "wc_key_id", - .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "flow_sig_id", - .field_bit_size = 64, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, - .field_opr1 = { - (BNXT_ULP_CF_IDX_FLOW_SIG_ID >> 8) & 0xff, - BNXT_ULP_CF_IDX_FLOW_SIG_ID & 0xff} - }, - /* class_tid: 1, , table: em.l2_l3_l4_v6.0 */ - { - .description = "valid", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} - }, - { - .description = "strength", - .field_bit_size = 2, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 3} - }, - { - .description = "data", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} - }, - { - .description = "opcode", - .field_bit_size = 3, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "meta_prof", - .field_bit_size = 3, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - { - .description = "ctxt_data", - .field_bit_size = 14, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - /* class_tid: 1, , table: fkb_select.l3_l4_wm */ + /* class_tid: 1, , table: fkb_select.l3_l4_wm_vxlan */ { .description = "l2_cntxt_id.en", .field_bit_size = 1, @@ -35747,7 +39037,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "tl2_ivv.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, { .description = "tl2_ivt.en", @@ -35771,7 +39063,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "tl3_sip.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, { .description = "tl3_sip_selcmp.en", @@ -35783,7 +39077,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "tl3_dip.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, { .description = "tl3_dip_selcmp.en", @@ -35801,7 +39097,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "tl3_prot.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, { .description = "tl3_fid.en", @@ -35885,13 +39183,17 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "tl4_src.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, { .description = "tl4_dst.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, { .description = "tl4_flags.en", @@ -36055,9 +39357,7 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "l2_ivv.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "l2_ivt.en", @@ -36081,9 +39381,7 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "l3_sip.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "l3_sip_selcmp.en", @@ -36095,9 +39393,7 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "l3_dip.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "l3_dip_selcmp.en", @@ -36115,9 +39411,7 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "l3_prot.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "l3_fid.en", @@ -36201,17 +39495,13 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "l4_src.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "l4_dst.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "l4_flags.en", @@ -36256,1160 +39546,1334 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_tsval.en", - .field_bit_size = 1, + .description = "l4_tsval.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l4_txecr.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l4_err.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + /* class_tid: 1, , table: profile_tcam.l3_l4.ip */ + { + .description = "wc_key_id", + .field_bit_size = 6, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr1 = { + (BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0 >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0 & 0xff} + }, + { + .description = "wc_profile_id", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr2 = { + (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1 >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1 & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr3 = { + (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0 & 0xff} + }, + { + .description = "wc_search_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + }, + { + .description = "em_key_type", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "em_key_id", + .field_bit_size = 6, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "em_profile_id", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "em_search_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "pl_byp_lkup_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + /* class_tid: 1, , table: profile_tcam.l3_l4.vxlan */ + { + .description = "wc_key_id", + .field_bit_size = 6, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr1 = { + (BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2 >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2 & 0xff} + }, + { + .description = "wc_profile_id", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr2 = { + (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3 >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3 & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr3 = { + (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2 >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2 & 0xff} + }, + { + .description = "wc_search_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + }, + { + .description = "em_key_type", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "em_key_id", + .field_bit_size = 6, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "em_profile_id", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "em_search_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "pl_byp_lkup_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + /* class_tid: 1, , table: profile_tcam_cache.wr */ + { + .description = "rid", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, + BNXT_ULP_RF_IDX_RID & 0xff} + }, + { + .description = "profile_tcam_index", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 & 0xff} + }, + { + .description = "em_profile_id", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "em_key_id", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_txecr.en", - .field_bit_size = 1, + .description = "wc_profile_id", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_err.en", - .field_bit_size = 1, + .description = "wc_key_id", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 1, , table: fkb_select.l3_l4_wm_vxlan */ { - .description = "l2_cntxt_id.en", - .field_bit_size = 1, + .description = "flow_sig_id", + .field_bit_size = 64, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { - 1} + (BNXT_ULP_CF_IDX_FLOW_SIG_ID >> 8) & 0xff, + BNXT_ULP_CF_IDX_FLOW_SIG_ID & 0xff} }, + /* class_tid: 1, , table: wm.l3_l4.ipv4 */ { - .description = "parif.en", - .field_bit_size = 1, + .description = "ctxt_data", + .field_bit_size = 14, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "spif.en", - .field_bit_size = 1, + .description = "meta_prof", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "svif.en", - .field_bit_size = 1, + .description = "opcode", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "lcos.en", - .field_bit_size = 1, + .description = "data", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} }, { - .description = "meta.en", - .field_bit_size = 1, + .description = "strength", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, + /* class_tid: 1, , table: wm.l3_l4.ipv6 */ { - .description = "rcyc_cnt.en", - .field_bit_size = 1, + .description = "ctxt_data", + .field_bit_size = 14, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "loopback.en", - .field_bit_size = 1, + .description = "meta_prof", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_l2type.en", - .field_bit_size = 1, + .description = "opcode", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_dmac.en", - .field_bit_size = 1, + .description = "data", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} }, { - .description = "tl2_smac.en", - .field_bit_size = 1, + .description = "strength", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, + /* class_tid: 1, , table: wm.l3.ipv4 */ { - .description = "tl2_dt.en", - .field_bit_size = 1, + .description = "ctxt_data", + .field_bit_size = 14, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_sa.en", - .field_bit_size = 1, + .description = "meta_prof", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_nvt.en", - .field_bit_size = 1, + .description = "opcode", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_ovp.en", - .field_bit_size = 1, + .description = "data", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} }, { - .description = "tl2_ovd.en", - .field_bit_size = 1, + .description = "strength", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, + /* class_tid: 1, , table: wm.l3.ipv6 */ { - .description = "tl2_ovv.en", - .field_bit_size = 1, + .description = "ctxt_data", + .field_bit_size = 14, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_ovt.en", - .field_bit_size = 1, + .description = "meta_prof", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_ivp.en", - .field_bit_size = 1, + .description = "opcode", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_ivd.en", - .field_bit_size = 1, + .description = "data", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} }, { - .description = "tl2_ivv.en", - .field_bit_size = 1, + .description = "strength", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { 1} }, + /* class_tid: 1, , table: wm.l2 */ { - .description = "tl2_ivt.en", - .field_bit_size = 1, + .description = "ctxt_data", + .field_bit_size = 14, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_etype.en", - .field_bit_size = 1, + .description = "meta_prof", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_l3type.en", - .field_bit_size = 1, + .description = "opcode", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_sip.en", - .field_bit_size = 1, + .description = "data", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} + }, + { + .description = "strength", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { 1} }, + /* class_tid: 1, , table: wm.l3_l4.vxlan.ipv4 */ { - .description = "tl3_sip_selcmp.en", - .field_bit_size = 1, + .description = "ctxt_data", + .field_bit_size = 14, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_dip.en", - .field_bit_size = 1, + .description = "meta_prof", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_dip_selcmp.en", - .field_bit_size = 1, + .description = "opcode", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_ttl.en", - .field_bit_size = 1, + .description = "data", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} }, { - .description = "tl3_prot.en", - .field_bit_size = 1, + .description = "strength", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { 1} }, + /* class_tid: 1, , table: wm.l3_l4.vxlan.ipv6 */ { - .description = "tl3_fid.en", - .field_bit_size = 1, + .description = "ctxt_data", + .field_bit_size = 14, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_qos.en", - .field_bit_size = 1, + .description = "meta_prof", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_ieh_nonext.en", - .field_bit_size = 1, + .description = "opcode", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_ieh_esp.en", - .field_bit_size = 1, + .description = "data", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} }, { - .description = "tl3_ieh_auth.en", - .field_bit_size = 1, + .description = "strength", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, + /* class_tid: 2, , table: l2_cntxt_tcam.1 */ { - .description = "tl3_ieh_dest.en", - .field_bit_size = 1, + .description = "prof_func_id", + .field_bit_size = 7, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_ieh_frag.en", - .field_bit_size = 1, + .description = "ctxt_meta_prof", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_ieh_rthdr.en", - .field_bit_size = 1, + .description = "def_ctxt_data", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_ieh_hop.en", - .field_bit_size = 1, + .description = "ctxt_opcode", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_ieh_1frag.en", - .field_bit_size = 1, + .description = "l2_cntxt_id", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_df.en", - .field_bit_size = 1, + .description = "parif", + .field_bit_size = 4, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, + /* class_tid: 2, , table: tunnel_cache.wr */ { - .description = "tl3_l3err.en", - .field_bit_size = 1, + .description = "rid", + .field_bit_size = 32, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, + BNXT_ULP_RF_IDX_RID & 0xff} }, { - .description = "tl4_l4type.en", - .field_bit_size = 1, + .description = "l2_cntxt_tcam_index", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl4_src.en", - .field_bit_size = 1, + .description = "l2_cntxt_id", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { - 1} + (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff} }, + /* class_tid: 2, , table: l2_cntxt_tcam.0 */ { - .description = "tl4_dst.en", - .field_bit_size = 1, + .description = "prof_func_id", + .field_bit_size = 7, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, .field_opr1 = { - 1} + (BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID & 0xff} }, { - .description = "tl4_flags.en", - .field_bit_size = 1, + .description = "ctxt_meta_prof", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl4_seq.en", - .field_bit_size = 1, + .description = "def_ctxt_data", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR & 0xff} }, { - .description = "tl4_pa.en", - .field_bit_size = 1, + .description = "ctxt_opcode", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + ULP_THOR_SYM_CTXT_OPCODE_NORMAL_FLOW} }, { - .description = "tl4_opt.en", - .field_bit_size = 1, + .description = "l2_cntxt_id", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff} }, { - .description = "tl4_tcpts.en", - .field_bit_size = 1, + .description = "parif", + .field_bit_size = 4, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_opr1 = { + (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff} }, + /* class_tid: 2, , table: mac_addr_cache.wr */ { - .description = "tl4_err.en", - .field_bit_size = 1, + .description = "rid", + .field_bit_size = 32, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, + BNXT_ULP_RF_IDX_RID & 0xff} }, { - .description = "tuntype.en", - .field_bit_size = 1, + .description = "l2_cntxt_tcam_index", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tflags.en", - .field_bit_size = 1, + .description = "l2_cntxt_id", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff} }, { - .description = "tids.en", - .field_bit_size = 1, + .description = "src_property_ptr", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, + /* class_tid: 2, , table: fkb_select.f2_l2_l3_l4_v6_em */ { - .description = "tid.en", + .description = "l2_cntxt_id.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, { - .description = "tctxts.en", + .description = "parif.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tctxt.en", + .description = "spif.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tqos.en", + .description = "svif.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "terr.en", + .description = "lcos.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_l2type.en", + .description = "meta.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_dmac.en", + .description = "rcyc_cnt.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_smac.en", + .description = "loopback.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_dt.en", + .description = "tl2_l2type.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_sa.en", + .description = "tl2_dmac.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_nvt.en", + .description = "tl2_smac.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_ovp.en", + .description = "tl2_dt.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_ovd.en", + .description = "tl2_sa.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_ovv.en", + .description = "tl2_nvt.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_ovt.en", + .description = "tl2_ovp.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_ivp.en", + .description = "tl2_ovd.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_ivd.en", + .description = "tl2_ovv.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_ivv.en", + .description = "tl2_ovt.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_ivt.en", + .description = "tl2_ivp.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_etype.en", + .description = "tl2_ivd.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_l3type.en", + .description = "tl2_ivv.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_sip.en", + .description = "tl2_ivt.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_sip_selcmp.en", + .description = "tl2_etype.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_dip.en", + .description = "tl3_l3type.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_dip_selcmp.en", + .description = "tl3_sip.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_ttl.en", + .description = "tl3_sip_selcmp.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_prot.en", + .description = "tl3_dip.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_fid.en", + .description = "tl3_dip_selcmp.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_qos.en", + .description = "tl3_ttl.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_ieh_nonext.en", + .description = "tl3_prot.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_ieh_esp.en", + .description = "tl3_fid.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_ieh_auth.en", + .description = "tl3_qos.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_ieh_dest.en", + .description = "tl3_ieh_nonext.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_ieh_frag.en", + .description = "tl3_ieh_esp.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_ieh_rthdr.en", + .description = "tl3_ieh_auth.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_ieh_hop.en", + .description = "tl3_ieh_dest.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_ieh_1frag.en", + .description = "tl3_ieh_frag.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_df.en", + .description = "tl3_ieh_rthdr.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_l3err.en", + .description = "tl3_ieh_hop.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_l4type.en", + .description = "tl3_ieh_1frag.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_src.en", + .description = "tl3_df.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_dst.en", + .description = "tl3_l3err.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_flags.en", + .description = "tl4_l4type.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_seq.en", + .description = "tl4_src.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_ack.en", + .description = "tl4_dst.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_win.en", + .description = "tl4_flags.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_pa.en", + .description = "tl4_seq.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_opt.en", + .description = "tl4_pa.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_tcpts.en", + .description = "tl4_opt.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_tsval.en", + .description = "tl4_tcpts.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_txecr.en", + .description = "tl4_err.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_err.en", + .description = "tuntype.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 1, , table: profile_tcam.l3_l4.ip */ { - .description = "wc_key_id", - .field_bit_size = 6, + .description = "tflags.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, - .field_opr1 = { - (BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0 >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0 & 0xff} - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_GLB_RF, - .field_opr2 = { - (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1 >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1 & 0xff}, - .field_src3 = BNXT_ULP_FIELD_SRC_GLB_RF, - .field_opr3 = { - (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "wc_search_en", + .description = "tids.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, .field_opr1 = { - 1} + (BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI & 0xff} }, { - .description = "em_key_type", - .field_bit_size = 2, + .description = "tid.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "em_key_id", - .field_bit_size = 6, + .description = "tctxts.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "em_profile_id", - .field_bit_size = 8, + .description = "tctxt.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "em_search_en", + .description = "tqos.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "pl_byp_lkup_en", + .description = "terr.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 1, , table: profile_tcam.l3_l4.vxlan */ { - .description = "wc_key_id", - .field_bit_size = 6, + .description = "l2_l2type.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, - .field_opr1 = { - (BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2 >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "wc_profile_id", - .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT, + .description = "l2_dmac.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, .field_opr1 = { - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_GLB_RF, - .field_opr2 = { - (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3 >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3 & 0xff}, - .field_src3 = BNXT_ULP_FIELD_SRC_GLB_RF, - .field_opr3 = { - (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2 >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2 & 0xff} + (BNXT_ULP_GLB_HF_ID_I_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_I_ETH_DMAC & 0xff} }, { - .description = "wc_search_en", + .description = "l2_smac.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, .field_opr1 = { - 1} + (BNXT_ULP_GLB_HF_ID_I_ETH_SMAC >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_I_ETH_SMAC & 0xff} }, { - .description = "em_key_type", - .field_bit_size = 2, + .description = "l2_dt.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "em_key_id", - .field_bit_size = 6, + .description = "l2_sa.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "em_profile_id", - .field_bit_size = 8, + .description = "l2_nvt.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "em_search_en", + .description = "l2_ovp.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "pl_byp_lkup_en", + .description = "l2_ovd.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 1, , table: profile_tcam_cache.wr */ - { - .description = "rid", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, - BNXT_ULP_RF_IDX_RID & 0xff} - }, - { - .description = "profile_tcam_index", - .field_bit_size = 10, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 & 0xff} - }, { - .description = "em_profile_id", - .field_bit_size = 8, + .description = "l2_ovv.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "em_key_id", - .field_bit_size = 8, + .description = "l2_ovt.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "wc_profile_id", - .field_bit_size = 8, + .description = "l2_ivp.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "wc_key_id", - .field_bit_size = 8, + .description = "l2_ivd.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "flow_sig_id", - .field_bit_size = 64, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, - .field_opr1 = { - (BNXT_ULP_CF_IDX_FLOW_SIG_ID >> 8) & 0xff, - BNXT_ULP_CF_IDX_FLOW_SIG_ID & 0xff} - }, - /* class_tid: 1, , table: wm.l3_l4.ipv4 */ - { - .description = "ctxt_data", - .field_bit_size = 14, + .description = "l2_ivv.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "meta_prof", - .field_bit_size = 3, + .description = "l2_ivt.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "opcode", - .field_bit_size = 3, + .description = "l2_etype.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "data", - .field_bit_size = 16, + .description = "l3_l3type.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "strength", - .field_bit_size = 2, + .description = "l3_sip.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, .field_opr1 = { - 1} + (BNXT_ULP_GLB_HF_ID_I_IPV6_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_I_IPV6_SRC_ADDR & 0xff} }, - /* class_tid: 1, , table: wm.l3_l4.ipv6 */ { - .description = "ctxt_data", - .field_bit_size = 14, + .description = "l3_sip_selcmp.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "meta_prof", - .field_bit_size = 3, + .description = "l3_dip.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, + .field_opr1 = { + (BNXT_ULP_GLB_HF_ID_I_IPV6_DST_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_I_IPV6_DST_ADDR & 0xff} }, { - .description = "opcode", - .field_bit_size = 3, + .description = "l3_dip_selcmp.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "data", - .field_bit_size = 16, + .description = "l3_ttl.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "strength", - .field_bit_size = 2, + .description = "l3_prot.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { - 1} + (BNXT_ULP_CF_IDX_I_L3_FB_PROTO_ID >> 8) & 0xff, + BNXT_ULP_CF_IDX_I_L3_FB_PROTO_ID & 0xff} }, - /* class_tid: 1, , table: wm.l3.ipv4 */ { - .description = "ctxt_data", - .field_bit_size = 14, + .description = "l3_fid.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "meta_prof", - .field_bit_size = 3, + .description = "l3_qos.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "opcode", - .field_bit_size = 3, + .description = "l3_ieh_nonext.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "data", - .field_bit_size = 16, + .description = "l3_ieh_esp.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "strength", - .field_bit_size = 2, + .description = "l3_ieh_auth.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 1, , table: wm.l3.ipv6 */ { - .description = "ctxt_data", - .field_bit_size = 14, + .description = "l3_ieh_dest.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "meta_prof", - .field_bit_size = 3, + .description = "l3_ieh_frag.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "opcode", - .field_bit_size = 3, + .description = "l3_ieh_rthdr.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "data", - .field_bit_size = 16, + .description = "l3_ieh_hop.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "strength", - .field_bit_size = 2, + .description = "l3_ieh_1frag.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 1, , table: wm.l2 */ { - .description = "ctxt_data", - .field_bit_size = 14, + .description = "l3_df.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "meta_prof", - .field_bit_size = 3, + .description = "l3_l3err.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "opcode", - .field_bit_size = 3, + .description = "l4_l4type.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "data", - .field_bit_size = 16, + .description = "l4_src.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { - (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} + (BNXT_ULP_CF_IDX_I_L4_FB_SRC_PORT >> 8) & 0xff, + BNXT_ULP_CF_IDX_I_L4_FB_SRC_PORT & 0xff} }, { - .description = "strength", - .field_bit_size = 2, + .description = "l4_dst.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { - 1} + (BNXT_ULP_CF_IDX_I_L4_FB_DST_PORT >> 8) & 0xff, + BNXT_ULP_CF_IDX_I_L4_FB_DST_PORT & 0xff} }, - /* class_tid: 1, , table: wm.l3_l4.vxlan.ipv4 */ { - .description = "ctxt_data", - .field_bit_size = 14, + .description = "l4_flags.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "meta_prof", - .field_bit_size = 3, + .description = "l4_seq.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "opcode", - .field_bit_size = 3, + .description = "l4_ack.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "data", - .field_bit_size = 16, + .description = "l4_win.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "strength", - .field_bit_size = 2, + .description = "l4_pa.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 1, , table: wm.l3_l4.vxlan.ipv6 */ { - .description = "ctxt_data", - .field_bit_size = 14, + .description = "l4_opt.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "meta_prof", - .field_bit_size = 3, + .description = "l4_tcpts.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "opcode", - .field_bit_size = 3, + .description = "l4_tsval.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "data", - .field_bit_size = 16, + .description = "l4_txecr.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "strength", - .field_bit_size = 2, + .description = "l4_err.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 2, , table: l2_cntxt_tcam.1 */ + /* class_tid: 2, , table: profile_tcam.f2_l2_l3_l4_v6_em */ { - .description = "prof_func_id", - .field_bit_size = 7, + .description = "wc_key_id", + .field_bit_size = 6, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ctxt_meta_prof", - .field_bit_size = 3, + .description = "wc_profile_id", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "def_ctxt_data", - .field_bit_size = 16, + .description = "wc_search_en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ctxt_opcode", - .field_bit_size = 3, + .description = "em_key_type", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_cntxt_id", - .field_bit_size = 10, + .description = "em_key_id", + .field_bit_size = 6, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_EM_KEY_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_EM_KEY_ID_0 & 0xff} }, { - .description = "parif", - .field_bit_size = 4, + .description = "em_profile_id", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff} + }, + { + .description = "em_search_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + }, + { + .description = "pl_byp_lkup_en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 2, , table: tunnel_cache.wr */ + /* class_tid: 2, , table: profile_tcam_cache.f2_l2_l3_l4_v6_wr */ { .description = "rid", .field_bit_size = 32, @@ -37420,103 +40884,98 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { BNXT_ULP_RF_IDX_RID & 0xff} }, { - .description = "l2_cntxt_tcam_index", + .description = "profile_tcam_index", .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 & 0xff} }, { - .description = "l2_cntxt_id", - .field_bit_size = 10, + .description = "em_profile_id", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { - (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff} + (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff} }, - /* class_tid: 2, , table: l2_cntxt_tcam.0 */ { - .description = "prof_func_id", - .field_bit_size = 7, + .description = "em_key_id", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { - (BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID & 0xff} + (BNXT_ULP_RF_IDX_EM_KEY_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_EM_KEY_ID_0 & 0xff} }, { - .description = "ctxt_meta_prof", - .field_bit_size = 3, + .description = "wc_profile_id", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "def_ctxt_data", - .field_bit_size = 16, + .description = "wc_key_id", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ctxt_opcode", - .field_bit_size = 3, + .description = "flow_sig_id", + .field_bit_size = 64, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { - ULP_THOR_SYM_CTXT_OPCODE_NORMAL_FLOW} + (BNXT_ULP_CF_IDX_FLOW_SIG_ID >> 8) & 0xff, + BNXT_ULP_CF_IDX_FLOW_SIG_ID & 0xff} }, + /* class_tid: 2, , table: em.f2_l2_l3_l4_v6.0 */ { - .description = "l2_cntxt_id", - .field_bit_size = 10, + .description = "valid", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff} + 1} }, { - .description = "parif", - .field_bit_size = 4, + .description = "strength", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff} + 3} }, - /* class_tid: 2, , table: mac_addr_cache.wr */ { - .description = "rid", - .field_bit_size = 32, + .description = "data", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { - (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, - BNXT_ULP_RF_IDX_RID & 0xff} + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} }, { - .description = "l2_cntxt_tcam_index", - .field_bit_size = 10, + .description = "opcode", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_cntxt_id", - .field_bit_size = 10, + .description = "meta_prof", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "src_property_ptr", - .field_bit_size = 10, + .description = "ctxt_data", + .field_bit_size = 14, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 2, , table: fkb_select.f2_l2_l3_l4_v6_em */ + /* class_tid: 2, , table: fkb_select.f2_wm */ { .description = "l2_cntxt_id.en", .field_bit_size = 1, @@ -37841,10 +41300,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "tids.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI >> 8) & 0xff, - BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI & 0xff} + 1} }, { .description = "tid.en", @@ -37886,19 +41344,17 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "l2_dmac.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_GLB_HF_ID_I_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_GLB_HF_ID_I_ETH_DMAC & 0xff} + 1} }, { .description = "l2_smac.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_GLB_HF_ID_I_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_GLB_HF_ID_I_ETH_SMAC & 0xff} + 1} }, { .description = "l2_dt.en", @@ -37982,10 +41438,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "l3_sip.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_GLB_HF_ID_I_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_GLB_HF_ID_I_IPV6_SRC_ADDR & 0xff} + 1} }, { .description = "l3_sip_selcmp.en", @@ -37997,10 +41452,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "l3_dip.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_GLB_HF_ID_I_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_GLB_HF_ID_I_IPV6_DST_ADDR & 0xff} + 1} }, { .description = "l3_dip_selcmp.en", @@ -38018,10 +41472,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "l3_prot.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_CF_IDX_I_L3_FB_PROTO_ID >> 8) & 0xff, - BNXT_ULP_CF_IDX_I_L3_FB_PROTO_ID & 0xff} + 1} }, { .description = "l3_fid.en", @@ -38105,19 +41558,17 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "l4_src.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_CF_IDX_I_L4_FB_SRC_PORT >> 8) & 0xff, - BNXT_ULP_CF_IDX_I_L4_FB_SRC_PORT & 0xff} + 1} }, { .description = "l4_dst.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_CF_IDX_I_L4_FB_DST_PORT >> 8) & 0xff, - BNXT_ULP_CF_IDX_I_L4_FB_DST_PORT & 0xff} + 1} }, { .description = "l4_flags.en", @@ -38179,24 +41630,46 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 2, , table: profile_tcam.f2_l2_l3_l4_v6_em */ + /* class_tid: 2, , table: profile_tcam.f2 */ { .description = "wc_key_id", .field_bit_size = 6, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr1 = { + (BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_4 >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_4 & 0xff} }, { .description = "wc_profile_id", .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr2 = { + (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_5 >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_5 & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr3 = { + (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4 >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4 & 0xff} }, { .description = "wc_search_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, { .description = "em_key_type", @@ -38208,27 +41681,19 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "em_key_id", .field_bit_size = 6, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_EM_KEY_ID_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_EM_KEY_ID_0 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "em_profile_id", .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "em_search_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "pl_byp_lkup_en", @@ -38236,7 +41701,7 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 2, , table: profile_tcam_cache.f2_l2_l3_l4_v6_wr */ + /* class_tid: 2, , table: profile_tcam_cache.f2_wr */ { .description = "rid", .field_bit_size = 32, @@ -38259,19 +41724,13 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "em_profile_id", .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "em_key_id", .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_EM_KEY_ID_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_EM_KEY_ID_0 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "wc_profile_id", @@ -38294,31 +41753,18 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { (BNXT_ULP_CF_IDX_FLOW_SIG_ID >> 8) & 0xff, BNXT_ULP_CF_IDX_FLOW_SIG_ID & 0xff} }, - /* class_tid: 2, , table: em.f2_l2_l3_l4_v6.0 */ - { - .description = "valid", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} - }, + /* class_tid: 2, , table: wm.l3_l4.ipv4 */ { - .description = "strength", - .field_bit_size = 2, + .description = "ctxt_data", + .field_bit_size = 14, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 3} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "data", - .field_bit_size = 16, + .description = "meta_prof", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "opcode", @@ -38327,18 +41773,23 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "meta_prof", - .field_bit_size = 3, + .description = "data", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} }, { - .description = "ctxt_data", - .field_bit_size = 14, + .description = "strength", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, - /* class_tid: 2, , table: fkb_select.f2_wm */ + /* class_tid: 3, , table: fkb_select.l2_l3_l4_v6_em */ { .description = "l2_cntxt_id.en", .field_bit_size = 1, @@ -38663,9 +42114,7 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "tids.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "tid.en", @@ -38707,17 +42156,19 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "l2_dmac.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, .field_opr1 = { - 1} + (BNXT_ULP_GLB_HF_ID_O_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_ETH_DMAC & 0xff} }, { .description = "l2_smac.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, .field_opr1 = { - 1} + (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff} }, { .description = "l2_dt.en", @@ -38776,8 +42227,22 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { { .description = "l2_ivv.en", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_FIELD_BIT, + .field_opr2 = { + (BNXT_ULP_GLB_HF_ID_OO_VLAN_VID >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_OO_VLAN_VID & 0xff}, + .field_src3 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "l2_ivt.en", @@ -38801,9 +42266,10 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "l3_sip.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, .field_opr1 = { - 1} + (BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR & 0xff} }, { .description = "l3_sip_selcmp.en", @@ -38815,9 +42281,10 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "l3_dip.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, .field_opr1 = { - 1} + (BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR & 0xff} }, { .description = "l3_dip_selcmp.en", @@ -38835,9 +42302,10 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "l3_prot.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { - 1} + (BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID >> 8) & 0xff, + BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID & 0xff} }, { .description = "l3_fid.en", @@ -38921,17 +42389,19 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "l4_src.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { - 1} + (BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT >> 8) & 0xff, + BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT & 0xff} }, { .description = "l4_dst.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { - 1} + (BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT >> 8) & 0xff, + BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT & 0xff} }, { .description = "l4_flags.en", @@ -38993,46 +42463,24 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 2, , table: profile_tcam.f2 */ + /* class_tid: 3, , table: profile_tcam.l2_l3_l4_v6_em */ { .description = "wc_key_id", .field_bit_size = 6, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, - .field_opr1 = { - (BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_4 >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_4 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "wc_profile_id", .field_bit_size = 8, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT, - .field_opr1 = { - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_GLB_RF, - .field_opr2 = { - (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_5 >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_5 & 0xff}, - .field_src3 = BNXT_ULP_FIELD_SRC_GLB_RF, - .field_opr3 = { - (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4 >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4 & 0xff} + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "wc_search_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "em_key_type", @@ -39044,19 +42492,27 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "em_key_id", .field_bit_size = 6, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_EM_KEY_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_EM_KEY_ID_0 & 0xff} }, { .description = "em_profile_id", .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff} }, { .description = "em_search_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, { .description = "pl_byp_lkup_en", @@ -39064,7 +42520,7 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 2, , table: profile_tcam_cache.f2_wr */ + /* class_tid: 3, , table: profile_tcam_cache.l2_l3_l4_v6_wr */ { .description = "rid", .field_bit_size = 32, @@ -39087,13 +42543,19 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "em_profile_id", .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff} }, { .description = "em_key_id", .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_EM_KEY_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_EM_KEY_ID_0 & 0xff} }, { .description = "wc_profile_id", @@ -39116,24 +42578,22 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { (BNXT_ULP_CF_IDX_FLOW_SIG_ID >> 8) & 0xff, BNXT_ULP_CF_IDX_FLOW_SIG_ID & 0xff} }, - /* class_tid: 2, , table: wm.l3_l4.ipv4 */ - { - .description = "ctxt_data", - .field_bit_size = 14, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, + /* class_tid: 3, , table: em.l2_l3_l4_v6.0 */ { - .description = "meta_prof", - .field_bit_size = 3, + .description = "valid", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, { - .description = "opcode", - .field_bit_size = 3, + .description = "strength", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 3} }, { .description = "data", @@ -39145,14 +42605,24 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} }, { - .description = "strength", - .field_bit_size = 2, + .description = "opcode", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 3, , table: fkb_select.l2_l3_l4_v6_em */ + { + .description = "meta_prof", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "ctxt_data", + .field_bit_size = 14, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + /* class_tid: 3, , table: fkb_select.l3_l4_wc */ { .description = "l2_cntxt_id.en", .field_bit_size = 1, @@ -39519,19 +42989,17 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "l2_dmac.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_GLB_HF_ID_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_GLB_HF_ID_O_ETH_DMAC & 0xff} + 1} }, { .description = "l2_smac.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff} + 1} }, { .description = "l2_dt.en", @@ -39590,22 +43058,10 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { { .description = "l2_ivv.en", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, - .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff}, - .field_src2 = BNXT_ULP_FIELD_SRC_FIELD_BIT, - .field_opr2 = { - (BNXT_ULP_GLB_HF_ID_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_GLB_HF_ID_OO_VLAN_VID & 0xff}, - .field_src3 = BNXT_ULP_FIELD_SRC_ZERO + 1} }, { .description = "l2_ivt.en", @@ -39629,10 +43085,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "l3_sip.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR & 0xff} + 1} }, { .description = "l3_sip_selcmp.en", @@ -39644,10 +43099,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "l3_dip.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR & 0xff} + 1} }, { .description = "l3_dip_selcmp.en", @@ -39665,10 +43119,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "l3_prot.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID & 0xff} + 1} }, { .description = "l3_fid.en", @@ -39752,19 +43205,17 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "l4_src.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT & 0xff} + 1} }, { .description = "l4_dst.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT & 0xff} + 1} }, { .description = "l4_flags.en", @@ -39826,24 +43277,32 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 3, , table: profile_tcam.l2_l3_l4_v6_em */ + /* class_tid: 3, , table: profile_tcam.l3_l4.ip */ { .description = "wc_key_id", .field_bit_size = 6, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr1 = { + (BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1 >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1 & 0xff} }, { .description = "wc_profile_id", .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr1 = { + (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1 >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1 & 0xff} }, { .description = "wc_search_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, { .description = "em_key_type", @@ -39855,35 +43314,84 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "em_key_id", .field_bit_size = 6, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_EM_KEY_ID_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_EM_KEY_ID_0 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "em_profile_id", .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "em_search_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "pl_byp_lkup_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + /* class_tid: 3, , table: profile_tcam.l3_l4.nonip */ + { + .description = "wc_key_id", + .field_bit_size = 6, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr1 = { + (BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1 >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1 & 0xff} + }, + { + .description = "wc_profile_id", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr1 = { + (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1 >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1 & 0xff} + }, + { + .description = "wc_search_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { 1} }, { + .description = "em_key_type", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "em_key_id", + .field_bit_size = 6, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "em_profile_id", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "em_search_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { .description = "pl_byp_lkup_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 3, , table: profile_tcam_cache.l2_l3_l4_v6_wr */ + /* class_tid: 3, , table: profile_tcam_cache.wr */ { .description = "rid", .field_bit_size = 32, @@ -39906,19 +43414,13 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "em_profile_id", .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "em_key_id", .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_EM_KEY_ID_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_EM_KEY_ID_0 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "wc_profile_id", @@ -39941,14 +43443,33 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { (BNXT_ULP_CF_IDX_FLOW_SIG_ID >> 8) & 0xff, BNXT_ULP_CF_IDX_FLOW_SIG_ID & 0xff} }, - /* class_tid: 3, , table: em.l2_l3_l4_v6.0 */ + /* class_tid: 3, , table: wm.l3_l4.ipv4 */ { - .description = "valid", - .field_bit_size = 1, + .description = "ctxt_data", + .field_bit_size = 14, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "meta_prof", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "opcode", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "data", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { - 1} + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} }, { .description = "strength", @@ -39956,7 +43477,26 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - 3} + 1} + }, + /* class_tid: 3, , table: wm.l3.ipv4 */ + { + .description = "ctxt_data", + .field_bit_size = 14, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "meta_prof", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "opcode", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "data", @@ -39968,8 +43508,17 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} }, { - .description = "opcode", - .field_bit_size = 3, + .description = "strength", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + }, + /* class_tid: 3, , table: wm.l2 */ + { + .description = "ctxt_data", + .field_bit_size = 14, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, @@ -39980,384 +43529,625 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ctxt_data", - .field_bit_size = 14, + .description = "opcode", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 3, , table: fkb_select.l3_l4_wc */ { - .description = "l2_cntxt_id.en", - .field_bit_size = 1, + .description = "data", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} + }, + { + .description = "strength", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { 1} }, + /* class_tid: 4, , table: int_full_act_record.0 */ { - .description = "parif.en", - .field_bit_size = 1, + .description = "sp_rec_ptr", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "spif.en", - .field_bit_size = 1, + .description = "encap_ptr", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "svif.en", - .field_bit_size = 1, + .description = "mod_rec_ptr", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "lcos.en", - .field_bit_size = 1, + .description = "rsvd1", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "meta.en", - .field_bit_size = 1, + .description = "rsvd0", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "rcyc_cnt.en", - .field_bit_size = 1, + .description = "decap_func", + .field_bit_size = 5, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "loopback.en", - .field_bit_size = 1, + .description = "meter", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_l2type.en", + .description = "stats_op", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + }, + { + .description = "stats_ptr", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_dmac.en", + .description = "vnic_or_vport", + .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_opr1 = { + (BNXT_ULP_CF_IDX_DRV_FUNC_VNIC >> 8) & 0xff, + BNXT_ULP_CF_IDX_DRV_FUNC_VNIC & 0xff} + }, + { + .description = "use_default", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_smac.en", - .field_bit_size = 1, + .description = "mirror", + .field_bit_size = 4, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_dt.en", + .description = "cond_copy", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_sa.en", - .field_bit_size = 1, + .description = "vlan_del_rpt", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_nvt.en", + .description = "drop", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_ovp.en", + .description = "hit", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_ovd.en", - .field_bit_size = 1, + .description = "type", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + }, + /* class_tid: 4, , table: port_table.ing_wr_0 */ + { + .description = "rid", + .field_bit_size = 32, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_ovv.en", - .field_bit_size = 1, + .description = "drv_func.mac", + .field_bit_size = 48, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_ovt.en", - .field_bit_size = 1, + .description = "drv_func.parent.mac", + .field_bit_size = 48, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_ivp.en", - .field_bit_size = 1, + .description = "phy_port", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_ivd.en", + .description = "port_is_pf", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_ivv.en", - .field_bit_size = 1, + .description = "default_arec_ptr", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR & 0xff} + }, + /* class_tid: 4, , table: l2_cntxt_tcam.ing_0 */ + { + .description = "prof_func_id", + .field_bit_size = 7, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr1 = { + (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff} + }, + { + .description = "ctxt_meta_prof", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_ivt.en", - .field_bit_size = 1, + .description = "def_ctxt_data", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR & 0xff} + }, + { + .description = "ctxt_opcode", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + ULP_THOR_SYM_CTXT_OPCODE_NORMAL_FLOW} + }, + { + .description = "l2_cntxt_id", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff} + }, + { + .description = "parif", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_opr1 = { + (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff} + }, + /* class_tid: 4, , table: l2_cntxt_tcam_cache.ing_wr */ + { + .description = "rid", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, + BNXT_ULP_RF_IDX_RID & 0xff} + }, + { + .description = "l2_cntxt_tcam_index", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0 & 0xff} + }, + { + .description = "l2_cntxt_id", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff} + }, + { + .description = "src_property_ptr", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, + /* class_tid: 4, , table: parif_def_arec_ptr.ing_0 */ { - .description = "tl2_etype.en", - .field_bit_size = 1, + .description = "act_rec_ptr", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR & 0xff} + }, + /* class_tid: 4, , table: parif_def_err_arec_ptr.ing_0 */ + { + .description = "act_rec_ptr", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR & 0xff} + }, + /* class_tid: 4, , table: int_full_act_record.egr_0 */ + { + .description = "sp_rec_ptr", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_l3type.en", + .description = "encap_ptr", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "mod_rec_ptr", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "rsvd1", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "rsvd0", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "decap_func", + .field_bit_size = 5, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "meter", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "stats_op", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + }, + { + .description = "stats_ptr", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_sip.en", + .description = "vnic_or_vport", + .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_opr1 = { + (BNXT_ULP_CF_IDX_PHY_PORT_VPORT >> 8) & 0xff, + BNXT_ULP_CF_IDX_PHY_PORT_VPORT & 0xff} + }, + { + .description = "use_default", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_sip_selcmp.en", - .field_bit_size = 1, + .description = "mirror", + .field_bit_size = 4, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_dip.en", + .description = "cond_copy", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_dip_selcmp.en", - .field_bit_size = 1, + .description = "vlan_del_rpt", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_ttl.en", + .description = "drop", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_prot.en", + .description = "hit", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_fid.en", - .field_bit_size = 1, + .description = "type", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, + /* class_tid: 4, , table: port_table.egr_wr_0 */ { - .description = "tl3_qos.en", - .field_bit_size = 1, + .description = "rid", + .field_bit_size = 32, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_ieh_nonext.en", - .field_bit_size = 1, + .description = "drv_func.mac", + .field_bit_size = 48, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_ieh_esp.en", - .field_bit_size = 1, + .description = "drv_func.parent.mac", + .field_bit_size = 48, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_ieh_auth.en", - .field_bit_size = 1, + .description = "phy_port", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_ieh_dest.en", + .description = "port_is_pf", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_ieh_frag.en", - .field_bit_size = 1, + .description = "default_arec_ptr", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} }, + /* class_tid: 4, , table: ilt_tbl.egr_vfr */ { - .description = "tl3_ieh_rthdr.en", - .field_bit_size = 1, + .description = "ilt_destination", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_ieh_hop.en", - .field_bit_size = 1, + .description = "act_rec_ptr", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_ieh_1frag.en", - .field_bit_size = 1, + .description = "fwd_op", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + ULP_THOR_SYM_FWD_OP_BYPASS_LKUP} }, { - .description = "tl3_df.en", + .description = "en_ilt_dest", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_l3err.en", + .description = "en_bd_action", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, { - .description = "tl4_l4type.en", + .description = "en_bd_meta", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl4_src.en", - .field_bit_size = 1, + .description = "parif", + .field_bit_size = 4, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_opr1 = { + (BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff} }, { - .description = "tl4_dst.en", - .field_bit_size = 1, + .description = "reserved", + .field_bit_size = 23, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, + /* class_tid: 4, , table: l2_cntxt_tcam_cache.egr_wr_vfr */ { - .description = "tl4_flags.en", - .field_bit_size = 1, + .description = "rid", + .field_bit_size = 32, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, + BNXT_ULP_RF_IDX_RID & 0xff} }, { - .description = "tl4_seq.en", - .field_bit_size = 1, + .description = "l2_cntxt_tcam_index", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl4_pa.en", - .field_bit_size = 1, + .description = "l2_cntxt_id", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl4_opt.en", - .field_bit_size = 1, + .description = "src_property_ptr", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, + /* class_tid: 4, , table: l2_cntxt_tcam.egr_0 */ { - .description = "tl4_tcpts.en", - .field_bit_size = 1, + .description = "prof_func_id", + .field_bit_size = 7, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr1 = { + (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff} }, { - .description = "tl4_err.en", - .field_bit_size = 1, + .description = "ctxt_meta_prof", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tuntype.en", - .field_bit_size = 1, + .description = "def_ctxt_data", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} }, { - .description = "tflags.en", - .field_bit_size = 1, + .description = "ctxt_opcode", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + ULP_THOR_SYM_CTXT_OPCODE_NORMAL_FLOW} }, { - .description = "tids.en", - .field_bit_size = 1, + .description = "l2_cntxt_id", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff} }, { - .description = "tid.en", - .field_bit_size = 1, + .description = "parif", + .field_bit_size = 4, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_opr1 = { + (BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff} }, + /* class_tid: 4, , table: l2_cntxt_tcam_cache.egr_wr */ { - .description = "tctxts.en", - .field_bit_size = 1, + .description = "rid", + .field_bit_size = 32, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, + BNXT_ULP_RF_IDX_RID & 0xff} }, { - .description = "tctxt.en", - .field_bit_size = 1, + .description = "l2_cntxt_tcam_index", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0 & 0xff} }, { - .description = "tqos.en", - .field_bit_size = 1, + .description = "l2_cntxt_id", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff} }, { - .description = "terr.en", - .field_bit_size = 1, + .description = "src_property_ptr", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, + /* class_tid: 4, , table: parif_def_arec_ptr.egr_0 */ { - .description = "l2_l2type.en", - .field_bit_size = 1, + .description = "act_rec_ptr", + .field_bit_size = 32, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} }, + /* class_tid: 4, , table: parif_def_err_arec_ptr.egr_0 */ { - .description = "l2_dmac.en", - .field_bit_size = 1, + .description = "act_rec_ptr", + .field_bit_size = 32, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { - 1} + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} }, + /* class_tid: 5, , table: mod_record.vf_2_vfr_egr */ { - .description = "l2_smac.en", + .description = "metadata_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_CONST, @@ -40365,317 +44155,403 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { 1} }, { - .description = "l2_dt.en", + .description = "rem_ovlan", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_sa.en", + .description = "rem_ivlan", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_nvt.en", + .description = "rep_add_ivlan", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_ovp.en", + .description = "rep_add_ovlan", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_ovd.en", + .description = "ttl_update", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_ovv.en", + .description = "tun_md_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_ovt.en", + .description = "reserved_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_ivp.en", + .description = "l2_dmac_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_ivd.en", + .description = "l2_smac_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_ivv.en", + .description = "l3_sip_ipv6_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_ivt.en", + .description = "l3_dip_ipv6_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_etype.en", + .description = "l3_sip_ipv4_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_l3type.en", + .description = "l3_dip_ipv4_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_sip.en", + .description = "l4_sport_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_sip_selcmp.en", + .description = "l4_dport_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_dip.en", - .field_bit_size = 1, + .description = "metadata_data", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - 1} + (ULP_THOR_SYM_VF_2_VFR_META_VAL >> 8) & 0xff, + ULP_THOR_SYM_VF_2_VFR_META_VAL & 0xff} }, { - .description = "l3_dip_selcmp.en", - .field_bit_size = 1, + .description = "metadata_rsvd", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_ttl.en", - .field_bit_size = 1, + .description = "metadata_op", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_prot.en", - .field_bit_size = 1, + .description = "metadata_prof", + .field_bit_size = 4, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_fid.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "ivlan_tpid", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_qos.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "ivlan_pri", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_ieh_nonext.en", + .description = "ivlan_de", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_ieh_esp.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "ivlan_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_ieh_auth.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "ovlan_tpid", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_ieh_dest.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "ovlan_pri", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_ieh_frag.en", + .description = "ovlan_de", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_ieh_rthdr.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "ovlan_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_ieh_hop.en", + .description = "alt_pfid", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "alt_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ttl_rsvd", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "ttl_tl3_dec", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_ieh_1frag.en", + .description = "ttl_il3_dec", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_df.en", + .description = "ttl_tl3_rdir", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_l3err.en", + .description = "ttl_il3_rdir", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "tun_new_prot", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "tun_ex_prot", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "tun_mv", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "reserved", + .field_bit_size = 0, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l2_dmac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l2_smac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l3_sip_ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l3_dip_ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l3_sip_ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l3_dip_ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l4_sport", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + { + .description = "l4_dport", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + /* class_tid: 5, , table: int_full_act_record.vf_2_vfr_loopback */ + { + .description = "sp_rec_ptr", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_l4type.en", - .field_bit_size = 1, + .description = "encap_ptr", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_src.en", - .field_bit_size = 1, + .description = "mod_rec_ptr", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, .field_opr1 = { - 1} + (BNXT_ULP_GLB_RF_IDX_GLB_MODIFY_PTR >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_MODIFY_PTR & 0xff} }, { - .description = "l4_dst.en", - .field_bit_size = 1, + .description = "rsvd1", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_flags.en", - .field_bit_size = 1, + .description = "rsvd0", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_seq.en", - .field_bit_size = 1, + .description = "decap_func", + .field_bit_size = 5, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_ack.en", - .field_bit_size = 1, + .description = "meter", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_win.en", + .description = "stats_op", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + }, + { + .description = "stats_ptr", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_pa.en", + .description = "vnic_or_vport", + .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + (ULP_THOR_SYM_LOOPBACK_PORT >> 8) & 0xff, + ULP_THOR_SYM_LOOPBACK_PORT & 0xff} + }, + { + .description = "use_default", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_opt.en", - .field_bit_size = 1, + .description = "mirror", + .field_bit_size = 4, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_tcpts.en", + .description = "cond_copy", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_tsval.en", - .field_bit_size = 1, + .description = "vlan_del_rpt", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_txecr.en", + .description = "drop", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_err.en", + .description = "hit", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 3, , table: profile_tcam.l3_l4.ip */ { - .description = "wc_key_id", - .field_bit_size = 6, + .description = "type", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1 >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1 & 0xff} + 1} }, + /* class_tid: 5, , table: parif_def_arec_ptr.vf_egr */ { - .description = "wc_profile_id", - .field_bit_size = 8, + .description = "act_rec_ptr", + .field_bit_size = 32, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, .field_opr1 = { - (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1 >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1 & 0xff} + (BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR & 0xff} }, + /* class_tid: 5, , table: parif_def_err_arec_ptr.vf_egr */ { - .description = "wc_search_en", - .field_bit_size = 1, + .description = "act_rec_ptr", + .field_bit_size = 32, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, .field_opr1 = { - 1} + (BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR & 0xff} }, + /* class_tid: 5, , table: profile_tcam_cache.vfr_glb_act_rec_wr */ { - .description = "em_key_type", - .field_bit_size = 2, + .description = "rid", + .field_bit_size = 32, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, + BNXT_ULP_RF_IDX_RID & 0xff} }, { - .description = "em_key_id", - .field_bit_size = 6, + .description = "profile_tcam_index", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, @@ -40686,75 +44562,80 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "em_search_en", - .field_bit_size = 1, + .description = "em_key_id", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, + .description = "wc_profile_id", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 3, , table: profile_tcam.l3_l4.nonip */ { .description = "wc_key_id", - .field_bit_size = 6, + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, - .field_opr1 = { - (BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1 >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "wc_profile_id", - .field_bit_size = 8, + .description = "flow_sig_id", + .field_bit_size = 64, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, - .field_opr1 = { - (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1 >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, + /* class_tid: 5, , table: l2_cntxt_tcam.vf_egr */ { - .description = "wc_search_en", - .field_bit_size = 1, + .description = "prof_func_id", + .field_bit_size = 7, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, .field_opr1 = { - 1} + (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff} }, { - .description = "em_key_type", - .field_bit_size = 2, + .description = "ctxt_meta_prof", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "em_key_id", - .field_bit_size = 6, + .description = "def_ctxt_data", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr1 = { + (BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR & 0xff} }, { - .description = "em_profile_id", - .field_bit_size = 8, + .description = "ctxt_opcode", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + ULP_THOR_SYM_CTXT_OPCODE_NORMAL_FLOW} }, { - .description = "em_search_en", - .field_bit_size = 1, + .description = "l2_cntxt_id", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff} }, { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, + .description = "parif", + .field_bit_size = 4, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + ULP_THOR_SYM_LOOPBACK_PARIF} }, - /* class_tid: 3, , table: profile_tcam_cache.wr */ + /* class_tid: 5, , table: l2_cntxt_tcam_cache.vf_egr_wr */ { .description = "rid", .field_bit_size = 32, @@ -40765,156 +44646,140 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { BNXT_ULP_RF_IDX_RID & 0xff} }, { - .description = "profile_tcam_index", + .description = "l2_cntxt_tcam_index", .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { - (BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 & 0xff} + (BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0 & 0xff} }, { - .description = "em_profile_id", - .field_bit_size = 8, + .description = "l2_cntxt_id", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff} }, { - .description = "em_key_id", - .field_bit_size = 8, + .description = "src_property_ptr", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, + /* class_tid: 5, , table: int_full_act_record.vf_2_vfr_ing */ { - .description = "wc_profile_id", - .field_bit_size = 8, + .description = "sp_rec_ptr", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "wc_key_id", - .field_bit_size = 8, + .description = "encap_ptr", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "flow_sig_id", - .field_bit_size = 64, + .description = "mod_rec_ptr", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, - .field_opr1 = { - (BNXT_ULP_CF_IDX_FLOW_SIG_ID >> 8) & 0xff, - BNXT_ULP_CF_IDX_FLOW_SIG_ID & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 3, , table: wm.l3_l4.ipv4 */ { - .description = "ctxt_data", - .field_bit_size = 14, + .description = "rsvd1", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "meta_prof", - .field_bit_size = 3, + .description = "rsvd0", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "opcode", - .field_bit_size = 3, + .description = "decap_func", + .field_bit_size = 5, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "data", - .field_bit_size = 16, + .description = "meter", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "strength", - .field_bit_size = 2, + .description = "stats_op", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { 1} }, - /* class_tid: 3, , table: wm.l3.ipv4 */ { - .description = "ctxt_data", - .field_bit_size = 14, + .description = "stats_ptr", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "meta_prof", - .field_bit_size = 3, + .description = "vnic_or_vport", + .field_bit_size = 11, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_opr1 = { + (BNXT_ULP_CF_IDX_DRV_FUNC_VNIC >> 8) & 0xff, + BNXT_ULP_CF_IDX_DRV_FUNC_VNIC & 0xff} }, { - .description = "opcode", - .field_bit_size = 3, + .description = "use_default", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "data", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} - }, - { - .description = "strength", - .field_bit_size = 2, + .description = "mirror", + .field_bit_size = 4, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 3, , table: wm.l2 */ { - .description = "ctxt_data", - .field_bit_size = 14, + .description = "cond_copy", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "meta_prof", - .field_bit_size = 3, + .description = "vlan_del_rpt", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "opcode", - .field_bit_size = 3, + .description = "drop", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "data", - .field_bit_size = 16, + .description = "hit", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "strength", - .field_bit_size = 2, + .description = "type", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { 1} }, - /* class_tid: 4, , table: int_full_act_record.0 */ + /* class_tid: 5, , table: int_full_act_record.drop_action */ { .description = "sp_rec_ptr", .field_bit_size = 16, @@ -40975,10 +44840,7 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "vnic_or_vport", .field_bit_size = 11, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, - .field_opr1 = { - (BNXT_ULP_CF_IDX_DRV_FUNC_VNIC >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_VNIC & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "use_default", @@ -41008,7 +44870,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "drop", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, { .description = "hit", @@ -41024,49 +44888,66 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .field_opr1 = { 1} }, - /* class_tid: 4, , table: port_table.ing_wr_0 */ + /* class_tid: 5, , table: l2_cntxt_tcam.vf_2_vfr_ing.0 */ { - .description = "rid", - .field_bit_size = 32, + .description = "prof_func_id", + .field_bit_size = 7, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr1 = { + (BNXT_ULP_GLB_RF_IDX_VF_2_VFR_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_VF_2_VFR_PROF_FUNC_ID & 0xff} }, { - .description = "drv_func.mac", - .field_bit_size = 48, + .description = "ctxt_meta_prof", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "drv_func.parent.mac", - .field_bit_size = 48, + .description = "def_ctxt_data", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr1 = { + (BNXT_ULP_GLB_RF_IDX_GLB_DROP_AREC_PTR >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_DROP_AREC_PTR & 0xff} }, { - .description = "phy_port", - .field_bit_size = 8, + .description = "ctxt_opcode", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + ULP_THOR_SYM_CTXT_OPCODE_NORMAL_FLOW} }, { - .description = "default_arec_ptr", - .field_bit_size = 16, + .description = "l2_cntxt_id", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { - (BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR & 0xff} + (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff} }, - /* class_tid: 4, , table: l2_cntxt_tcam.ing_0 */ + { + .description = "parif", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_opr1 = { + (BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff} + }, + /* class_tid: 5, , table: l2_cntxt_tcam.vfr_2_vf_ing.0 */ { .description = "prof_func_id", .field_bit_size = 7, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, .field_opr1 = { - (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff} + (BNXT_ULP_GLB_RF_IDX_ANY_2_VF_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_ANY_2_VF_PROF_FUNC_ID & 0xff} }, { .description = "ctxt_meta_prof", @@ -41078,10 +44959,10 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .description = "def_ctxt_data", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, .field_opr1 = { - (BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR & 0xff} + (BNXT_ULP_GLB_RF_IDX_GLB_DROP_AREC_PTR >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_DROP_AREC_PTR & 0xff} }, { .description = "ctxt_opcode", @@ -41097,8 +44978,8 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { - (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff} + (BNXT_ULP_RF_IDX_L2_CNTXT_ID_1 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_1 & 0xff} }, { .description = "parif", @@ -41106,2052 +44987,2064 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff} + (BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff} }, - /* class_tid: 4, , table: l2_cntxt_tcam_cache.ing_wr */ + /* class_tid: 5, , table: fkb_select.vfr_em */ { - .description = "rid", - .field_bit_size = 32, + .description = "l2_cntxt_id.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, - BNXT_ULP_RF_IDX_RID & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_cntxt_tcam_index", - .field_bit_size = 10, + .description = "parif.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_cntxt_id", - .field_bit_size = 10, + .description = "spif.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "svif.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff} + 1} }, { - .description = "src_property_ptr", - .field_bit_size = 10, + .description = "lcos.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 4, , table: parif_def_arec_ptr.ing_0 */ { - .description = "act_rec_ptr", - .field_bit_size = 32, + .description = "meta.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR & 0xff} + 1} }, - /* class_tid: 4, , table: parif_def_err_arec_ptr.ing_0 */ { - .description = "act_rec_ptr", - .field_bit_size = 32, + .description = "rcyc_cnt.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 4, , table: int_full_act_record.egr_0 */ { - .description = "sp_rec_ptr", - .field_bit_size = 16, + .description = "loopback.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "encap_ptr", - .field_bit_size = 16, + .description = "tl2_l2type.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "mod_rec_ptr", - .field_bit_size = 16, + .description = "tl2_dmac.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "rsvd1", - .field_bit_size = 16, + .description = "tl2_smac.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "rsvd0", - .field_bit_size = 8, + .description = "tl2_dt.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "decap_func", - .field_bit_size = 5, + .description = "tl2_sa.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "meter", - .field_bit_size = 10, + .description = "tl2_nvt.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "stats_op", + .description = "tl2_ovp.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "stats_ptr", - .field_bit_size = 16, + .description = "tl2_ovd.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "vnic_or_vport", - .field_bit_size = 11, + .description = "tl2_ovv.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, - .field_opr1 = { - (BNXT_ULP_CF_IDX_PHY_PORT_VPORT >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_VPORT & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl2_ovt.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl2_ivp.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl2_ivd.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl2_ivv.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl2_ivt.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl2_etype.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_l3type.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_sip.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_sip_selcmp.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_dip.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_dip_selcmp.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_ttl.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_prot.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_fid.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_qos.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_ieh_nonext.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_ieh_esp.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_ieh_auth.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_ieh_dest.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_ieh_frag.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "use_default", + .description = "tl3_ieh_rthdr.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "mirror", - .field_bit_size = 4, + .description = "tl3_ieh_hop.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "cond_copy", + .description = "tl3_ieh_1frag.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "vlan_del_rpt", - .field_bit_size = 2, + .description = "tl3_df.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "drop", + .description = "tl3_l3err.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "hit", + .description = "tl4_l4type.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "type", - .field_bit_size = 3, + .description = "tl4_src.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 4, , table: port_table.egr_wr_0 */ { - .description = "rid", - .field_bit_size = 32, + .description = "tl4_dst.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "drv_func.mac", - .field_bit_size = 48, + .description = "tl4_flags.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "drv_func.parent.mac", - .field_bit_size = 48, + .description = "tl4_seq.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "phy_port", - .field_bit_size = 8, + .description = "tl4_pa.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "default_arec_ptr", - .field_bit_size = 16, + .description = "tl4_opt.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 4, , table: ilt_tbl.egr_vfr */ { - .description = "ilt_destination", - .field_bit_size = 16, + .description = "tl4_tcpts.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "act_rec_ptr", - .field_bit_size = 16, + .description = "tl4_err.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "fwd_op", - .field_bit_size = 2, + .description = "tuntype.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - ULP_THOR_SYM_FWD_OP_BYPASS_LKUP} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "en_ilt_dest", + .description = "tflags.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "en_bd_action", + .description = "tids.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "en_bd_meta", + .description = "tid.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "parif", - .field_bit_size = 4, + .description = "tctxts.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, - .field_opr1 = { - (BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "reserved", - .field_bit_size = 23, + .description = "tctxt.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 4, , table: l2_cntxt_tcam_cache.egr_wr_vfr */ { - .description = "rid", - .field_bit_size = 32, + .description = "tqos.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, - BNXT_ULP_RF_IDX_RID & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_cntxt_tcam_index", - .field_bit_size = 10, + .description = "terr.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_cntxt_id", - .field_bit_size = 10, + .description = "l2_l2type.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "src_property_ptr", - .field_bit_size = 10, + .description = "l2_dmac.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 4, , table: l2_cntxt_tcam.egr_0 */ { - .description = "prof_func_id", - .field_bit_size = 7, + .description = "l2_smac.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, - .field_opr1 = { - (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ctxt_meta_prof", - .field_bit_size = 3, + .description = "l2_dt.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "def_ctxt_data", - .field_bit_size = 16, + .description = "l2_sa.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ctxt_opcode", - .field_bit_size = 3, + .description = "l2_nvt.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - ULP_THOR_SYM_CTXT_OPCODE_NORMAL_FLOW} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_cntxt_id", - .field_bit_size = 10, + .description = "l2_ovp.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "parif", - .field_bit_size = 4, + .description = "l2_ovd.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, - .field_opr1 = { - (BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 4, , table: l2_cntxt_tcam_cache.egr_wr */ { - .description = "rid", - .field_bit_size = 32, + .description = "l2_ovv.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, - BNXT_ULP_RF_IDX_RID & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_cntxt_tcam_index", - .field_bit_size = 10, + .description = "l2_ovt.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_cntxt_id", - .field_bit_size = 10, + .description = "l2_ivp.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "src_property_ptr", - .field_bit_size = 10, + .description = "l2_ivd.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 4, , table: parif_def_arec_ptr.egr_0 */ { - .description = "act_rec_ptr", - .field_bit_size = 32, + .description = "l2_ivv.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 4, , table: parif_def_err_arec_ptr.egr_0 */ { - .description = "act_rec_ptr", - .field_bit_size = 32, + .description = "l2_ivt.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 5, , table: int_full_act_record.loopback */ { - .description = "sp_rec_ptr", - .field_bit_size = 16, + .description = "l2_etype.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "encap_ptr", - .field_bit_size = 16, + .description = "l3_l3type.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "mod_rec_ptr", - .field_bit_size = 16, + .description = "l3_sip.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "rsvd1", - .field_bit_size = 16, + .description = "l3_sip_selcmp.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "rsvd0", - .field_bit_size = 8, + .description = "l3_dip.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "decap_func", - .field_bit_size = 5, + .description = "l3_dip_selcmp.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "meter", - .field_bit_size = 10, + .description = "l3_ttl.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "stats_op", + .description = "l3_prot.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "stats_ptr", - .field_bit_size = 16, + .description = "l3_fid.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "vnic_or_vport", - .field_bit_size = 11, + .description = "l3_qos.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - (ULP_THOR_SYM_LOOPBACK_PORT >> 8) & 0xff, - ULP_THOR_SYM_LOOPBACK_PORT & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "use_default", + .description = "l3_ieh_nonext.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "mirror", - .field_bit_size = 4, + .description = "l3_ieh_esp.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "cond_copy", + .description = "l3_ieh_auth.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "vlan_del_rpt", - .field_bit_size = 2, + .description = "l3_ieh_dest.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "drop", + .description = "l3_ieh_frag.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "hit", + .description = "l3_ieh_rthdr.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "type", - .field_bit_size = 3, + .description = "l3_ieh_hop.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 5, , table: port_table.egr_wr */ { - .description = "rid", - .field_bit_size = 32, + .description = "l3_ieh_1frag.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "drv_func.mac", - .field_bit_size = 48, + .description = "l3_df.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "drv_func.parent.mac", - .field_bit_size = 48, + .description = "l3_l3err.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_DRV_FUNC_PARENT_MAC >> 8) & 0xff, - BNXT_ULP_RF_IDX_DRV_FUNC_PARENT_MAC & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "phy_port", - .field_bit_size = 8, + .description = "l4_l4type.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "default_arec_ptr", - .field_bit_size = 16, + .description = "l4_src.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, - .field_opr1 = { - (BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 5, , table: l2_cntxt_tcam.vf_egr */ { - .description = "prof_func_id", - .field_bit_size = 7, + .description = "l4_dst.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, - .field_opr1 = { - (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ctxt_meta_prof", - .field_bit_size = 3, + .description = "l4_flags.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "def_ctxt_data", - .field_bit_size = 16, + .description = "l4_seq.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, - .field_opr1 = { - (BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ctxt_opcode", - .field_bit_size = 3, + .description = "l4_ack.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - ULP_THOR_SYM_CTXT_OPCODE_NORMAL_FLOW} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_cntxt_id", - .field_bit_size = 10, + .description = "l4_win.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "parif", - .field_bit_size = 4, + .description = "l4_pa.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - ULP_THOR_SYM_LOOPBACK_PARIF} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 5, , table: l2_cntxt_tcam_cache.vf_egr_wr */ { - .description = "rid", - .field_bit_size = 32, + .description = "l4_opt.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, - BNXT_ULP_RF_IDX_RID & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_cntxt_tcam_index", - .field_bit_size = 10, + .description = "l4_tcpts.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_cntxt_id", - .field_bit_size = 10, + .description = "l4_tsval.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "src_property_ptr", - .field_bit_size = 10, + .description = "l4_txecr.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 5, , table: parif_def_arec_ptr.vf_egr */ { - .description = "act_rec_ptr", - .field_bit_size = 32, + .description = "l4_err.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, - .field_opr1 = { - (BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 5, , table: parif_def_err_arec_ptr.vf_egr */ + /* class_tid: 5, , table: fkb_select.vf_em */ { - .description = "act_rec_ptr", - .field_bit_size = 32, + .description = "l2_cntxt_id.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, - .field_opr1 = { - (BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 5, , table: int_full_act_record.vf_ing */ { - .description = "sp_rec_ptr", - .field_bit_size = 16, + .description = "parif.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "encap_ptr", - .field_bit_size = 16, + .description = "spif.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "mod_rec_ptr", - .field_bit_size = 16, + .description = "svif.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "rsvd1", - .field_bit_size = 16, + .description = "lcos.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "rsvd0", - .field_bit_size = 8, + .description = "meta.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, { - .description = "decap_func", - .field_bit_size = 5, + .description = "rcyc_cnt.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "meter", - .field_bit_size = 10, + .description = "loopback.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "stats_op", + .description = "tl2_l2type.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "stats_ptr", - .field_bit_size = 16, + .description = "tl2_dmac.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "vnic_or_vport", - .field_bit_size = 11, + .description = "tl2_smac.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, - .field_opr1 = { - (BNXT_ULP_CF_IDX_DRV_FUNC_VNIC >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_VNIC & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "use_default", + .description = "tl2_dt.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "mirror", - .field_bit_size = 4, + .description = "tl2_sa.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "cond_copy", + .description = "tl2_nvt.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "vlan_del_rpt", - .field_bit_size = 2, + .description = "tl2_ovp.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "drop", + .description = "tl2_ovd.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "hit", + .description = "tl2_ovv.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "type", - .field_bit_size = 3, + .description = "tl2_ovt.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 5, , table: ilt_tbl.vf_ing */ { - .description = "ilt_destination", - .field_bit_size = 16, + .description = "tl2_ivp.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "act_rec_ptr", - .field_bit_size = 16, + .description = "tl2_ivd.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "fwd_op", - .field_bit_size = 2, + .description = "tl2_ivv.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - ULP_THOR_SYM_FWD_OP_BYPASS_LKUP} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "en_ilt_dest", + .description = "tl2_ivt.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "en_bd_action", + .description = "tl2_etype.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "en_bd_meta", + .description = "tl3_l3type.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "parif", - .field_bit_size = 4, + .description = "tl3_sip.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "reserved", - .field_bit_size = 23, + .description = "tl3_sip_selcmp.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 5, , table: ilt_tbl.vfr_egr */ { - .description = "ilt_destination", - .field_bit_size = 16, + .description = "tl3_dip.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "act_rec_ptr", - .field_bit_size = 16, + .description = "tl3_dip_selcmp.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "fwd_op", - .field_bit_size = 2, + .description = "tl3_ttl.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - ULP_THOR_SYM_FWD_OP_BYPASS_LKUP} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "en_ilt_dest", + .description = "tl3_prot.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "en_bd_action", + .description = "tl3_fid.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "en_bd_meta", + .description = "tl3_qos.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "parif", - .field_bit_size = 4, + .description = "tl3_ieh_nonext.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, - .field_opr1 = { - (BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "reserved", - .field_bit_size = 23, + .description = "tl3_ieh_esp.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 5, , table: l2_cntxt_tcam_cache.vfr_wr_egr0 */ { - .description = "rid", - .field_bit_size = 32, + .description = "tl3_ieh_auth.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, - BNXT_ULP_RF_IDX_RID & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_cntxt_tcam_index", - .field_bit_size = 10, + .description = "tl3_ieh_dest.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_cntxt_id", - .field_bit_size = 10, + .description = "tl3_ieh_frag.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "src_property_ptr", - .field_bit_size = 10, + .description = "tl3_ieh_rthdr.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 5, , table: metadata_record.vfr_egr */ { - .description = "prof_meta_mask", - .field_bit_size = 16, + .description = "tl3_ieh_hop.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ONES, - .field_opr1 = { - 0xff, - 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 5, , table: mod_record.vfr_egr */ { - .description = "metadata_en", + .description = "tl3_ieh_1frag.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "rem_ovlan", + .description = "tl3_df.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "rem_ivlan", + .description = "tl3_l3err.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "rep_add_ivlan", + .description = "tl4_l4type.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "rep_add_ovlan", + .description = "tl4_src.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ttl_update", + .description = "tl4_dst.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tun_md_en", + .description = "tl4_flags.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "reserved_en", + .description = "tl4_seq.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_dmac_en", + .description = "tl4_pa.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_smac_en", + .description = "tl4_opt.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_sip_ipv6_en", + .description = "tl4_tcpts.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_dip_ipv6_en", + .description = "tl4_err.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_sip_ipv4_en", + .description = "tuntype.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_dip_ipv4_en", + .description = "tflags.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_sport_en", + .description = "tids.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_dport_en", + .description = "tid.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "metadata_data", - .field_bit_size = 16, + .description = "tctxts.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, - .field_opr1 = { - (BNXT_ULP_CF_IDX_DEV_PORT_ID >> 8) & 0xff, - BNXT_ULP_CF_IDX_DEV_PORT_ID & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "metadata_rsvd", - .field_bit_size = 10, + .description = "tctxt.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "metadata_op", - .field_bit_size = 2, + .description = "tqos.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "metadata_prof", - .field_bit_size = 4, + .description = "terr.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, - .field_opr1 = { - (BNXT_ULP_GLB_RF_IDX_GLB_METADATA_PROF_0 >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_METADATA_PROF_0 & 0xff} - }, - { - .description = "ivlan_tpid", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - { - .description = "ivlan_pri", - .field_bit_size = 3, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ivlan_de", + .description = "l2_l2type.en", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - { - .description = "ivlan_vid", - .field_bit_size = 12, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP - }, - { - .description = "ovlan_tpid", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ovlan_pri", - .field_bit_size = 3, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l2_dmac.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ovlan_de", + .description = "l2_smac.en", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ovlan_vid", - .field_bit_size = 12, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l2_dt.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "alt_pfid", - .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l2_sa.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "alt_vid", - .field_bit_size = 12, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l2_nvt.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ttl_rsvd", - .field_bit_size = 12, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l2_ovp.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ttl_tl3_dec", + .description = "l2_ovd.en", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ttl_il3_dec", + .description = "l2_ovv.en", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ttl_tl3_rdir", + .description = "l2_ovt.en", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ttl_il3_rdir", + .description = "l2_ivp.en", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tun_new_prot", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l2_ivd.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tun_ex_prot", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l2_ivv.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tun_mv", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l2_ivt.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "reserved", - .field_bit_size = 0, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l2_etype.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_dmac", - .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l3_l3type.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_smac", - .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l3_sip.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_sip_ipv6", - .field_bit_size = 128, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l3_sip_selcmp.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_dip_ipv6", - .field_bit_size = 128, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l3_dip.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_sip_ipv4", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l3_dip_selcmp.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_dip_ipv4", - .field_bit_size = 32, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l3_ttl.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_sport", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l3_prot.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_dport", - .field_bit_size = 16, - .field_opc = BNXT_ULP_FIELD_OPC_SKIP + .description = "l3_fid.en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 5, , table: int_full_act_record.vfr_egr */ { - .description = "sp_rec_ptr", - .field_bit_size = 16, + .description = "l3_qos.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "encap_ptr", - .field_bit_size = 16, + .description = "l3_ieh_nonext.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "mod_rec_ptr", - .field_bit_size = 16, + .description = "l3_ieh_esp.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_MODIFY_PTR >> 8) & 0xff, - BNXT_ULP_RF_IDX_MODIFY_PTR & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "rsvd1", - .field_bit_size = 16, + .description = "l3_ieh_auth.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "rsvd0", - .field_bit_size = 8, + .description = "l3_ieh_dest.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "decap_func", - .field_bit_size = 5, + .description = "l3_ieh_frag.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "meter", - .field_bit_size = 10, + .description = "l3_ieh_rthdr.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "stats_op", + .description = "l3_ieh_hop.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "stats_ptr", - .field_bit_size = 16, + .description = "l3_ieh_1frag.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "vnic_or_vport", - .field_bit_size = 11, + .description = "l3_df.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - (ULP_THOR_SYM_LOOPBACK_PORT >> 8) & 0xff, - ULP_THOR_SYM_LOOPBACK_PORT & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "use_default", + .description = "l3_l3err.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "mirror", - .field_bit_size = 4, + .description = "l4_l4type.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "cond_copy", + .description = "l4_src.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "vlan_del_rpt", - .field_bit_size = 2, + .description = "l4_dst.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "drop", + .description = "l4_flags.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "hit", + .description = "l4_seq.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "type", - .field_bit_size = 3, + .description = "l4_ack.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - 1} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 5, , table: l2_cntxt_tcam.vfr_ing0 */ { - .description = "prof_func_id", - .field_bit_size = 7, + .description = "l4_win.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, - .field_opr1 = { - (BNXT_ULP_GLB_RF_IDX_GLB_VFR_PROF_FUNC_0 >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_VFR_PROF_FUNC_0 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ctxt_meta_prof", - .field_bit_size = 3, + .description = "l4_pa.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "def_ctxt_data", - .field_bit_size = 16, + .description = "l4_opt.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ctxt_opcode", - .field_bit_size = 3, + .description = "l4_tcpts.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - ULP_THOR_SYM_CTXT_OPCODE_NORMAL_FLOW} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_cntxt_id", - .field_bit_size = 10, + .description = "l4_tsval.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "parif", - .field_bit_size = 4, + .description = "l4_txecr.en", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CF, - .field_opr1 = { - (BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 5, , table: fkb_select.vfr_em */ { - .description = "l2_cntxt_id.en", + .description = "l4_err.en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, + /* class_tid: 5, , table: profile_tcam.vf_2_vfr.0 */ { - .description = "parif.en", - .field_bit_size = 1, + .description = "wc_key_id", + .field_bit_size = 6, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "spif.en", - .field_bit_size = 1, + .description = "wc_profile_id", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "svif.en", + .description = "wc_search_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "lcos.en", - .field_bit_size = 1, + .description = "em_key_type", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "meta.en", - .field_bit_size = 1, + .description = "em_key_id", + .field_bit_size = 6, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, .field_opr1 = { - 1} + (BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_0 >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_0 & 0xff} }, { - .description = "rcyc_cnt.en", - .field_bit_size = 1, + .description = "em_profile_id", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr1 = { + (BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_0 >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_0 & 0xff} }, { - .description = "loopback.en", + .description = "em_search_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, { - .description = "tl2_l2type.en", + .description = "pl_byp_lkup_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, + /* class_tid: 5, , table: profile_tcam.vfr_2_vf.0 */ { - .description = "tl2_dmac.en", - .field_bit_size = 1, + .description = "wc_key_id", + .field_bit_size = 6, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_smac.en", - .field_bit_size = 1, + .description = "wc_profile_id", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_dt.en", + .description = "wc_search_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_sa.en", - .field_bit_size = 1, + .description = "em_key_type", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_nvt.en", - .field_bit_size = 1, + .description = "em_key_id", + .field_bit_size = 6, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr1 = { + (BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_1 >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_1 & 0xff} }, { - .description = "tl2_ovp.en", - .field_bit_size = 1, + .description = "em_profile_id", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr1 = { + (BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_1 >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_1 & 0xff} }, { - .description = "tl2_ovd.en", + .description = "em_search_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, { - .description = "tl2_ovv.en", + .description = "pl_byp_lkup_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, + /* class_tid: 5, , table: profile_tcam_cache.vfr_wr */ { - .description = "tl2_ovt.en", - .field_bit_size = 1, + .description = "rid", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, + BNXT_ULP_RF_IDX_RID & 0xff} + }, + { + .description = "profile_tcam_index", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_ivp.en", - .field_bit_size = 1, + .description = "em_profile_id", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_ivd.en", - .field_bit_size = 1, + .description = "em_key_id", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_ivv.en", - .field_bit_size = 1, + .description = "wc_profile_id", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_ivt.en", - .field_bit_size = 1, + .description = "wc_key_id", + .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl2_etype.en", - .field_bit_size = 1, + .description = "flow_sig_id", + .field_bit_size = 64, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, + /* class_tid: 5, , table: ilt_tbl.vfr_ing */ { - .description = "tl3_l3type.en", - .field_bit_size = 1, + .description = "ilt_destination", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_sip.en", - .field_bit_size = 1, + .description = "act_rec_ptr", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr1 = { + (BNXT_ULP_GLB_RF_IDX_GLB_DROP_AREC_PTR >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_DROP_AREC_PTR & 0xff} }, { - .description = "tl3_sip_selcmp.en", - .field_bit_size = 1, + .description = "fwd_op", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + ULP_THOR_SYM_FWD_OP_NORMAL_FLOW} }, { - .description = "tl3_dip.en", + .description = "en_ilt_dest", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_dip_selcmp.en", + .description = "en_bd_action", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_ttl.en", + .description = "en_bd_meta", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_prot.en", - .field_bit_size = 1, + .description = "parif", + .field_bit_size = 4, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_fid.en", - .field_bit_size = 1, + .description = "reserved", + .field_bit_size = 23, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, + /* class_tid: 5, , table: em.vf_2_vfr.0 */ { - .description = "tl3_qos.en", + .description = "valid", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, { - .description = "tl3_ieh_nonext.en", - .field_bit_size = 1, + .description = "strength", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 3} }, { - .description = "tl3_ieh_esp.en", - .field_bit_size = 1, + .description = "data", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} }, { - .description = "tl3_ieh_auth.en", - .field_bit_size = 1, + .description = "opcode", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_ieh_dest.en", - .field_bit_size = 1, + .description = "meta_prof", + .field_bit_size = 3, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_ieh_frag.en", - .field_bit_size = 1, + .description = "ctxt_data", + .field_bit_size = 14, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, + /* class_tid: 5, , table: ilt_tbl.vfr_egr */ { - .description = "tl3_ieh_rthdr.en", - .field_bit_size = 1, + .description = "ilt_destination", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_ieh_hop.en", - .field_bit_size = 1, + .description = "act_rec_ptr", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_ieh_1frag.en", - .field_bit_size = 1, + .description = "fwd_op", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + ULP_THOR_SYM_FWD_OP_BYPASS_LKUP} }, { - .description = "tl3_df.en", + .description = "en_ilt_dest", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl3_l3err.en", + .description = "en_bd_action", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, { - .description = "tl4_l4type.en", + .description = "en_bd_meta", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl4_src.en", - .field_bit_size = 1, + .description = "parif", + .field_bit_size = 4, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CF, + .field_opr1 = { + (BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff} }, { - .description = "tl4_dst.en", - .field_bit_size = 1, + .description = "reserved", + .field_bit_size = 23, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, + /* class_tid: 5, , table: l2_cntxt_tcam_cache.vfr_wr_egr0 */ { - .description = "tl4_flags.en", - .field_bit_size = 1, + .description = "rid", + .field_bit_size = 32, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, + BNXT_ULP_RF_IDX_RID & 0xff} }, { - .description = "tl4_seq.en", - .field_bit_size = 1, + .description = "l2_cntxt_tcam_index", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl4_pa.en", - .field_bit_size = 1, + .description = "l2_cntxt_id", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl4_opt.en", - .field_bit_size = 1, + .description = "src_property_ptr", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, + /* class_tid: 5, , table: ilt_tbl.vf_egr */ { - .description = "tl4_tcpts.en", - .field_bit_size = 1, + .description = "ilt_destination", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tl4_err.en", - .field_bit_size = 1, + .description = "act_rec_ptr", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_opr1 = { + (BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR & 0xff} }, { - .description = "tuntype.en", - .field_bit_size = 1, + .description = "fwd_op", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + ULP_THOR_SYM_FWD_OP_NORMAL_FLOW} }, { - .description = "tflags.en", + .description = "en_ilt_dest", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tids.en", + .description = "en_bd_action", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tid.en", + .description = "en_bd_meta", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "tctxts.en", - .field_bit_size = 1, + .description = "parif", + .field_bit_size = 4, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + ULP_THOR_SYM_LOOPBACK_PARIF} }, { - .description = "tctxt.en", - .field_bit_size = 1, + .description = "reserved", + .field_bit_size = 23, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, + /* class_tid: 5, , table: mod_record.vfr_2_vf_egr */ { - .description = "tqos.en", + .description = "metadata_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} }, { - .description = "terr.en", + .description = "rem_ovlan", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_l2type.en", + .description = "rem_ivlan", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_dmac.en", + .description = "rep_add_ivlan", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_smac.en", + .description = "rep_add_ovlan", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_dt.en", + .description = "ttl_update", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_sa.en", + .description = "tun_md_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_nvt.en", + .description = "reserved_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_ovp.en", + .description = "l2_dmac_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_ovd.en", + .description = "l2_smac_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_ovv.en", + .description = "l3_sip_ipv6_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_ovt.en", + .description = "l3_dip_ipv6_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_ivp.en", + .description = "l3_sip_ipv4_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_ivd.en", + .description = "l3_dip_ipv4_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_ivv.en", + .description = "l4_sport_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_ivt.en", + .description = "l4_dport_en", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_etype.en", - .field_bit_size = 1, + .description = "metadata_data", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_PORT_TABLE, + .field_opr1 = { + (BNXT_ULP_CF_IDX_DEV_PORT_ID >> 8) & 0xff, + BNXT_ULP_CF_IDX_DEV_PORT_ID & 0xff, + (BNXT_ULP_PORT_TABLE_VF_FUNC_METADATA >> 8) & 0xff, + BNXT_ULP_PORT_TABLE_VF_FUNC_METADATA & 0xff} }, { - .description = "l3_l3type.en", - .field_bit_size = 1, + .description = "metadata_rsvd", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_sip.en", - .field_bit_size = 1, + .description = "metadata_op", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_sip_selcmp.en", - .field_bit_size = 1, + .description = "metadata_prof", + .field_bit_size = 4, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l3_dip.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "ivlan_tpid", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_dip_selcmp.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "ivlan_pri", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_ttl.en", + .description = "ivlan_de", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_prot.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "ivlan_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_fid.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "ovlan_tpid", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_qos.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "ovlan_pri", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_ieh_nonext.en", + .description = "ovlan_de", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_ieh_esp.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "ovlan_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_ieh_auth.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "alt_pfid", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_ieh_dest.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "alt_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_ieh_frag.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "ttl_rsvd", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_ieh_rthdr.en", + .description = "ttl_tl3_dec", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_ieh_hop.en", + .description = "ttl_il3_dec", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_ieh_1frag.en", + .description = "ttl_tl3_rdir", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_df.en", + .description = "ttl_il3_rdir", .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l3_l3err.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "tun_new_prot", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l4_l4type.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "tun_ex_prot", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l4_src.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "tun_mv", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l4_dst.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "reserved", + .field_bit_size = 0, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l4_flags.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "l2_dmac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l4_seq.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "l2_smac", + .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l4_ack.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "l3_sip_ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l4_win.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "l3_dip_ipv6", + .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l4_pa.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "l3_sip_ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l4_opt.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "l3_dip_ipv4", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l4_tcpts.en", - .field_bit_size = 1, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .description = "l4_sport", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP }, { - .description = "l4_tsval.en", - .field_bit_size = 1, + .description = "l4_dport", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SKIP + }, + /* class_tid: 5, , table: int_full_act_record.vfr_egr */ + { + .description = "sp_rec_ptr", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_txecr.en", - .field_bit_size = 1, + .description = "encap_ptr", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l4_err.en", - .field_bit_size = 1, + .description = "mod_rec_ptr", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_MODIFY_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MODIFY_PTR & 0xff} }, - /* class_tid: 5, , table: profile_tcam.vfr_ing0 */ { - .description = "wc_key_id", - .field_bit_size = 6, + .description = "rsvd1", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "wc_profile_id", + .description = "rsvd0", .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "wc_search_en", - .field_bit_size = 1, + .description = "decap_func", + .field_bit_size = 5, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "em_key_type", - .field_bit_size = 2, + .description = "meter", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "em_key_id", - .field_bit_size = 6, + .description = "stats_op", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_0 >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_0 & 0xff} + 1} }, { - .description = "em_profile_id", - .field_bit_size = 8, + .description = "stats_ptr", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, - .field_opr1 = { - (BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_0 >> 8) & 0xff, - BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_0 & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "em_search_en", - .field_bit_size = 1, + .description = "vnic_or_vport", + .field_bit_size = 11, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - 1} + (ULP_THOR_SYM_LOOPBACK_PORT >> 8) & 0xff, + ULP_THOR_SYM_LOOPBACK_PORT & 0xff} }, { - .description = "pl_byp_lkup_en", + .description = "use_default", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 5, , table: l2_cntxt_tcam_cache.ing_wr_vfr */ { - .description = "rid", - .field_bit_size = 32, + .description = "mirror", + .field_bit_size = 4, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_RF, - .field_opr1 = { - (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, - BNXT_ULP_RF_IDX_RID & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_cntxt_tcam_index", - .field_bit_size = 10, + .description = "cond_copy", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "l2_cntxt_id", - .field_bit_size = 10, + .description = "vlan_del_rpt", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "src_property_ptr", - .field_bit_size = 10, + .description = "drop", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "hit", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* class_tid: 5, , table: int_full_act_record.vfr_ing0 */ + { + .description = "type", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 1} + }, + /* class_tid: 5, , table: int_full_act_record.vfr_2_vf.ing0 */ { .description = "sp_rec_ptr", .field_bit_size = 16, @@ -43261,7 +47154,7 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = { .field_opr1 = { 1} }, - /* class_tid: 5, , table: em.vfr.0 */ + /* class_tid: 5, , table: em.vfr_2_vf.0 */ { .description = "valid", .field_bit_size = 1, @@ -43313,7 +47206,7 @@ struct bnxt_ulp_mapper_ident_info ulp_thor_class_ident_list[] = { .description = "default_arec_ptr", .regfile_idx = BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR, .ident_bit_size = 16, - .ident_bit_pos = 136 + .ident_bit_pos = 137 }, { .description = "drv_func.parent.mac", @@ -43402,7 +47295,7 @@ struct bnxt_ulp_mapper_ident_info ulp_thor_class_ident_list[] = { .description = "default_arec_ptr", .regfile_idx = BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR, .ident_bit_size = 16, - .ident_bit_pos = 136 + .ident_bit_pos = 137 }, { .description = "drv_func.parent.mac", @@ -43574,3 +47467,4 @@ struct bnxt_ulp_mapper_ident_info ulp_thor_class_ident_list[] = { .ident_bit_pos = 29 } }; + diff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_act.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_act.c index 16a921e6c8..2a499c0ba2 100644 --- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_act.c +++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_act.c @@ -1,10 +1,8 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2014-2021 Broadcom + * Copyright(c) 2014-2023 Broadcom * All rights reserved. */ -/* date: Fri Oct 8 11:41:10 2021 */ - #include "ulp_template_db_enum.h" #include "ulp_template_db_field.h" #include "ulp_template_struct.h" @@ -20,7 +18,7 @@ struct bnxt_ulp_mapper_tmpl_info ulp_wh_plus_act_tmpl_list[] = { .reject_info = { .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, .cond_start_idx = 0, - .cond_nums = 9 } + .cond_nums = 12 } }, /* act_tid: 2, ingress */ [2] = { @@ -29,7 +27,7 @@ struct bnxt_ulp_mapper_tmpl_info ulp_wh_plus_act_tmpl_list[] = { .start_tbl_idx = 5, .reject_info = { .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, - .cond_start_idx = 14, + .cond_start_idx = 17, .cond_nums = 0 } }, /* act_tid: 3, ingress */ @@ -38,39 +36,69 @@ struct bnxt_ulp_mapper_tmpl_info ulp_wh_plus_act_tmpl_list[] = { .num_tbls = 7, .start_tbl_idx = 12, .reject_info = { - .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, - .cond_start_idx = 15, - .cond_nums = 0 } + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, + .cond_start_idx = 18, + .cond_nums = 3 } }, - /* act_tid: 4, egress */ + /* act_tid: 4, ingress */ [4] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 5, .start_tbl_idx = 19, .reject_info = { - .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, - .cond_start_idx = 21, - .cond_nums = 0 } + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, + .cond_start_idx = 29, + .cond_nums = 1 } }, - /* act_tid: 5, egress */ + /* act_tid: 5, ingress */ [5] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 7, + .num_tbls = 1, .start_tbl_idx = 24, .reject_info = { .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, - .cond_start_idx = 29, + .cond_start_idx = 35, .cond_nums = 0 } }, /* act_tid: 6, egress */ [6] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 6, - .start_tbl_idx = 31, + .num_tbls = 5, + .start_tbl_idx = 25, .reject_info = { .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, .cond_start_idx = 35, .cond_nums = 0 } + }, + /* act_tid: 7, egress */ + [7] = { + .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, + .num_tbls = 7, + .start_tbl_idx = 30, + .reject_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, + .cond_start_idx = 43, + .cond_nums = 3 } + }, + /* act_tid: 8, egress */ + [8] = { + .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, + .num_tbls = 6, + .start_tbl_idx = 37, + .reject_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, + .cond_start_idx = 54, + .cond_nums = 3 } + }, + /* act_tid: 9, egress */ + [9] = { + .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, + .num_tbls = 3, + .start_tbl_idx = 43, + .reject_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, + .cond_start_idx = 63, + .cond_nums = 0 } } }; @@ -85,7 +113,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 9, + .cond_start_idx = 12, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, @@ -107,7 +135,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 10, + .cond_start_idx = 13, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, @@ -127,7 +155,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 11, + .cond_start_idx = 14, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0, @@ -149,7 +177,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 12, + .cond_start_idx = 15, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, @@ -170,7 +198,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 0, .cond_false_goto = 0, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 13, + .cond_start_idx = 16, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, @@ -188,7 +216,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 14, + .cond_start_idx = 17, .cond_nums = 0 }, .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE, .fdb_operand = BNXT_ULP_RF_IDX_RID @@ -203,7 +231,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 14, + .cond_start_idx = 17, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MIRROR_PTR_0, @@ -224,7 +252,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 14, + .cond_start_idx = 17, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, @@ -245,7 +273,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 15, + .cond_start_idx = 18, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, @@ -267,7 +295,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 15, + .cond_start_idx = 18, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, @@ -289,7 +317,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 15, + .cond_start_idx = 18, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MIRROR_PTR_0, @@ -309,7 +337,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 0, .cond_false_goto = 0, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 15, + .cond_start_idx = 18, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, @@ -329,8 +357,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1023, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 15, - .cond_nums = 1 }, + .cond_start_idx = 21, + .cond_nums = 3 }, .fdb_opcode = BNXT_ULP_FDB_OPC_NOP }, { /* act_tid: 3, , table: int_flow_counter_tbl.0 */ @@ -343,7 +371,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 16, + .cond_start_idx = 24, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, @@ -362,7 +390,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 17, + .cond_start_idx = 25, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0, @@ -381,7 +409,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 18, + .cond_start_idx = 26, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0, @@ -390,7 +418,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_bit_size = 32, .result_num_fields = 1 }, - { /* act_tid: 3, , table: int_encap_mac_record.0 */ + { /* act_tid: 3, , table: int_encap_vlan_record.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, .resource_sub_type = @@ -400,7 +428,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 19, + .cond_start_idx = 27, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, .tbl_operand = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, @@ -421,7 +449,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 19, + .cond_start_idx = 27, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, @@ -440,7 +468,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 0, .cond_false_goto = 0, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 20, + .cond_start_idx = 28, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, @@ -455,21 +483,130 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, - .direction = TF_DIR_TX, + .direction = TF_DIR_RX, .execute_info = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 21, + .cond_start_idx = 30, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .result_start_idx = 230, .result_bit_size = 64, .result_num_fields = 1 }, - { /* act_tid: 4, , table: int_vtag_encap_record.0 */ + { /* act_tid: 4, , table: vnic_interface_rss_config.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_VNIC_TABLE, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_VNIC_TABLE_RSS, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 31, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_VNIC_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_RSS_VNIC, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .result_start_idx = 231, + .result_bit_size = 0, + .result_num_fields = 0 + }, + { /* act_tid: 4, , table: vnic_interface_queue_config.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_VNIC_TABLE, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_VNIC_TABLE_QUEUE, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 32, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_VNIC_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_RSS_VNIC, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .result_start_idx = 231, + .result_bit_size = 0, + .result_num_fields = 0 + }, + { /* act_tid: 4, , table: int_full_act_record.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 0, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, + .cond_start_idx = 33, + .cond_nums = 2 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .result_start_idx = 231, + .result_bit_size = 128, + .result_num_fields = 26, + .encap_num_fields = 0 + }, + { /* act_tid: 4, , table: int_full_act_record.1 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 0, + .cond_false_goto = 0, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 35, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .result_start_idx = 257, + .result_bit_size = 128, + .result_num_fields = 26, + .encap_num_fields = 0 + }, + { /* act_tid: 5, , table: control.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_RX, + .execute_info = { + .cond_true_goto = 1023, + .cond_false_goto = 0, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 35, + .cond_nums = 0 }, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP + }, + { /* act_tid: 6, , table: int_flow_counter_tbl.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 35, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .result_start_idx = 283, + .result_bit_size = 64, + .result_num_fields = 1 + }, + { /* act_tid: 6, , table: int_vtag_encap_record.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, .resource_sub_type = @@ -479,18 +616,18 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 22, + .cond_start_idx = 36, .cond_nums = 2 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .record_size = 8, - .result_start_idx = 231, + .result_start_idx = 284, .result_bit_size = 0, .result_num_fields = 0, .encap_num_fields = 11 }, - { /* act_tid: 4, , table: int_full_act_record.0 */ + { /* act_tid: 6, , table: int_full_act_record.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = @@ -500,16 +637,16 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 24, + .cond_start_idx = 38, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 242, + .result_start_idx = 295, .result_bit_size = 128, .result_num_fields = 26 }, - { /* act_tid: 4, , table: ext_full_act_record.no_tag */ + { /* act_tid: 6, , table: ext_full_act_record.no_tag */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EXT, .resource_sub_type = @@ -519,17 +656,17 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 25, + .cond_start_idx = 39, .cond_nums = 2 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 268, + .result_start_idx = 321, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 11 }, - { /* act_tid: 4, , table: ext_full_act_record.one_tag */ + { /* act_tid: 6, , table: ext_full_act_record.one_tag */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EXT, .resource_sub_type = @@ -539,28 +676,28 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 0, .cond_false_goto = 0, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 27, + .cond_start_idx = 41, .cond_nums = 2 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 305, + .result_start_idx = 358, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 11 }, - { /* act_tid: 5, , table: control.0 */ + { /* act_tid: 7, , table: control.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, .direction = TF_DIR_TX, .execute_info = { .cond_true_goto = 1023, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 29, - .cond_nums = 1 }, + .cond_start_idx = 46, + .cond_nums = 3 }, .fdb_opcode = BNXT_ULP_FDB_OPC_NOP }, - { /* act_tid: 5, , table: int_flow_counter_tbl.0 */ + { /* act_tid: 7, , table: int_flow_counter_tbl.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = @@ -570,16 +707,16 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 30, + .cond_start_idx = 49, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 342, + .result_start_idx = 395, .result_bit_size = 64, .result_num_fields = 1 }, - { /* act_tid: 5, , table: act_modify_ipv4_src.0 */ + { /* act_tid: 7, , table: act_modify_ipv4_src.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, .resource_sub_type = @@ -589,16 +726,16 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 31, + .cond_start_idx = 50, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 343, + .result_start_idx = 396, .result_bit_size = 32, .result_num_fields = 1 }, - { /* act_tid: 5, , table: act_modify_ipv4_dst.0 */ + { /* act_tid: 7, , table: act_modify_ipv4_dst.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, .resource_sub_type = @@ -608,16 +745,16 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 32, + .cond_start_idx = 51, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 344, + .result_start_idx = 397, .result_bit_size = 32, .result_num_fields = 1 }, - { /* act_tid: 5, , table: int_encap_mac_record.dummy */ + { /* act_tid: 7, , table: int_encap_vlan_record.dummy */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, .resource_sub_type = @@ -627,18 +764,18 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 33, + .cond_start_idx = 52, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, .tbl_operand = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, .record_size = 16, - .result_start_idx = 345, + .result_start_idx = 398, .result_bit_size = 0, .result_num_fields = 0, .encap_num_fields = 11 }, - { /* act_tid: 5, , table: int_full_act_record.0 */ + { /* act_tid: 7, , table: int_full_act_record.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = @@ -648,16 +785,16 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 33, + .cond_start_idx = 52, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 356, + .result_start_idx = 409, .result_bit_size = 128, .result_num_fields = 26 }, - { /* act_tid: 5, , table: ext_full_act_record.0 */ + { /* act_tid: 7, , table: ext_full_act_record.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EXT, .resource_sub_type = @@ -667,17 +804,17 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 0, .cond_false_goto = 0, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 34, + .cond_start_idx = 53, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 382, + .result_start_idx = 435, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 11 }, - { /* act_tid: 6, , table: int_flow_counter_tbl.0 */ + { /* act_tid: 8, , table: int_flow_counter_tbl.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = @@ -687,16 +824,16 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 35, + .cond_start_idx = 57, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 419, + .result_start_idx = 472, .result_bit_size = 64, .result_num_fields = 1 }, - { /* act_tid: 6, , table: sp_smac_ipv4.0 */ + { /* act_tid: 8, , table: sp_smac_ipv4.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, .resource_sub_type = @@ -706,18 +843,18 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 36, + .cond_start_idx = 58, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_SP_PTR, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .record_size = 16, - .result_start_idx = 420, + .result_start_idx = 473, .result_bit_size = 0, .result_num_fields = 0, .encap_num_fields = 2 }, - { /* act_tid: 6, , table: sp_smac_ipv6.0 */ + { /* act_tid: 8, , table: sp_smac_ipv6.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, .resource_sub_type = @@ -727,18 +864,18 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 37, + .cond_start_idx = 59, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_SP_PTR, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .record_size = 24, - .result_start_idx = 422, + .result_start_idx = 475, .result_bit_size = 0, .result_num_fields = 0, .encap_num_fields = 2 }, - { /* act_tid: 6, , table: int_tun_encap_record.0 */ + { /* act_tid: 8, , table: int_tun_encap_record.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, .resource_sub_type = @@ -748,18 +885,18 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 38, + .cond_start_idx = 60, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .record_size = 64, - .result_start_idx = 424, + .result_start_idx = 477, .result_bit_size = 0, .result_num_fields = 0, .encap_num_fields = 30 }, - { /* act_tid: 6, , table: int_full_act_record.0 */ + { /* act_tid: 8, , table: int_full_act_record.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = @@ -769,16 +906,16 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 39, + .cond_start_idx = 61, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 454, + .result_start_idx = 507, .result_bit_size = 128, .result_num_fields = 26 }, - { /* act_tid: 6, , table: ext_full_act_record_vxlan.0 */ + { /* act_tid: 8, , table: ext_full_act_record_vxlan.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EXT, .resource_sub_type = @@ -788,15 +925,64 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .cond_true_goto = 0, .cond_false_goto = 0, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 40, + .cond_start_idx = 62, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .result_start_idx = 480, + .result_start_idx = 533, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 30 + }, + { /* act_tid: 9, , table: control.reject */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1023, + .cond_false_goto = 1023, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 63, + .cond_nums = 0 }, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP + }, + { /* act_tid: 9, , table: int_flow_counter_tbl.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_ACT_STATS_64, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 1, + .cond_false_goto = 1, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 63, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .result_start_idx = 589, + .result_bit_size = 64, + .result_num_fields = 1 + }, + { /* act_tid: 9, , table: int_full_act_record.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_TX, + .execute_info = { + .cond_true_goto = 0, + .cond_false_goto = 0, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 64, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, + .result_start_idx = 590, + .result_bit_size = 128, + .result_num_fields = 26 } }; @@ -838,6 +1024,18 @@ struct bnxt_ulp_mapper_cond_info ulp_wh_plus_act_cond_list[] = { .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, .cond_operand = BNXT_ULP_ACT_BIT_SET_VLAN_PCP }, + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SET_MAC_DST + }, + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SET_MAC_SRC + }, + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_METER + }, /* cond_execute: act_tid: 1, shared_mirror_record.rd */ { .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, @@ -866,10 +1064,31 @@ struct bnxt_ulp_mapper_cond_info ulp_wh_plus_act_cond_list[] = { .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, .cond_operand = BNXT_ULP_ACT_BIT_COUNT }, + /* cond_reject: wh_plus, act_tid: 3 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SET_MAC_DST + }, + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SET_MAC_SRC + }, + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SHARED_SAMPLE + }, /* cond_execute: act_tid: 3, control.0 */ { - .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, - .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SET_IPV4_DST + }, + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SET_TP_DST + }, + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_NOT_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SET_TP_SRC }, /* cond_execute: act_tid: 3, int_flow_counter_tbl.0 */ { @@ -894,12 +1113,41 @@ struct bnxt_ulp_mapper_cond_info ulp_wh_plus_act_cond_list[] = { { .cond_opcode = BNXT_ULP_COND_OPC_EXT_MEM_IS_SET, }, - /* cond_execute: act_tid: 4, int_flow_counter_tbl.0 */ + /* cond_reject: wh_plus, act_tid: 4 */ { .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACT_BIT_COUNT + .cond_operand = BNXT_ULP_ACT_BIT_SHARED_SAMPLE + }, + /* cond_execute: act_tid: 4, int_flow_counter_tbl.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_COUNT + }, + /* cond_execute: act_tid: 4, vnic_interface_rss_config.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_RSS + }, + /* cond_execute: act_tid: 4, vnic_interface_queue_config.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_QUEUE + }, + /* cond_execute: act_tid: 4, int_full_act_record.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_QUEUE }, - /* cond_execute: act_tid: 4, int_vtag_encap_record.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_RSS + }, + /* cond_execute: act_tid: 6, int_flow_counter_tbl.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_COUNT + }, + /* cond_execute: act_tid: 6, int_vtag_encap_record.0 */ { .cond_opcode = BNXT_ULP_COND_OPC_EXT_MEM_NOT_SET, }, @@ -907,11 +1155,11 @@ struct bnxt_ulp_mapper_cond_info ulp_wh_plus_act_cond_list[] = { .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, .cond_operand = BNXT_ULP_ACT_BIT_PUSH_VLAN }, - /* cond_execute: act_tid: 4, int_full_act_record.0 */ + /* cond_execute: act_tid: 6, int_full_act_record.0 */ { .cond_opcode = BNXT_ULP_COND_OPC_EXT_MEM_NOT_SET, }, - /* cond_execute: act_tid: 4, ext_full_act_record.no_tag */ + /* cond_execute: act_tid: 6, ext_full_act_record.no_tag */ { .cond_opcode = BNXT_ULP_COND_OPC_EXT_MEM_IS_SET, }, @@ -919,7 +1167,7 @@ struct bnxt_ulp_mapper_cond_info ulp_wh_plus_act_cond_list[] = { .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_NOT_SET, .cond_operand = BNXT_ULP_ACT_BIT_PUSH_VLAN }, - /* cond_execute: act_tid: 4, ext_full_act_record.one_tag */ + /* cond_execute: act_tid: 6, ext_full_act_record.one_tag */ { .cond_opcode = BNXT_ULP_COND_OPC_EXT_MEM_IS_SET, }, @@ -927,60 +1175,103 @@ struct bnxt_ulp_mapper_cond_info ulp_wh_plus_act_cond_list[] = { .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, .cond_operand = BNXT_ULP_ACT_BIT_PUSH_VLAN }, - /* cond_execute: act_tid: 5, control.0 */ + /* cond_reject: wh_plus, act_tid: 7 */ { - .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, - .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SET_MAC_DST + }, + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SET_MAC_SRC + }, + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SHARED_SAMPLE + }, + /* cond_execute: act_tid: 7, control.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SET_IPV4_DST + }, + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SET_TP_DST + }, + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_NOT_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SET_TP_SRC }, - /* cond_execute: act_tid: 5, int_flow_counter_tbl.0 */ + /* cond_execute: act_tid: 7, int_flow_counter_tbl.0 */ { .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, .cond_operand = BNXT_ULP_ACT_BIT_COUNT }, - /* cond_execute: act_tid: 5, act_modify_ipv4_src.0 */ + /* cond_execute: act_tid: 7, act_modify_ipv4_src.0 */ { .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, .cond_operand = BNXT_ULP_ACT_BIT_SET_IPV4_SRC }, - /* cond_execute: act_tid: 5, act_modify_ipv4_dst.0 */ + /* cond_execute: act_tid: 7, act_modify_ipv4_dst.0 */ { .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, .cond_operand = BNXT_ULP_ACT_BIT_SET_IPV4_DST }, - /* cond_execute: act_tid: 5, int_full_act_record.0 */ + /* cond_execute: act_tid: 7, int_full_act_record.0 */ { .cond_opcode = BNXT_ULP_COND_OPC_EXT_MEM_NOT_SET, }, - /* cond_execute: act_tid: 5, ext_full_act_record.0 */ + /* cond_execute: act_tid: 7, ext_full_act_record.0 */ { .cond_opcode = BNXT_ULP_COND_OPC_EXT_MEM_IS_SET, }, - /* cond_execute: act_tid: 6, int_flow_counter_tbl.0 */ + /* cond_reject: wh_plus, act_tid: 8 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SET_MAC_DST + }, + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SET_MAC_SRC + }, + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_SHARED_SAMPLE + }, + /* cond_execute: act_tid: 8, int_flow_counter_tbl.0 */ { .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, .cond_operand = BNXT_ULP_ACT_BIT_COUNT }, - /* cond_execute: act_tid: 6, sp_smac_ipv4.0 */ + /* cond_execute: act_tid: 8, sp_smac_ipv4.0 */ { .cond_opcode = BNXT_ULP_COND_OPC_CF_IS_SET, .cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV4_FLAG }, - /* cond_execute: act_tid: 6, sp_smac_ipv6.0 */ + /* cond_execute: act_tid: 8, sp_smac_ipv6.0 */ { .cond_opcode = BNXT_ULP_COND_OPC_CF_IS_SET, .cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV6_FLAG }, - /* cond_execute: act_tid: 6, int_tun_encap_record.0 */ + /* cond_execute: act_tid: 8, int_tun_encap_record.0 */ { .cond_opcode = BNXT_ULP_COND_OPC_EXT_MEM_NOT_SET, }, - /* cond_execute: act_tid: 6, int_full_act_record.0 */ + /* cond_execute: act_tid: 8, int_full_act_record.0 */ { .cond_opcode = BNXT_ULP_COND_OPC_EXT_MEM_NOT_SET, }, - /* cond_execute: act_tid: 6, ext_full_act_record_vxlan.0 */ + /* cond_execute: act_tid: 8, ext_full_act_record_vxlan.0 */ { .cond_opcode = BNXT_ULP_COND_OPC_EXT_MEM_IS_SET, + }, + /* cond_execute: act_tid: 9, int_flow_counter_tbl.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, + .cond_operand = BNXT_ULP_ACT_BIT_COUNT + }, + /* cond_execute: act_tid: 9, int_full_act_record.0 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_EXT_MEM_NOT_SET, } }; @@ -2252,7 +2543,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST >> 8) & 0xff, BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST & 0xff} }, - /* act_tid: 3, , table: int_encap_mac_record.0 */ + /* act_tid: 3, , table: int_encap_vlan_record.0 */ { .description = "ecv_valid", .field_bit_size = 1, @@ -2753,114 +3044,467 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { ULP_WP_SYM_DECAP_FUNC_THRU_L2} }, { - .description = "vnic_or_vport", - .field_bit_size = 12, + .description = "vnic_or_vport", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff} + }, + { + .description = "pop_vlan", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "meter", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "mirror", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "drop", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "ecv_valid", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + ULP_WP_SYM_ECV_VALID_YES} + }, + { + .description = "ecv_custom_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "ecv_vtag_type", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "ecv_l2_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "ecv_l3_type", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "ecv_l4_type", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "ecv_tun_type", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "vtag_tpid", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "vtag_pcp", + .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "vtag_de", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "vtag_vid", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + /* act_tid: 4, , table: int_flow_counter_tbl.0 */ + { + .description = "count", + .field_bit_size = 64, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + /* act_tid: 4, , table: vnic_interface_rss_config.0 */ + /* act_tid: 4, , table: vnic_interface_queue_config.0 */ + /* act_tid: 4, , table: int_full_act_record.0 */ + { + .description = "flow_cntr_ptr", + .field_bit_size = 14, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff} + }, + { + .description = "age_enable", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "agg_cntr_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "rate_cntr_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "flow_cntr_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_COUNT & 0xff} + }, + { + .description = "tcpflags_key", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tcpflags_mir", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tcpflags_match", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "encap_ptr", + .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "dst_ip_ptr", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tcp_dst_port", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "src_ip_ptr", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tcp_src_port", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "meter_id", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_rdir", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_rdir", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_ttl_dec", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_ttl_dec", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "decap_func", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "vnic_or_vport", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_RSS_VNIC >> 8) & 0xff, + BNXT_ULP_RF_IDX_RSS_VNIC & 0xff} + }, + { + .description = "pop_vlan", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "meter", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "mirror", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "drop", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "hit", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "type", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + /* act_tid: 4, , table: int_full_act_record.1 */ + { + .description = "flow_cntr_ptr", + .field_bit_size = 14, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff} + }, + { + .description = "age_enable", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "agg_cntr_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "rate_cntr_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "flow_cntr_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_COUNT & 0xff} + }, + { + .description = "tcpflags_key", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tcpflags_mir", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tcpflags_match", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "encap_ptr", + .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "dst_ip_ptr", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tcp_dst_port", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, - .field_opr1 = { - (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "pop_vlan", - .field_bit_size = 1, + .description = "src_ip_ptr", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "meter", - .field_bit_size = 1, + .description = "tcp_src_port", + .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "mirror", - .field_bit_size = 2, + .description = "meter_id", + .field_bit_size = 10, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "drop", + .description = "l3_rdir", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ecv_valid", + .description = "tl3_rdir", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - ULP_WP_SYM_ECV_VALID_YES} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ecv_custom_en", + .description = "l3_ttl_dec", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ecv_vtag_type", - .field_bit_size = 4, + .description = "tl3_ttl_dec", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ecv_l2_en", - .field_bit_size = 1, + .description = "decap_func", + .field_bit_size = 4, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ecv_l3_type", - .field_bit_size = 3, + .description = "vnic_or_vport", + .field_bit_size = 12, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff} }, { - .description = "ecv_l4_type", - .field_bit_size = 3, + .description = "pop_vlan", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "ecv_tun_type", - .field_bit_size = 3, + .description = "meter", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "vtag_tpid", - .field_bit_size = 16, + .description = "mirror", + .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "vtag_pcp", - .field_bit_size = 3, + .description = "drop", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "vtag_de", + .description = "hit", .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { - .description = "vtag_vid", - .field_bit_size = 12, + .description = "type", + .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* act_tid: 4, , table: int_flow_counter_tbl.0 */ + /* act_tid: 6, , table: int_flow_counter_tbl.0 */ { .description = "count", .field_bit_size = 64, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* act_tid: 4, , table: int_vtag_encap_record.0 */ + /* act_tid: 6, , table: int_vtag_encap_record.0 */ { .description = "ecv_valid", .field_bit_size = 1, @@ -2940,7 +3584,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff, BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff} }, - /* act_tid: 4, , table: int_full_act_record.0 */ + /* act_tid: 6, , table: int_full_act_record.0 */ { .description = "flow_cntr_ptr", .field_bit_size = 14, @@ -3130,7 +3774,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* act_tid: 4, , table: ext_full_act_record.no_tag */ + /* act_tid: 6, , table: ext_full_act_record.no_tag */ { .description = "flow_cntr_ptr", .field_bit_size = 14, @@ -3385,7 +4029,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* act_tid: 4, , table: ext_full_act_record.one_tag */ + /* act_tid: 6, , table: ext_full_act_record.one_tag */ { .description = "flow_cntr_ptr", .field_bit_size = 14, @@ -3660,14 +4304,14 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff, BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff} }, - /* act_tid: 5, , table: int_flow_counter_tbl.0 */ + /* act_tid: 7, , table: int_flow_counter_tbl.0 */ { .description = "count", .field_bit_size = 64, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* act_tid: 5, , table: act_modify_ipv4_src.0 */ + /* act_tid: 7, , table: act_modify_ipv4_src.0 */ { .description = "ipv4_addr", .field_bit_size = 32, @@ -3677,7 +4321,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC >> 8) & 0xff, BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC & 0xff} }, - /* act_tid: 5, , table: act_modify_ipv4_dst.0 */ + /* act_tid: 7, , table: act_modify_ipv4_dst.0 */ { .description = "ipv4_addr", .field_bit_size = 32, @@ -3687,7 +4331,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST >> 8) & 0xff, BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST & 0xff} }, - /* act_tid: 5, , table: int_encap_mac_record.dummy */ + /* act_tid: 7, , table: int_encap_vlan_record.dummy */ { .description = "ecv_valid", .field_bit_size = 1, @@ -3758,7 +4402,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* act_tid: 5, , table: int_full_act_record.0 */ + /* act_tid: 7, , table: int_full_act_record.0 */ { .description = "flow_cntr_ptr", .field_bit_size = 14, @@ -3988,7 +4632,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* act_tid: 5, , table: ext_full_act_record.0 */ + /* act_tid: 7, , table: ext_full_act_record.0 */ { .description = "flow_cntr_ptr", .field_bit_size = 14, @@ -4288,14 +4932,14 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* act_tid: 6, , table: int_flow_counter_tbl.0 */ + /* act_tid: 8, , table: int_flow_counter_tbl.0 */ { .description = "count", .field_bit_size = 64, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* act_tid: 6, , table: sp_smac_ipv4.0 */ + /* act_tid: 8, , table: sp_smac_ipv4.0 */ { .description = "smac", .field_bit_size = 48, @@ -4314,7 +4958,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { (BNXT_ULP_ENC_FIELD_IPV4_SADDR >> 8) & 0xff, BNXT_ULP_ENC_FIELD_IPV4_SADDR & 0xff} }, - /* act_tid: 6, , table: sp_smac_ipv6.0 */ + /* act_tid: 8, , table: sp_smac_ipv6.0 */ { .description = "smac", .field_bit_size = 48, @@ -4333,7 +4977,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { (BNXT_ULP_ENC_FIELD_IPV6_SADDR >> 8) & 0xff, BNXT_ULP_ENC_FIELD_IPV6_SADDR & 0xff} }, - /* act_tid: 6, , table: int_tun_encap_record.0 */ + /* act_tid: 8, , table: int_tun_encap_record.0 */ { .description = "ecv_valid", .field_bit_size = 1, @@ -4836,7 +5480,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 & 0xff}, .field_src3 = BNXT_ULP_FIELD_SRC_SKIP }, - /* act_tid: 6, , table: int_full_act_record.0 */ + /* act_tid: 8, , table: int_full_act_record.0 */ { .description = "flow_cntr_ptr", .field_bit_size = 14, @@ -5011,7 +5655,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, - /* act_tid: 6, , table: ext_full_act_record_vxlan.0 */ + /* act_tid: 8, , table: ext_full_act_record_vxlan.0 */ { .description = "flow_cntr_ptr", .field_bit_size = 14, @@ -5684,6 +6328,185 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { (BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 >> 8) & 0xff, BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 & 0xff}, .field_src3 = BNXT_ULP_FIELD_SRC_SKIP + }, + /* act_tid: 9, , table: int_flow_counter_tbl.0 */ + { + .description = "count", + .field_bit_size = 64, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + /* act_tid: 9, , table: int_full_act_record.0 */ + { + .description = "flow_cntr_ptr", + .field_bit_size = 14, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_RF, + .field_opr1 = { + (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff} + }, + { + .description = "age_enable", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "agg_cntr_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "rate_cntr_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "flow_cntr_en", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACT_BIT_COUNT & 0xff} + }, + { + .description = "tcpflags_key", + .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tcpflags_mir", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tcpflags_match", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "encap_ptr", + .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "dst_ip_ptr", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tcp_dst_port", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "src_ip_ptr", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tcp_src_port", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "meter_id", + .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_rdir", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_rdir", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "l3_ttl_dec", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "tl3_ttl_dec", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "decap_func", + .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "vnic_or_vport", + .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, + .field_opr1 = { + (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff} + }, + { + .description = "pop_vlan", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "meter", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "mirror", + .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "drop", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "hit", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + { + .description = "type", + .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO } }; diff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_class.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_class.c index d1c3ebe065..f92253bb58 100644 --- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_class.c +++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_class.c @@ -1,10 +1,8 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2014-2021 Broadcom + * Copyright(c) 2014-2023 Broadcom * All rights reserved. */ -/* date: Fri Oct 8 11:41:10 2021 */ - #include "ulp_template_db_enum.h" #include "ulp_template_db_field.h" #include "ulp_template_struct.h" @@ -102,9 +100,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .key_start_idx = 1, - .blob_key_bit_size = 73, - .key_bit_size = 73, - .key_num_fields = 5, + .blob_key_bit_size = 89, + .key_bit_size = 89, + .key_num_fields = 6, .ident_start_idx = 1, .ident_nums = 1 }, @@ -136,7 +134,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_operand = BNXT_ULP_RF_IDX_RID, .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 6, + .key_start_idx = 7, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, @@ -160,10 +158,10 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 19, - .blob_key_bit_size = 73, - .key_bit_size = 73, - .key_num_fields = 5, + .key_start_idx = 20, + .blob_key_bit_size = 89, + .key_bit_size = 89, + .key_num_fields = 6, .result_start_idx = 13, .result_bit_size = 62, .result_num_fields = 4 @@ -183,7 +181,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 24, + .key_start_idx = 26, .blob_key_bit_size = 14, .key_bit_size = 14, .key_num_fields = 3, @@ -236,7 +234,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_operand = BNXT_ULP_RF_IDX_RID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 27, + .key_start_idx = 29, .blob_key_bit_size = 81, .key_bit_size = 81, .key_num_fields = 43, @@ -262,7 +260,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_operand = BNXT_ULP_RF_IDX_RID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 70, + .key_start_idx = 72, .blob_key_bit_size = 81, .key_bit_size = 81, .key_num_fields = 43, @@ -288,7 +286,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_operand = BNXT_ULP_RF_IDX_RID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 113, + .key_start_idx = 115, .blob_key_bit_size = 81, .key_bit_size = 81, .key_num_fields = 43, @@ -313,7 +311,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 156, + .key_start_idx = 158, .blob_key_bit_size = 14, .key_bit_size = 14, .key_num_fields = 3, @@ -334,7 +332,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 159, + .key_start_idx = 161, .blob_key_bit_size = 176, .key_bit_size = 176, .key_num_fields = 10, @@ -355,7 +353,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 169, + .key_start_idx = 171, .blob_key_bit_size = 448, .key_bit_size = 448, .key_num_fields = 10, @@ -376,7 +374,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 179, + .key_start_idx = 181, .blob_key_bit_size = 416, .key_bit_size = 416, .key_num_fields = 11, @@ -397,7 +395,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 190, + .key_start_idx = 192, .blob_key_bit_size = 448, .key_bit_size = 448, .key_num_fields = 11, @@ -418,7 +416,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 201, + .key_start_idx = 203, .blob_key_bit_size = 200, .key_bit_size = 200, .key_num_fields = 11, @@ -439,7 +437,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 212, + .key_start_idx = 214, .blob_key_bit_size = 448, .key_bit_size = 448, .key_num_fields = 11, @@ -461,9 +459,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 223, - .blob_key_bit_size = 16, - .key_bit_size = 16, + .key_start_idx = 225, + .blob_key_bit_size = 19, + .key_bit_size = 19, .key_num_fields = 2, .ident_start_idx = 9, .ident_nums = 1 @@ -496,7 +494,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_operand = BNXT_ULP_RF_IDX_RID, .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 225, + .key_start_idx = 227, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, @@ -520,9 +518,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 238, - .blob_key_bit_size = 16, - .key_bit_size = 16, + .key_start_idx = 240, + .blob_key_bit_size = 19, + .key_bit_size = 19, .key_num_fields = 2, .result_start_idx = 140, .result_bit_size = 52, @@ -553,10 +551,10 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 240, - .blob_key_bit_size = 73, - .key_bit_size = 73, - .key_num_fields = 5, + .key_start_idx = 242, + .blob_key_bit_size = 89, + .key_bit_size = 89, + .key_num_fields = 6, .ident_start_idx = 11, .ident_nums = 1 }, @@ -588,7 +586,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_operand = BNXT_ULP_RF_IDX_RID, .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 245, + .key_start_idx = 248, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, @@ -612,10 +610,10 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 258, - .blob_key_bit_size = 73, - .key_bit_size = 73, - .key_num_fields = 5, + .key_start_idx = 261, + .blob_key_bit_size = 89, + .key_bit_size = 89, + .key_num_fields = 6, .result_start_idx = 156, .result_bit_size = 62, .result_num_fields = 4 @@ -635,7 +633,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 263, + .key_start_idx = 267, .blob_key_bit_size = 14, .key_bit_size = 14, .key_num_fields = 3, @@ -672,7 +670,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .pri_operand = 1, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 266, + .key_start_idx = 270, .blob_key_bit_size = 81, .key_bit_size = 81, .key_num_fields = 43, @@ -695,7 +693,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 309, + .key_start_idx = 313, .blob_key_bit_size = 14, .key_bit_size = 14, .key_num_fields = 3, @@ -716,7 +714,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 312, + .key_start_idx = 316, .blob_key_bit_size = 112, .key_bit_size = 112, .key_num_fields = 8, @@ -737,7 +735,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 320, + .key_start_idx = 324, .blob_key_bit_size = 448, .key_bit_size = 448, .key_num_fields = 8, @@ -759,7 +757,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 328, + .key_start_idx = 332, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, @@ -780,10 +778,10 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 329, - .blob_key_bit_size = 73, - .key_bit_size = 73, - .key_num_fields = 5, + .key_start_idx = 333, + .blob_key_bit_size = 89, + .key_bit_size = 89, + .key_num_fields = 6, .ident_start_idx = 16, .ident_nums = 1 }, @@ -815,7 +813,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_operand = BNXT_ULP_RF_IDX_RID, .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 334, + .key_start_idx = 339, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, @@ -839,10 +837,10 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 347, - .blob_key_bit_size = 73, - .key_bit_size = 73, - .key_num_fields = 5, + .key_start_idx = 352, + .blob_key_bit_size = 89, + .key_bit_size = 89, + .key_num_fields = 6, .result_start_idx = 213, .result_bit_size = 62, .result_num_fields = 4 @@ -861,7 +859,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 352, + .key_start_idx = 358, .blob_key_bit_size = 14, .key_bit_size = 14, .key_num_fields = 3, @@ -914,7 +912,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_operand = BNXT_ULP_RF_IDX_RID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 355, + .key_start_idx = 361, .blob_key_bit_size = 81, .key_bit_size = 81, .key_num_fields = 43, @@ -940,7 +938,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_operand = BNXT_ULP_RF_IDX_RID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 398, + .key_start_idx = 404, .blob_key_bit_size = 81, .key_bit_size = 81, .key_num_fields = 43, @@ -964,7 +962,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 441, + .key_start_idx = 447, .blob_key_bit_size = 14, .key_bit_size = 14, .key_num_fields = 3, @@ -985,7 +983,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 444, + .key_start_idx = 450, .blob_key_bit_size = 176, .key_bit_size = 176, .key_num_fields = 10, @@ -1006,7 +1004,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 454, + .key_start_idx = 460, .blob_key_bit_size = 448, .key_bit_size = 448, .key_num_fields = 10, @@ -1027,7 +1025,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 464, + .key_start_idx = 470, .blob_key_bit_size = 416, .key_bit_size = 416, .key_num_fields = 11, @@ -1048,7 +1046,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 475, + .key_start_idx = 481, .blob_key_bit_size = 448, .key_bit_size = 448, .key_num_fields = 11, @@ -1090,7 +1088,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 486, + .key_start_idx = 492, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, @@ -1127,7 +1125,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 487, + .key_start_idx = 493, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, @@ -1151,7 +1149,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 500, + .key_start_idx = 506, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, @@ -1256,7 +1254,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 501, + .key_start_idx = 507, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, @@ -1291,7 +1289,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_operand = BNXT_ULP_RF_IDX_RID, .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 502, + .key_start_idx = 508, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, @@ -1315,7 +1313,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 515, + .key_start_idx = 521, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, @@ -1337,7 +1335,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 516, + .key_start_idx = 522, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, @@ -1372,7 +1370,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_operand = BNXT_ULP_RF_IDX_RID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 517, + .key_start_idx = 523, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, @@ -1396,7 +1394,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 530, + .key_start_idx = 536, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, @@ -1511,7 +1509,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 531, + .key_start_idx = 537, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, @@ -1546,7 +1544,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_operand = BNXT_ULP_RF_IDX_RID, .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 532, + .key_start_idx = 538, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, @@ -1570,7 +1568,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 545, + .key_start_idx = 551, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, @@ -1667,7 +1665,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 546, + .key_start_idx = 552, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, @@ -1691,7 +1689,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 559, + .key_start_idx = 565, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, @@ -1726,7 +1724,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_operand = BNXT_ULP_RF_IDX_RID, .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 560, + .key_start_idx = 566, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, @@ -1750,7 +1748,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 573, + .key_start_idx = 579, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, @@ -1837,7 +1835,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 574, + .key_start_idx = 580, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, @@ -1864,7 +1862,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 587, + .key_start_idx = 593, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, @@ -2243,6 +2241,20 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { BNXT_ULP_GLB_HF_ID_O_ETH_DMAC & 0xff} } }, + { + .field_info_mask = { + .description = "etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, /* class_tid: 1, , table: l2_cntxt_tcam.0 */ { .field_info_mask = { @@ -2595,6 +2607,20 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { BNXT_ULP_GLB_HF_ID_O_ETH_DMAC & 0xff} } }, + { + .field_info_mask = { + .description = "etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, /* class_tid: 1, , table: profile_tcam_cache.rd */ { .field_info_mask = { @@ -5933,7 +5959,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { { .field_info_mask = { .description = "svif", - .field_bit_size = 8, + .field_bit_size = 11, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -5942,7 +5968,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { }, .field_info_spec = { .description = "svif", - .field_bit_size = 8, + .field_bit_size = 11, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -6160,7 +6186,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { { .field_info_mask = { .description = "svif", - .field_bit_size = 8, + .field_bit_size = 11, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -6169,7 +6195,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { }, .field_info_spec = { .description = "svif", - .field_bit_size = 8, + .field_bit_size = 11, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -6281,6 +6307,20 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { BNXT_ULP_GLB_HF_ID_O_ETH_DMAC & 0xff} } }, + { + .field_info_mask = { + .description = "etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, /* class_tid: 2, , table: l2_cntxt_tcam.0 */ { .field_info_mask = { @@ -6455,7 +6495,9 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .description = "key_type", .field_bit_size = 2, .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr1 = { + 2} }, .field_info_spec = { .description = "key_type", @@ -6567,6 +6609,20 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { BNXT_ULP_GLB_HF_ID_O_ETH_DMAC & 0xff} } }, + { + .field_info_mask = { + .description = "etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, /* class_tid: 2, , table: profile_tcam_cache.f2_rd */ { .field_info_mask = { @@ -6736,14 +6792,14 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT, .field_opr1 = { - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff}, + ((uint64_t)BNXT_ULP_HDR_BIT_I_IPV4 >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_I_IPV4 >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_I_IPV4 >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_I_IPV4 >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_I_IPV4 >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_I_IPV4 >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_I_IPV4 >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_I_IPV4 & 0xff}, .field_src2 = BNXT_ULP_FIELD_SRC_CONST, .field_opr2 = { ULP_WP_SYM_L3_HDR_TYPE_IPV4}, @@ -7052,8 +7108,23 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "tl3_hdr_type", .field_bit_size = 4, - .field_opc = BNXT_ULP_FIELD_OPC_SRC1, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, + .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT, + .field_opr1 = { + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr2 = { + ULP_WP_SYM_TL3_HDR_TYPE_IPV4}, + .field_src3 = BNXT_ULP_FIELD_SRC_CONST, + .field_opr3 = { + ULP_WP_SYM_TL3_HDR_TYPE_IPV6} } }, { @@ -7759,6 +7830,20 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff} } }, + { + .field_info_mask = { + .description = "etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, /* class_tid: 3, , table: l2_cntxt_tcam.0 */ { .field_info_mask = { @@ -8111,6 +8196,20 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff} } }, + { + .field_info_mask = { + .description = "etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + }, + .field_info_spec = { + .description = "etype", + .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_SRC1, + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + } + }, /* class_tid: 3, , table: profile_tcam_cache.rd */ { .field_info_mask = { @@ -16767,3 +16866,4 @@ struct bnxt_ulp_mapper_ident_info ulp_wh_plus_class_ident_list[] = { .ident_bit_pos = 0 } }; + diff --git a/drivers/net/bnxt/tf_ulp/ulp_def_rules.c b/drivers/net/bnxt/tf_ulp/ulp_def_rules.c index 8790d7ac0d..fe1f65deb9 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_def_rules.c +++ b/drivers/net/bnxt/tf_ulp/ulp_def_rules.c @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2019-2021 Broadcom + * Copyright(c) 2019-2023 Broadcom * All rights reserved. */ @@ -296,6 +296,7 @@ int32_t ulp_default_flow_create(struct rte_eth_dev *eth_dev, struct ulp_tlv_param *param_list, uint32_t ulp_class_tid, + uint16_t port_id, uint32_t *flow_id) { struct ulp_rte_hdr_field hdr_field[BNXT_ULP_PROTO_HDR_MAX]; @@ -355,12 +356,16 @@ ulp_default_flow_create(struct rte_eth_dev *eth_dev, /* Get the function id */ if (ulp_port_db_port_func_id_get(ulp_ctx, - eth_dev->data->port_id, + port_id, &mapper_params.func_id)) { BNXT_TF_DBG(ERR, "conversion of port to func id failed\n"); goto err1; } + /* update the VF meta function id */ + ULP_COMP_FLD_IDX_WR(&mapper_params, BNXT_ULP_CF_IDX_VF_META_FID, + BNXT_ULP_META_VF_FLAG | mapper_params.func_id); + BNXT_TF_DBG(DEBUG, "Creating default flow with template id: %u\n", ulp_class_tid); @@ -498,7 +503,7 @@ bnxt_create_port_app_df_rule(struct bnxt *bp, uint8_t flow_type, return 0; } return ulp_default_flow_create(bp->eth_dev, param_list, flow_type, - flow_id); + port_id, flow_id); } int32_t @@ -526,8 +531,10 @@ bnxt_ulp_create_df_rules(struct bnxt *bp) rc = ulp_default_flow_db_cfa_action_get(bp->ulp_ctx, info->def_port_flow_id, &bp->tx_cfa_action); - if (rc) + + if (rc || BNXT_TESTPMD_EN(bp)) bp->tx_cfa_action = 0; + info->valid = true; return 0; } @@ -551,6 +558,7 @@ bnxt_create_port_vfr_default_rule(struct bnxt *bp, } }; return ulp_default_flow_create(bp->eth_dev, param_list, flow_type, + vfr_port_id, flow_id); } diff --git a/drivers/net/bnxt/tf_ulp/ulp_fc_mgr.c b/drivers/net/bnxt/tf_ulp/ulp_fc_mgr.c index 85c9cbb7f2..dee2c04b24 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_fc_mgr.c +++ b/drivers/net/bnxt/tf_ulp/ulp_fc_mgr.c @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2014-2021 Broadcom + * Copyright(c) 2014-2023 Broadcom * All rights reserved. */ @@ -311,7 +311,8 @@ ulp_fc_tf_flow_stat_get(struct bnxt_ulp_context *ctxt, uint32_t dev_id = 0; int32_t rc = 0; - tfp = bnxt_ulp_cntxt_tfp_get(ctxt, BNXT_ULP_SHARED_SESSION_NO); + tfp = bnxt_ulp_cntxt_tfp_get(ctxt, + ulp_flow_db_shared_session_get(res)); if (!tfp) { BNXT_TF_DBG(ERR, "Failed to get the truflow pointer\n"); return -EINVAL; @@ -437,8 +438,8 @@ void ulp_fc_mgr_alarm_cb(void *arg) { int rc = 0; - unsigned int j; - enum tf_dir i; + unsigned int j = 0; + enum tf_dir i = 0; struct bnxt_ulp_context *ctxt; struct bnxt_ulp_fc_info *ulp_fc_info; struct bnxt_ulp_device_params *dparms; @@ -472,7 +473,8 @@ ulp_fc_mgr_alarm_cb(void *arg) return; } - tfp = bnxt_ulp_cntxt_tfp_get(ctxt, BNXT_ULP_SHARED_SESSION_NO); + tfp = bnxt_ulp_cntxt_tfp_get(ctxt, + ulp_fc_info->sw_acc_tbl[i][j].session_type); if (!tfp) { BNXT_TF_DBG(ERR, "Failed to get the truflow pointer\n"); bnxt_ulp_cntxt_entry_release(); @@ -512,6 +514,15 @@ ulp_fc_mgr_alarm_cb(void *arg) if (!ulp_fc_info->sw_acc_tbl[i][j].valid) continue; hw_cntr_id = ulp_fc_info->sw_acc_tbl[i][j].hw_cntr_id; + tfp = bnxt_ulp_cntxt_tfp_get(ctxt, + ulp_fc_info->sw_acc_tbl[i][j].session_type); + if (!tfp) { + BNXT_TF_DBG(ERR, "Failed to get the truflow pointer\n"); + pthread_mutex_unlock(&ulp_fc_info->fc_lock); + bnxt_ulp_cntxt_entry_release(); + return; + } + rc = ulp_get_single_flow_stat(ctxt, tfp, ulp_fc_info, i, hw_cntr_id, dparms); if (rc) @@ -603,7 +614,8 @@ int32_t ulp_fc_mgr_start_idx_set(struct bnxt_ulp_context *ctxt, enum tf_dir dir, * */ int32_t ulp_fc_mgr_cntr_set(struct bnxt_ulp_context *ctxt, enum tf_dir dir, - uint32_t hw_cntr_id) + uint32_t hw_cntr_id, + enum bnxt_ulp_session_type session_type) { struct bnxt_ulp_fc_info *ulp_fc_info; uint32_t sw_cntr_idx; @@ -619,6 +631,7 @@ int32_t ulp_fc_mgr_cntr_set(struct bnxt_ulp_context *ctxt, enum tf_dir dir, sw_cntr_idx = hw_cntr_id - ulp_fc_info->shadow_hw_tbl[dir].start_idx; ulp_fc_info->sw_acc_tbl[dir][sw_cntr_idx].valid = true; ulp_fc_info->sw_acc_tbl[dir][sw_cntr_idx].hw_cntr_id = hw_cntr_id; + ulp_fc_info->sw_acc_tbl[dir][sw_cntr_idx].session_type = session_type; ulp_fc_info->num_entries++; pthread_mutex_unlock(&ulp_fc_info->fc_lock); diff --git a/drivers/net/bnxt/tf_ulp/ulp_fc_mgr.h b/drivers/net/bnxt/tf_ulp/ulp_fc_mgr.h index 9df5ae51a3..14836e0dd2 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_fc_mgr.h +++ b/drivers/net/bnxt/tf_ulp/ulp_fc_mgr.h @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2014-2021 Broadcom + * Copyright(c) 2014-2023 Broadcom * All rights reserved. */ @@ -29,6 +29,7 @@ struct sw_acc_counter { bool valid; uint32_t hw_cntr_id; uint32_t pc_flow_idx; + enum bnxt_ulp_session_type session_type; }; struct hw_fc_mem_info { @@ -118,7 +119,9 @@ int ulp_fc_mgr_start_idx_set(struct bnxt_ulp_context *ctxt, enum tf_dir dir, * */ int ulp_fc_mgr_cntr_set(struct bnxt_ulp_context *ctxt, enum tf_dir dir, - uint32_t hw_cntr_id); + uint32_t hw_cntr_id, + enum bnxt_ulp_session_type session_type); + /* * Reset the corresponding SW accumulator table entry based on * the difference between this counter ID and the starting diff --git a/drivers/net/bnxt/tf_ulp/ulp_flow_db.c b/drivers/net/bnxt/tf_ulp/ulp_flow_db.c index 9968311c44..2e6ea43ac1 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_flow_db.c +++ b/drivers/net/bnxt/tf_ulp/ulp_flow_db.c @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2014-2021 Broadcom + * Copyright(c) 2014-2023 Broadcom * All rights reserved. */ @@ -653,7 +653,8 @@ ulp_flow_db_resource_add(struct bnxt_ulp_context *ulp_ctxt, params->resource_hndl); ulp_fc_mgr_cntr_set(ulp_ctxt, params->direction, - params->resource_hndl); + params->resource_hndl, + ulp_flow_db_shared_session_get(params)); if (!ulp_fc_mgr_thread_isstarted(ulp_ctxt)) ulp_fc_mgr_thread_start(ulp_ctxt); @@ -1824,8 +1825,28 @@ ulp_flow_db_parent_flow_count_reset(struct bnxt_ulp_context *ulp_ctxt) * returns none */ void ulp_flow_db_shared_session_set(struct ulp_flow_db_res_params *res, - enum bnxt_ulp_shared_session shared) + enum bnxt_ulp_session_type s_type) { - if (res && (shared & BNXT_ULP_SHARED_SESSION_YES)) + if (res && (s_type & BNXT_ULP_SESSION_TYPE_SHARED)) res->fdb_flags |= ULP_FDB_FLAG_SHARED_SESSION; + else if (res && (s_type & BNXT_ULP_SESSION_TYPE_SHARED_WC)) + res->fdb_flags |= ULP_FDB_FLAG_SHARED_WC_SESSION; +} + +/* + * Get the shared bit for the flow db entry + * + * res [out] shared session type + */ +enum bnxt_ulp_session_type +ulp_flow_db_shared_session_get(struct ulp_flow_db_res_params *res) +{ + enum bnxt_ulp_session_type stype = BNXT_ULP_SESSION_TYPE_DEFAULT; + + if (res && (res->fdb_flags & ULP_FDB_FLAG_SHARED_SESSION)) + stype = BNXT_ULP_SESSION_TYPE_SHARED; + else if (res && (res->fdb_flags & ULP_FDB_FLAG_SHARED_WC_SESSION)) + stype = BNXT_ULP_SESSION_TYPE_SHARED_WC; + + return stype; } diff --git a/drivers/net/bnxt/tf_ulp/ulp_flow_db.h b/drivers/net/bnxt/tf_ulp/ulp_flow_db.h index ada34c0e6c..13a957fcff 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_flow_db.h +++ b/drivers/net/bnxt/tf_ulp/ulp_flow_db.h @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2014-2021 Broadcom + * Copyright(c) 2014-2023 Broadcom * All rights reserved. */ @@ -15,6 +15,7 @@ /* Defines for the fdb flag */ #define ULP_FDB_FLAG_SHARED_SESSION 0x1 +#define ULP_FDB_FLAG_SHARED_WC_SESSION 0x2 /* * Structure for the flow database resource information @@ -404,10 +405,18 @@ ulp_flow_db_parent_flow_count_reset(struct bnxt_ulp_context *ulp_ctxt); * Set the shared bit for the flow db entry * * res [in] Ptr to fdb entry - * shared [in] shared flag + * s_type [in] session flag * * returns none */ void ulp_flow_db_shared_session_set(struct ulp_flow_db_res_params *res, - enum bnxt_ulp_shared_session shared); + enum bnxt_ulp_session_type s_type); + +/* + * Get the shared bit for the flow db entry + * + * res [out] Shared session type + */ +enum bnxt_ulp_session_type +ulp_flow_db_shared_session_get(struct ulp_flow_db_res_params *res); #endif /* _ULP_FLOW_DB_H_ */ diff --git a/drivers/net/bnxt/tf_ulp/ulp_ha_mgr.c b/drivers/net/bnxt/tf_ulp/ulp_ha_mgr.c index 0030a487f5..42482b596f 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_ha_mgr.c +++ b/drivers/net/bnxt/tf_ulp/ulp_ha_mgr.c @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2019-2021 Broadcom + * Copyright(c) 2019-2023 Broadcom * All rights reserved. */ @@ -54,7 +54,7 @@ ulp_ha_mgr_state_set(struct bnxt_ulp_context *ulp_ctx, BNXT_TF_DBG(ERR, "Invalid parms in state get.\n"); return -EINVAL; } - tfp = bnxt_ulp_cntxt_tfp_get(ulp_ctx, BNXT_ULP_SHARED_SESSION_NO); + tfp = bnxt_ulp_cntxt_tfp_get(ulp_ctx, BNXT_ULP_SESSION_TYPE_DEFAULT); if (tfp == NULL) { BNXT_TF_DBG(ERR, "Unable to get the TFP.\n"); return -EINVAL; @@ -88,7 +88,7 @@ ulp_ha_mgr_tf_client_num_get(struct bnxt_ulp_context *ulp_ctx, BNXT_TF_DBG(ERR, "Invalid parms in client num get.\n"); return -EINVAL; } - tfp = bnxt_ulp_cntxt_tfp_get(ulp_ctx, BNXT_ULP_SHARED_SESSION_NO); + tfp = bnxt_ulp_cntxt_tfp_get(ulp_ctx, BNXT_ULP_SESSION_TYPE_DEFAULT); if (tfp == NULL) { BNXT_TF_DBG(ERR, "Unable to get the TFP.\n"); return -EINVAL; @@ -176,7 +176,7 @@ ulp_ha_mgr_timer_cb(void *arg) return; } - tfp = bnxt_ulp_cntxt_tfp_get(ulp_ctx, BNXT_ULP_SHARED_SESSION_YES); + tfp = bnxt_ulp_cntxt_tfp_get(ulp_ctx, BNXT_ULP_SESSION_TYPE_SHARED_WC); if (tfp == NULL) { BNXT_TF_DBG(ERR, "Unable to get the TFP.\n"); goto cb_restart; @@ -399,7 +399,7 @@ ulp_ha_mgr_state_get(struct bnxt_ulp_context *ulp_ctx, BNXT_TF_DBG(ERR, "Invalid parms in state get.\n"); return -EINVAL; } - tfp = bnxt_ulp_cntxt_tfp_get(ulp_ctx, BNXT_ULP_SHARED_SESSION_NO); + tfp = bnxt_ulp_cntxt_tfp_get(ulp_ctx, BNXT_ULP_SESSION_TYPE_DEFAULT); if (tfp == NULL) { BNXT_TF_DBG(ERR, "Unable to get the TFP.\n"); return -EINVAL; diff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.c b/drivers/net/bnxt/tf_ulp/ulp_mapper.c index 7774a5537a..1f459c52a4 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_mapper.c +++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.c @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2014-2021 Broadcom + * Copyright(c) 2014-2023 Broadcom * All rights reserved. */ @@ -115,7 +115,8 @@ ulp_mapper_glb_resource_write(struct bnxt_ulp_mapper_data *data, static int32_t ulp_mapper_resource_ident_allocate(struct bnxt_ulp_context *ulp_ctx, struct bnxt_ulp_mapper_data *mapper_data, - struct bnxt_ulp_glb_resource_info *glb_res) + struct bnxt_ulp_glb_resource_info *glb_res, + bool shared) { struct tf_alloc_identifier_parms iparms = { 0 }; struct tf_free_identifier_parms fparms; @@ -123,7 +124,9 @@ ulp_mapper_resource_ident_allocate(struct bnxt_ulp_context *ulp_ctx, struct tf *tfp; int32_t rc = 0; - tfp = bnxt_ulp_cntxt_tfp_get(ulp_ctx, BNXT_ULP_SHARED_SESSION_NO); + tfp = bnxt_ulp_cntxt_tfp_get(ulp_ctx, shared ? + BNXT_ULP_SESSION_TYPE_SHARED : + BNXT_ULP_SESSION_TYPE_DEFAULT); if (!tfp) return -EINVAL; @@ -167,7 +170,8 @@ ulp_mapper_resource_ident_allocate(struct bnxt_ulp_context *ulp_ctx, static int32_t ulp_mapper_resource_index_tbl_alloc(struct bnxt_ulp_context *ulp_ctx, struct bnxt_ulp_mapper_data *mapper_data, - struct bnxt_ulp_glb_resource_info *glb_res) + struct bnxt_ulp_glb_resource_info *glb_res, + bool shared) { struct tf_alloc_tbl_entry_parms aparms = { 0 }; struct tf_free_tbl_entry_parms free_parms = { 0 }; @@ -176,7 +180,9 @@ ulp_mapper_resource_index_tbl_alloc(struct bnxt_ulp_context *ulp_ctx, uint32_t tbl_scope_id; int32_t rc = 0; - tfp = bnxt_ulp_cntxt_tfp_get(ulp_ctx, BNXT_ULP_SHARED_SESSION_NO); + tfp = bnxt_ulp_cntxt_tfp_get(ulp_ctx, shared ? + BNXT_ULP_SESSION_TYPE_SHARED : + BNXT_ULP_SESSION_TYPE_DEFAULT); if (!tfp) return -EINVAL; @@ -728,6 +734,12 @@ ulp_mapper_priority_opc_process(struct bnxt_ulp_mapper_parms *parms, case BNXT_ULP_PRI_OPC_APP_PRI: *priority = parms->app_priority; break; + case BNXT_ULP_PRI_OPC_APP_PRI_OR_CONST: + if (parms->app_priority) + *priority = parms->app_priority; + else + *priority = tbl->pri_operand; + break; default: BNXT_TF_DBG(ERR, "Priority opcode not supported %d\n", tbl->pri_opcode); @@ -815,7 +827,7 @@ ulp_mapper_ident_process(struct bnxt_ulp_mapper_parms *parms, struct tf *tfp; int rc; - tfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx, tbl->shared_session); + tfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx, tbl->session_type); if (!tfp) { BNXT_TF_DBG(ERR, "Failed to get tf pointer\n"); return -EINVAL; @@ -853,7 +865,7 @@ ulp_mapper_ident_process(struct bnxt_ulp_mapper_parms *parms, fid_parms.resource_type = ident->ident_type; fid_parms.resource_hndl = iparms.id; fid_parms.critical_resource = tbl->critical_resource; - ulp_flow_db_shared_session_set(&fid_parms, tbl->shared_session); + ulp_flow_db_shared_session_set(&fid_parms, tbl->session_type); rc = ulp_mapper_fdb_opc_process(parms, tbl, &fid_parms); if (rc) { @@ -900,7 +912,7 @@ ulp_mapper_ident_extract(struct bnxt_ulp_mapper_parms *parms, int rc; /* Get the tfp from ulp context */ - tfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx, tbl->shared_session); + tfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx, tbl->session_type); if (!tfp) { BNXT_TF_DBG(ERR, "Failed to get tf pointer\n"); return -EINVAL; @@ -950,7 +962,7 @@ ulp_mapper_ident_extract(struct bnxt_ulp_mapper_parms *parms, fid_parms.resource_type = ident->ident_type; fid_parms.resource_hndl = sparms.search_id; fid_parms.critical_resource = tbl->critical_resource; - ulp_flow_db_shared_session_set(&fid_parms, tbl->shared_session); + ulp_flow_db_shared_session_set(&fid_parms, tbl->session_type); rc = ulp_mapper_fdb_opc_process(parms, tbl, &fid_parms); if (rc) { @@ -1682,7 +1694,7 @@ ulp_mapper_mark_gfid_process(struct bnxt_ulp_mapper_parms *parms, fid_parms.critical_resource = tbl->critical_resource; fid_parms.resource_type = mark_flag; fid_parms.resource_hndl = gfid; - ulp_flow_db_shared_session_set(&fid_parms, tbl->shared_session); + ulp_flow_db_shared_session_set(&fid_parms, tbl->session_type); rc = ulp_mapper_fdb_opc_process(parms, tbl, &fid_parms); if (rc) @@ -1730,7 +1742,7 @@ ulp_mapper_mark_act_ptr_process(struct bnxt_ulp_mapper_parms *parms, fid_parms.critical_resource = tbl->critical_resource; fid_parms.resource_type = mark_flag; fid_parms.resource_hndl = act_idx; - ulp_flow_db_shared_session_set(&fid_parms, tbl->shared_session); + ulp_flow_db_shared_session_set(&fid_parms, tbl->session_type); rc = ulp_mapper_fdb_opc_process(parms, tbl, &fid_parms); if (rc) @@ -1778,7 +1790,7 @@ ulp_mapper_mark_vfr_idx_process(struct bnxt_ulp_mapper_parms *parms, fid_parms.critical_resource = tbl->critical_resource; fid_parms.resource_type = mark_flag; fid_parms.resource_hndl = act_idx; - ulp_flow_db_shared_session_set(&fid_parms, tbl->shared_session); + ulp_flow_db_shared_session_set(&fid_parms, tbl->session_type); rc = ulp_mapper_fdb_opc_process(parms, tbl, &fid_parms); if (rc) @@ -1846,7 +1858,7 @@ ulp_mapper_tcam_tbl_entry_write(struct bnxt_ulp_mapper_parms *parms, uint16_t tmplen; int32_t rc; - tfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx, tbl->shared_session); + tfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx, tbl->session_type); if (!tfp) { BNXT_TF_DBG(ERR, "Failed to get truflow pointer\n"); return -EINVAL; @@ -2026,7 +2038,7 @@ ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms, return 0; } - tfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx, tbl->shared_session); + tfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx, tbl->session_type); if (!tfp) { BNXT_TF_DBG(ERR, "Failed to get truflow pointer\n"); return -EINVAL; @@ -2088,7 +2100,7 @@ ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms, /* For wild card tcam perform the post process to swap the blob */ if (ulp_mapper_tcam_is_wc_tcam(tbl)) { - if (dparms->dynamic_pad_en) { + if (dparms->wc_dynamic_pad_en) { /* Sets up the slices for writing to the WC TCAM */ rc = ulp_mapper_wc_tcam_tbl_dyn_post_process(dparms, key, mask, @@ -2204,7 +2216,7 @@ ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms, fid_parms.resource_type = tbl->resource_type; fid_parms.critical_resource = tbl->critical_resource; fid_parms.resource_hndl = idx; - ulp_flow_db_shared_session_set(&fid_parms, tbl->shared_session); + ulp_flow_db_shared_session_set(&fid_parms, tbl->session_type); rc = ulp_mapper_fdb_opc_process(parms, tbl, &fid_parms); if (rc) { @@ -2245,7 +2257,7 @@ ulp_mapper_em_tbl_process(struct bnxt_ulp_mapper_parms *parms, int32_t pad = 0; enum bnxt_ulp_byte_order key_order, res_order; - tfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx, tbl->shared_session); + tfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx, tbl->session_type); rc = bnxt_ulp_cntxt_mem_type_get(parms->ulp_ctx, &mtype); if (rc) { BNXT_TF_DBG(ERR, "Failed to get the mem type for EM\n"); @@ -2281,7 +2293,7 @@ ulp_mapper_em_tbl_process(struct bnxt_ulp_mapper_parms *parms, } /* if dynamic padding is enabled then add padding to result data */ - if (dparms->dynamic_pad_en) { + if (dparms->em_dynamic_pad_en) { /* add padding to make sure key is at byte boundary */ ulp_blob_pad_align(&key, ULP_BUFFER_ALIGN_8_BITS); @@ -2300,7 +2312,7 @@ ulp_mapper_em_tbl_process(struct bnxt_ulp_mapper_parms *parms, BNXT_TF_DBG(ERR, "Failed to build the result blob\n"); return rc; } - if (dparms->dynamic_pad_en) { + if (dparms->em_dynamic_pad_en) { uint32_t abits = dparms->em_blk_align_bits; /* when dynamic padding is enabled merge result + key */ @@ -2423,7 +2435,7 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms, bool shared = false; enum tf_tbl_type tbl_type = tbl->resource_type; - tfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx, tbl->shared_session); + tfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx, tbl->session_type); /* compute the blob size */ bit_size = ulp_mapper_dyn_blob_size_get(parms, tbl); @@ -2637,7 +2649,9 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms, sparms.idx = index; sparms.tbl_scope_id = tbl_scope_id; if (shared) - tfp = bnxt_ulp_cntxt_shared_tfp_get(parms->ulp_ctx); + tfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx, + tbl->session_type); + rc = tf_set_tbl_entry(tfp, &sparms); if (rc) { BNXT_TF_DBG(ERR, @@ -2671,7 +2685,7 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms, fid_parms.resource_sub_type = tbl->resource_sub_type; fid_parms.resource_hndl = index; fid_parms.critical_resource = tbl->critical_resource; - ulp_flow_db_shared_session_set(&fid_parms, tbl->shared_session); + ulp_flow_db_shared_session_set(&fid_parms, tbl->session_type); rc = ulp_mapper_fdb_opc_process(parms, tbl, &fid_parms); if (rc) { @@ -2721,7 +2735,7 @@ ulp_mapper_if_tbl_process(struct bnxt_ulp_mapper_parms *parms, enum bnxt_ulp_if_tbl_opc if_opc = tbl->tbl_opcode; uint32_t res_size; - tfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx, tbl->shared_session); + tfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx, tbl->session_type); /* Initialize the blob data */ if (!ulp_blob_init(&data, tbl->result_bit_size, parms->device_params->result_byte_order)) { @@ -3013,7 +3027,7 @@ ulp_mapper_gen_tbl_process(struct bnxt_ulp_mapper_parms *parms, fid_parms.resource_sub_type = tbl->resource_sub_type; fid_parms.resource_hndl = key_index; fid_parms.critical_resource = tbl->critical_resource; - ulp_flow_db_shared_session_set(&fid_parms, tbl->shared_session); + ulp_flow_db_shared_session_set(&fid_parms, tbl->session_type); rc = ulp_mapper_fdb_opc_process(parms, tbl, &fid_parms); if (rc) @@ -3077,12 +3091,14 @@ ulp_mapper_glb_resource_info_init(struct bnxt_ulp_context *ulp_ctx, case BNXT_ULP_RESOURCE_FUNC_IDENTIFIER: rc = ulp_mapper_resource_ident_allocate(ulp_ctx, mapper_data, - &glb_res[idx]); + &glb_res[idx], + false); break; case BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE: rc = ulp_mapper_resource_index_tbl_alloc(ulp_ctx, mapper_data, - &glb_res[idx]); + &glb_res[idx], + false); break; default: BNXT_TF_DBG(ERR, "Global resource %x not supported\n", @@ -3104,108 +3120,57 @@ static int32_t ulp_mapper_app_glb_resource_info_init(struct bnxt_ulp_context *ulp_ctx, struct bnxt_ulp_mapper_data *mapper_data) { - struct tf_get_shared_tbl_increment_parms iparms; struct bnxt_ulp_glb_resource_info *glb_res; - struct tf_get_session_info_parms sparms; - uint32_t num_entries, i, dev_id, res; - struct tf_resource_info *res_info; - uint32_t addend; - uint64_t regval; - enum tf_dir dir; - int32_t rc = 0; - struct tf *tfp; + uint32_t num_glb_res_ids, idx, dev_id; uint8_t app_id; + uint32_t rc = 0; - memset(&sparms, 0, sizeof(sparms)); - glb_res = bnxt_ulp_app_glb_resource_info_list_get(&num_entries); - if (!glb_res || !num_entries) { + glb_res = bnxt_ulp_app_glb_resource_info_list_get(&num_glb_res_ids); + if (!glb_res || !num_glb_res_ids) { BNXT_TF_DBG(ERR, "Invalid Arguments\n"); return -EINVAL; } - tfp = bnxt_ulp_cntxt_shared_tfp_get(ulp_ctx); - if (!tfp) { - BNXT_TF_DBG(ERR, "Failed to get tfp for app global init"); - return -EINVAL; - } - /* - * Retrieve the resources that were assigned during the shared session - * creation. - */ - rc = tf_get_session_info(tfp, &sparms); - if (rc) { - BNXT_TF_DBG(ERR, "Failed to get session info (%d)\n", rc); - return rc; - } - - rc = bnxt_ulp_cntxt_app_id_get(ulp_ctx, &app_id); + rc = bnxt_ulp_cntxt_dev_id_get(ulp_ctx, &dev_id); if (rc) { - BNXT_TF_DBG(ERR, "Failed to get the app id in glb init (%d).\n", + BNXT_TF_DBG(ERR, "Failed to get device_id for glb init (%d)\n", rc); - return rc; + return -EINVAL; } - rc = bnxt_ulp_cntxt_dev_id_get(ulp_ctx, &dev_id); + rc = bnxt_ulp_cntxt_app_id_get(ulp_ctx, &app_id); if (rc) { - BNXT_TF_DBG(ERR, "Failed to get dev id for app glb init (%d)\n", + BNXT_TF_DBG(ERR, "Failed to get app_id for glb init (%d)\n", rc); - return rc; + return -EINVAL; } - /* Store all the app global resources */ - for (i = 0; i < num_entries; i++) { - if (dev_id != glb_res[i].device_id || - app_id != glb_res[i].app_id) + /* Iterate the global resources and process each one */ + for (idx = 0; idx < num_glb_res_ids; idx++) { + if (dev_id != glb_res[idx].device_id || + glb_res[idx].app_id != app_id) continue; - dir = glb_res[i].direction; - res = glb_res[i].resource_type; - addend = 1; - - switch (glb_res[i].resource_func) { + switch (glb_res[idx].resource_func) { case BNXT_ULP_RESOURCE_FUNC_IDENTIFIER: - res_info = &sparms.session_info.ident[dir].info[res]; + rc = ulp_mapper_resource_ident_allocate(ulp_ctx, + mapper_data, + &glb_res[idx], + false); break; case BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE: - /* - * Tables may have various strides for the allocations. - * Need to account. - */ - memset(&iparms, 0, sizeof(iparms)); - iparms.dir = dir; - iparms.type = res; - rc = tf_get_shared_tbl_increment(tfp, &iparms); - if (rc) { - BNXT_TF_DBG(ERR, - "Failed to get addend for %s[%s] rc=(%d)\n", - tf_tbl_type_2_str(res), - tf_dir_2_str(dir), rc); - return rc; - } - addend = iparms.increment_cnt; - res_info = &sparms.session_info.tbl[dir].info[res]; - break; - case BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE: - res_info = &sparms.session_info.tcam[dir].info[res]; - break; - case BNXT_ULP_RESOURCE_FUNC_EM_TABLE: - res_info = &sparms.session_info.em[dir].info[res]; + rc = ulp_mapper_resource_index_tbl_alloc(ulp_ctx, + mapper_data, + &glb_res[idx], + false); break; default: - BNXT_TF_DBG(ERR, "Unknown resource func (0x%x)\n", - glb_res[i].resource_func); - continue; + BNXT_TF_DBG(ERR, "Global resource %x not supported\n", + glb_res[idx].resource_func); + rc = -EINVAL; + break; } - regval = tfp_cpu_to_be_64((uint64_t)res_info->start); - res_info->start += addend; - /* - * All resources written to the global regfile are shared for - * this function. - */ - rc = ulp_mapper_glb_resource_write(mapper_data, &glb_res[i], - regval, true); if (rc) return rc; } - return rc; } @@ -3216,69 +3181,76 @@ ulp_mapper_app_glb_resource_info_init(struct bnxt_ulp_context *ulp_ctx, static int32_t ulp_mapper_cond_opc_process(struct bnxt_ulp_mapper_parms *parms, enum bnxt_ulp_cond_opc opc, - uint32_t operand, + uint64_t operand, int32_t *res) { enum bnxt_ulp_flow_mem_type mtype = BNXT_ULP_FLOW_MEM_TYPE_INT; + uint32_t field_size = 0; int32_t rc = 0; - uint8_t bit; - uint64_t regval; + uint8_t bit, tmp; + uint64_t regval, result = 0; switch (opc) { case BNXT_ULP_COND_OPC_CF_IS_SET: if (operand < BNXT_ULP_CF_IDX_LAST) { - *res = ULP_COMP_FLD_IDX_RD(parms, operand); + result = ULP_COMP_FLD_IDX_RD(parms, operand); } else { - BNXT_TF_DBG(ERR, "comp field out of bounds %d\n", + BNXT_TF_DBG(ERR, + "comp field out of bounds %" PRIu64 "\n", operand); rc = -EINVAL; } break; case BNXT_ULP_COND_OPC_CF_NOT_SET: if (operand < BNXT_ULP_CF_IDX_LAST) { - *res = !ULP_COMP_FLD_IDX_RD(parms, operand); + result = !ULP_COMP_FLD_IDX_RD(parms, operand); } else { - BNXT_TF_DBG(ERR, "comp field out of bounds %d\n", + BNXT_TF_DBG(ERR, + "comp field out of bounds %" PRIu64 "\n", operand); rc = -EINVAL; } break; case BNXT_ULP_COND_OPC_ACT_BIT_IS_SET: if (operand < BNXT_ULP_ACT_BIT_LAST) { - *res = ULP_BITMAP_ISSET(parms->act_bitmap->bits, + result = ULP_BITMAP_ISSET(parms->act_bitmap->bits, operand); } else { - BNXT_TF_DBG(ERR, "action bit out of bounds %d\n", + BNXT_TF_DBG(ERR, + "action bit out of bounds %" PRIu64 "\n", operand); rc = -EINVAL; } break; case BNXT_ULP_COND_OPC_ACT_BIT_NOT_SET: if (operand < BNXT_ULP_ACT_BIT_LAST) { - *res = !ULP_BITMAP_ISSET(parms->act_bitmap->bits, + result = !ULP_BITMAP_ISSET(parms->act_bitmap->bits, operand); } else { - BNXT_TF_DBG(ERR, "action bit out of bounds %d\n", + BNXT_TF_DBG(ERR, + "action bit out of bounds %" PRIu64 "\n", operand); rc = -EINVAL; } break; case BNXT_ULP_COND_OPC_HDR_BIT_IS_SET: if (operand < BNXT_ULP_HDR_BIT_LAST) { - *res = ULP_BITMAP_ISSET(parms->hdr_bitmap->bits, + result = ULP_BITMAP_ISSET(parms->hdr_bitmap->bits, operand); } else { - BNXT_TF_DBG(ERR, "header bit out of bounds %d\n", + BNXT_TF_DBG(ERR, + "header bit out of bounds %" PRIu64 "\n", operand); rc = -EINVAL; } break; case BNXT_ULP_COND_OPC_HDR_BIT_NOT_SET: if (operand < BNXT_ULP_HDR_BIT_LAST) { - *res = !ULP_BITMAP_ISSET(parms->hdr_bitmap->bits, + result = !ULP_BITMAP_ISSET(parms->hdr_bitmap->bits, operand); } else { - BNXT_TF_DBG(ERR, "header bit out of bounds %d\n", + BNXT_TF_DBG(ERR, + "header bit out of bounds %" PRIu64 "\n", operand); rc = -EINVAL; } @@ -3286,80 +3258,110 @@ ulp_mapper_cond_opc_process(struct bnxt_ulp_mapper_parms *parms, case BNXT_ULP_COND_OPC_FIELD_BIT_IS_SET: rc = ulp_mapper_glb_field_tbl_get(parms, operand, &bit); if (rc) { - BNXT_TF_DBG(ERR, "invalid ulp_glb_field_tbl idx %d\n", + BNXT_TF_DBG(ERR, + "invalid ulp_glb_field_tbl idx %" PRIu64 "\n", operand); return -EINVAL; } - *res = ULP_INDEX_BITMAP_GET(parms->fld_bitmap->bits, bit); + result = ULP_INDEX_BITMAP_GET(parms->fld_bitmap->bits, bit); break; case BNXT_ULP_COND_OPC_FIELD_BIT_NOT_SET: rc = ulp_mapper_glb_field_tbl_get(parms, operand, &bit); if (rc) { - BNXT_TF_DBG(ERR, "invalid ulp_glb_field_tbl idx %d\n", + BNXT_TF_DBG(ERR, + "invalid ulp_glb_field_tbl idx %" PRIu64 "\n", operand); return -EINVAL; } - *res = !ULP_INDEX_BITMAP_GET(parms->fld_bitmap->bits, bit); + result = !ULP_INDEX_BITMAP_GET(parms->fld_bitmap->bits, bit); break; case BNXT_ULP_COND_OPC_RF_IS_SET: if (!ulp_regfile_read(parms->regfile, operand, ®val)) { - BNXT_TF_DBG(ERR, "regfile[%d] read oob\n", operand); + BNXT_TF_DBG(ERR, + "regfile[%" PRIu64 "] read oob\n", + operand); return -EINVAL; } - *res = regval != 0; + result = regval != 0; break; case BNXT_ULP_COND_OPC_RF_NOT_SET: if (!ulp_regfile_read(parms->regfile, operand, ®val)) { - BNXT_TF_DBG(ERR, "regfile[%d] read oob\n", operand); + BNXT_TF_DBG(ERR, + "regfile[%" PRIu64 "] read oob\n", operand); return -EINVAL; } - *res = regval == 0; + result = regval == 0; break; case BNXT_ULP_COND_OPC_FLOW_PAT_MATCH: - *res = parms->flow_pattern_id == operand; + result = parms->flow_pattern_id == operand; break; case BNXT_ULP_COND_OPC_ACT_PAT_MATCH: - *res = parms->act_pattern_id == operand; + result = parms->act_pattern_id == operand; break; case BNXT_ULP_COND_OPC_EXT_MEM_IS_SET: if (bnxt_ulp_cntxt_mem_type_get(parms->ulp_ctx, &mtype)) { BNXT_TF_DBG(ERR, "Failed to get the mem type\n"); return -EINVAL; } - *res = (mtype == BNXT_ULP_FLOW_MEM_TYPE_INT) ? 0 : 1; + result = (mtype == BNXT_ULP_FLOW_MEM_TYPE_INT) ? 0 : 1; break; case BNXT_ULP_COND_OPC_EXT_MEM_NOT_SET: if (bnxt_ulp_cntxt_mem_type_get(parms->ulp_ctx, &mtype)) { BNXT_TF_DBG(ERR, "Failed to get the mem type\n"); return -EINVAL; } - *res = (mtype == BNXT_ULP_FLOW_MEM_TYPE_INT) ? 1 : 0; + result = (mtype == BNXT_ULP_FLOW_MEM_TYPE_INT) ? 1 : 0; break; case BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET: if (operand < BNXT_ULP_HDR_BIT_LAST) { - *res = ULP_BITMAP_ISSET(parms->enc_hdr_bitmap->bits, + result = ULP_BITMAP_ISSET(parms->enc_hdr_bitmap->bits, operand); } else { - BNXT_TF_DBG(ERR, "header bit out of bounds %d\n", + BNXT_TF_DBG(ERR, + "header bit out of bounds %" PRIu64 "\n", operand); rc = -EINVAL; } break; case BNXT_ULP_COND_OPC_ENC_HDR_BIT_NOT_SET: if (operand < BNXT_ULP_HDR_BIT_LAST) { - *res = !ULP_BITMAP_ISSET(parms->enc_hdr_bitmap->bits, + result = !ULP_BITMAP_ISSET(parms->enc_hdr_bitmap->bits, operand); } else { - BNXT_TF_DBG(ERR, "header bit out of bounds %d\n", + BNXT_TF_DBG(ERR, + "header bit out of bounds %" PRIu64 "\n", operand); rc = -EINVAL; } break; + case BNXT_ULP_COND_OPC_ACT_PROP_IS_SET: + case BNXT_ULP_COND_OPC_ACT_PROP_NOT_SET: + /* only supporting 1-byte action properties for now */ + if (operand >= BNXT_ULP_ACT_PROP_IDX_LAST) { + BNXT_TF_DBG(ERR, + "act_prop[%" PRIu64 "] oob\n", operand); + return -EINVAL; + } + field_size = ulp_mapper_act_prop_size_get(operand); + if (sizeof(tmp) != field_size) { + BNXT_TF_DBG(ERR, + "act_prop[%" PRIu64 "] field mismatch %u\n", + operand, field_size); + return -EINVAL; + } + tmp = parms->act_prop->act_details[operand]; + if (opc == BNXT_ULP_COND_OPC_ACT_PROP_IS_SET) + result = (int32_t)(tmp); + else + result = (int32_t)(!tmp); + break; default: BNXT_TF_DBG(ERR, "Invalid conditional opcode %d\n", opc); rc = -EINVAL; break; } + + *res = !!result; return (rc); } @@ -3797,10 +3799,7 @@ ulp_mapper_resource_free(struct bnxt_ulp_context *ulp, BNXT_TF_DBG(ERR, "Unable to free resource\n "); return -EINVAL; } - if (res->fdb_flags & ULP_FDB_FLAG_SHARED_SESSION) - tfp = bnxt_ulp_cntxt_tfp_get(ulp, BNXT_ULP_SHARED_SESSION_YES); - else - tfp = bnxt_ulp_cntxt_tfp_get(ulp, BNXT_ULP_SHARED_SESSION_NO); + tfp = bnxt_ulp_cntxt_tfp_get(ulp, ulp_flow_db_shared_session_get(res)); if (!tfp) { BNXT_TF_DBG(ERR, "Unable to free resource failed to get tfp\n"); return -EINVAL; @@ -4065,7 +4064,7 @@ ulp_mapper_init(struct bnxt_ulp_context *ulp_ctx) if (!ulp_ctx) return -EINVAL; - tfp = bnxt_ulp_cntxt_tfp_get(ulp_ctx, BNXT_ULP_SHARED_SESSION_NO); + tfp = bnxt_ulp_cntxt_tfp_get(ulp_ctx, BNXT_ULP_SESSION_TYPE_DEFAULT); if (!tfp) return -EINVAL; @@ -4136,7 +4135,7 @@ ulp_mapper_deinit(struct bnxt_ulp_context *ulp_ctx) return; } - tfp = bnxt_ulp_cntxt_tfp_get(ulp_ctx, BNXT_ULP_SHARED_SESSION_NO); + tfp = bnxt_ulp_cntxt_tfp_get(ulp_ctx, BNXT_ULP_SESSION_TYPE_DEFAULT); if (!tfp) { BNXT_TF_DBG(ERR, "Failed to acquire tfp.\n"); /* Free the mapper data regardless of errors. */ diff --git a/drivers/net/bnxt/tf_ulp/ulp_port_db.c b/drivers/net/bnxt/tf_ulp/ulp_port_db.c index f8ffb567b5..57c9e7d175 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_port_db.c +++ b/drivers/net/bnxt/tf_ulp/ulp_port_db.c @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2014-2021 Broadcom + * Copyright(c) 2014-2023 Broadcom * All rights reserved. */ @@ -118,8 +118,8 @@ int32_t ulp_port_db_deinit(struct bnxt_ulp_context *ulp_ctxt) * * Returns 0 on success or negative number on failure. */ -int32_t ulp_port_db_dev_port_intf_update(struct bnxt_ulp_context *ulp_ctxt, - struct rte_eth_dev *eth_dev) +int32_t ulp_port_db_port_update(struct bnxt_ulp_context *ulp_ctxt, + struct rte_eth_dev *eth_dev) { uint32_t port_id = eth_dev->data->port_id; struct ulp_phy_port_info *port_data; diff --git a/drivers/net/bnxt/tf_ulp/ulp_port_db.h b/drivers/net/bnxt/tf_ulp/ulp_port_db.h index f575a3c2e2..784b93f8b3 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_port_db.h +++ b/drivers/net/bnxt/tf_ulp/ulp_port_db.h @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2014-2021 Broadcom + * Copyright(c) 2014-2023 Broadcom * All rights reserved. */ @@ -11,6 +11,7 @@ #define BNXT_PORT_DB_MAX_INTF_LIST 256 #define BNXT_PORT_DB_MAX_FUNC 2048 #define BNXT_ULP_FREE_PARIF_BASE 11 +#define BNXT_ULP_META_VF_FLAG 0x1000 enum bnxt_ulp_svif_type { BNXT_ULP_DRV_FUNC_SVIF = 0, @@ -51,6 +52,7 @@ struct ulp_func_if_info { uint8_t func_parent_mac[RTE_ETHER_ADDR_LEN]; uint16_t phy_port_id; uint16_t ifindex; + uint16_t vf_meta_data; }; /* Structure for the Port database resource information. */ @@ -58,6 +60,7 @@ struct ulp_interface_info { enum bnxt_ulp_intf_type type; uint16_t drv_func_id; uint16_t vf_func_id; + uint8_t type_is_pf; }; struct ulp_phy_port_info { @@ -109,8 +112,8 @@ int32_t ulp_port_db_deinit(struct bnxt_ulp_context *ulp_ctxt); * * Returns 0 on success or negative number on failure. */ -int32_t ulp_port_db_dev_port_intf_update(struct bnxt_ulp_context *ulp_ctxt, - struct rte_eth_dev *eth_dev); +int32_t ulp_port_db_port_update(struct bnxt_ulp_context *ulp_ctxt, + struct rte_eth_dev *eth_dev); /* * Api to get the ulp ifindex for a given device port. @@ -167,7 +170,6 @@ int32_t ulp_port_db_spif_get(struct bnxt_ulp_context *ulp_ctxt, uint32_t ifindex, uint32_t dir, uint16_t *spif); - /* * Api to get the parif for a given ulp ifindex. * diff --git a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c index 80869b79c3..3566f3000b 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c +++ b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2014-2021 Broadcom + * Copyright(c) 2014-2023 Broadcom * All rights reserved. */ @@ -131,10 +131,6 @@ bnxt_ulp_rte_parser_hdr_parse(const struct rte_flow_item pattern[], params->field_idx = BNXT_ULP_PROTO_HDR_SVIF_NUM; - /* Set the computed flags for no vlan tags before parsing */ - ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_NO_VTAG, 1); - ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_NO_VTAG, 1); - /* Parse all the items in the pattern */ while (item && item->type != RTE_FLOW_ITEM_TYPE_END) { if (item->type >= (typeof(item->type)) @@ -515,8 +511,8 @@ ulp_rte_port_hdr_handler(const struct rte_flow_item *item, enum bnxt_ulp_direction_type item_dir; uint16_t ethdev_id; uint16_t mask = 0; - int32_t rc = BNXT_TF_RC_PARSE_ERR; uint32_t ifindex; + int32_t rc = BNXT_TF_RC_PARSE_ERR; if (!item->spec) { BNXT_TF_DBG(ERR, "ParseErr:Port spec is not valid\n"); @@ -535,6 +531,11 @@ ulp_rte_port_hdr_handler(const struct rte_flow_item *item, item_dir = BNXT_ULP_DIR_INVALID; ethdev_id = port_spec->id; mask = port_mask->id; + + if (!port_mask->id) { + ULP_BITMAP_SET(params->hdr_bitmap.bits, BNXT_ULP_HDR_BIT_SVIF_IGNORE); + mask = 0xff; + } break; } case RTE_FLOW_ITEM_TYPE_PORT_REPRESENTOR: { @@ -778,7 +779,7 @@ ulp_rte_vlan_hdr_handler(const struct rte_flow_item *item, outer_vtag_num++; ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_VTAG_NUM, outer_vtag_num); - ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_NO_VTAG, 0); + ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_HAS_VTAG, 1); ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_ONE_VTAG, 1); ULP_BITMAP_SET(params->hdr_bitmap.bits, BNXT_ULP_HDR_BIT_OO_VLAN); @@ -808,7 +809,7 @@ ulp_rte_vlan_hdr_handler(const struct rte_flow_item *item, inner_vtag_num++; ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_VTAG_NUM, inner_vtag_num); - ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_NO_VTAG, 0); + ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_HAS_VTAG, 1); ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_ONE_VTAG, 1); ULP_BITMAP_SET(params->hdr_bitmap.bits, BNXT_ULP_HDR_BIT_IO_VLAN); diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h index 3dcc6dbc0c..fb6fb3553b 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2014-2021 Broadcom + * Copyright(c) 2014-2023 Broadcom * All rights reserved. */ @@ -171,7 +171,7 @@ extern struct bnxt_ulp_act_match_info ulp_act_match_list[]; /* Device Specific Tables for mapper */ struct bnxt_ulp_mapper_cond_info { enum bnxt_ulp_cond_opc cond_opcode; - uint32_t cond_operand; + uint64_t cond_operand; }; struct bnxt_ulp_mapper_cond_list_info { @@ -233,10 +233,11 @@ struct bnxt_ulp_device_params { uint64_t packet_count_mask; uint32_t byte_count_shift; uint32_t packet_count_shift; - uint32_t dynamic_pad_en; + uint32_t wc_dynamic_pad_en; + uint32_t em_dynamic_pad_en; uint32_t dynamic_sram_en; uint32_t dyn_encap_list_size; - struct bnxt_ulp_dyn_size_map dyn_encap_sizes[4]; + struct bnxt_ulp_dyn_size_map dyn_encap_sizes[5]; uint32_t dyn_modify_list_size; struct bnxt_ulp_dyn_size_map dyn_modify_sizes[4]; uint16_t em_blk_size_bits; @@ -305,8 +306,11 @@ struct bnxt_ulp_mapper_tbl_info { enum bnxt_ulp_fdb_opc fdb_opcode; uint32_t fdb_operand; + /* Manage ref_cnt via opcode for generic tables */ + enum bnxt_ulp_ref_cnt_opc ref_cnt_opcode; + /* Shared session */ - enum bnxt_ulp_shared_session shared_session; + enum bnxt_ulp_session_type session_type; }; struct bnxt_ulp_mapper_field_info { @@ -340,6 +344,7 @@ struct bnxt_ulp_glb_resource_info { uint8_t app_id; enum bnxt_ulp_device_id device_id; enum tf_dir direction; + enum bnxt_ulp_session_type session_type; enum bnxt_ulp_resource_func resource_func; uint32_t resource_type; /* TF_ enum type */ enum bnxt_ulp_glb_rf_idx glb_regfile_index; @@ -349,6 +354,7 @@ struct bnxt_ulp_resource_resv_info { uint8_t app_id; enum bnxt_ulp_device_id device_id; enum tf_dir direction; + enum bnxt_ulp_session_type session_type; enum bnxt_ulp_resource_func resource_func; uint32_t resource_type; /* TF_ enum type */ uint32_t count; @@ -356,7 +362,13 @@ struct bnxt_ulp_resource_resv_info { struct bnxt_ulp_app_capabilities_info { uint8_t app_id; + uint32_t vxlan_port; + uint32_t vxlan_ip_port; enum bnxt_ulp_device_id device_id; + uint32_t upgrade_fw_update; + uint8_t ha_pool_id; + uint8_t ha_reg_state; + uint8_t ha_reg_cnt; uint32_t flags; }; -- 2.39.2 (Apple Git-143) --000000000000f5e76f05fae19c44 Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Transfer-Encoding: base64 Content-Disposition: attachment; filename="smime.p7s" Content-Description: S/MIME Cryptographic Signature MIIQdgYJKoZIhvcNAQcCoIIQZzCCEGMCAQExDzANBglghkgBZQMEAgEFADALBgkqhkiG9w0BBwGg gg3NMIIFDTCCA/WgAwIBAgIQeEqpED+lv77edQixNJMdADANBgkqhkiG9w0BAQsFADBMMSAwHgYD VQQLExdHbG9iYWxTaWduIFJvb3QgQ0EgLSBSMzETMBEGA1UEChMKR2xvYmFsU2lnbjETMBEGA1UE AxMKR2xvYmFsU2lnbjAeFw0yMDA5MTYwMDAwMDBaFw0yODA5MTYwMDAwMDBaMFsxCzAJBgNVBAYT AkJFMRkwFwYDVQQKExBHbG9iYWxTaWduIG52LXNhMTEwLwYDVQQDEyhHbG9iYWxTaWduIEdDQyBS MyBQZXJzb25hbFNpZ24gMiBDQSAyMDIwMIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEA vbCmXCcsbZ/a0fRIQMBxp4gJnnyeneFYpEtNydrZZ+GeKSMdHiDgXD1UnRSIudKo+moQ6YlCOu4t rVWO/EiXfYnK7zeop26ry1RpKtogB7/O115zultAz64ydQYLe+a1e/czkALg3sgTcOOcFZTXk38e aqsXsipoX1vsNurqPtnC27TWsA7pk4uKXscFjkeUE8JZu9BDKaswZygxBOPBQBwrA5+20Wxlk6k1 e6EKaaNaNZUy30q3ArEf30ZDpXyfCtiXnupjSK8WU2cK4qsEtj09JS4+mhi0CTCrCnXAzum3tgcH cHRg0prcSzzEUDQWoFxyuqwiwhHu3sPQNmFOMwIDAQABo4IB2jCCAdYwDgYDVR0PAQH/BAQDAgGG MGAGA1UdJQRZMFcGCCsGAQUFBwMCBggrBgEFBQcDBAYKKwYBBAGCNxQCAgYKKwYBBAGCNwoDBAYJ KwYBBAGCNxUGBgorBgEEAYI3CgMMBggrBgEFBQcDBwYIKwYBBQUHAxEwEgYDVR0TAQH/BAgwBgEB /wIBADAdBgNVHQ4EFgQUljPR5lgXWzR1ioFWZNW+SN6hj88wHwYDVR0jBBgwFoAUj/BLf6guRSSu TVD6Y5qL3uLdG7wwegYIKwYBBQUHAQEEbjBsMC0GCCsGAQUFBzABhiFodHRwOi8vb2NzcC5nbG9i YWxzaWduLmNvbS9yb290cjMwOwYIKwYBBQUHMAKGL2h0dHA6Ly9zZWN1cmUuZ2xvYmFsc2lnbi5j b20vY2FjZXJ0L3Jvb3QtcjMuY3J0MDYGA1UdHwQvMC0wK6ApoCeGJWh0dHA6Ly9jcmwuZ2xvYmFs c2lnbi5jb20vcm9vdC1yMy5jcmwwWgYDVR0gBFMwUTALBgkrBgEEAaAyASgwQgYKKwYBBAGgMgEo CjA0MDIGCCsGAQUFBwIBFiZodHRwczovL3d3dy5nbG9iYWxzaWduLmNvbS9yZXBvc2l0b3J5LzAN BgkqhkiG9w0BAQsFAAOCAQEAdAXk/XCnDeAOd9nNEUvWPxblOQ/5o/q6OIeTYvoEvUUi2qHUOtbf jBGdTptFsXXe4RgjVF9b6DuizgYfy+cILmvi5hfk3Iq8MAZsgtW+A/otQsJvK2wRatLE61RbzkX8 9/OXEZ1zT7t/q2RiJqzpvV8NChxIj+P7WTtepPm9AIj0Keue+gS2qvzAZAY34ZZeRHgA7g5O4TPJ /oTd+4rgiU++wLDlcZYd/slFkaT3xg4qWDepEMjT4T1qFOQIL+ijUArYS4owpPg9NISTKa1qqKWJ jFoyms0d0GwOniIIbBvhI2MJ7BSY9MYtWVT5jJO3tsVHwj4cp92CSFuGwunFMzCCA18wggJHoAMC AQICCwQAAAAAASFYUwiiMA0GCSqGSIb3DQEBCwUAMEwxIDAeBgNVBAsTF0dsb2JhbFNpZ24gUm9v dCBDQSAtIFIzMRMwEQYDVQQKEwpHbG9iYWxTaWduMRMwEQYDVQQDEwpHbG9iYWxTaWduMB4XDTA5 MDMxODEwMDAwMFoXDTI5MDMxODEwMDAwMFowTDEgMB4GA1UECxMXR2xvYmFsU2lnbiBSb290IENB IC0gUjMxEzARBgNVBAoTCkdsb2JhbFNpZ24xEzARBgNVBAMTCkdsb2JhbFNpZ24wggEiMA0GCSqG SIb3DQEBAQUAA4IBDwAwggEKAoIBAQDMJXaQeQZ4Ihb1wIO2hMoonv0FdhHFrYhy/EYCQ8eyip0E XyTLLkvhYIJG4VKrDIFHcGzdZNHr9SyjD4I9DCuul9e2FIYQebs7E4B3jAjhSdJqYi8fXvqWaN+J J5U4nwbXPsnLJlkNc96wyOkmDoMVxu9bi9IEYMpJpij2aTv2y8gokeWdimFXN6x0FNx04Druci8u nPvQu7/1PQDhBjPogiuuU6Y6FnOM3UEOIDrAtKeh6bJPkC4yYOlXy7kEkmho5TgmYHWyn3f/kRTv riBJ/K1AFUjRAjFhGV64l++td7dkmnq/X8ET75ti+w1s4FRpFqkD2m7pg5NxdsZphYIXAgMBAAGj QjBAMA4GA1UdDwEB/wQEAwIBBjAPBgNVHRMBAf8EBTADAQH/MB0GA1UdDgQWBBSP8Et/qC5FJK5N UPpjmove4t0bvDANBgkqhkiG9w0BAQsFAAOCAQEAS0DbwFCq/sgM7/eWVEVJu5YACUGssxOGhigH M8pr5nS5ugAtrqQK0/Xx8Q+Kv3NnSoPHRHt44K9ubG8DKY4zOUXDjuS5V2yq/BKW7FPGLeQkbLmU Y/vcU2hnVj6DuM81IcPJaP7O2sJTqsyQiunwXUaMld16WCgaLx3ezQA3QY/tRG3XUyiXfvNnBB4V 14qWtNPeTCekTBtzc3b0F5nCH3oO4y0IrQocLP88q1UOD5F+NuvDV0m+4S4tfGCLw0FREyOdzvcy a5QBqJnnLDMfOjsl0oZAzjsshnjJYS8Uuu7bVW/fhO4FCU29KNhyztNiUGUe65KXgzHZs7XKR1g/ XzCCBVUwggQ9oAMCAQICDAzZWuPidkrRZaiw2zANBgkqhkiG9w0BAQsFADBbMQswCQYDVQQGEwJC RTEZMBcGA1UEChMQR2xvYmFsU2lnbiBudi1zYTExMC8GA1UEAxMoR2xvYmFsU2lnbiBHQ0MgUjMg UGVyc29uYWxTaWduIDIgQ0EgMjAyMDAeFw0yMjA5MTAwODE4NDVaFw0yNTA5MTAwODE4NDVaMIGW MQswCQYDVQQGEwJJTjESMBAGA1UECBMJS2FybmF0YWthMRIwEAYDVQQHEwlCYW5nYWxvcmUxFjAU BgNVBAoTDUJyb2FkY29tIEluYy4xHDAaBgNVBAMTE0FqaXQgS3VtYXIgS2hhcGFyZGUxKTAnBgkq hkiG9w0BCQEWGmFqaXQua2hhcGFyZGVAYnJvYWRjb20uY29tMIIBIjANBgkqhkiG9w0BAQEFAAOC AQ8AMIIBCgKCAQEArZ/Aqg34lMOo2BabvAa+dRThl9OeUUJMob125dz+jvS78k4NZn1mYrHu53Dn YycqjtuSMlJ6vJuwN2W6QpgTaA2SDt5xTB7CwA2urpcm7vWxxLOszkr5cxMB1QBbTd77bXFuyTqW jrer3VIWqOujJ1n+n+1SigMwEr7PKQR64YKq2aRYn74ukY3DlQdKUrm2yUkcA7aExLcAwHWUna/u pZEyqKnwS1lKCzjX7mV5W955rFsFxChdAKfw0HilwtqdY24mhy62+GeaEkD0gYIj1tCmw9gnQToc K+0s7xEunfR9pBrzmOwS3OQbcP0nJ8SmQ8R+reroH6LYuFpaqK1rgQIDAQABo4IB2zCCAdcwDgYD VR0PAQH/BAQDAgWgMIGjBggrBgEFBQcBAQSBljCBkzBOBggrBgEFBQcwAoZCaHR0cDovL3NlY3Vy ZS5nbG9iYWxzaWduLmNvbS9jYWNlcnQvZ3NnY2NyM3BlcnNvbmFsc2lnbjJjYTIwMjAuY3J0MEEG CCsGAQUFBzABhjVodHRwOi8vb2NzcC5nbG9iYWxzaWduLmNvbS9nc2djY3IzcGVyc29uYWxzaWdu MmNhMjAyMDBNBgNVHSAERjBEMEIGCisGAQQBoDIBKAowNDAyBggrBgEFBQcCARYmaHR0cHM6Ly93 d3cuZ2xvYmFsc2lnbi5jb20vcmVwb3NpdG9yeS8wCQYDVR0TBAIwADBJBgNVHR8EQjBAMD6gPKA6 hjhodHRwOi8vY3JsLmdsb2JhbHNpZ24uY29tL2dzZ2NjcjNwZXJzb25hbHNpZ24yY2EyMDIwLmNy bDAlBgNVHREEHjAcgRphaml0LmtoYXBhcmRlQGJyb2FkY29tLmNvbTATBgNVHSUEDDAKBggrBgEF BQcDBDAfBgNVHSMEGDAWgBSWM9HmWBdbNHWKgVZk1b5I3qGPzzAdBgNVHQ4EFgQUbrcTuh0mr2qP xYdtyDgFeRIiE/gwDQYJKoZIhvcNAQELBQADggEBALrc1TljKrDhXicOaZlzIQyqOEkKAZ324i8X OwzA0n2EcPGmMZvgARurvanSLD3mLeeuyq1feCcjfGM1CJFh4+EY7EkbFbpVPOIdstSBhbnAJnOl aC/q0wTndKoC/xXBhXOZB8YL/Zq4ZclQLMUO6xi/fFRyHviI5/IrosdrpniXFJ9ukJoOXtvdrEF+ KlMYg/Deg9xo3wddCqQIsztHSkR4XaANdn+dbLRQpctZ13BY1lim4uz5bYn3M0IxyZWkQ1JuPHCK aRJv0SfR88PoI4RB7NCEHqFwARTj1KvFPQi8pK/YISFydZYbZrxQdyWDidqm4wSuJfpE6i0cWvCd u50xggJtMIICaQIBATBrMFsxCzAJBgNVBAYTAkJFMRkwFwYDVQQKExBHbG9iYWxTaWduIG52LXNh MTEwLwYDVQQDEyhHbG9iYWxTaWduIEdDQyBSMyBQZXJzb25hbFNpZ24gMiBDQSAyMDIwAgwM2Vrj 4nZK0WWosNswDQYJYIZIAWUDBAIBBQCggdQwLwYJKoZIhvcNAQkEMSIEIGDpl2xwKmFSQtnvVTLd bRdCJRVNbqV9HFOHeXyM2go7MBgGCSqGSIb3DQEJAzELBgkqhkiG9w0BBwEwHAYJKoZIhvcNAQkF MQ8XDTIzMDUwNDE3MzYzMVowaQYJKoZIhvcNAQkPMVwwWjALBglghkgBZQMEASowCwYJYIZIAWUD BAEWMAsGCWCGSAFlAwQBAjAKBggqhkiG9w0DBzALBgkqhkiG9w0BAQowCwYJKoZIhvcNAQEHMAsG CWCGSAFlAwQCATANBgkqhkiG9w0BAQEFAASCAQBhCKcpMm4KCPfUvU/SZBcQSsKIxW66iRsA3pWz mRDMZs92yz9onpeX8Iz7HOuUSUFsCiH1pYa4261hy1YDREeQb+l5e0YOa/Xs3/D1yVcpDlLJapwJ 6Bw9mrNxrfKOWarZHBf+Zzs3PpNzvaUj+hTCMdJhL7TjDyC998W+OOcTiUSBKxdQU672SoxbdF3f Y5ec2JvKM6wavCDS1BTalLgQrq7nO1aXUJKRse5+g5AqYYSb4iBj05NUxHXDOjoxoQUViKl1qYBg A0I/0oUmBQgeMwFCDu6vx6FLoEfbAaX3aM65fuyxKC+DIbN15M1ci7u+KMAoqGSb8qX93Eyiv9qt --000000000000f5e76f05fae19c44--